FreeBSD/Linux Kernel Cross Reference
sys/dev/pdq/if_fpa.c
1 /*-
2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software without specific prior written permission
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 *
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29
30 /*
31 * DEC PDQ FDDI Controller; code for BSD derived operating systems
32 *
33 * This module supports the DEC DEFPA PCI FDDI Controller
34 */
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/socket.h>
40
41 #include <sys/module.h>
42 #include <sys/bus.h>
43
44 #include <machine/bus.h>
45 #include <machine/resource.h>
46 #include <sys/rman.h>
47
48 #include <net/if.h>
49 #include <net/if_arp.h>
50 #include <net/if_media.h>
51 #include <net/fddi.h>
52
53 #include <dev/pci/pcivar.h>
54 #include <dev/pci/pcireg.h>
55
56 #include <dev/pdq/pdq_freebsd.h>
57 #include <dev/pdq/pdqreg.h>
58
59 #define DEC_VENDORID 0x1011
60 #define DEFPA_CHIPID 0x000F
61
62 #define DEFPA_LATENCY 0x88
63
64 #define PCI_CFLT 0x0C /* Configuration Latency */
65 #define PCI_CBMA 0x10 /* Configuration Base Memory Address */
66 #define PCI_CBIO 0x14 /* Configuration Base I/O Address */
67
68 static int pdq_pci_probe (device_t);
69 static int pdq_pci_attach (device_t);
70 static int pdq_pci_detach (device_t);
71 static void pdq_pci_shutdown (device_t);
72 static void pdq_pci_ifintr (void *);
73
74 static void
75 pdq_pci_ifintr(void *arg)
76 {
77 device_t dev;
78 pdq_softc_t *sc;
79
80 dev = (device_t)arg;
81 sc = device_get_softc(dev);
82
83 PDQ_LOCK(sc);
84 (void) pdq_interrupt(sc->sc_pdq);
85 PDQ_UNLOCK(sc);
86
87 return;
88 }
89
90 /*
91 * This is the PCI configuration support.
92 */
93 static int
94 pdq_pci_probe(device_t dev)
95 {
96 if (pci_get_vendor(dev) == DEC_VENDORID &&
97 pci_get_device(dev) == DEFPA_CHIPID) {
98 device_set_desc(dev, "Digital DEFPA PCI FDDI Controller");
99 return (BUS_PROBE_DEFAULT);
100 }
101
102 return (ENXIO);
103 }
104
105 static int
106 pdq_pci_attach(device_t dev)
107 {
108 pdq_softc_t *sc;
109 struct ifnet *ifp;
110 u_int32_t command;
111 int error;
112
113 sc = device_get_softc(dev);
114 ifp = sc->ifp;
115
116 sc->dev = dev;
117
118 /*
119 * Map control/status registers.
120 */
121 pci_enable_busmaster(dev);
122
123 command = pci_read_config(dev, PCIR_LATTIMER, 1);
124 if (command < DEFPA_LATENCY) {
125 command = DEFPA_LATENCY;
126 pci_write_config(dev, PCIR_LATTIMER, command, 1);
127 }
128
129 sc->mem_rid = PCI_CBMA;
130 sc->mem_type = SYS_RES_MEMORY;
131 sc->mem = bus_alloc_resource_any(dev, sc->mem_type, &sc->mem_rid,
132 RF_ACTIVE);
133 if (!sc->mem) {
134 device_printf(dev, "Unable to allocate I/O space resource.\n");
135 error = ENXIO;
136 goto bad;
137 }
138 sc->mem_bsh = rman_get_bushandle(sc->mem);
139 sc->mem_bst = rman_get_bustag(sc->mem);
140
141 sc->irq_rid = 0;
142 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
143 RF_SHAREABLE | RF_ACTIVE);
144 if (!sc->irq) {
145 device_printf(dev, "Unable to allocate interrupt resource.\n");
146 error = ENXIO;
147 goto bad;
148 }
149
150 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
151
152 sc->sc_pdq = pdq_initialize(sc->mem_bst, sc->mem_bsh,
153 ifp->if_xname, -1,
154 (void *)sc, PDQ_DEFPA);
155 if (sc->sc_pdq == NULL) {
156 device_printf(dev, "Initialization failed.\n");
157 error = ENXIO;
158 goto bad;
159 }
160
161 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET,
162 pdq_pci_ifintr, dev, &sc->irq_ih);
163 if (error) {
164 device_printf(dev, "Failed to setup interrupt handler.\n");
165 error = ENXIO;
166 goto bad;
167 }
168
169 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes,
170 (caddr_t) IFP2ENADDR(sc->ifp), FDDI_ADDR_LEN);
171 pdq_ifattach(sc);
172
173 return (0);
174 bad:
175 pdq_free(dev);
176 return (error);
177 }
178
179 static int
180 pdq_pci_detach (dev)
181 device_t dev;
182 {
183 pdq_softc_t *sc;
184
185 sc = device_get_softc(dev);
186 pdq_ifdetach(sc);
187
188 return (0);
189 }
190
191 static void
192 pdq_pci_shutdown(device_t dev)
193 {
194 pdq_softc_t *sc;
195
196 sc = device_get_softc(dev);
197 pdq_hwreset(sc->sc_pdq);
198
199 return;
200 }
201
202 static device_method_t pdq_pci_methods[] = {
203 /* Device interface */
204 DEVMETHOD(device_probe, pdq_pci_probe),
205 DEVMETHOD(device_attach, pdq_pci_attach),
206 DEVMETHOD(device_detach, pdq_pci_detach),
207 DEVMETHOD(device_shutdown, pdq_pci_shutdown),
208
209 { 0, 0 }
210 };
211
212 static driver_t pdq_pci_driver = {
213 "fpa",
214 pdq_pci_methods,
215 sizeof(pdq_softc_t),
216 };
217
218 DRIVER_MODULE(fpa, pci, pdq_pci_driver, pdq_devclass, 0, 0);
219 MODULE_DEPEND(fpa, pci, 1, 1, 1);
220 MODULE_DEPEND(fpa, fddi, 1, 1, 1);
Cache object: c8be9299e1863e0a4b840803c3d7baa7
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