fxr.watson.org: sys/dev/pms/RefTisa/tisa/sassata/common/tdinit.c

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sys/dev/pms/RefTisa/tisa/sassata/common/tdinit.c

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1 /******************************************************************************* 2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 3 * 4 *Redistribution and use in source and binary forms, with or without modification, are permitted provided 5 *that the following conditions are met: 6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 7 *following disclaimer. 8 *2. Redistributions in binary form must reproduce the above copyright notice, 9 *this list of conditions and the following disclaimer in the documentation and/or other materials provided 10 *with the distribution. 11 * 12 *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 13 *WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 14 *FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 15 *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16 *NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 17 *BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 19 *SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 20 21 22 ********************************************************************************/ 23 /*******************************************************************************/ 24 /** \file 25 * 26 * This file contains the SAS/SATA TD layer initialization functions 27 * 28 */ 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 #include <dev/pms/config.h> 32 33 #include <dev/pms/freebsd/driver/common/osenv.h> 34 #include <dev/pms/freebsd/driver/common/ostypes.h> 35 #include <dev/pms/freebsd/driver/common/osdebug.h> 36 37 #include <dev/pms/RefTisa/sallsdk/api/sa.h> 38 #include <dev/pms/RefTisa/sallsdk/api/saapi.h> 39 #include <dev/pms/RefTisa/sallsdk/api/saosapi.h> 40 41 #include <dev/pms/RefTisa/tisa/api/titypes.h> 42 #include <dev/pms/RefTisa/tisa/api/ostiapi.h> 43 #include <dev/pms/RefTisa/tisa/api/tiapi.h> 44 #include <dev/pms/RefTisa/tisa/api/tiglobal.h> 45 46 #ifdef FDS_SM 47 #include <dev/pms/RefTisa/sat/api/sm.h> 48 #include <dev/pms/RefTisa/sat/api/smapi.h> 49 #include <dev/pms/RefTisa/sat/api/tdsmapi.h> 50 #endif 51 52 #ifdef FDS_DM 53 #include <dev/pms/RefTisa/discovery/api/dm.h> 54 #include <dev/pms/RefTisa/discovery/api/dmapi.h> 55 #include <dev/pms/RefTisa/discovery/api/tddmapi.h> 56 #endif 57 58 #include <dev/pms/RefTisa/tisa/sassata/sas/common/tdtypes.h> 59 #include <dev/pms/freebsd/driver/common/osstring.h> 60 #include <dev/pms/RefTisa/tisa/sassata/common/tdutil.h> 61 62 #ifdef INITIATOR_DRIVER 63 #include <dev/pms/RefTisa/tisa/sassata/sas/ini/itdtypes.h> 64 #include <dev/pms/RefTisa/tisa/sassata/sas/ini/itddefs.h> 65 #include <dev/pms/RefTisa/tisa/sassata/sas/ini/itdglobl.h> 66 #endif 67 68 #ifdef TARGET_DRIVER 69 #include <dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdglobl.h> 70 #include <dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdxchg.h> 71 #include <dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdtypes.h> 72 #endif 73 74 #include <dev/pms/RefTisa/tisa/sassata/common/tdsatypes.h> 75 #include <dev/pms/RefTisa/tisa/sassata/common/tdproto.h> 76 77 LOCAL bit32 tdsaGetCardID(tiRoot_t * tiRoot); 78 79 80 bit32 tdCardIDList[TD_MAX_CARD_NUM] = { 81 TD_CARD_ID_FREE , TD_CARD_ID_FREE , 82 TD_CARD_ID_FREE , TD_CARD_ID_FREE , 83 TD_CARD_ID_FREE , TD_CARD_ID_FREE , 84 TD_CARD_ID_FREE , TD_CARD_ID_FREE , 85 TD_CARD_ID_FREE , TD_CARD_ID_FREE , 86 TD_CARD_ID_FREE , TD_CARD_ID_FREE , 87 TD_CARD_ID_FREE , TD_CARD_ID_FREE , 88 TD_CARD_ID_FREE , TD_CARD_ID_FREE , 89 TD_CARD_ID_FREE , TD_CARD_ID_FREE , 90 TD_CARD_ID_FREE , TD_CARD_ID_FREE 91 }; 92 93 /***************************************************************************** 94 * 95 * tdsaGetCardID 96 * 97 * Purpose: 98 * 99 * Parameters: 100 * 101 * tiRoot: Pointer to driver/port instance. 102 * 103 * Return: 104 * tiSuccess : CardIDString was successfully read 105 * tiError : CardIDString reading failed 106 * 107 *****************************************************************************/ 108 bit32 tdsaGetCardID(tiRoot_t * tiRoot) 109 { 110 bit32 i; 111 bit32 RetVal = 0xFFFFFFFF; 112 113 for (i = 0 ; i < TD_MAX_CARD_NUM ; i++) 114 { 115 if (tdCardIDList[i] == TD_CARD_ID_FREE) 116 { 117 tdCardIDList[i] = TD_CARD_ID_ALLOC; 118 RetVal = i; 119 break; 120 } 121 } 122 123 return RetVal; 124 125 } /* tdsaGetCardID() */ 126 127 /***************************************************************************** 128 * 129 * tdsaFreeCardID 130 * 131 * Purpose: 132 * 133 * Parameters: 134 * 135 * tiRoot: Pointer to driver/port instance. 136 * 137 * Return: 138 * tiSuccess : CardIDString was successfully read 139 * tiError : CardIDString reading failed 140 * 141 *****************************************************************************/ 142 osGLOBAL void 143 tdsaFreeCardID(tiRoot_t *tiRoot, bit32 CardID) 144 { 145 OS_ASSERT(CardID < TD_MAX_CARD_NUM, "Invalid CardID\n"); 146 147 tdCardIDList[CardID] = TD_CARD_ID_FREE; 148 149 return; 150 151 } /* tdFreeCardID() */ 152 153 /***************************************************************************** 154 * 155 * tdsaGetCardIDString 156 * 157 * Purpose: 158 * 159 * Parameters: 160 * 161 * tiRoot: Pointer to driver/port instance. 162 * 163 * Return: 164 * tiSuccess : CardIDString was successfully read 165 * tiError : CardIDString reading failed 166 * 167 *****************************************************************************/ 168 bit32 tdsaGetCardIDString(tiRoot_t *tiRoot) 169 { 170 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData; 171 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&(tdsaRoot->tdsaAllShared); 172 bit32 ret = tiError; 173 bit32 thisCardID = tdsaGetCardID(tiRoot); 174 char CardNum[10]; 175 176 TI_DBG3(("tdsaGetCardIDString: start\n")); 177 178 TI_DBG3(("tdsaGetCardIDString: thisCardID 0x%x\n", thisCardID)); 179 180 181 if (thisCardID == 0xFFFFFFFF) 182 { 183 TI_DBG1(("tdGetCardIDString: No more CardIDs available\n")); 184 ret = tiError; 185 } 186 else 187 { 188 tdsaAllShared->CardID = thisCardID; 189 osti_sprintf(CardNum,"CardNum%d", thisCardID); 190 TI_DBG3(("tdsaGetCardIDString: CardNum is %s\n", CardNum)); 191 osti_strcpy(tdsaAllShared->CardIDString, CardNum); 192 TI_DBG3(("tdsaGetCardIDString: tdsaAllShared->CardIDString is %s\n", tdsaAllShared->CardIDString)); 193 ret = tiSuccess; 194 195 } 196 return ret; 197 } 198 /***************************************************************************** 199 *! \brief tiCOMGetResource 200 * 201 * Purpose: This function is called to determine the Transport 202 * Dependent Layer internal resource requirement. 203 * This function will internally call the initiator specific, 204 * target specific and shared TD resource requirement calls. 205 * 206 * \param tiRoot: Pointer to driver/port instance. 207 * \param loResource: Pointer to low level TSDK resource requirement. 208 * \param initiatorResource: Pointer to initiator functionality memory and 209 * option requirement. 210 * \param targetResource: Pointer to target functionality memory and 211 * option requirement. 212 * \param tdSharedMem: Pointer to cached memory required by the 213 * target/initiator shared functionality. 214 * 215 * \return None 216 * 217 * \note - This function only return the memory requirement in the tiMem_t 218 * structure in loResource, initiatorResource, targetResource 219 * and tdSharedMem. It does not allocate memory, so the address 220 * fields in tiMem_t are not used. 221 * 222 *****************************************************************************/ 223 osGLOBAL void 224 tiCOMGetResource( 225 tiRoot_t *tiRoot, 226 tiLoLevelResource_t *loResource, 227 tiInitiatorResource_t *initiatorResource, 228 tiTargetResource_t *targetResource, 229 tiTdSharedMem_t *tdSharedMem 230 ) 231 { 232 TI_DBG6(("tiCOMGetResource start\n")); 233 TI_DBG6(("tiCOMGetResource: loResource %p\n", loResource)); 234 235 if(loResource != agNULL) 236 { 237 tdsaLoLevelGetResource(tiRoot, loResource); 238 } 239 if(tdSharedMem != agNULL) 240 { 241 tdsaSharedMemCalculate(tiRoot, loResource, tdSharedMem); 242 } 243 244 #ifdef INITIATOR_DRIVER 245 /* initiator */ 246 if(initiatorResource != agNULL) 247 { 248 itdssGetResource(tiRoot, initiatorResource); 249 /* 250 * for the time being set the initiator usecsPerTick 251 * same as lolevel usecsPerTick 252 */ 253 if (loResource == agNULL) 254 { 255 TI_DBG1(("tiCOMGetResource: loResource is NULL, wrong\n")); 256 return; 257 } 258 } 259 #endif 260 261 #ifdef TARGET_DRIVER 262 /* target */ 263 if(targetResource != agNULL) 264 { 265 ttdssGetResource(tiRoot, targetResource); 266 } 267 #endif 268 269 return; 270 } 271 272 273 /***************************************************************************** 274 *! \brief tiCOMInit 275 * 276 * Purpose: This function is called to initialize Transport Dependent Layer. 277 * This function will internally call the initiator specific, 278 * target specific and shared TD initialization calls. 279 * 280 * \param tiRoot: Pointer to target driver/port instance. 281 * \param loResource: Pointer to low level TSDK resource requirement. 282 * \param initiatorResource: Pointer to initiator functionality memory and 283 * option requirement. 284 * \param targetResource: Pointer to target functionality memory and 285 * option requirement. 286 * \param tdSharedMem: Pointer to cached memory required by the 287 * target/initiator shared functionality. 288 * 289 * \return: tiSuccess - if successful 290 * tiError - if failed 291 * 292 *****************************************************************************/ 293 osGLOBAL bit32 294 tiCOMInit( 295 tiRoot_t *tiRoot, 296 tiLoLevelResource_t *loResource, 297 tiInitiatorResource_t *initiatorResource, 298 tiTargetResource_t *targetResource, 299 tiTdSharedMem_t *tdSharedMem ) 300 { 301 tdsaRoot_t *tdsaRoot; 302 tdsaPortContext_t *tdsaPortContext; 303 tdsaDeviceData_t *tdsaDeviceData; 304 305 #ifdef TD_INT_COALESCE 306 tdsaIntCoalesceContext_t *tdsaIntCoalCxt; 307 #endif 308 309 #ifdef TD_DISCOVER 310 tdsaExpander_t *tdsaExpander; 311 #endif 312 313 bit32 status = tiSuccess; 314 void *IniAddr = agNULL; 315 void *TgtAddr = agNULL; 316 tdsaContext_t *tdsaAllShared; 317 #if defined(TD_INT_COALESCE) || defined(TD_DISCOVER) || defined(TD_INTERNAL_DEBUG) 318 bit32 MaxTargets; 319 #endif 320 #ifdef TD_INTERNAL_DEBUG /* for debugging only */ 321 tdsaEsglAllInfo_t *pEsglAllInfo; 322 tdList_t *tdlist_to_fill; 323 tdsaEsglPageInfo_t *page_to_fill; 324 #endif 325 bit32 i; 326 #ifdef FDS_DM 327 dmSwConfig_t dmSwConfig; 328 static dmMemoryRequirement_t dmMemRequirement; 329 bit32 dmUsecsPerTick = 0; 330 bit32 dmMaxNumLocks = 0; 331 #endif 332 #ifdef FDS_SM 333 smSwConfig_t smSwConfig; 334 static smMemoryRequirement_t smMemRequirement; 335 bit32 smUsecsPerTick = 0; 336 bit32 smMaxNumLocks = 0; 337 #endif 338 339 340 /* for memory analysis */ 341 TI_DBG6(("ticominit: tdsaroot\n")); 342 TI_DBG6(("ticominit: tdsaRoot_t %d\n", (int)sizeof(tdsaRoot_t))); 343 TI_DBG6(("ticominit: tdsaEsglAllInfo_t %d\n", (int)sizeof(tdsaEsglAllInfo_t))); 344 TI_DBG6(("ticominit: portcontext\n")); 345 TI_DBG6(("ticominit: tdsaPortContext_t %d\n", (int)sizeof(tdsaPortContext_t))); 346 TI_DBG6(("ticominit: device data\n")); 347 TI_DBG6(("ticominit: tdsaDeviceData_t %d\n", (int)sizeof(tdsaDeviceData_t))); 348 TI_DBG6(("ticominit: agsaSASDeviceInfo_t %d\n", (int)sizeof(agsaSASDeviceInfo_t))); 349 TI_DBG6(("ticominit: satDeviceData_t %d\n", (int)sizeof(satDeviceData_t))); 350 TI_DBG6(("ticominit: agsaSATAIdentifyData_t %d\n", (int)sizeof(agsaSATAIdentifyData_t))); 351 352 TI_DBG6(("ticominit: IO request body\n")); 353 TI_DBG6(("ticominit: tdIORequestBody_t %d\n", (int)sizeof(tdIORequestBody_t))); 354 TI_DBG6(("ticominit: tdssIOCompleted_t %d\n", (int)sizeof(tdssIOCompleted_t))); 355 TI_DBG6(("ticominit: agsaIORequest_t %d\n", (int)sizeof(agsaIORequest_t))); 356 357 TI_DBG6(("ticominit: FOR SAS\n")); 358 TI_DBG6(("ticominit: agsaSASRequestBody_t %d\n", (int)sizeof(agsaSASRequestBody_t))); 359 TI_DBG6(("ticominit: FOR SATA\n")); 360 TI_DBG6(("ticominit: agsaSATAInitiatorRequest_t %d\n", (int)sizeof(agsaSATAInitiatorRequest_t))); 361 TI_DBG6(("ticominit: scsiRspSense_t %d\n", (int)sizeof(scsiRspSense_t))); 362 TI_DBG6(("ticominit: tiSenseData_t %d\n", (int)sizeof(tiSenseData_t))); 363 TI_DBG6(("ticominit: satIOContext_t %d\n", (int)sizeof(satIOContext_t))); 364 TI_DBG6(("ticominit: satInternalIo_t %d\n", (int)sizeof(satInternalIo_t))); 365 366 367 /************************************************************************* 368 * TD SHARED AREA 369 *************************************************************************/ 370 371 TI_DBG6(("ticominit: start\n")); 372 373 374 #if defined(TD_INT_COALESCE) && defined(TD_DISCOVER) 375 376 /* Let's start from the tdsaRoot */ 377 tdsaRoot = tdSharedMem->tdSharedCachedMem1.virtPtr; 378 tdsaPortContext = (tdsaPortContext_t *)((bitptr)tdSharedMem->tdSharedCachedMem1.virtPtr + sizeof(tdsaRoot_t)); 379 tdsaDeviceData = (tdsaDeviceData_t *)((bitptr)tdsaPortContext + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT)); 380 381 /* the following fn fills in MaxTargets */ 382 tdssGetMaxTargetsParams(tiRoot, &MaxTargets); 383 TI_DBG6(("tiCOMInit: MaxTargets %d\n", MaxTargets)); 384 385 tdsaIntCoalCxt = 386 (tdsaIntCoalesceContext_t *)((bitptr)tdsaDeviceData 387 + (sizeof(tdsaDeviceData_t) * MaxTargets)); 388 389 tdsaExpander = 390 (tdsaExpander_t *)((bitptr)tdsaIntCoalCxt 391 + (sizeof(tdsaIntCoalesceContext_t) * TD_MAX_INT_COALESCE)); 392 393 394 #elif defined(TD_INT_COALESCE) 395 396 397 398 /* Let's start from the tdsaRoot */ 399 tdsaRoot = tdSharedMem->tdSharedCachedMem1.virtPtr; 400 tdsaPortContext = (tdsaPortContext_t *)((bitptr)tdSharedMem->tdSharedCachedMem1.virtPtr + sizeof(tdsaRoot_t)); 401 tdsaDeviceData = (tdsaDeviceData_t *)((bitptr)tdsaPortContext + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT)); 402 403 /* the following fn fills in MaxTargets */ 404 tdssGetMaxTargetsParams(tiRoot, &MaxTargets); 405 TI_DBG6(("tiCOMInit: MaxTargets %d\n", MaxTargets)); 406 407 tdsaIntCoalCxt = 408 (tdsaIntCoalesceContext_t *)((bitptr)tdsaDeviceData 409 + (sizeof(tdsaDeviceData_t) * MaxTargets)); 410 411 412 #elif defined(TD_DISCOVER) 413 414 415 /* Let's start from the tdsaRoot */ 416 tdsaRoot = tdSharedMem->tdSharedCachedMem1.virtPtr; 417 tdsaPortContext = (tdsaPortContext_t *)((bitptr)tdSharedMem->tdSharedCachedMem1.virtPtr + sizeof(tdsaRoot_t)); 418 tdsaDeviceData = (tdsaDeviceData_t *)((bitptr)tdsaPortContext + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT)); 419 420 /* the following fn fills in MaxTargets */ 421 tdssGetMaxTargetsParams(tiRoot, &MaxTargets); 422 TI_DBG6(("tiCOMInit: MaxTargets %d\n", MaxTargets)); 423 424 tdsaExpander = 425 (tdsaExpander_t *)((bitptr)tdsaDeviceData 426 + (sizeof(tdsaDeviceData_t) * MaxTargets)); 427 428 429 430 #else 431 432 /* Let's start from the tdsaRoot */ 433 tdsaRoot = tdSharedMem->tdSharedCachedMem1.virtPtr; 434 tdsaPortContext = (tdsaPortContext_t *)((bitptr)tdSharedMem->tdSharedCachedMem1.virtPtr + sizeof(tdsaRoot_t)); 435 tdsaDeviceData = (tdsaDeviceData_t *)((bitptr)tdsaPortContext + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT)); 436 437 #endif 438 439 TI_DBG6(("tiCOMInit: ******* tdsaRoot %p tdsaPortContext %p tdsaDeviceData %p\n", tdsaRoot, tdsaPortContext, tdsaDeviceData)); 440 441 442 tiRoot->tdData = tdsaRoot; 443 tdsaAllShared = &(tdsaRoot->tdsaAllShared); 444 445 446 #ifdef INITIATOR_DRIVER 447 /**< Initialize initiator; itdssIni_t itself */ 448 if(initiatorResource) 449 { 450 IniAddr = initiatorResource->initiatorMem.tdCachedMem[0].virtPtr; 451 tdsaRoot->itdsaIni = IniAddr; 452 tdsaRoot->itdsaIni->tdsaAllShared = tdsaAllShared; 453 tdsaAllShared->itdsaIni = tdsaRoot->itdsaIni; 454 } 455 #endif 456 457 #ifdef TARGET_DRIVER 458 /**< Initialize target; ttdssTgt_t itself */ 459 if(targetResource) 460 { 461 TgtAddr = targetResource->targetMem.tdMem[0].virtPtr; 462 tdsaRoot->ttdsaTgt = TgtAddr; 463 tdsaRoot->ttdsaTgt->tdsaAllShared = tdsaAllShared; 464 tdsaAllShared->ttdsaTgt = tdsaRoot->ttdsaTgt; 465 } 466 #endif /* target driver */ 467 468 TI_DBG5(("tiCOMInit: IniAddr %p TgtAddr %p\n", IniAddr, TgtAddr)); 469 470 TI_DBG3(("tiCOMInit: tdsaRoot %p tdsaAllShared %p \n",tdsaRoot, tdsaAllShared)); 471 472 /**< Initialize the OS data part of the interrupt context agRoot */ 473 tdsaAllShared->agRootOsDataForInt.tiRoot = tiRoot; 474 tdsaAllShared->agRootOsDataForInt.tdsaAllShared = (void *) tdsaAllShared; 475 tdsaAllShared->agRootOsDataForInt.itdsaIni = (void *) IniAddr; 476 tdsaAllShared->agRootOsDataForInt.ttdsaTgt = (void *) TgtAddr; 477 /* for sata */ 478 tdsaAllShared->agRootOsDataForInt.tdstHost = agNULL; 479 tdsaAllShared->agRootOsDataForInt.tdstDevice = agNULL; 480 481 /* tiInterruptContext is an enum value */ 482 tdsaAllShared->agRootOsDataForInt.IntContext = tiInterruptContext; 483 /* queueId or lockid in TD layer; LL maxlock + 1 since TD uses only one lock */ 484 485 /* agsaRoot_t */ 486 tdsaAllShared->agRootInt.osData = 487 (void *) &(tdsaAllShared->agRootOsDataForInt); 488 tdsaAllShared->agRootInt.sdkData = agNULL; 489 490 /**< Initialize the OS data part of the non-interrupt context agRoot */ 491 tdsaAllShared->agRootOsDataForNonInt.tiRoot = tiRoot; 492 tdsaAllShared->agRootOsDataForNonInt.tdsaAllShared = (void *) tdsaAllShared; 493 tdsaAllShared->agRootOsDataForNonInt.itdsaIni = (void *) IniAddr; 494 tdsaAllShared->agRootOsDataForNonInt.ttdsaTgt = (void *) TgtAddr; 495 /* for sata */ 496 tdsaAllShared->agRootOsDataForNonInt.tdstHost = agNULL; 497 tdsaAllShared->agRootOsDataForNonInt.tdstDevice = agNULL; 498 499 tdsaAllShared->agRootOsDataForNonInt.IntContext = tiNonInterruptContext; 500 /* queueId or lockid in TD layer; LL maxlock + 1 since TD uses only one lock */ 501 502 /* agsaRoot_t */ 503 tdsaAllShared->agRootNonInt.osData = 504 (void *) &(tdsaAllShared->agRootOsDataForNonInt); 505 tdsaAllShared->agRootNonInt.sdkData = agNULL; 506 507 tdsaAllShared->loResource = *loResource; 508 509 tdsaAllShared->PortContextMem = tdsaPortContext; 510 tdsaAllShared->DeviceMem = tdsaDeviceData; 511 512 tdsaAllShared->IBQnumber = 0; 513 tdsaAllShared->OBQnumber = 0; 514 515 #ifdef TD_INT_COALESCE 516 tdsaAllShared->IntCoalesce = tdsaIntCoalCxt; 517 #endif 518 519 #ifdef TD_DISCOVER 520 tdsaAllShared->ExpanderHead = tdsaExpander; 521 #endif 522 523 tdsaAllShared->MaxNumLocks = loResource->loLevelOption.numOfQueuesPerPort; 524 525 tdsaAllShared->MaxNumOSLocks = loResource->loLevelOption.maxNumOSLocks; 526 527 #if defined(FDS_DM) && defined(FDS_SM) 528 dmGetRequirements(agNULL, 529 &dmSwConfig, 530 &dmMemRequirement, 531 &dmUsecsPerTick, 532 &dmMaxNumLocks 533 ); 534 535 tdsaAllShared->MaxNumDMLocks = dmMaxNumLocks; 536 TI_DBG2(("tiCOMInit: DM MaxNumDMLocks 0x%x\n", tdsaAllShared->MaxNumDMLocks)); 537 538 smGetRequirements(agNULL, 539 &smSwConfig, 540 &smMemRequirement, 541 &smUsecsPerTick, 542 &smMaxNumLocks 543 ); 544 545 tdsaAllShared->MaxNumSMLocks = smMaxNumLocks; 546 TI_DBG2(("tiCOMInit: SM MaxNumSMLocks 0x%x\n", tdsaAllShared->MaxNumSMLocks)); 547 548 tdsaAllShared->MaxNumLLLocks = tdsaAllShared->MaxNumLocks - TD_MAX_LOCKS - tdsaAllShared->MaxNumDMLocks - tdsaAllShared->MaxNumSMLocks; 549 TI_DBG2(("tiCOMInit: LL MaxNumLLLocks 0x%x\n", tdsaAllShared->MaxNumLLLocks)); 550 551 #elif defined(FDS_DM) 552 dmGetRequirements(agNULL, 553 &dmSwConfig, 554 &dmMemRequirement, 555 &dmUsecsPerTick, 556 &dmMaxNumLocks 557 ); 558 559 tdsaAllShared->MaxNumDMLocks = dmMaxNumLocks; 560 TI_DBG2(("tiCOMInit: DM MaxNumDMLocks 0x%x\n", tdsaAllShared->MaxNumDMLocks)); 561 562 tdsaAllShared->MaxNumLLLocks = tdsaAllShared->MaxNumLocks - TD_MAX_LOCKS - tdsaAllShared->MaxNumDMLocks; 563 TI_DBG2(("tiCOMInit: LL MaxNumLLLocks 0x%x\n", tdsaAllShared->MaxNumLLLocks)); 564 #elif defined(FDS_SM) 565 smGetRequirements(agNULL, 566 &smSwConfig, 567 &smMemRequirement, 568 &smUsecsPerTick, 569 &smMaxNumLocks 570 ); 571 572 tdsaAllShared->MaxNumSMLocks = smMaxNumLocks; 573 TI_DBG2(("tiCOMInit: SM MaxNumSMLocks 0x%x\n", tdsaAllShared->MaxNumSMLocks)); 574 575 tdsaAllShared->MaxNumLLLocks = tdsaAllShared->MaxNumLocks - TD_MAX_LOCKS - tdsaAllShared->MaxNumSMLocks; 576 TI_DBG2(("tiCOMInit: LL MaxNumLLLocks 0x%x\n", tdsaAllShared->MaxNumLLLocks)); 577 #else 578 tdsaAllShared->MaxNumLLLocks = tdsaAllShared->MaxNumLocks - TD_MAX_LOCKS; 579 TI_DBG2(("tiCOMInit: LL MaxNumLLLocks 0x%x\n", tdsaAllShared->MaxNumLLLocks)); 580 #endif 581 582 #ifdef TBD 583 tdsaAllShared->MaxNumLLLocks = loResource->loLevelOption.numOfQueuesPerPort - TD_MAX_LOCKS; 584 #endif 585 586 tdsaAllShared->resetCount = 0; 587 588 /* used for saHwEventAck() and ossaDeregisterDeviceHandleCB() */ 589 // tdsaAllShared->EventValid = agFALSE; 590 for(i=0; i<TD_MAX_NUM_PHYS; i++) 591 { 592 tdsaAllShared->eventSource[i].EventValid = agFALSE; 593 tdsaAllShared->eventSource[i].Source.agPortContext = agNULL; 594 tdsaAllShared->eventSource[i].Source.event = 0; 595 /* phy ID */ 596 tdsaAllShared->eventSource[i].Source.param = 0xFF; 597 } 598 599 600 #ifdef TD_INTERNAL_DEBUG /* for debugging only */ 601 pEsglAllInfo = (tdsaEsglAllInfo_t *)&(tdsaAllShared->EsglAllInfo); 602 #endif 603 604 /* initialize CardIDString */ 605 osti_strcpy(tdsaAllShared->CardIDString,""); 606 607 608 #ifdef FDS_DM 609 tdsaAllShared->dmRoot.tdData = tdsaRoot; 610 #endif 611 612 #ifdef FDS_SM 613 tdsaAllShared->smRoot.tdData = tdsaRoot; 614 #endif 615 616 /* get card ID */ 617 if (tdsaGetCardIDString(tiRoot) == tiError) 618 { 619 TI_DBG1(("tdsaGetCardIDString() failed\n")); 620 return tiError; 621 } 622 623 /**< initializes jumptable */ 624 tdsaJumpTableInit(tiRoot); 625 626 /**< initializes tdsaPortStartInfo_s including flags */ 627 tdssInitSASPortStartInfo(tiRoot); 628 629 /* resets all the relevant flags */ 630 tdsaResetComMemFlags(tiRoot); 631 632 /**< initializes timers */ 633 tdsaInitTimers(tiRoot); 634 635 TI_DBG6(("ticominit: ******* before tdsaRoot %p tdsaPortContext %p tdsaDeviceData %p\n", tdsaRoot, tdsaPortContext, tdsaDeviceData)); 636 637 638 /**< initializes tdsaPortContext_t */ 639 tdsaPortContextInit(tiRoot); 640 641 /**< initializes devicelist in tdsaPortContext_t */ 642 tdsaDeviceDataInit(tiRoot); 643 644 #ifdef TD_INT_COALESCE 645 tdsaIntCoalCxtInit(tiRoot); 646 #endif 647 648 #ifdef TD_DISCOVER 649 tdsaExpanderInit(tiRoot); 650 #endif 651 652 tdsaQueueConfigInit(tiRoot); 653 654 #ifdef TD_INTERNAL_DEBUG /* for debugging only */ 655 TI_DBG6(("ticominit: temp 1\n")); 656 TDLIST_DEQUEUE_FROM_HEAD(&tdlist_to_fill, &pEsglAllInfo->freelist); 657 /* get the pointer to the page from list pointer */ 658 page_to_fill = TDLIST_OBJECT_BASE(tdsaEsglPageInfo_t, tdlist, tdlist_to_fill); 659 TI_DBG6(("ticominit: pageinfo ID %d\n", page_to_fill->id)); 660 /* this does not work */ 661 TDLIST_ENQUEUE_AT_HEAD(tdlist_to_fill, &pEsglAllInfo->freelist); 662 663 TI_DBG6(("ticominit: devide\n")); 664 TDLIST_DEQUEUE_FROM_HEAD(&tdlist_to_fill, &pEsglAllInfo->freelist); 665 /* get the pointer to the page from list pointer */ 666 page_to_fill = TDLIST_OBJECT_BASE(tdsaEsglPageInfo_t, tdlist, tdlist_to_fill); 667 TDINIT_PRINT("ticominit: second pageinfo ID %d\n", page_to_fill->id); 668 669 TDLIST_ENQUEUE_AT_HEAD(tdlist_to_fill, &pEsglAllInfo->freelist); 670 671 #endif 672 673 674 #ifdef INITIATOR_DRIVER 675 if(initiatorResource != agNULL) 676 { 677 tdsaAllShared->currentOperation |= TD_OPERATION_INITIATOR; 678 TI_DBG5(("tiCOMInit: calling itdssInit\n")); 679 status = itdssInit(tiRoot, initiatorResource, tdSharedMem); 680 681 if(status != tiSuccess) 682 { 683 TI_DBG1(("tiCOMInit: itdInit FAILED\n")); 684 return status; 685 } 686 } 687 #endif 688 689 #ifdef TARGET_DRIVER 690 if(targetResource != agNULL) 691 { 692 tdsaAllShared->currentOperation |= TD_OPERATION_TARGET; 693 TI_DBG5 (("tiCOMInit: calling ttdssInit\n")); 694 status = ttdssInit(tiRoot, targetResource, tdSharedMem); 695 696 if(status != tiSuccess) 697 { 698 TI_DBG1(("tiCOMInit: ttdInit FAILED\n")); 699 return status; 700 } 701 } 702 #endif 703 704 return status; 705 } 706 707 /***************************************************************************** 708 *! \brief tdsaLoLevelGetResource 709 * 710 * Purpose: This function is called to determine the Transport 711 * Dependent Layer internal resource requirement used by the 712 * lower layer TSDK. 713 * 714 * \param tiRoot: Pointer to driver/port instance. 715 * \param loResource: Pointer to low level TSDK resource requirement. 716 * 717 * \return: None 718 * 719 * \note - currenlty mem[0] - mem[18] are being used 720 * 721 *****************************************************************************/ 722 /* 723 this calls ostiGetTransportParam which parses the configuration file to get 724 parameters. 725 */ 726 osGLOBAL void 727 tdsaLoLevelGetResource( 728 tiRoot_t * tiRoot, 729 tiLoLevelResource_t * loResource) 730 { 731 agsaRoot_t agRoot; 732 bit32 usecsPerTick = 0; 733 agsaSwConfig_t SwConfig; 734 static agsaQueueConfig_t QueueConfig; 735 static agsaMemoryRequirement_t memRequirement; 736 bit32 maxQueueSets = 0; 737 bit32 maxNumOSLocks = 0; 738 bit32 i; 739 740 char *buffer; 741 bit32 buffLen; 742 bit32 lenRecv = 0; 743 char *pLastUsedChar = agNULL; 744 char globalStr[] = "Global"; 745 char iniParmsStr[] = "InitiatorParms"; 746 char SwParmsStr[] = "SWParms"; 747 char OBQueueProps[] = "OBQueueProps"; 748 char IBQueueProps[] = "IBQueueProps"; 749 750 static char IBQueueSize[30]; 751 static char OBQueueSize[30]; 752 static char IBQueueEleSize[30]; 753 static char OBQueueEleSize[30]; 754 755 static char OBQueueInterruptCount[30]; 756 static char OBQueueInterruptDelay[30]; 757 static char OBQueueInterruptEnable[30]; 758 static char IBQueuePriority[30]; 759 760 761 static char tmpBuffer[DEFAULT_KEY_BUFFER_SIZE]; 762 static bit32 InboundQueueSize[AGSA_MAX_OUTBOUND_Q]; 763 static bit32 OutboundQueueSize[AGSA_MAX_OUTBOUND_Q]; 764 static bit32 InboundQueueEleSize[AGSA_MAX_OUTBOUND_Q]; 765 static bit32 OutboundQueueEleSize[AGSA_MAX_OUTBOUND_Q]; 766 static bit32 InboundQueuePriority[AGSA_MAX_INBOUND_Q]; 767 static bit32 OutboundQueueInterruptDelay[AGSA_MAX_OUTBOUND_Q]; 768 static bit32 OutboundQueueInterruptCount[AGSA_MAX_OUTBOUND_Q]; 769 static bit32 OutboundQueueInterruptEnable[AGSA_MAX_OUTBOUND_Q]; 770 static bit32 cardID = 0; 771 char CardNum[10]; 772 773 #ifdef FDS_DM 774 dmRoot_t dmRoot; 775 dmSwConfig_t dmSwConfig; 776 static dmMemoryRequirement_t dmMemRequirement; 777 bit32 dmUsecsPerTick = 0; 778 bit32 dmMaxNumLocks = 0; 779 #endif 780 781 #ifdef FDS_SM 782 smRoot_t smRoot; 783 smSwConfig_t smSwConfig; 784 static smMemoryRequirement_t smMemRequirement; 785 bit32 smUsecsPerTick = 0; 786 bit32 smMaxNumLocks = 0; 787 #endif 788 789 TI_DBG1(("tdsaLoLevelGetResource: start \n")); 790 TI_DBG6(("tdsaLoLevelGetResource: loResource %p\n", loResource)); 791 792 osti_memset(&agRoot, 0, sizeof(agsaRoot_t)); 793 osti_memset(&QueueConfig, 0, sizeof(QueueConfig)); 794 osti_memset(&memRequirement, 0, sizeof(memRequirement)); 795 osti_memset(InboundQueueSize, 0, sizeof(InboundQueueSize)); 796 osti_memset(OutboundQueueSize, 0, sizeof(OutboundQueueSize)); 797 osti_memset(InboundQueueEleSize, 0, sizeof(InboundQueueEleSize)); 798 osti_memset(OutboundQueueEleSize, 0, sizeof(OutboundQueueEleSize)); 799 800 memRequirement.count = 0; 801 802 /* default values which are overwritten later */ 803 /* The followings are default values */ 804 SwConfig.maxActiveIOs = DEFAULT_MAX_ACTIVE_IOS; 805 SwConfig.numDevHandles = DEFAULT_MAX_DEV; 806 SwConfig.smpReqTimeout = DEFAULT_SMP_TIMEOUT; /* DEFAULT_VALUE; */ 807 SwConfig.numberOfEventRegClients = DEFAULT_NUM_REG_CLIENTS; 808 SwConfig.sizefEventLog1 = HOST_EVENT_LOG_SIZE; /* in KBytes */ 809 SwConfig.sizefEventLog2 = HOST_EVENT_LOG_SIZE; /* in KBytes */ 810 SwConfig.eventLog1Option = DEFAULT_EVENT_LOG_OPTION; 811 SwConfig.eventLog2Option = DEFAULT_EVENT_LOG_OPTION; 812 SwConfig.fatalErrorInterruptEnable = 1; 813 SwConfig.fatalErrorInterruptVector = 0; /* Was 1 */ 814 SwConfig.hostDirectAccessSupport = 0; 815 SwConfig.hostDirectAccessMode = 0; 816 SwConfig.FWConfig = 0; 817 SwConfig.enableDIF = agFALSE; 818 SwConfig.enableEncryption = agFALSE; 819 820 #ifdef SA_CONFIG_MDFD_REGISTRY 821 SwConfig.disableMDF = agFALSE; 822 #endif /*SA_CONFIG_MDFD_REGISTRY*/ 823 824 #if defined(SALLSDK_DEBUG) 825 SwConfig.sallDebugLevel = 1; /* DEFAULT_VALUE; */ 826 #endif 827 828 829 #ifdef SA_ENABLE_PCI_TRIGGER 830 SwConfig.PCI_trigger = 0; /* DEFAULT_VALUE; */ 831 #endif /* SA_ENABLE_PCI_TRIGGER */ 832 833 #ifdef FDS_DM 834 /* defaults */ 835 dmMemRequirement.count = 0; 836 dmSwConfig.numDevHandles = DEFAULT_MAX_DEV; 837 #ifdef DM_DEBUG 838 dmSwConfig.DMDebugLevel = 1; 839 #endif 840 #endif 841 842 #ifdef FDS_SM 843 /* defaults */ 844 smMemRequirement.count = 0; 845 smSwConfig.maxActiveIOs = DEFAULT_MAX_ACTIVE_IOS; 846 smSwConfig.numDevHandles = DEFAULT_MAX_DEV; 847 #ifdef SM_DEBUG 848 smSwConfig.SMDebugLevel = 1; 849 #endif 850 #endif 851 852 buffer = tmpBuffer; 853 buffLen = sizeof(tmpBuffer); 854 855 /* param3 points to QueueConfig; tdsaAllShared does not exit at this point yet */ 856 SwConfig.param3 = (void *)&QueueConfig; 857 858 osti_memset(buffer, 0, buffLen); 859 lenRecv = 0; 860 861 if ((ostiGetTransportParam( 862 tiRoot, 863 globalStr, 864 iniParmsStr, 865 agNULL, 866 agNULL, 867 agNULL, 868 agNULL, 869 "MaxTargets", 870 buffer, 871 buffLen, 872 &lenRecv 873 ) == tiSuccess) && (lenRecv != 0)) 874 { 875 if (osti_strncmp(buffer, "0x", 2) == 0) 876 { 877 SwConfig.numDevHandles = osti_strtoul (buffer, &pLastUsedChar, 0); 878 } 879 else 880 { 881 SwConfig.numDevHandles = osti_strtoul (buffer, &pLastUsedChar, 10); 882 } 883 TI_DBG2(("tdsaLoLevelGetResource: MaxTargets %d\n", SwConfig.numDevHandles)); 884 } 885 886 887 /* 888 * read the NumInboundQueue parameter 889 */ 890 osti_memset(buffer, 0, buffLen); 891 lenRecv = 0; 892 893 QueueConfig.numInboundQueues = DEFAULT_NUM_INBOUND_QUEUE; /* default 1 Inbound queue */ 894 895 if ((ostiGetTransportParam( 896 tiRoot, 897 globalStr, /* key */ 898 SwParmsStr, /* subkey1 */ 899 agNULL, /* subkey2 */ 900 agNULL, 901 agNULL, 902 agNULL, /* subkey5 */ 903 "NumInboundQueues", /* valueName */ 904 buffer, 905 buffLen, 906 &lenRecv 907 ) == tiSuccess) && (lenRecv != 0)) 908 { 909 if (osti_strncmp(buffer, "0x", 2) == 0) 910 { 911 QueueConfig.numInboundQueues = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 912 } 913 else 914 { 915 QueueConfig.numInboundQueues = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 916 } 917 918 if (QueueConfig.numInboundQueues > AGSA_MAX_INBOUND_Q) 919 { 920 QueueConfig.numInboundQueues = AGSA_MAX_INBOUND_Q; 921 } 922 } 923 924 /* 925 * read the NumOutboundQueue parameter 926 */ 927 osti_memset(buffer, 0, buffLen); 928 lenRecv = 0; 929 930 QueueConfig.numOutboundQueues = DEFAULT_NUM_OUTBOUND_QUEUE; /* default 1 Outbound queue */ 931 932 if ((ostiGetTransportParam( 933 tiRoot, 934 globalStr, /* key */ 935 SwParmsStr, /* subkey1 */ 936 agNULL, /* subkey2 */ 937 agNULL, 938 agNULL, 939 agNULL, /* subkey5 */ 940 "NumOutboundQueues", /* valueName */ 941 buffer, 942 buffLen, 943 &lenRecv 944 ) == tiSuccess) && (lenRecv != 0)) 945 { 946 if (osti_strncmp(buffer, "0x", 2) == 0) 947 { 948 QueueConfig.numOutboundQueues = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 949 } 950 else 951 { 952 QueueConfig.numOutboundQueues = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 953 } 954 955 if (QueueConfig.numOutboundQueues > AGSA_MAX_OUTBOUND_Q) 956 { 957 QueueConfig.numOutboundQueues = AGSA_MAX_OUTBOUND_Q; 958 } 959 } 960 961 /* 962 * read the MaxActiveIO parameter 963 */ 964 osti_memset(buffer, 0, buffLen); 965 lenRecv = 0; 966 967 968 if ((ostiGetTransportParam( 969 tiRoot, 970 globalStr, /* key */ 971 SwParmsStr, /* subkey1 */ 972 agNULL, /* subkey2 */ 973 agNULL, 974 agNULL, 975 agNULL, /* subkey5 */ 976 "MaxActiveIO", /* valueName */ 977 buffer, 978 buffLen, 979 &lenRecv 980 ) == tiSuccess) && (lenRecv != 0)) 981 { 982 if (osti_strncmp(buffer, "0x", 2) == 0) 983 { 984 SwConfig.maxActiveIOs = osti_strtoul (buffer, &pLastUsedChar, 0); 985 } 986 else 987 { 988 SwConfig.maxActiveIOs = osti_strtoul (buffer, &pLastUsedChar, 10); 989 } 990 } 991 992 993 994 /* 995 * read the SMPTO parameter (SMP Timeout) 996 */ 997 osti_memset(buffer, 0, buffLen); 998 lenRecv = 0; 999 1000 if ((ostiGetTransportParam( 1001 tiRoot, 1002 globalStr, /* key */ 1003 SwParmsStr, /* subkey1 */ 1004 agNULL, /* subkey2 */ 1005 agNULL, 1006 agNULL, 1007 agNULL, /* subkey5 */ 1008 "SMPTO", /* valueName */ 1009 buffer, 1010 buffLen, 1011 &lenRecv 1012 ) == tiSuccess) && (lenRecv != 0)) 1013 { 1014 if (osti_strncmp(buffer, "0x", 2) == 0) 1015 { 1016 SwConfig.smpReqTimeout = osti_strtoul (buffer, &pLastUsedChar, 0); 1017 } 1018 else 1019 { 1020 SwConfig.smpReqTimeout = osti_strtoul (buffer, &pLastUsedChar, 10); 1021 } 1022 } 1023 1024 /* 1025 * read the NumRegClients parameter 1026 */ 1027 osti_memset(buffer, 0, buffLen); 1028 lenRecv = 0; 1029 1030 if ((ostiGetTransportParam( 1031 tiRoot, 1032 globalStr, /* key */ 1033 SwParmsStr, /* subkey1 */ 1034 agNULL, /* subkey2 */ 1035 agNULL, 1036 agNULL, 1037 agNULL, /* subkey5 */ 1038 "NumRegClients", /* valueName */ 1039 buffer, 1040 buffLen, 1041 &lenRecv 1042 ) == tiSuccess) && (lenRecv != 0)) 1043 { 1044 if (osti_strncmp(buffer, "0x", 2) == 0) 1045 { 1046 SwConfig.numberOfEventRegClients = osti_strtoul (buffer, &pLastUsedChar, 0); 1047 } 1048 else 1049 { 1050 SwConfig.numberOfEventRegClients = osti_strtoul (buffer, &pLastUsedChar, 10); 1051 } 1052 } 1053 1054 #if defined(SALLSDK_DEBUG) 1055 osti_memset(buffer, 0, buffLen); 1056 lenRecv = 0; 1057 1058 if ((ostiGetTransportParam( 1059 tiRoot, 1060 globalStr, /* key */ 1061 SwParmsStr, /* subkey1 */ 1062 agNULL, /* subkey2 */ 1063 agNULL, 1064 agNULL, 1065 agNULL, /* subkey5 */ 1066 "LLDebugLevel", /* valueName */ 1067 buffer, 1068 buffLen, 1069 &lenRecv 1070 ) == tiSuccess) && (lenRecv != 0)) 1071 { 1072 if (osti_strncmp(buffer, "0x", 2) == 0) 1073 { 1074 SwConfig.sallDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 0); 1075 } 1076 else 1077 { 1078 SwConfig.sallDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 10); 1079 } 1080 } 1081 #endif 1082 1083 1084 #if defined(DM_DEBUG) 1085 osti_memset(buffer, 0, buffLen); 1086 lenRecv = 0; 1087 1088 if ((ostiGetTransportParam( 1089 tiRoot, 1090 globalStr, /* key */ 1091 SwParmsStr, /* subkey1 */ 1092 agNULL, /* subkey2 */ 1093 agNULL, 1094 agNULL, 1095 agNULL, /* subkey5 */ 1096 "DMDebugLevel", /* valueName */ 1097 buffer, 1098 buffLen, 1099 &lenRecv 1100 ) == tiSuccess) && (lenRecv != 0)) 1101 { 1102 if (osti_strncmp(buffer, "0x", 2) == 0) 1103 { 1104 dmSwConfig.DMDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 0); 1105 } 1106 else 1107 { 1108 dmSwConfig.DMDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 10); 1109 } 1110 } 1111 #endif 1112 1113 #if defined(SM_DEBUG) 1114 osti_memset(buffer, 0, buffLen); 1115 lenRecv = 0; 1116 1117 if ((ostiGetTransportParam( 1118 tiRoot, 1119 globalStr, /* key */ 1120 SwParmsStr, /* subkey1 */ 1121 agNULL, /* subkey2 */ 1122 agNULL, 1123 agNULL, 1124 agNULL, /* subkey5 */ 1125 "SMDebugLevel", /* valueName */ 1126 buffer, 1127 buffLen, 1128 &lenRecv 1129 ) == tiSuccess) && (lenRecv != 0)) 1130 { 1131 if (osti_strncmp(buffer, "0x", 2) == 0) 1132 { 1133 smSwConfig.SMDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 0); 1134 } 1135 else 1136 { 1137 smSwConfig.SMDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 10); 1138 } 1139 } 1140 #endif 1141 1142 osti_memset(buffer, 0, buffLen); 1143 lenRecv = 0; 1144 1145 for (i=0;i<QueueConfig.numInboundQueues;i++) 1146 { 1147 osti_sprintf(IBQueueSize,"IBQueueNumElements%d", i); 1148 osti_sprintf(IBQueueEleSize,"IBQueueElementSize%d", i); 1149 osti_sprintf(IBQueuePriority,"IBQueuePriority%d", i); 1150 1151 1152 1153 /* 1154 * read the IBQueueSize 1155 */ 1156 osti_memset(buffer, 0, buffLen); 1157 lenRecv = 0; 1158 1159 InboundQueueSize[i] = DEFAULT_INBOUND_QUEUE_SIZE; /* default 256 Inbound queue size */ 1160 1161 if ((ostiGetTransportParam( 1162 tiRoot, 1163 globalStr, /* key */ 1164 SwParmsStr, /* subkey1 */ 1165 IBQueueProps, /* subkey2 */ 1166 agNULL, 1167 agNULL, 1168 agNULL, /* subkey5 */ 1169 IBQueueSize, /* valueName */ 1170 buffer, 1171 buffLen, 1172 &lenRecv 1173 ) == tiSuccess) && (lenRecv != 0)) 1174 { 1175 if (osti_strncmp(buffer, "0x", 2) == 0) 1176 { 1177 InboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1178 } 1179 else 1180 { 1181 InboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1182 TI_DBG6(("tdsaLoLevelGetResource: queue number %d IB queue size %d\n", i, InboundQueueSize[i])); 1183 } 1184 } 1185 1186 1187 /* 1188 * read the IBQueueEleSize 1189 */ 1190 osti_memset(buffer, 0, buffLen); 1191 lenRecv = 0; 1192 1193 InboundQueueEleSize[i] = DEFAULT_INBOUND_QUEUE_ELE_SIZE; /* default 128 Inbound queue element */ 1194 1195 if ((ostiGetTransportParam( 1196 tiRoot, 1197 globalStr, /* key */ 1198 SwParmsStr, /* subkey1 */ 1199 IBQueueProps, /* subkey2 */ 1200 agNULL, 1201 agNULL, 1202 agNULL, /* subkey5 */ 1203 IBQueueEleSize, /* valueName */ 1204 buffer, 1205 buffLen, 1206 &lenRecv 1207 ) == tiSuccess) && (lenRecv != 0)) 1208 { 1209 if (osti_strncmp(buffer, "0x", 2) == 0) 1210 { 1211 InboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1212 } 1213 else 1214 { 1215 InboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1216 TI_DBG6(("tdsaLoLevelGetResource: queue number %d IB queue ele size %d\n", i, InboundQueueEleSize[i])); 1217 } 1218 } 1219 1220 /* 1221 * read the IBQueuePriority 1222 */ 1223 1224 osti_memset(buffer, 0, buffLen); 1225 lenRecv = 0; 1226 1227 InboundQueuePriority[i] = DEFAULT_INBOUND_QUEUE_PRIORITY; /* default 0 Inbound queue priority */ 1228 1229 if ((ostiGetTransportParam( 1230 tiRoot, 1231 globalStr, /* key */ 1232 SwParmsStr, /* subkey1 */ 1233 IBQueueProps,/* subkey2 */ 1234 agNULL, 1235 agNULL, 1236 agNULL, /* subkey5 */ 1237 IBQueuePriority, /* valueName */ 1238 buffer, 1239 buffLen, 1240 &lenRecv 1241 ) == tiSuccess) && (lenRecv != 0)) 1242 { 1243 if (osti_strncmp(buffer, "0x", 2) == 0) 1244 { 1245 InboundQueuePriority[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1246 } 1247 else 1248 { 1249 InboundQueuePriority[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1250 TI_DBG6(("tdsaLoLevelGetResource: queue number %d priority %d\n", i, InboundQueuePriority[i])); 1251 } 1252 } 1253 1254 /**********************************************/ 1255 osti_memset(buffer, 0, buffLen); 1256 lenRecv = 0; 1257 }/* end of loop */ 1258 1259 1260 osti_memset(buffer, 0, buffLen); 1261 lenRecv = 0; 1262 1263 for (i=0;i<QueueConfig.numOutboundQueues;i++) 1264 { 1265 osti_sprintf(OBQueueSize,"OBQueueNumElements%d", i); 1266 osti_sprintf(OBQueueEleSize,"OBQueueElementSize%d", i); 1267 osti_sprintf(OBQueueInterruptDelay,"OBQueueInterruptDelay%d", i); 1268 osti_sprintf(OBQueueInterruptCount,"OBQueueInterruptCount%d", i); 1269 osti_sprintf(OBQueueInterruptEnable,"OBQueueInterruptEnable%d", i); 1270 1271 /* 1272 * read the OBQueueSize 1273 */ 1274 osti_memset(buffer, 0, buffLen); 1275 lenRecv = 0; 1276 1277 OutboundQueueSize[i] = DEFAULT_OUTBOUND_QUEUE_SIZE; /* default 256 Outbound queue size */ 1278 1279 if ((ostiGetTransportParam( 1280 tiRoot, 1281 globalStr, /* key */ 1282 SwParmsStr, /* subkey1 */ 1283 OBQueueProps, /* subkey2 */ 1284 agNULL, 1285 agNULL, 1286 agNULL, /* subkey5 */ 1287 OBQueueSize, /* valueName */ 1288 buffer, 1289 buffLen, 1290 &lenRecv 1291 ) == tiSuccess) && (lenRecv != 0)) 1292 { 1293 if (osti_strncmp(buffer, "0x", 2) == 0) 1294 { 1295 OutboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1296 } 1297 else 1298 { 1299 OutboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1300 TI_DBG6(("tdsaLoLevelGetResource: queue number %d OB queue size %d\n", i, OutboundQueueSize[i])); 1301 } 1302 } 1303 1304 1305 /* 1306 * read the OBQueueEleSize 1307 */ 1308 osti_memset(buffer, 0, buffLen); 1309 lenRecv = 0; 1310 1311 OutboundQueueEleSize[i] = DEFAULT_OUTBOUND_QUEUE_ELE_SIZE; /* default 128 Outbound queue element */ 1312 1313 if ((ostiGetTransportParam( 1314 tiRoot, 1315 globalStr, /* key */ 1316 SwParmsStr, /* subkey1 */ 1317 OBQueueProps, /* subkey2 */ 1318 agNULL, 1319 agNULL, 1320 agNULL, /* subkey5 */ 1321 OBQueueEleSize, /* valueName */ 1322 buffer, 1323 buffLen, 1324 &lenRecv 1325 ) == tiSuccess) && (lenRecv != 0)) 1326 { 1327 if (osti_strncmp(buffer, "0x", 2) == 0) 1328 { 1329 OutboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1330 } 1331 else 1332 { 1333 OutboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1334 TI_DBG6(("tdsaLoLevelGetResource: queue number %d OB queue ele size %d\n", i, OutboundQueueEleSize[i])); 1335 } 1336 } 1337 1338 /* 1339 * read the OBQueueInterruptDelay 1340 */ 1341 osti_memset(buffer, 0, buffLen); 1342 lenRecv = 0; 1343 1344 OutboundQueueInterruptDelay[i] = DEFAULT_OUTBOUND_QUEUE_INTERRUPT_DELAY; /* default 1 Outbound interrupt delay */ 1345 1346 if ((ostiGetTransportParam( 1347 tiRoot, 1348 globalStr, /* key */ 1349 SwParmsStr, /* subkey1 */ 1350 OBQueueProps, /* subkey2 */ 1351 agNULL, 1352 agNULL, 1353 agNULL, /* subkey5 */ 1354 OBQueueInterruptDelay, /* valueName */ 1355 buffer, 1356 buffLen, 1357 &lenRecv 1358 ) == tiSuccess) && (lenRecv != 0)) 1359 { 1360 if (osti_strncmp(buffer, "0x", 2) == 0) 1361 { 1362 OutboundQueueInterruptDelay[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1363 } 1364 else 1365 { 1366 OutboundQueueInterruptDelay[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1367 TI_DBG6(("tdsaLoLevelGetResource: queue number %d interrupt delay %d\n", i, OutboundQueueInterruptDelay[i])); 1368 } 1369 } 1370 1371 /* 1372 * read the OBQueueInterruptCount 1373 */ 1374 1375 osti_memset(buffer, 0, buffLen); 1376 lenRecv = 0; 1377 1378 OutboundQueueInterruptCount[i] = DEFAULT_OUTBOUND_QUEUE_INTERRUPT_COUNT; /* default 1 Outbound interrupt count */ 1379 1380 if ((ostiGetTransportParam( 1381 tiRoot, 1382 globalStr, /* key */ 1383 SwParmsStr, /* subkey1 */ 1384 OBQueueProps, /* subkey2 */ 1385 agNULL, 1386 agNULL, 1387 agNULL, /* subkey5 */ 1388 OBQueueInterruptCount, /* valueName */ 1389 buffer, 1390 buffLen, 1391 &lenRecv 1392 ) == tiSuccess) && (lenRecv != 0)) 1393 { 1394 if (osti_strncmp(buffer, "0x", 2) == 0) 1395 { 1396 OutboundQueueInterruptCount[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1397 } 1398 else 1399 { 1400 OutboundQueueInterruptCount[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1401 TI_DBG6(("tdsaLoLevelGetResource: queue number %d interrupt count %d\n", i, OutboundQueueInterruptCount[i])); 1402 } 1403 } 1404 1405 /* 1406 * read the OBQueueInterruptEnable 1407 */ 1408 1409 osti_memset(buffer, 0, buffLen); 1410 lenRecv = 0; 1411 1412 OutboundQueueInterruptEnable[i] = DEFAULT_OUTBOUND_INTERRUPT_ENABLE; /* default 1 Outbound interrupt is enabled */ 1413 1414 if ((ostiGetTransportParam( 1415 tiRoot, 1416 globalStr, /* key */ 1417 SwParmsStr, /* subkey1 */ 1418 OBQueueProps, /* subkey2 */ 1419 agNULL, 1420 agNULL, 1421 agNULL, /* subkey5 */ 1422 OBQueueInterruptEnable, /* valueName */ 1423 buffer, 1424 buffLen, 1425 &lenRecv 1426 ) == tiSuccess) && (lenRecv != 0)) 1427 { 1428 if (osti_strncmp(buffer, "0x", 2) == 0) 1429 { 1430 OutboundQueueInterruptEnable[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1431 #ifdef SPC_POLLINGMODE 1432 OutboundQueueInterruptEnable[i] = 0; 1433 #endif /* SPC_POLLINGMODE */ 1434 1435 } 1436 else 1437 { 1438 OutboundQueueInterruptEnable[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1439 #ifdef SPC_POLLINGMODE 1440 OutboundQueueInterruptEnable[i] = 0; 1441 #endif /* SPC_POLLINGMODE */ 1442 } 1443 TI_DBG2(("tdsaLoLevelGetResource: queue number %d interrupt enable %d\n", i, OutboundQueueInterruptEnable[i])); 1444 } 1445 1446 /**********************************************/ 1447 osti_memset(buffer, 0, buffLen); 1448 lenRecv = 0; 1449 1450 }/* end of loop */ 1451 1452 1453 1454 /************************************************************ 1455 * READ CARD Specific 1456 */ 1457 osti_memset(buffer, 0, buffLen); 1458 lenRecv = 0; 1459 1460 for (i=0;i<QueueConfig.numInboundQueues;i++) 1461 { 1462 osti_sprintf(CardNum,"CardNum%d", cardID); 1463 osti_sprintf(IBQueueSize,"IBQueueNumElements%d", i); 1464 osti_sprintf(IBQueueEleSize,"IBQueueElementSize%d", i); 1465 osti_sprintf(IBQueuePriority,"IBQueuePriority%d", i); 1466 1467 /* 1468 * read the IBQueueSize 1469 */ 1470 osti_memset(buffer, 0, buffLen); 1471 lenRecv = 0; 1472 1473 if ((ostiGetTransportParam( 1474 tiRoot, 1475 CardNum, /* key */ 1476 SwParmsStr, /* subkey1 */ 1477 IBQueueProps, /* subkey2 */ 1478 agNULL, 1479 agNULL, 1480 agNULL, /* subkey5 */ 1481 IBQueueSize, /* valueName */ 1482 buffer, 1483 buffLen, 1484 &lenRecv 1485 ) == tiSuccess) && (lenRecv != 0)) 1486 { 1487 if (osti_strncmp(buffer, "0x", 2) == 0) 1488 { 1489 InboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1490 } 1491 else 1492 { 1493 InboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1494 TI_DBG6(("tdsaLoLevelGetResource: queue number %d IB queue size %d\n", i, InboundQueueSize[i])); 1495 } 1496 } 1497 1498 1499 /* 1500 * read the IBQueueEleSize 1501 */ 1502 osti_memset(buffer, 0, buffLen); 1503 lenRecv = 0; 1504 1505 if ((ostiGetTransportParam( 1506 tiRoot, 1507 CardNum, /* key */ 1508 SwParmsStr, /* subkey1 */ 1509 IBQueueProps, /* subkey2 */ 1510 agNULL, 1511 agNULL, 1512 agNULL, /* subkey5 */ 1513 IBQueueEleSize, /* valueName */ 1514 buffer, 1515 buffLen, 1516 &lenRecv 1517 ) == tiSuccess) && (lenRecv != 0)) 1518 { 1519 if (osti_strncmp(buffer, "0x", 2) == 0) 1520 { 1521 InboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1522 } 1523 else 1524 { 1525 InboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1526 TI_DBG6(("tdsaLoLevelGetResource: queue number %d IB queue size %d\n", i, InboundQueueEleSize[i])); 1527 } 1528 } 1529 1530 /* 1531 * read the IBQueuePriority 1532 */ 1533 1534 osti_memset(buffer, 0, buffLen); 1535 lenRecv = 0; 1536 if ((ostiGetTransportParam( 1537 tiRoot, 1538 CardNum, /* key */ 1539 SwParmsStr, /* subkey1 */ 1540 IBQueueProps,/* subkey2 */ 1541 agNULL, 1542 agNULL, 1543 agNULL, /* subkey5 */ 1544 IBQueuePriority, /* valueName */ 1545 buffer, 1546 buffLen, 1547 &lenRecv 1548 ) == tiSuccess) && (lenRecv != 0)) 1549 { 1550 if (osti_strncmp(buffer, "0x", 2) == 0) 1551 { 1552 InboundQueuePriority[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1553 } 1554 else 1555 { 1556 InboundQueuePriority[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1557 TI_DBG6(("tdsaLoLevelGetResource: card number %d queue number %d priority %d\n", cardID, i, InboundQueuePriority[i])); 1558 } 1559 } 1560 1561 /**********************************************/ 1562 osti_memset(buffer, 0, buffLen); 1563 lenRecv = 0; 1564 }/* end of loop */ 1565 1566 1567 1568 osti_memset(buffer, 0, buffLen); 1569 lenRecv = 0; 1570 1571 for (i=0;i<QueueConfig.numOutboundQueues;i++) 1572 { 1573 osti_sprintf(CardNum,"CardNum%d", cardID); 1574 osti_sprintf(OBQueueSize,"OBQueueNumElements%d", i); 1575 osti_sprintf(OBQueueEleSize,"OBQueueElementSize%d", i); 1576 osti_sprintf(OBQueueInterruptDelay,"OBQueueInterruptDelay%d", i); 1577 osti_sprintf(OBQueueInterruptCount,"OBQueueInterruptCount%d", i); 1578 osti_sprintf(OBQueueInterruptEnable,"OBQueueInterruptEnable%d", i); 1579 1580 /* 1581 * read the OBQueueSize 1582 */ 1583 osti_memset(buffer, 0, buffLen); 1584 lenRecv = 0; 1585 1586 if ((ostiGetTransportParam( 1587 tiRoot, 1588 CardNum, /* key */ 1589 SwParmsStr, /* subkey1 */ 1590 OBQueueProps, /* subkey2 */ 1591 agNULL, 1592 agNULL, 1593 agNULL, /* subkey5 */ 1594 OBQueueSize, /* valueName */ 1595 buffer, 1596 buffLen, 1597 &lenRecv 1598 ) == tiSuccess) && (lenRecv != 0)) 1599 { 1600 if (osti_strncmp(buffer, "0x", 2) == 0) 1601 { 1602 OutboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1603 } 1604 else 1605 { 1606 OutboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1607 TI_DBG6(("tdsaLoLevelGetResource: queue number %d OB queue size %d\n", i, OutboundQueueSize[i])); 1608 } 1609 } 1610 1611 1612 /* 1613 * read the OBQueueEleSize 1614 */ 1615 osti_memset(buffer, 0, buffLen); 1616 lenRecv = 0; 1617 1618 if ((ostiGetTransportParam( 1619 tiRoot, 1620 CardNum, /* key */ 1621 SwParmsStr, /* subkey1 */ 1622 OBQueueProps, /* subkey2 */ 1623 agNULL, 1624 agNULL, 1625 agNULL, /* subkey5 */ 1626 OBQueueEleSize, /* valueName */ 1627 buffer, 1628 buffLen, 1629 &lenRecv 1630 ) == tiSuccess) && (lenRecv != 0)) 1631 { 1632 if (osti_strncmp(buffer, "0x", 2) == 0) 1633 { 1634 OutboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1635 } 1636 else 1637 { 1638 OutboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1639 TI_DBG6(("tdsaLoLevelGetResource: queue number %d OB queue ele size %d\n", i, OutboundQueueEleSize[i])); 1640 } 1641 } 1642 1643 /* 1644 * read the OBQueueInterruptDelay 1645 */ 1646 osti_memset(buffer, 0, buffLen); 1647 lenRecv = 0; 1648 1649 if ((ostiGetTransportParam( 1650 tiRoot, 1651 CardNum, /* key */ 1652 SwParmsStr, /* subkey1 */ 1653 OBQueueProps, /* subkey2 */ 1654 agNULL, 1655 agNULL, 1656 agNULL, /* subkey5 */ 1657 OBQueueInterruptDelay, /* valueName */ 1658 buffer, 1659 buffLen, 1660 &lenRecv 1661 ) == tiSuccess) && (lenRecv != 0)) 1662 { 1663 if (osti_strncmp(buffer, "0x", 2) == 0) 1664 { 1665 OutboundQueueInterruptDelay[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1666 } 1667 else 1668 { 1669 OutboundQueueInterruptDelay[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1670 TI_DBG6(("tdsaLoLevelGetResource: card number %d queue number %d interrupt delay %d\n", cardID, i, OutboundQueueInterruptDelay[i])); 1671 } 1672 } 1673 1674 /* 1675 * read the OBQueueInterruptCount 1676 */ 1677 1678 osti_memset(buffer, 0, buffLen); 1679 lenRecv = 0; 1680 if ((ostiGetTransportParam( 1681 tiRoot, 1682 CardNum, /* key */ 1683 SwParmsStr, /* subkey1 */ 1684 OBQueueProps, /* subkey2 */ 1685 agNULL, 1686 agNULL, 1687 agNULL, /* subkey5 */ 1688 OBQueueInterruptCount, /* valueName */ 1689 buffer, 1690 buffLen, 1691 &lenRecv 1692 ) == tiSuccess) && (lenRecv != 0)) 1693 { 1694 if (osti_strncmp(buffer, "0x", 2) == 0) 1695 { 1696 OutboundQueueInterruptCount[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1697 } 1698 else 1699 { 1700 OutboundQueueInterruptCount[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1701 TI_DBG6(("tdsaLoLevelGetResource: card number %d queue number %d interrupt count %d\n", cardID, i, OutboundQueueInterruptCount[i])); 1702 } 1703 } 1704 1705 /* 1706 * read the OBQueueInterruptEnable 1707 */ 1708 1709 osti_memset(buffer, 0, buffLen); 1710 lenRecv = 0; 1711 if ((ostiGetTransportParam( 1712 tiRoot, 1713 CardNum, /* key */ 1714 SwParmsStr, /* subkey1 */ 1715 OBQueueProps, /* subkey2 */ 1716 agNULL, 1717 agNULL, 1718 agNULL, /* subkey5 */ 1719 OBQueueInterruptEnable, /* valueName */ 1720 buffer, 1721 buffLen, 1722 &lenRecv 1723 ) == tiSuccess) && (lenRecv != 0)) 1724 { 1725 if (osti_strncmp(buffer, "0x", 2) == 0) 1726 { 1727 OutboundQueueInterruptEnable[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0); 1728 #ifdef SPC_POLLINGMODE 1729 OutboundQueueInterruptEnable[i] = 0; 1730 #endif /* SPC_POLLINGMODE */ 1731 1732 } 1733 else 1734 { 1735 OutboundQueueInterruptEnable[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10); 1736 #ifdef SPC_POLLINGMODE 1737 OutboundQueueInterruptEnable[i] = 0; 1738 #endif /* SPC_POLLINGMODE */ 1739 } 1740 TI_DBG2(("tdsaLoLevelGetResource: card number %d queue number %d interrupt count %d\n", cardID, i, OutboundQueueInterruptEnable[i])); 1741 } 1742 1743 1744 /**********************************************/ 1745 osti_memset(buffer, 0, buffLen); 1746 lenRecv = 0; 1747 1748 }/* end of loop */ 1749 1750 1751 TI_DBG6(("tdsaLoLevelGetResource: \n")); 1752 tdsaPrintSwConfig(&SwConfig); 1753 1754 /* fills in queue related parameters */ 1755 for (i=0;i<QueueConfig.numInboundQueues;i++) 1756 { 1757 QueueConfig.inboundQueues[i].elementCount = InboundQueueSize[i]; 1758 QueueConfig.inboundQueues[i].elementSize = InboundQueueEleSize[i]; 1759 QueueConfig.inboundQueues[i].priority = InboundQueuePriority[i]; 1760 } 1761 for (i=0;i<QueueConfig.numOutboundQueues;i++) 1762 { 1763 QueueConfig.outboundQueues[i].elementCount = OutboundQueueSize[i]; 1764 QueueConfig.outboundQueues[i].elementSize = OutboundQueueEleSize[i]; 1765 QueueConfig.outboundQueues[i].interruptDelay = OutboundQueueInterruptDelay[i]; 1766 QueueConfig.outboundQueues[i].interruptCount = OutboundQueueInterruptCount[i]; 1767 QueueConfig.outboundQueues[i].interruptEnable = OutboundQueueInterruptEnable[i]; 1768 } 1769 1770 1771 /* process event log related parameters */ 1772 osti_memset(buffer, 0, buffLen); 1773 lenRecv = 0; 1774 1775 1776 if ((ostiGetTransportParam( 1777 tiRoot, 1778 globalStr, /* key */ 1779 SwParmsStr, /* subkey1 */ 1780 agNULL, /* subkey2 */ 1781 agNULL, 1782 agNULL, 1783 agNULL, /* subkey5 */ 1784 "EventLogSize1", /* valueName */ 1785 buffer, 1786 buffLen, 1787 &lenRecv 1788 ) == tiSuccess) && (lenRecv != 0)) 1789 { 1790 if (osti_strncmp(buffer, "0x", 2) == 0) 1791 { 1792 SwConfig.sizefEventLog1 = osti_strtoul (buffer, &pLastUsedChar, 0); 1793 } 1794 else 1795 { 1796 SwConfig.sizefEventLog1 = osti_strtoul (buffer, &pLastUsedChar, 10); 1797 } 1798 } 1799 1800 osti_memset(buffer, 0, buffLen); 1801 lenRecv = 0; 1802 1803 1804 if ((ostiGetTransportParam( 1805 tiRoot, 1806 globalStr, /* key */ 1807 SwParmsStr, /* subkey1 */ 1808 agNULL, /* subkey2 */ 1809 agNULL, 1810 agNULL, 1811 agNULL, /* subkey5 */ 1812 "EventLogOption1", /* valueName */ 1813 buffer, 1814 buffLen, 1815 &lenRecv 1816 ) == tiSuccess) && (lenRecv != 0)) 1817 { 1818 if (osti_strncmp(buffer, "0x", 2) == 0) 1819 { 1820 SwConfig.eventLog1Option = osti_strtoul (buffer, &pLastUsedChar, 0); 1821 } 1822 else 1823 { 1824 SwConfig.eventLog1Option = osti_strtoul (buffer, &pLastUsedChar, 10); 1825 } 1826 } 1827 1828 osti_memset(buffer, 0, buffLen); 1829 lenRecv = 0; 1830 1831 1832 if ((ostiGetTransportParam( 1833 tiRoot, 1834 globalStr, /* key */ 1835 SwParmsStr, /* subkey1 */ 1836 agNULL, /* subkey2 */ 1837 agNULL, 1838 agNULL, 1839 agNULL, /* subkey5 */ 1840 "EventLogSize2", /* valueName */ /* size in K Dwords */ 1841 buffer, 1842 buffLen, 1843 &lenRecv 1844 ) == tiSuccess) && (lenRecv != 0)) 1845 { 1846 if (osti_strncmp(buffer, "0x", 2) == 0) 1847 { 1848 SwConfig.sizefEventLog2 = osti_strtoul (buffer, &pLastUsedChar, 0); 1849 } 1850 else 1851 { 1852 SwConfig.sizefEventLog2 = osti_strtoul (buffer, &pLastUsedChar, 10); 1853 } 1854 } 1855 1856 osti_memset(buffer, 0, buffLen); 1857 lenRecv = 0; 1858 1859 1860 if ((ostiGetTransportParam( 1861 tiRoot, 1862 globalStr, /* key */ 1863 SwParmsStr, /* subkey1 */ 1864 agNULL, /* subkey2 */ 1865 agNULL, 1866 agNULL, 1867 agNULL, /* subkey5 */ 1868 "EventLogOption2", /* valueName */ 1869 buffer, 1870 buffLen, 1871 &lenRecv 1872 ) == tiSuccess) && (lenRecv != 0)) 1873 { 1874 if (osti_strncmp(buffer, "0x", 2) == 0) 1875 { 1876 SwConfig.eventLog2Option = osti_strtoul (buffer, &pLastUsedChar, 0); 1877 } 1878 else 1879 { 1880 SwConfig.eventLog2Option = osti_strtoul (buffer, &pLastUsedChar, 10); 1881 } 1882 } 1883 /* end of event log related parameters */ 1884 1885 /* 1886 HDA parameters 1887 */ 1888 osti_memset(buffer, 0, buffLen); 1889 lenRecv = 0; 1890 1891 1892 if ((ostiGetTransportParam( 1893 tiRoot, 1894 globalStr, /* key */ 1895 SwParmsStr, /* subkey1 */ 1896 agNULL, /* subkey2 */ 1897 agNULL, 1898 agNULL, 1899 agNULL, /* subkey5 */ 1900 "HDASupport", /* valueName */ 1901 buffer, 1902 buffLen, 1903 &lenRecv 1904 ) == tiSuccess) && (lenRecv != 0)) 1905 { 1906 if (osti_strncmp(buffer, "0x", 2) == 0) 1907 { 1908 SwConfig.hostDirectAccessSupport = osti_strtoul (buffer, &pLastUsedChar, 0); 1909 } 1910 else 1911 { 1912 SwConfig.hostDirectAccessSupport = osti_strtoul (buffer, &pLastUsedChar, 10); 1913 } 1914 } 1915 /***********************************************************************/ 1916 osti_memset(buffer, 0, buffLen); 1917 lenRecv = 0; 1918 1919 1920 if ((ostiGetTransportParam( 1921 tiRoot, 1922 globalStr, /* key */ 1923 SwParmsStr, /* subkey1 */ 1924 agNULL, /* subkey2 */ 1925 agNULL, 1926 agNULL, 1927 agNULL, /* subkey5 */ 1928 "HDAMode", /* valueName */ 1929 buffer, 1930 buffLen, 1931 &lenRecv 1932 ) == tiSuccess) && (lenRecv != 0)) 1933 { 1934 if (osti_strncmp(buffer, "0x", 2) == 0) 1935 { 1936 SwConfig.hostDirectAccessMode = osti_strtoul (buffer, &pLastUsedChar, 0); 1937 } 1938 else 1939 { 1940 SwConfig.hostDirectAccessMode = osti_strtoul (buffer, &pLastUsedChar, 10); 1941 } 1942 } 1943 /***********************************************************************/ 1944 /* the end of HDA parameters */ 1945 1946 1947 /* FW configuration */ 1948 osti_memset(buffer, 0, buffLen); 1949 lenRecv = 0; 1950 1951 1952 if ((ostiGetTransportParam( 1953 tiRoot, 1954 globalStr, /* key */ 1955 SwParmsStr, /* subkey1 */ 1956 agNULL, /* subkey2 */ 1957 agNULL, 1958 agNULL, 1959 agNULL, /* subkey5 */ 1960 "FWConfig", /* valueName */ 1961 buffer, 1962 buffLen, 1963 &lenRecv 1964 ) == tiSuccess) && (lenRecv != 0)) 1965 { 1966 if (osti_strncmp(buffer, "0x", 2) == 0) 1967 { 1968 SwConfig.FWConfig = osti_strtoul (buffer, &pLastUsedChar, 0); 1969 } 1970 else 1971 { 1972 SwConfig.FWConfig = osti_strtoul (buffer, &pLastUsedChar, 10); 1973 } 1974 } 1975 /* The end of FW configuration */ 1976 1977 1978 1979 #ifdef SA_ENABLE_TRACE_FUNCTIONS 1980 1981 TI_DBG2(("tdsaLoLevelGetResource: SA_ENABLE_TRACE_FUNCTIONS\n")); 1982 1983 /* 1984 buffer = tmpBuffer; 1985 buffLen = sizeof(tmpBuffer); 1986 1987 osti_memset(buffer, 0, buffLen); 1988 lenRecv = 0; 1989 */ 1990 1991 SwConfig.TraceBufferSize = 0; 1992 if ((ostiGetTransportParam( 1993 tiRoot, 1994 globalStr, /* key */ 1995 SwParmsStr, /* subkey1 */ 1996 agNULL, /* subkey2 */ 1997 agNULL, 1998 agNULL, 1999 agNULL, /* subkey5 */ 2000 "TraceBufferSize", /* valueName */ 2001 buffer, 2002 buffLen, 2003 &lenRecv 2004 ) == tiSuccess) && (lenRecv != 0)) 2005 { 2006 if (osti_strncmp(buffer, "0x", 2) == 0) 2007 { 2008 SwConfig.TraceBufferSize = osti_strtoul (buffer, &pLastUsedChar, 0); 2009 } 2010 else 2011 { 2012 SwConfig.TraceBufferSize = osti_strtoul (buffer, &pLastUsedChar, 10); 2013 } 2014 TI_DBG2(("tdsaLoLevelGetResource: SwConfig.TraceBufferSize %d\n",SwConfig.TraceBufferSize)); 2015 } 2016 2017 #endif /*# SA_ENABLE_TRACE_FUNCTIONS */ 2018 2019 SwConfig.mpiContextTable = agNULL; 2020 SwConfig.mpiContextTablelen = 0; 2021 2022 /* default */ 2023 for (i=0;i<8;i++) 2024 { 2025 QueueConfig.sasHwEventQueue[i] = 0; 2026 QueueConfig.sataNCQErrorEventQueue[i] = 0; 2027 } 2028 2029 #ifdef TARGET_DRIVER 2030 for (i=0;i<8;i++) 2031 { 2032 QueueConfig.tgtITNexusEventQueue[i] = 0; 2033 QueueConfig.tgtSSPEventQueue[i] = 0; 2034 QueueConfig.tgtSMPEventQueue[i] = 0; 2035 } 2036 #endif 2037 2038 QueueConfig.iqNormalPriorityProcessingDepth = 0; 2039 QueueConfig.iqHighPriorityProcessingDepth = 0; 2040 QueueConfig.generalEventQueue = 0; 2041 2042 /* 2043 * can agRoot be agNULL below? Yes. 2044 * saGetRequirements(agRoot, IN, OUT, OUT, OUT); 2045 */ 2046 saGetRequirements(&agRoot, 2047 &SwConfig, 2048 &memRequirement, 2049 &usecsPerTick, 2050 &maxQueueSets 2051 ); 2052 #ifdef FDS_DM 2053 dmGetRequirements(&dmRoot, 2054 &dmSwConfig, 2055 &dmMemRequirement, 2056 &dmUsecsPerTick, 2057 &dmMaxNumLocks 2058 ); 2059 2060 2061 #endif 2062 2063 #ifdef FDS_SM 2064 smGetRequirements( 2065 &smRoot, 2066 &smSwConfig, 2067 &smMemRequirement, 2068 &smUsecsPerTick, 2069 &smMaxNumLocks 2070 ); 2071 2072 #endif 2073 2074 /* initialization */ 2075 maxNumOSLocks = loResource->loLevelOption.maxNumOSLocks; 2076 /* 2077 MAX_LL_LAYER_MEM_DESCRIPTORS is 24. see tidefs.h and tiLoLevelMem_t 2078 in titypes.h 2079 */ 2080 #if defined (FDS_DM) && defined (FDS_SM) 2081 /* for LL */ 2082 TI_DBG1(("tdsaLoLevelGetResource:MAX_LL_LAYER_MEM_DESCRIPTORS %d\n", MAX_LL_LAYER_MEM_DESCRIPTORS)); 2083 for(i=0;i<MAX_LL_LAYER_MEM_DESCRIPTORS;i++) 2084 { 2085 loResource->loLevelMem.mem[i].numElements = 0; 2086 loResource->loLevelMem.mem[i].totalLength = 0; 2087 loResource->loLevelMem.mem[i].singleElementLength = 0; 2088 loResource->loLevelMem.mem[i].alignment = 0; 2089 loResource->loLevelMem.mem[i].type = 0; 2090 loResource->loLevelMem.mem[i].reserved = 0; 2091 loResource->loLevelMem.mem[i].virtPtr = agNULL; 2092 loResource->loLevelMem.mem[i].osHandle = agNULL; 2093 loResource->loLevelMem.mem[i].physAddrUpper = 0; 2094 loResource->loLevelMem.mem[i].physAddrLower = 0; 2095 } 2096 2097 TI_DBG1(("tdsaLoLevelGetResource:memRequirement.count %d\n", memRequirement.count)); 2098 /* using the returned value from saGetRequirements */ 2099 for (i=0;i< memRequirement.count;i++) 2100 { 2101 /* hardcoded values for now */ 2102 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements; 2103 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength; 2104 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength; 2105 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment; 2106 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment )); 2107 if ( AGSA_DMA_MEM == memRequirement.agMemory[i].type ) 2108 { 2109 loResource->loLevelMem.mem[i].type = TI_DMA_MEM; 2110 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i)); 2111 2112 } 2113 else if ( AGSA_CACHED_MEM == memRequirement.agMemory[i].type ) 2114 { 2115 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM; 2116 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i)); 2117 } 2118 else if ( AGSA_CACHED_DMA_MEM == memRequirement.agMemory[i].type ) 2119 { 2120 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM; 2121 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i)); 2122 } 2123 } 2124 2125 /* for DM */ 2126 TI_DBG1(("tdsaLoLevelGetResource:dmMemRequirement.count %d\n", dmMemRequirement.count)); 2127 /* using the returned value from dmGetRequirements */ 2128 for (i=memRequirement.count;i< (memRequirement.count + dmMemRequirement.count);i++) 2129 { 2130 /* hardcoded values for now */ 2131 loResource->loLevelMem.mem[i].numElements = dmMemRequirement.dmMemory[i-memRequirement.count].numElements; 2132 loResource->loLevelMem.mem[i].totalLength = dmMemRequirement.dmMemory[i-memRequirement.count].totalLength; 2133 loResource->loLevelMem.mem[i].singleElementLength = dmMemRequirement.dmMemory[i-memRequirement.count].singleElementLength; 2134 loResource->loLevelMem.mem[i].alignment = dmMemRequirement.dmMemory[i-memRequirement.count].alignment; 2135 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment )); 2136 if ( AGSA_DMA_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type ) 2137 { 2138 loResource->loLevelMem.mem[i].type = TI_DMA_MEM; 2139 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i)); 2140 2141 } 2142 else if ( AGSA_CACHED_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type ) 2143 { 2144 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM; 2145 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i)); 2146 } 2147 else if ( AGSA_CACHED_DMA_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type ) 2148 { 2149 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM; 2150 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i)); 2151 } 2152 } 2153 2154 /* for SM */ 2155 TI_DBG1(("tdsaLoLevelGetResource:smMemRequirement.count %d\n", smMemRequirement.count)); 2156 /* using the returned value from dmGetRequirements */ 2157 for (i=(memRequirement.count + dmMemRequirement.count);i< (memRequirement.count + dmMemRequirement.count + smMemRequirement.count);i++) 2158 { 2159 /* hardcoded values for now */ 2160 loResource->loLevelMem.mem[i].numElements = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].numElements; 2161 loResource->loLevelMem.mem[i].totalLength = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].totalLength; 2162 loResource->loLevelMem.mem[i].singleElementLength = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].singleElementLength; 2163 loResource->loLevelMem.mem[i].alignment = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].alignment; 2164 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment )); 2165 if ( AGSA_DMA_MEM == smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].type ) 2166 { 2167 loResource->loLevelMem.mem[i].type = TI_DMA_MEM; 2168 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i)); 2169 2170 } 2171 else if ( AGSA_CACHED_MEM == smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].type ) 2172 { 2173 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM; 2174 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i)); 2175 } 2176 else if ( AGSA_CACHED_DMA_MEM == smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].type ) 2177 { 2178 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM; 2179 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i)); 2180 } 2181 } 2182 2183 /* sets the low level options */ 2184 loResource->loLevelOption.usecsPerTick = MIN(MIN(usecsPerTick, dmUsecsPerTick), smUsecsPerTick); 2185 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + dmMaxNumLocks + smMaxNumLocks + TD_MAX_LOCKS + maxNumOSLocks; 2186 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue; 2187 /* no more ESGL */ 2188 loResource->loLevelMem.count = memRequirement.count + dmMemRequirement.count + smMemRequirement.count; 2189 /* setting interrupt requirements */ 2190 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors; 2191 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors; 2192 loResource->loLevelOption.flag = SwConfig.legacyInt_X; 2193 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors)); 2194 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors)); 2195 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag)); 2196 2197 // TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment )); 2198 TI_DBG6(("tdsaLoLevelGetResource: total memRequirement count %d TI_DMA_MEM\n", loResource->loLevelMem.count)); 2199 2200 #elif defined(FDS_DM) 2201 TI_DBG1(("tdsaLoLevelGetResource:MAX_LL_LAYER_MEM_DESCRIPTORS %d\n", MAX_LL_LAYER_MEM_DESCRIPTORS)); 2202 for(i=0;i<MAX_LL_LAYER_MEM_DESCRIPTORS;i++) 2203 { 2204 loResource->loLevelMem.mem[i].numElements = 0; 2205 loResource->loLevelMem.mem[i].totalLength = 0; 2206 loResource->loLevelMem.mem[i].singleElementLength = 0; 2207 loResource->loLevelMem.mem[i].alignment = 0; 2208 loResource->loLevelMem.mem[i].type = 0; 2209 loResource->loLevelMem.mem[i].reserved = 0; 2210 loResource->loLevelMem.mem[i].virtPtr = agNULL; 2211 loResource->loLevelMem.mem[i].osHandle = agNULL; 2212 loResource->loLevelMem.mem[i].physAddrUpper = 0; 2213 loResource->loLevelMem.mem[i].physAddrLower = 0; 2214 } 2215 2216 TI_DBG1(("tdsaLoLevelGetResource:memRequirement.count %d\n", memRequirement.count)); 2217 /* using the returned value from saGetRequirements */ 2218 for (i=0;i< memRequirement.count;i++) 2219 { 2220 /* hardcoded values for now */ 2221 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements; 2222 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength; 2223 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength; 2224 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment; 2225 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment )); 2226 if ( AGSA_DMA_MEM == memRequirement.agMemory[i].type ) 2227 { 2228 loResource->loLevelMem.mem[i].type = TI_DMA_MEM; 2229 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i)); 2230 2231 } 2232 else if ( AGSA_CACHED_MEM == memRequirement.agMemory[i].type ) 2233 { 2234 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM; 2235 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i)); 2236 } 2237 else if ( AGSA_CACHED_DMA_MEM == memRequirement.agMemory[i].type ) 2238 { 2239 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM; 2240 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i)); 2241 } 2242 } 2243 2244 TI_DBG1(("tdsaLoLevelGetResource:dmMemRequirement.count %d\n", dmMemRequirement.count)); 2245 /* using the returned value from dmGetRequirements */ 2246 for (i=memRequirement.count;i< (memRequirement.count + dmMemRequirement.count);i++) 2247 { 2248 /* hardcoded values for now */ 2249 loResource->loLevelMem.mem[i].numElements = dmMemRequirement.dmMemory[i-memRequirement.count].numElements; 2250 loResource->loLevelMem.mem[i].totalLength = dmMemRequirement.dmMemory[i-memRequirement.count].totalLength; 2251 loResource->loLevelMem.mem[i].singleElementLength = dmMemRequirement.dmMemory[i-memRequirement.count].singleElementLength; 2252 loResource->loLevelMem.mem[i].alignment = dmMemRequirement.dmMemory[i-memRequirement.count].alignment; 2253 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment )); 2254 if ( AGSA_DMA_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type ) 2255 { 2256 loResource->loLevelMem.mem[i].type = TI_DMA_MEM; 2257 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i)); 2258 2259 } 2260 else if ( AGSA_CACHED_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type ) 2261 { 2262 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM; 2263 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i)); 2264 } 2265 else if ( AGSA_CACHED_DMA_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type ) 2266 { 2267 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM; 2268 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i)); 2269 } 2270 } 2271 2272 2273 2274 /* sets the low level options */ 2275 loResource->loLevelOption.usecsPerTick = MIN(usecsPerTick, dmUsecsPerTick); 2276 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + dmMaxNumLocks + TD_MAX_LOCKS + maxNumOSLocks; 2277 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue; 2278 /* no more ESGL */ 2279 loResource->loLevelMem.count = memRequirement.count + dmMemRequirement.count; 2280 /* setting interrupt requirements */ 2281 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors; 2282 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors; 2283 loResource->loLevelOption.flag = SwConfig.legacyInt_X; 2284 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors)); 2285 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors)); 2286 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag)); 2287 2288 // TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment )); 2289 TI_DBG6(("tdsaLoLevelGetResource: total memRequirement count %d TI_DMA_MEM\n", loResource->loLevelMem.count)); 2290 2291 #elif defined(FDS_SM) 2292 TI_DBG1(("tdsaLoLevelGetResource:MAX_LL_LAYER_MEM_DESCRIPTORS %d\n", MAX_LL_LAYER_MEM_DESCRIPTORS)); 2293 for(i=0;i<MAX_LL_LAYER_MEM_DESCRIPTORS;i++) 2294 { 2295 loResource->loLevelMem.mem[i].numElements = 0; 2296 loResource->loLevelMem.mem[i].totalLength = 0; 2297 loResource->loLevelMem.mem[i].singleElementLength = 0; 2298 loResource->loLevelMem.mem[i].alignment = 0; 2299 loResource->loLevelMem.mem[i].type = 0; 2300 loResource->loLevelMem.mem[i].reserved = 0; 2301 loResource->loLevelMem.mem[i].virtPtr = agNULL; 2302 loResource->loLevelMem.mem[i].osHandle = agNULL; 2303 loResource->loLevelMem.mem[i].physAddrUpper = 0; 2304 loResource->loLevelMem.mem[i].physAddrLower = 0; 2305 } 2306 2307 TI_DBG1(("tdsaLoLevelGetResource:memRequirement.count %d\n", memRequirement.count)); 2308 /* using the returned value from saGetRequirements */ 2309 for (i=0;i< memRequirement.count;i++) 2310 { 2311 /* hardcoded values for now */ 2312 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements; 2313 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength; 2314 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength; 2315 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment; 2316 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment )); 2317 if ( AGSA_DMA_MEM == memRequirement.agMemory[i].type ) 2318 { 2319 loResource->loLevelMem.mem[i].type = TI_DMA_MEM; 2320 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i)); 2321 2322 } 2323 else if ( AGSA_CACHED_MEM == memRequirement.agMemory[i].type ) 2324 { 2325 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM; 2326 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i)); 2327 } 2328 else if ( AGSA_CACHED_DMA_MEM == memRequirement.agMemory[i].type ) 2329 { 2330 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM; 2331 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i)); 2332 } 2333 } 2334 2335 TI_DBG1(("tdsaLoLevelGetResource:smMemRequirement.count %d\n", smMemRequirement.count)); 2336 /* using the returned value from smGetRequirements */ 2337 for (i=memRequirement.count;i< (memRequirement.count + smMemRequirement.count);i++) 2338 { 2339 /* hardcoded values for now */ 2340 loResource->loLevelMem.mem[i].numElements = smMemRequirement.smMemory[i-memRequirement.count].numElements; 2341 loResource->loLevelMem.mem[i].totalLength = smMemRequirement.smMemory[i-memRequirement.count].totalLength; 2342 loResource->loLevelMem.mem[i].singleElementLength = smMemRequirement.smMemory[i-memRequirement.count].singleElementLength; 2343 loResource->loLevelMem.mem[i].alignment = smMemRequirement.smMemory[i-memRequirement.count].alignment; 2344 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment )); 2345 if ( AGSA_DMA_MEM == smMemRequirement.smMemory[i-memRequirement.count].type ) 2346 { 2347 loResource->loLevelMem.mem[i].type = TI_DMA_MEM; 2348 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i)); 2349 2350 } 2351 else if ( AGSA_CACHED_MEM == smMemRequirement.smMemory[i-memRequirement.count].type ) 2352 { 2353 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM; 2354 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i)); 2355 } 2356 else if ( AGSA_CACHED_DMA_MEM == smMemRequirement.smMemory[i-memRequirement.count].type ) 2357 { 2358 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM; 2359 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i)); 2360 } 2361 } 2362 2363 2364 2365 /* sets the low level options */ 2366 loResource->loLevelOption.usecsPerTick = MIN(usecsPerTick, smUsecsPerTick); 2367 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + smMaxNumLocks + TD_MAX_LOCKS + maxNumOSLocks; 2368 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue; 2369 /* no more ESGL */ 2370 loResource->loLevelMem.count = memRequirement.count + smMemRequirement.count; 2371 /* setting interrupt requirements */ 2372 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors; 2373 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors; 2374 loResource->loLevelOption.flag = SwConfig.legacyInt_X; 2375 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors)); 2376 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors)); 2377 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag)); 2378 2379 // TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment )); 2380 TI_DBG6(("tdsaLoLevelGetResource: total memRequirement count %d TI_DMA_MEM\n", loResource->loLevelMem.count)); 2381 2382 2383 #else 2384 TI_DBG6(("tdsaLoLevelGetResource:MAX_LL_LAYER_MEM_DESCRIPTORS %d\n", MAX_LL_LAYER_MEM_DESCRIPTORS)); 2385 for(i=0;i<MAX_LL_LAYER_MEM_DESCRIPTORS;i++) 2386 { 2387 loResource->loLevelMem.mem[i].numElements = 0; 2388 loResource->loLevelMem.mem[i].totalLength = 0; 2389 loResource->loLevelMem.mem[i].singleElementLength = 0; 2390 loResource->loLevelMem.mem[i].alignment = 0; 2391 loResource->loLevelMem.mem[i].type = 0; 2392 loResource->loLevelMem.mem[i].reserved = 0; 2393 loResource->loLevelMem.mem[i].virtPtr = agNULL; 2394 loResource->loLevelMem.mem[i].osHandle = agNULL; 2395 loResource->loLevelMem.mem[i].physAddrUpper = 0; 2396 loResource->loLevelMem.mem[i].physAddrLower = 0; 2397 } 2398 2399 /* using the returned value from saGetRequirements */ 2400 for (i=0;i< memRequirement.count;i++) 2401 { 2402 /* hardcoded values for now */ 2403 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements; 2404 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength; 2405 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength; 2406 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment; 2407 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment )); 2408 if ( AGSA_DMA_MEM == memRequirement.agMemory[i].type ) 2409 { 2410 loResource->loLevelMem.mem[i].type = TI_DMA_MEM; 2411 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i)); 2412 2413 } 2414 else if ( AGSA_CACHED_MEM == memRequirement.agMemory[i].type ) 2415 { 2416 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM; 2417 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i)); 2418 } 2419 else if ( AGSA_CACHED_DMA_MEM == memRequirement.agMemory[i].type ) 2420 { 2421 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM; 2422 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i)); 2423 } 2424 } 2425 2426 2427 2428 /* sets the low level options */ 2429 loResource->loLevelOption.usecsPerTick = usecsPerTick; 2430 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + TD_MAX_LOCKS + maxNumOSLocks; 2431 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue; 2432 /* no more ESGL */ 2433 loResource->loLevelMem.count = memRequirement.count; 2434 /* setting interrupt requirements */ 2435 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors; 2436 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors; 2437 loResource->loLevelOption.flag = SwConfig.legacyInt_X; 2438 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors)); 2439 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors)); 2440 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag)); 2441 2442 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment )); 2443 TI_DBG6(("tdsaLoLevelGetResource: memRequirement.count %d TI_DMA_MEM\n", memRequirement.count)); 2444 #endif 2445 2446 2447 2448 return; 2449 } 2450 2451 /***************************************************************************** 2452 *! \brief tdsaSharedMemCalculate 2453 * 2454 * Purpose: This function is called to determine the Transport 2455 * Dependent Layer internal resource requirement 2456 * for shared memory between target and initiator 2457 * functionality. 2458 * 2459 * \param tiRoot: Pointer to driver/port instance. 2460 * \param tdSharedMem: Pointer to shared memory structure 2461 * 2462 * \return: None 2463 * 2464 * \note - The shared memory is composed of like the followings 2465 * sizeof(tdsaRoot_t) 2466 * + sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT 2467 * + sizeof(tdsaDeviceData_t) * MaxTargets 2468 * + sizeof(tdsaEsglPageInfo_t) * NumEsglPages 2469 * 2470 *****************************************************************************/ 2471 osGLOBAL void 2472 tdsaSharedMemCalculate( 2473 tiRoot_t * tiRoot, 2474 tiLoLevelResource_t * loResource, 2475 tiTdSharedMem_t * tdSharedMem 2476 ) 2477 { 2478 bit32 MaxTargets; 2479 2480 /* the following fn fills in MaxTargets */ 2481 tdssGetMaxTargetsParams(tiRoot, &MaxTargets); 2482 TI_DBG6(("tdsaSharedMemCalculate: MaxTargets %d\n", MaxTargets)); 2483 2484 /* 2485 * Cached mem for the shared TD Layer functionality 2486 */ 2487 tdSharedMem->tdSharedCachedMem1.singleElementLength = 2488 sizeof(tdsaRoot_t) + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT) + 2489 (sizeof(tdsaDeviceData_t) * MaxTargets); 2490 2491 #ifdef TD_INT_COALESCE 2492 /* adding TD interrupt coalesce data structure to the shared TD layer */ 2493 /* TD_MAX_INT_COALESCE is defined to be 512 */ 2494 tdSharedMem->tdSharedCachedMem1.singleElementLength += 2495 sizeof(tdsaIntCoalesceContext_t) * TD_MAX_INT_COALESCE; 2496 #endif 2497 2498 #ifdef TD_DISCOVER 2499 /* adding expander data structures */ 2500 tdSharedMem->tdSharedCachedMem1.singleElementLength += 2501 sizeof(tdsaExpander_t) * MaxTargets; 2502 #endif 2503 2504 tdSharedMem->tdSharedCachedMem1.numElements = 1; 2505 2506 tdSharedMem->tdSharedCachedMem1.totalLength = 2507 tdSharedMem->tdSharedCachedMem1.singleElementLength * 2508 tdSharedMem->tdSharedCachedMem1.numElements; 2509 2510 tdSharedMem->tdSharedCachedMem1.alignment = 8; 2511 2512 tdSharedMem->tdSharedCachedMem1.type = TI_CACHED_MEM; 2513 2514 tdSharedMem->tdSharedCachedMem1.virtPtr = agNULL; 2515 tdSharedMem->tdSharedCachedMem1.osHandle = agNULL; 2516 tdSharedMem->tdSharedCachedMem1.physAddrUpper = 0; 2517 tdSharedMem->tdSharedCachedMem1.physAddrLower = 0; 2518 tdSharedMem->tdSharedCachedMem1.reserved = 0; 2519 2520 return; 2521 } 2522 2523 2524 /***************************************************************************** 2525 *! \biref tdResetComMemFlags 2526 * 2527 * Purpose: This function is called to reset all the flags for the port 2528 * 2529 * \param tiRoot: Pointer to driver/port instance. 2530 * 2531 * \return: None 2532 * 2533 * 2534 *****************************************************************************/ 2535 osGLOBAL void 2536 tdsaResetComMemFlags( 2537 tiRoot_t *tiRoot 2538 ) 2539 { 2540 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData; 2541 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 2542 #ifdef TD_DEBUG_ENABLE 2543 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem; 2544 TI_DBG6(("tdsaResetComMemFlags: start\n")); 2545 TI_DBG6(("tdsaResetComMemFlag:: ******* tdsaRoot %p \n", tdsaRoot)); 2546 TI_DBG6(("tdsaResetComMemFlag:: ******* tdsaPortContext %p \n",tdsaPortContext)); 2547 #endif 2548 2549 tdsaAllShared->flags.sysIntsActive = agFALSE; 2550 tdsaAllShared->flags.resetInProgress = agFALSE; 2551 2552 return; 2553 } 2554 2555 /***************************************************************************** 2556 *! \biref tdssInitSASPortStartInfo 2557 * 2558 * Purpose: This function sets information related to staring a port 2559 * 2560 * \param tiRoot: Pointer to driver/port instance. 2561 * 2562 * \return: None 2563 * 2564 * 2565 *****************************************************************************/ 2566 osGLOBAL void 2567 tdssInitSASPortStartInfo( 2568 tiRoot_t *tiRoot 2569 ) 2570 { 2571 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData; 2572 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 2573 int i; 2574 #ifdef TD_DEBUG_ENABLE 2575 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem; 2576 TI_DBG6(("tdssInitSASPortStartInfo: start\n")); 2577 2578 TI_DBG6(("tdssInitSASPortStartInfo: ******* tdsaRoot %p \n", tdsaRoot)); 2579 TI_DBG6(("tdssInitSASPortStartInfo: ******* tdsaPortContext %p \n",tdsaPortContext)); 2580 #endif 2581 2582 for(i=0;i<TD_MAX_NUM_PHYS;i++) 2583 { 2584 tdsaAllShared->Ports[i].tiPortalContext = agNULL; 2585 tdsaAllShared->Ports[i].portContext = agNULL; 2586 tdsaAllShared->Ports[i].SASID.sasAddressHi[0] = 0; 2587 tdsaAllShared->Ports[i].SASID.sasAddressHi[1] = 0; 2588 tdsaAllShared->Ports[i].SASID.sasAddressHi[2] = 0; 2589 tdsaAllShared->Ports[i].SASID.sasAddressHi[3] = 0; 2590 tdsaAllShared->Ports[i].SASID.sasAddressLo[0] = 0; 2591 tdsaAllShared->Ports[i].SASID.sasAddressLo[1] = 0; 2592 tdsaAllShared->Ports[i].SASID.sasAddressLo[2] = 0; 2593 tdsaAllShared->Ports[i].SASID.sasAddressLo[3] = 0; 2594 tdsaAllShared->Ports[i].SASID.phyIdentifier = (bit8) i; 2595 /* continue .... */ 2596 2597 tdsaAllShared->Ports[i].flags.portStarted = agFALSE; 2598 tdsaAllShared->Ports[i].flags.portInitialized = agFALSE; 2599 tdsaAllShared->Ports[i].flags.portReadyForDiscoverySent = agFALSE; 2600 tdsaAllShared->Ports[i].flags.portStoppedByOSLayer = agFALSE; 2601 tdsaAllShared->Ports[i].flags.failPortInit = agFALSE; 2602 } 2603 2604 return; 2605 } 2606 2607 2608 /***************************************************************************** 2609 *! \brief tdsaInitTimers 2610 * 2611 * Purpose: This function is called to initialize the timers 2612 * for initiator 2613 * 2614 * \param tiRoot: pointer to the driver instance 2615 * 2616 * \return: None 2617 * 2618 * \note: 2619 * 2620 *****************************************************************************/ 2621 2622 osGLOBAL void 2623 tdsaInitTimers( 2624 tiRoot_t *tiRoot 2625 ) 2626 { 2627 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData; 2628 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 2629 #ifdef TD_DEBUG_ENABLE 2630 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem; 2631 2632 TI_DBG6(("tdsaInitTimers: start \n")); 2633 TI_DBG6(("tdsaInitTimers: ******* tdsaRoot %p \n", tdsaRoot)); 2634 TI_DBG6(("tdsaInitTimers: ******* tdsaPortContext %p \n",tdsaPortContext)); 2635 #endif 2636 2637 /* initialize the timerlist */ 2638 TDLIST_INIT_HDR(&(tdsaAllShared->timerlist)); 2639 2640 return; 2641 } 2642 2643 2644 /***************************************************************************** 2645 *! \brief tdsaJumpTableInit 2646 * 2647 * Purpose: This function initializes SAS related callback functions 2648 * 2649 * \param tiRoot: pointer to the driver instance 2650 * 2651 * \return: None 2652 * 2653 * \note: 2654 * 2655 *****************************************************************************/ 2656 osGLOBAL void 2657 tdsaJumpTableInit( 2658 tiRoot_t *tiRoot 2659 ) 2660 { 2661 2662 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData; 2663 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 2664 #ifdef TD_DEBUG_ENABLE 2665 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem; 2666 2667 TI_DBG6(("tdsaJumpTableInit: start \n")); 2668 TI_DBG6(("tdsaJumpTableInit:: ******* tdsaRoot %p \n", tdsaRoot)); 2669 TI_DBG6(("tdsaJumpTableInit:: ******* tdsaPortContext %p \n",tdsaPortContext)); 2670 #endif 2671 2672 /* tdtype.h */ 2673 /* 2674 For combo, 2675 pSSPIOCompleted, pSMPCompleted; use callback 2676 pSSPReqReceive, pSMPReqReceived; use jumptable 2677 */ 2678 2679 #ifdef INITIATOR_DRIVER 2680 tdsaAllShared->tdJumpTable.pSSPIOCompleted = agNULL; /* initiator */ 2681 tdsaAllShared->tdJumpTable.pSMPCompleted =agNULL; /* initiator */ 2682 #endif 2683 #ifdef TARGET_DRIVER 2684 tdsaAllShared->tdJumpTable.pSSPIOCompleted = agNULL; 2685 tdsaAllShared->tdJumpTable.pSSPReqReceived = &ttdsaSSPReqReceived; 2686 tdsaAllShared->tdJumpTable.pSMPReqReceived = &ttdsaSMPReqReceived; 2687 tdsaAllShared->tdJumpTable.pSMPCompleted =agNULL; 2688 #endif 2689 tdsaAllShared->tdJumpTable.pGetSGLChunk = agNULL; 2690 return; 2691 2692 } 2693 2694 2695 /***************************************************************************** 2696 *! \brief tdsaPortContextInit 2697 * 2698 * Purpose: This function initializes port contexts. 2699 * 2700 * \param tiRoot: pointer to the driver instance 2701 * 2702 * \return: None 2703 * 2704 * \note: 2705 * 2706 *****************************************************************************/ 2707 osGLOBAL void 2708 tdsaPortContextInit( 2709 tiRoot_t *tiRoot 2710 ) 2711 { 2712 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData; 2713 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 2714 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem; 2715 int i = 0; 2716 int j = 0; 2717 2718 TI_DBG6(("tdsaPortContextInit: start\n")); 2719 TI_DBG6(("tdsaPortContextInit: ******* sizeof(tdsaPortContext) %d %x\n", (int)sizeof(tdsaPortContext_t), (unsigned int)sizeof(tdsaPortContext_t))); 2720 TI_DBG6(("tdsaPortContextInit: ******* tdsaRoot %p \n", tdsaRoot)); 2721 TI_DBG6(("tdsaPortContextInit: ******* tdsaPortContext %p \n",tdsaPortContext)); 2722 TI_DBG6(("tdsaPortContextInit: ******* tdsaPortContext+1 %p \n",tdsaPortContext + 1)); 2723 TI_DBG6(("tdsaPortContextInit: ******* &tdsaPortContext[0] %p &tdsaPortContext[1] %p\n", &(tdsaPortContext[0]), &(tdsaPortContext[1]))); 2724 2725 TDLIST_INIT_HDR(&(tdsaAllShared->MainPortContextList)); 2726 TDLIST_INIT_HDR(&(tdsaAllShared->FreePortContextList)); 2727 2728 for(i=0;i<TD_MAX_PORT_CONTEXT;i++) 2729 { 2730 TDLIST_INIT_ELEMENT(&(tdsaPortContext[i].FreeLink)); 2731 TDLIST_INIT_ELEMENT(&(tdsaPortContext[i].MainLink)); 2732 2733 #ifdef TD_DISCOVER 2734 TDLIST_INIT_HDR(&(tdsaPortContext[i].discovery.discoveringExpanderList)); 2735 TDLIST_INIT_HDR(&(tdsaPortContext[i].discovery.UpdiscoveringExpanderList)); 2736 tdsaPortContext[i].discovery.type = TDSA_DISCOVERY_OPTION_FULL_START; 2737 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.discoveryTimer)); 2738 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.configureRouteTimer)); 2739 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.deviceRegistrationTimer)); 2740 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.SMPBusyTimer)); 2741 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.BCTimer)); 2742 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.DiscoverySMPTimer)); 2743 tdsaPortContext[i].discovery.retries = 0; 2744 tdsaPortContext[i].discovery.configureRouteRetries = 0; 2745 tdsaPortContext[i].discovery.deviceRetistrationRetries = 0; 2746 tdsaPortContext[i].discovery.pendingSMP = 0; 2747 tdsaPortContext[i].discovery.SeenBC = agFALSE; 2748 tdsaPortContext[i].discovery.forcedOK = agFALSE; 2749 tdsaPortContext[i].discovery.SMPRetries = 0; 2750 // tdsaPortContext[i].discovery.doIncremental = agFALSE; 2751 tdsaPortContext[i].discovery.ResetTriggerred = agFALSE; 2752 #endif 2753 2754 2755 #ifdef INITIATOR_DRIVER 2756 tdsaPortContext[i].DiscoveryState = ITD_DSTATE_NOT_STARTED; 2757 tdsaPortContext[i].nativeSATAMode = agFALSE; 2758 tdsaPortContext[i].directAttatchedSAS = agFALSE; 2759 tdsaPortContext[i].DiscoveryRdyGiven = agFALSE; 2760 tdsaPortContext[i].SeenLinkUp = agFALSE; 2761 2762 #endif 2763 tdsaPortContext[i].id = i; 2764 tdsaPortContext[i].agPortContext = agNULL; 2765 tdsaPortContext[i].LinkRate = 0; 2766 tdsaPortContext[i].Count = 0; 2767 tdsaPortContext[i].valid = agFALSE; 2768 for (j=0;j<TD_MAX_NUM_PHYS;j++) 2769 { 2770 tdsaPortContext[i].PhyIDList[j] = agFALSE; 2771 } 2772 tdsaPortContext[i].RegisteredDevNums = 0; 2773 tdsaPortContext[i].eventPhyID = 0xFF; 2774 tdsaPortContext[i].Transient = agFALSE; 2775 tdsaPortContext[i].PortRecoverPhyID = 0xFF; 2776 tdsaPortContext[i].DiscFailNSeenBC = agFALSE; 2777 #ifdef FDS_DM 2778 tdsaPortContext[i].dmPortContext.tdData = &(tdsaPortContext[i]); 2779 tdsaPortContext[i].DMDiscoveryState = dmDiscCompleted; 2780 tdsaPortContext[i].UseDM = agFALSE; 2781 tdsaPortContext[i].UpdateMCN = agFALSE; 2782 #endif 2783 /* add more variables later */ 2784 TDLIST_ENQUEUE_AT_TAIL(&(tdsaPortContext[i].FreeLink), &(tdsaAllShared->FreePortContextList)); 2785 } 2786 2787 #ifdef TD_INTERNAL_DEBUG /* for debugging only */ 2788 for(i=0;i<TD_MAX_PORT_CONTEXT;i++) 2789 { 2790 TI_DBG6(("tdsaPortContextInit: index %d &tdsaPortContext[] %p\n", i, &(tdsaPortContext[i]))); 2791 } 2792 TI_DBG6(("tdsaPortContextInit: sizeof(tdsaPortContext_t) %d 0x%x\n", sizeof(tdsaPortContext_t), sizeof(tdsaPortContext_t))); 2793 #endif 2794 return; 2795 } 2796 2797 /***************************************************************************** 2798 *! \brief tdsaPortContextReInit 2799 * 2800 * Purpose: This function re-initializes port contexts for reuse. 2801 * 2802 * \param tiRoot: pointer to the driver instance 2803 * \param onePortContext: pointer to the portcontext 2804 * 2805 * \return: None 2806 * 2807 * \note: 2808 * 2809 *****************************************************************************/ 2810 osGLOBAL void 2811 tdsaPortContextReInit( 2812 tiRoot_t *tiRoot, 2813 tdsaPortContext_t *onePortContext 2814 ) 2815 { 2816 int j=0; 2817 #ifdef TD_DISCOVER 2818 tdsaDiscovery_t *discovery; 2819 #endif 2820 2821 TI_DBG3(("tdsaPortContextReInit: start\n")); 2822 2823 #ifdef TD_DISCOVER 2824 discovery = &(onePortContext->discovery); 2825 2826 onePortContext->discovery.type = TDSA_DISCOVERY_OPTION_FULL_START; 2827 onePortContext->discovery.retries = 0; 2828 onePortContext->discovery.configureRouteRetries = 0; 2829 onePortContext->discovery.deviceRetistrationRetries = 0; 2830 onePortContext->discovery.pendingSMP = 0; 2831 onePortContext->discovery.SeenBC = agFALSE; 2832 onePortContext->discovery.forcedOK = agFALSE; 2833 onePortContext->discovery.SMPRetries = 0; 2834 onePortContext->discovery.ResetTriggerred = agFALSE; 2835 /* free expander lists */ 2836 tdsaFreeAllExp(tiRoot, onePortContext); 2837 /* kill the discovery-related timers if they are running */ 2838 if (discovery->discoveryTimer.timerRunning == agTRUE) 2839 { 2840 tdsaKillTimer( 2841 tiRoot, 2842 &discovery->discoveryTimer 2843 ); 2844 } 2845 if (discovery->configureRouteTimer.timerRunning == agTRUE) 2846 { 2847 tdsaKillTimer( 2848 tiRoot, 2849 &discovery->configureRouteTimer 2850 ); 2851 } 2852 if (discovery->deviceRegistrationTimer.timerRunning == agTRUE) 2853 { 2854 tdsaKillTimer( 2855 tiRoot, 2856 &discovery->deviceRegistrationTimer 2857 ); 2858 } 2859 if (discovery->BCTimer.timerRunning == agTRUE) 2860 { 2861 tdsaKillTimer( 2862 tiRoot, 2863 &discovery->BCTimer 2864 ); 2865 } 2866 if (discovery->SMPBusyTimer.timerRunning == agTRUE) 2867 { 2868 tdsaKillTimer( 2869 tiRoot, 2870 &discovery->SMPBusyTimer 2871 ); 2872 } 2873 if (discovery->DiscoverySMPTimer.timerRunning == agTRUE) 2874 { 2875 tdsaKillTimer( 2876 tiRoot, 2877 &discovery->DiscoverySMPTimer 2878 ); 2879 } 2880 #endif 2881 2882 #ifdef INITIATOR_DRIVER 2883 onePortContext->DiscoveryState = ITD_DSTATE_NOT_STARTED; 2884 onePortContext->nativeSATAMode = agFALSE; 2885 onePortContext->directAttatchedSAS = agFALSE; 2886 onePortContext->DiscoveryRdyGiven = agFALSE; 2887 onePortContext->SeenLinkUp = agFALSE; 2888 #endif 2889 onePortContext->agPortContext->osData = agNULL; 2890 onePortContext->agPortContext = agNULL; 2891 onePortContext->tiPortalContext = agNULL; 2892 onePortContext->agRoot = agNULL; 2893 onePortContext->LinkRate = 0; 2894 onePortContext->Count = 0; 2895 onePortContext->valid = agFALSE; 2896 for (j=0;j<TD_MAX_NUM_PHYS;j++) 2897 { 2898 onePortContext->PhyIDList[j] = agFALSE; 2899 } 2900 onePortContext->RegisteredDevNums = 0; 2901 onePortContext->eventPhyID = 0xFF; 2902 onePortContext->Transient = agFALSE; 2903 onePortContext->PortRecoverPhyID = 0xFF; 2904 onePortContext->DiscFailNSeenBC = agFALSE; 2905 2906 #ifdef FDS_DM 2907 onePortContext->dmPortContext.tdData = onePortContext; 2908 onePortContext->DMDiscoveryState = dmDiscCompleted; 2909 onePortContext->UseDM = agFALSE; 2910 onePortContext->UpdateMCN = agFALSE; 2911 #endif 2912 return; 2913 } 2914 2915 /***************************************************************************** 2916 *! \brief tdsaDeviceDataInit 2917 * 2918 * Purpose: This function initializes devices 2919 * 2920 * \param tiRoot: pointer to the driver instance 2921 * 2922 * \return: None 2923 * 2924 * \note: 2925 * 2926 *****************************************************************************/ 2927 osGLOBAL void 2928 tdsaDeviceDataInit( 2929 tiRoot_t *tiRoot 2930 ) 2931 { 2932 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData; 2933 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 2934 #ifdef TD_DEBUG_ENABLE 2935 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem; 2936 #endif 2937 tdsaDeviceData_t *tdsaDeviceData = 2938 (tdsaDeviceData_t *)tdsaAllShared->DeviceMem; 2939 int i; 2940 #ifdef SATA_ENABLE 2941 bit32 j; 2942 satInternalIo_t *satIntIO; 2943 #endif 2944 bit32 MaxTargets; 2945 2946 TI_DBG6(("tdsaDeviceDataInit: start\n")); 2947 TI_DBG6(("tdsaDeviceDataInit: ******* tdsaPortContext %p \n",tdsaPortContext)); 2948 TI_DBG6(("tdsaDeviceDataInit: ******* tdsaDeviceData %p\n", tdsaDeviceData)); 2949 TI_DBG6(("tdsaDeviceDataInit: ******* tdsaDeviceData+1 %p\n", tdsaDeviceData+1)); 2950 TI_DBG6(("tdsaDeviceDataInit: ******* &tdsaDeviceData[0] %p &tdsaDeviceData[1] %p\n", &(tdsaDeviceData[0]), &(tdsaDeviceData[1]))); 2951 2952 /* the following fn fills in MaxTargets */ 2953 tdssGetMaxTargetsParams(tiRoot, &MaxTargets); 2954 TI_DBG6(("tdsaDeviceDataInit: MaxTargets %d\n", MaxTargets)); 2955 2956 TDLIST_INIT_HDR(&(tdsaAllShared->MainDeviceList)); 2957 TDLIST_INIT_HDR(&(tdsaAllShared->FreeDeviceList)); 2958 2959 for(i=0;i<(int)MaxTargets;i++) 2960 { 2961 TDLIST_INIT_ELEMENT(&(tdsaDeviceData[i].FreeLink)); 2962 TDLIST_INIT_ELEMENT(&(tdsaDeviceData[i].MainLink)); 2963 TDLIST_INIT_ELEMENT(&(tdsaDeviceData[i].IncDisLink)); 2964 tdsaDeviceData[i].id = i; 2965 tdsaDeviceData[i].InQID = 0; 2966 tdsaDeviceData[i].OutQID = 0; 2967 tdsaDeviceData[i].DeviceType = TD_DEFAULT_DEVICE; 2968 tdsaDeviceData[i].agRoot = agNULL; 2969 tdsaDeviceData[i].agDevHandle = agNULL; 2970 2971 tdsaDeviceData[i].pJumpTable = &(tdsaAllShared->tdJumpTable); 2972 tdsaDeviceData[i].tiDeviceHandle.osData = agNULL; 2973 tdsaDeviceData[i].tiDeviceHandle.tdData = &(tdsaDeviceData[i]); 2974 tdsaDeviceData[i].tdPortContext = agNULL; 2975 tdsaDeviceData[i].tdExpander = agNULL; 2976 tdsaDeviceData[i].ExpDevice = agNULL; 2977 tdsaDeviceData[i].phyID = 0xFF; 2978 tdsaDeviceData[i].SASAddressID.sasAddressHi = 0; 2979 tdsaDeviceData[i].SASAddressID.sasAddressLo = 0; 2980 tdsaDeviceData[i].valid = agFALSE; 2981 tdsaDeviceData[i].valid2 = agFALSE; 2982 tdsaDeviceData[i].processed = agFALSE; 2983 tdsaDeviceData[i].initiator_ssp_stp_smp = 0; 2984 tdsaDeviceData[i].target_ssp_stp_smp = 0; 2985 tdsaDeviceData[i].numOfPhys = 0; 2986 tdsaDeviceData[i].registered = agFALSE; 2987 tdsaDeviceData[i].directlyAttached = agFALSE; 2988 tdsaDeviceData[i].SASSpecDeviceType = 0xFF; 2989 tdsaDeviceData[i].IOStart = 0; 2990 tdsaDeviceData[i].IOResponse = 0; 2991 tdsaDeviceData[i].agDeviceResetContext.osData = agNULL; 2992 tdsaDeviceData[i].agDeviceResetContext.sdkData = agNULL; 2993 tdsaDeviceData[i].TRflag = agFALSE; 2994 tdsaDeviceData[i].ResetCnt = 0; 2995 tdsaDeviceData[i].OSAbortAll = agFALSE; 2996 2997 #ifdef FDS_DM 2998 tdsaDeviceData[i].devMCN = 1; 2999 tdsaDeviceData[i].finalMCN = 1; 3000 #endif 3001 3002 #ifdef FDS_SM 3003 tdsaDeviceData[i].SMNumOfFCA = 0; 3004 tdsaDeviceData[i].SMNumOfID = 0; 3005 #endif 3006 3007 #ifdef SATA_ENABLE 3008 TDLIST_INIT_HDR(&(tdsaDeviceData[i].satDevData.satIoLinkList)); 3009 TDLIST_INIT_HDR(&(tdsaDeviceData[i].satDevData.satFreeIntIoLinkList)); 3010 TDLIST_INIT_HDR(&(tdsaDeviceData[i].satDevData.satActiveIntIoLinkList)); 3011 3012 /* default */ 3013 tdsaDeviceData[i].satDevData.satDriveState = SAT_DEV_STATE_NORMAL; 3014 tdsaDeviceData[i].satDevData.satNCQMaxIO =SAT_NCQ_MAX; 3015 tdsaDeviceData[i].satDevData.satPendingIO = 0; 3016 tdsaDeviceData[i].satDevData.satPendingNCQIO = 0; 3017 tdsaDeviceData[i].satDevData.satPendingNONNCQIO = 0; 3018 tdsaDeviceData[i].satDevData.IDDeviceValid = agFALSE; 3019 tdsaDeviceData[i].satDevData.freeSATAFDMATagBitmap = 0; 3020 tdsaDeviceData[i].satDevData.NumOfFCA = 0; 3021 tdsaDeviceData[i].satDevData.NumOfIDRetries = 0; 3022 tdsaDeviceData[i].satDevData.ID_Retries = 0; 3023 tdsaDeviceData[i].satDevData.IDPending = agFALSE; 3024 tdsaInitTimerRequest(tiRoot, &(tdsaDeviceData[i].SATAIDDeviceTimer)); 3025 #ifdef FDS_SM 3026 tdsaInitTimerRequest(tiRoot, &(tdsaDeviceData[i].tdIDTimer)); 3027 #endif 3028 osti_memset(tdsaDeviceData[i].satDevData.satMaxLBA, 0, sizeof(tdsaDeviceData[i].satDevData.satMaxLBA)); 3029 3030 tdsaDeviceData[i].satDevData.satSaDeviceData = &tdsaDeviceData[i]; 3031 satIntIO = &tdsaDeviceData[i].satDevData.satIntIo[0]; 3032 for (j = 0; j < SAT_MAX_INT_IO; j++) 3033 { 3034 TDLIST_INIT_ELEMENT (&satIntIO->satIntIoLink); 3035 TDLIST_ENQUEUE_AT_TAIL (&satIntIO->satIntIoLink, 3036 &tdsaDeviceData[i].satDevData.satFreeIntIoLinkList); 3037 satIntIO->satOrgTiIORequest = agNULL; 3038 satIntIO->id = j; 3039 satIntIO = satIntIO + 1; 3040 } 3041 #endif 3042 /* some other variables */ 3043 TDLIST_ENQUEUE_AT_TAIL(&(tdsaDeviceData[i].FreeLink), &(tdsaAllShared->FreeDeviceList)); 3044 } 3045 3046 #ifdef TD_INTERNAL_DEBUG /* for debugging only */ 3047 for(i=0;i<MaxTargets;i++) 3048 { 3049 TI_DBG6(("tdsaDeviceDataInit: index %d &tdsaDeviceData[] %p\n", i, &(tdsaDeviceData[i]))); 3050 3051 } 3052 TI_DBG6(("tdsaDeviceDataInit: sizeof(tdsaDeviceData_t) %d 0x%x\n", sizeof(tdsaDeviceData_t), sizeof(tdsaDeviceData_t))); 3053 #endif 3054 return; 3055 } 3056 3057 /***************************************************************************** 3058 *! \brief tdsaDeviceDataReInit 3059 * 3060 * Purpose: This function re-initializes device data for reuse. 3061 * 3062 * \param tiRoot: pointer to the driver instance 3063 * \param onePortContext: pointer to the device data 3064 * 3065 * \return: None 3066 * 3067 * \note: 3068 * 3069 *****************************************************************************/ 3070 osGLOBAL void 3071 tdsaDeviceDataReInit( 3072 tiRoot_t *tiRoot, 3073 tdsaDeviceData_t *oneDeviceData 3074 ) 3075 { 3076 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData; 3077 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 3078 #ifdef SATA_ENABLE 3079 int j=0; 3080 satInternalIo_t *satIntIO; 3081 #endif 3082 3083 TI_DBG3(("tdsaDeviceDataReInit: start\n")); 3084 3085 oneDeviceData->InQID = 0; 3086 oneDeviceData->OutQID = 0; 3087 oneDeviceData->DeviceType = TD_DEFAULT_DEVICE; 3088 oneDeviceData->agDevHandle = agNULL; 3089 3090 oneDeviceData->pJumpTable = &(tdsaAllShared->tdJumpTable); 3091 oneDeviceData->tiDeviceHandle.osData = agNULL; 3092 oneDeviceData->tiDeviceHandle.tdData = oneDeviceData; 3093 oneDeviceData->tdPortContext = agNULL; 3094 oneDeviceData->tdExpander = agNULL; 3095 oneDeviceData->ExpDevice = agNULL; 3096 oneDeviceData->phyID = 0xFF; 3097 oneDeviceData->SASAddressID.sasAddressHi = 0; 3098 oneDeviceData->SASAddressID.sasAddressLo = 0; 3099 oneDeviceData->valid = agFALSE; 3100 oneDeviceData->valid2 = agFALSE; 3101 oneDeviceData->processed = agFALSE; 3102 oneDeviceData->initiator_ssp_stp_smp = 0; 3103 oneDeviceData->target_ssp_stp_smp = 0; 3104 oneDeviceData->numOfPhys = 0; 3105 oneDeviceData->registered = agFALSE; 3106 oneDeviceData->directlyAttached = agFALSE; 3107 oneDeviceData->SASSpecDeviceType = 0xFF; 3108 oneDeviceData->IOStart = 0; 3109 oneDeviceData->IOResponse = 0; 3110 oneDeviceData->agDeviceResetContext.osData = agNULL; 3111 oneDeviceData->agDeviceResetContext.sdkData = agNULL; 3112 oneDeviceData->TRflag = agFALSE; 3113 oneDeviceData->ResetCnt = 0; 3114 oneDeviceData->OSAbortAll = agFALSE; 3115 3116 #ifdef FDS_DM 3117 oneDeviceData->devMCN = 1; 3118 oneDeviceData->finalMCN = 1; 3119 #endif 3120 3121 #ifdef FDS_SM 3122 oneDeviceData->SMNumOfFCA = 0; 3123 oneDeviceData->SMNumOfID = 0; 3124 if (oneDeviceData->tdIDTimer.timerRunning == agTRUE) 3125 { 3126 tdsaKillTimer( 3127 tiRoot, 3128 &oneDeviceData->tdIDTimer 3129 ); 3130 } 3131 #endif 3132 3133 #ifdef SATA_ENABLE 3134 /* default */ 3135 oneDeviceData->satDevData.satDriveState = SAT_DEV_STATE_NORMAL; 3136 oneDeviceData->satDevData.satNCQMaxIO =SAT_NCQ_MAX; 3137 oneDeviceData->satDevData.satPendingIO = 0; 3138 oneDeviceData->satDevData.satPendingNCQIO = 0; 3139 oneDeviceData->satDevData.satPendingNONNCQIO = 0; 3140 oneDeviceData->satDevData.IDDeviceValid = agFALSE; 3141 oneDeviceData->satDevData.freeSATAFDMATagBitmap = 0; 3142 oneDeviceData->satDevData.NumOfFCA = 0; 3143 oneDeviceData->satDevData.NumOfIDRetries = 0; 3144 oneDeviceData->satDevData.ID_Retries = 0; 3145 oneDeviceData->satDevData.IDPending = agFALSE; 3146 3147 osti_memset(oneDeviceData->satDevData.satMaxLBA, 0, sizeof(oneDeviceData->satDevData.satMaxLBA)); 3148 osti_memset(&(oneDeviceData->satDevData.satIdentifyData), 0xFF, sizeof(agsaSATAIdentifyData_t)); 3149 3150 oneDeviceData->satDevData.satSaDeviceData = oneDeviceData; 3151 3152 satIntIO = (satInternalIo_t *)&(oneDeviceData->satDevData.satIntIo[0]); 3153 for (j = 0; j < SAT_MAX_INT_IO; j++) 3154 { 3155 TI_DBG3(("tdsaDeviceDataReInit: in loop of internal io free, id %d\n", satIntIO->id)); 3156 satFreeIntIoResource(tiRoot, &(oneDeviceData->satDevData), satIntIO); 3157 satIntIO = satIntIO + 1; 3158 } 3159 #endif 3160 return; 3161 } 3162 3163 #ifdef TD_INT_COALESCE 3164 /***************************************************************************** 3165 *! \brief tdsaIntCoalCxtInit( 3166 * 3167 * Purpose: This function initializes interrupt coalesce contexts. 3168 * 3169 * \param tiRoot: pointer to the driver instance 3170 * 3171 * \return: None 3172 * 3173 * \note: 3174 * 3175 *****************************************************************************/ 3176 osGLOBAL void 3177 tdsaIntCoalCxtInit( 3178 tiRoot_t *tiRoot 3179 ) 3180 { 3181 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData; 3182 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 3183 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContext; 3184 tdsaDeviceData_t *tdsaDeviceData = (tdsaDeviceData_t *)tdsaAllShared->DeviceDataHead; 3185 tdsaIntCoalesceContext_t *tdsaIntCoalCxt = (tdsaIntCoalesceContext_t *)tdsaAllShared->IntCoalesce; 3186 int i = 0; 3187 int j = 0; 3188 bit32 MaxTargets; 3189 3190 TI_DBG2(("tdsaIntCoalCxtInit: start\n")); 3191 TI_DBG6(("tdsaIntCoalCxtInit: ******* sizeof(tdsaPortContext) %d 0x%x\n", sizeof(tdsaPortContext_t), sizeof(tdsaPortContext_t))); 3192 TI_DBG6(("tdsaIntCoalCxtInit: ******* sizeof(tdsaIntCoalCxt) %d 0x%x\n", sizeof(tdsaDeviceData_t), sizeof(tdsaDeviceData_t))); 3193 TI_DBG6(("tdsaIntCoalCxtInit: ******* sizeof(tdsaIntCoalCxt) %d 0x%x\n", sizeof(tdsaIntCoalesceContext_t), sizeof(tdsaIntCoalesceContext_t))); 3194 TI_DBG6(("tdsaIntCoalCxtInit: ******* tdsaRoot %p \n", tdsaRoot)); 3195 TI_DBG6(("tdsaIntCoalCxtInit: ******* tdsaPortContext %p \n",tdsaPortContext)); 3196 TI_DBG6(("tdsaDeviceDataInit: ******* tdsaDeviceData %p\n", tdsaDeviceData)); 3197 TI_DBG6(("tdsaIntCoalCxtInit: ******* tdsaIntCoalCxt+1 %p \n", tdsaIntCoalCxt + 1)); 3198 TI_DBG6(("tdsaIntCoalCxtInit: ******* &tdsaIntCoalCxt[0] %p &tdsaIntCoalCxt[1] %p\n", &(tdsaIntCoalCxt[0]), &(tdsaIntCoalCxt[1]))); 3199 3200 /* for debug */ 3201 TI_DBG6(("tdsaIntCoalCxtInit: TD_MAX_PORT_CONTEXT %d\n", TD_MAX_PORT_CONTEXT)); 3202 /* the following fn fills in MaxTargets */ 3203 tdssGetMaxTargetsParams(tiRoot, &MaxTargets); 3204 TI_DBG6(("tdsaIntCoalCxtInit: MaxTargets %d\n", MaxTargets)); 3205 3206 TI_DBG6(("tdsaIntCoalCxtInit: portcontext in sum 0x%x\n", sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT)); 3207 TI_DBG6(("tdsaIntCoalCxtInit: devicedata in sum 0x%x\n", sizeof(tdsaDeviceData_t) * MaxTargets)); 3208 3209 /* 3210 tdsaIntCoalCx[0] is just head, not an element 3211 */ 3212 TDLIST_INIT_HDR(&(tdsaIntCoalCxt[0].MainLink)); 3213 TDLIST_INIT_HDR(&(tdsaIntCoalCxt[0].FreeLink)); 3214 3215 tdsaIntCoalCxt[0].tdsaAllShared = tdsaAllShared; 3216 tdsaIntCoalCxt[0].tiIntCoalesceCxt = agNULL; 3217 tdsaIntCoalCxt[0].id = 0; 3218 3219 3220 for(i=1;i<TD_MAX_INT_COALESCE;i++) 3221 { 3222 TDLIST_INIT_ELEMENT(&(tdsaIntCoalCxt[i].FreeLink)); 3223 TDLIST_INIT_ELEMENT(&(tdsaIntCoalCxt[i].MainLink)); 3224 3225 tdsaIntCoalCxt[i].tdsaAllShared = tdsaAllShared; 3226 tdsaIntCoalCxt[i].tiIntCoalesceCxt = agNULL; 3227 tdsaIntCoalCxt[i].id = i; 3228 3229 /* enqueue */ 3230 TDLIST_ENQUEUE_AT_TAIL(&(tdsaIntCoalCxt[i].FreeLink), &(tdsaIntCoalCxt[0].FreeLink)); 3231 } 3232 return; 3233 } 3234 #endif /* TD_INT_COALESCE */ 3235 3236 3237 osGLOBAL void 3238 tdsaExpanderInit( 3239 tiRoot_t *tiRoot 3240 ) 3241 { 3242 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData; 3243 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 3244 3245 tdsaExpander_t *tdsaExpander = 3246 (tdsaExpander_t *)tdsaAllShared->ExpanderHead; 3247 bit32 MaxTargets; 3248 3249 3250 int i; 3251 3252 TI_DBG6(("tdsaExpanderInit: start\n")); 3253 tdssGetMaxTargetsParams(tiRoot, &MaxTargets); 3254 TI_DBG6(("tdsaExpanderInit: MaxTargets %d\n", MaxTargets)); 3255 3256 // TDLIST_INIT_HDR(&(tdsaAllShared->discoveringExpanderList)); 3257 TDLIST_INIT_HDR(&(tdsaAllShared->freeExpanderList)); 3258 3259 for(i=0;i<(int)MaxTargets;i++) 3260 { 3261 TDLIST_INIT_ELEMENT(&(tdsaExpander[i].linkNode)); 3262 TDLIST_INIT_ELEMENT(&(tdsaExpander[i].upNode)); 3263 /* initialize expander fields */ 3264 tdsaExpander[i].tdDevice = agNULL; 3265 tdsaExpander[i].tdUpStreamExpander = agNULL; 3266 tdsaExpander[i].tdDeviceToProcess = agNULL; 3267 tdsaExpander[i].tdCurrentDownStreamExpander = agNULL; 3268 tdsaExpander[i].hasUpStreamDevice = agFALSE; 3269 tdsaExpander[i].numOfUpStreamPhys = 0; 3270 tdsaExpander[i].currentUpStreamPhyIndex = 0; 3271 tdsaExpander[i].numOfDownStreamPhys = 0; 3272 tdsaExpander[i].currentDownStreamPhyIndex = 0; 3273 tdsaExpander[i].discoveringPhyId = 0; 3274 tdsaExpander[i].underDiscovering = agFALSE; 3275 tdsaExpander[i].id = i; 3276 tdsaExpander[i].tdReturnginExpander = agNULL; 3277 tdsaExpander[i].discoverSMPAllowed = agTRUE; 3278 osti_memset( &(tdsaExpander[i].currentIndex), 0, sizeof(tdsaExpander[i].currentIndex)); 3279 osti_memset( &(tdsaExpander[i].upStreamPhys), 0, sizeof(tdsaExpander[i].upStreamPhys)); 3280 osti_memset( &(tdsaExpander[i].downStreamPhys), 0, sizeof(tdsaExpander[i].downStreamPhys)); 3281 osti_memset( &(tdsaExpander[i].routingAttribute), 0, sizeof(tdsaExpander[i].routingAttribute)); 3282 tdsaExpander[i].configSASAddrTableIndex = 0; 3283 osti_memset( &(tdsaExpander[i].configSASAddressHiTable), 0, sizeof(tdsaExpander[i].configSASAddressHiTable)); 3284 osti_memset( &(tdsaExpander[i].configSASAddressLoTable), 0, sizeof(tdsaExpander[i].configSASAddressLoTable)); 3285 3286 3287 TDLIST_ENQUEUE_AT_TAIL(&(tdsaExpander[i].linkNode), &(tdsaAllShared->freeExpanderList)); 3288 } 3289 return; 3290 } 3291 3292 osGLOBAL void 3293 tdsaQueueConfigInit( 3294 tiRoot_t *tiRoot 3295 ) 3296 { 3297 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData; 3298 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared; 3299 3300 /* for memory index requirement */ 3301 agsaQueueConfig_t *QueueConfig; 3302 bit32 i; 3303 3304 TI_DBG2(("tdsaQueueConfigInit: start\n")); 3305 tdsaGetSwConfigParams(tiRoot); 3306 QueueConfig = &tdsaAllShared->QueueConfig; 3307 3308 for(i=0;i<QueueConfig->numInboundQueues;i++) 3309 { 3310 QueueConfig->inboundQueues[i].elementCount = tdsaAllShared->InboundQueueSize[i]; 3311 QueueConfig->inboundQueues[i].elementSize = tdsaAllShared->InboundQueueEleSize[i]; 3312 QueueConfig->inboundQueues[i].priority = tdsaAllShared->InboundQueuePriority[i]; 3313 QueueConfig->inboundQueues[i].reserved = 0; 3314 } 3315 for(i=0;i<QueueConfig->numOutboundQueues;i++) 3316 { 3317 QueueConfig->outboundQueues[i].elementCount = tdsaAllShared->OutboundQueueSize[i]; 3318 QueueConfig->outboundQueues[i].elementSize = tdsaAllShared->OutboundQueueEleSize[i]; 3319 QueueConfig->outboundQueues[i].interruptDelay = tdsaAllShared->OutboundQueueInterruptDelay[i]; /* default 0; no interrupt delay */ 3320 QueueConfig->outboundQueues[i].interruptCount = tdsaAllShared->OutboundQueueInterruptCount[i]; /* default 1*/ 3321 QueueConfig->outboundQueues[i].interruptEnable = tdsaAllShared->OutboundQueueInterruptEnable[i]; /* default 1*/ 3322 QueueConfig->outboundQueues[i].interruptVectorIndex = 0; 3323 } 3324 /* default */ 3325 for (i=0;i<8;i++) 3326 { 3327 QueueConfig->sasHwEventQueue[i] = 0; 3328 QueueConfig->sataNCQErrorEventQueue[i] = 0; 3329 } 3330 3331 #ifdef TARGET_DRIVER 3332 for (i=0;i<8;i++) 3333 { 3334 QueueConfig->tgtITNexusEventQueue[i] = 0; 3335 QueueConfig->tgtSSPEventQueue[i] = 0; 3336 QueueConfig->tgtSMPEventQueue[i] = 0; 3337 } 3338 #endif 3339 QueueConfig->iqNormalPriorityProcessingDepth = 0; 3340 QueueConfig->iqHighPriorityProcessingDepth = 0; 3341 QueueConfig->generalEventQueue = 0; 3342 3343 return; 3344 } 3345 3346 /***************************************************************************** 3347 *! \brief tdssGetMaxTargetsParams 3348 * 3349 * Purpose: This function is called to get default parameters from the 3350 * OS Specific area. This function is called in the context of 3351 * tiCOMGetResource() and tiCOMInit(). 3352 * 3353 * 3354 * \param tiRoot: Pointer to initiator driver/port instance. 3355 * \param option: Pointer to bit32 where the max target number is saved 3356 * 3357 * \return: None 3358 * 3359 * \note - 3360 * 3361 *****************************************************************************/ 3362 osGLOBAL void 3363 tdssGetMaxTargetsParams( 3364 tiRoot_t *tiRoot, 3365 bit32 *pMaxTargets 3366 ) 3367 { 3368 char *key = agNULL; 3369 char *subkey1 = agNULL; 3370 char *subkey2 = agNULL; 3371 char *buffer; 3372 bit32 buffLen; 3373 bit32 lenRecv = 0; 3374 char *pLastUsedChar = agNULL; 3375 char tmpBuffer[DEFAULT_KEY_BUFFER_SIZE]; 3376 char globalStr[] = "Global"; 3377 char iniParmsStr[] = "InitiatorParms"; 3378 bit32 MaxTargets; 3379 3380 TI_DBG6(("tdssGetMaxTargetsParams: start\n")); 3381 3382 *pMaxTargets = DEFAULT_MAX_DEV; 3383 3384 /* to remove compiler warnings */ 3385 pLastUsedChar = pLastUsedChar; 3386 lenRecv = lenRecv; 3387 subkey2 = subkey2; 3388 subkey1 = subkey1; 3389 key = key; 3390 buffer = &tmpBuffer[0]; 3391 buffLen = sizeof (tmpBuffer); 3392 3393 osti_memset(buffer, 0, buffLen); 3394 3395 /* defaults are overwritten in the following */ 3396 /* Get MaxTargets */ 3397 if ((ostiGetTransportParam( 3398 tiRoot, 3399 globalStr, 3400 iniParmsStr, 3401 agNULL, 3402 agNULL, 3403 agNULL, 3404 agNULL, 3405 "MaxTargets", 3406 buffer, 3407 buffLen, 3408 &lenRecv 3409 ) == tiSuccess) && (lenRecv != 0)) 3410 { 3411 if (osti_strncmp(buffer, "0x", 2) == 0) 3412 { 3413 MaxTargets = osti_strtoul (buffer, &pLastUsedChar, 0); 3414 } 3415 else 3416 { 3417 MaxTargets = osti_strtoul (buffer, &pLastUsedChar, 10); 3418 } 3419 *pMaxTargets = MaxTargets; 3420 TI_DBG2(("tdssGetMaxTargetsParams: MaxTargets %d\n", MaxTargets )); 3421 } 3422 3423 osti_memset(buffer, 0, buffLen); 3424 lenRecv = 0; 3425 3426 return; 3427 } 3428 3429 /* temporary to distinguish SAS and SATA mode */ 3430 osGLOBAL void 3431 tdssGetSATAOnlyModeParams( 3432 tiRoot_t *tiRoot, 3433 bit32 *pSATAOnlyMode 3434 ) 3435 { 3436 char *key = agNULL; 3437 char *subkey1 = agNULL; 3438 char *subkey2 = agNULL; 3439 char *buffer; 3440 bit32 buffLen; 3441 bit32 lenRecv = 0; 3442 char *pLastUsedChar = agNULL; 3443 char tmpBuffer[DEFAULT_KEY_BUFFER_SIZE]; 3444 char globalStr[] = "Global"; 3445 char iniParmsStr[] = "InitiatorParms"; 3446 bit32 SATAOnlyMode; 3447 3448 TI_DBG6(("tdssGetSATAOnlyModeParams: start\n")); 3449 3450 *pSATAOnlyMode = agFALSE; /* default SAS and SATA */ 3451 3452 /* to remove compiler warnings */ 3453 pLastUsedChar = pLastUsedChar; 3454 lenRecv = lenRecv; 3455 subkey2 = subkey2; 3456 subkey1 = subkey1; 3457 key = key; 3458 buffer = &tmpBuffer[0]; 3459 buffLen = sizeof (tmpBuffer); 3460 3461 osti_memset(buffer, 0, buffLen); 3462 3463 /* defaults are overwritten in the following */ 3464 /* Get SATAOnlyMode */ 3465 if ((ostiGetTransportParam( 3466 tiRoot, 3467 globalStr, 3468 iniParmsStr, 3469 agNULL, 3470 agNULL, 3471 agNULL, 3472 agNULL, 3473 "SATAOnlyMode", 3474 buffer, 3475 buffLen, 3476 &lenRecv 3477 ) == tiSuccess) && (lenRecv != 0)) 3478 { 3479 if (osti_strncmp(buffer, "0x", 2) == 0) 3480 { 3481 SATAOnlyMode = osti_strtoul (buffer, &pLastUsedChar, 0); 3482 } 3483 else 3484 { 3485 SATAOnlyMode = osti_strtoul (buffer, &pLastUsedChar, 10); 3486 } 3487 *pSATAOnlyMode = SATAOnlyMode; 3488 } 3489 3490 osti_memset(buffer, 0, buffLen); 3491 lenRecv = 0; 3492 3493 return; 3494 } 3495 3496

Cache object: b61c944ca7c13609004e830cec1e591b

FreeBSD/Linux Kernel Cross Reference sys/dev/pms/RefTisa/tisa/sassata/common/tdinit.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/pms/RefTisa/tisa/sassata/common/tdinit.c