smccc_arm64.S

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause
    3  *
    4  * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com>
    5  *
    6  * This software was developed by SRI International and the University of
    7  * Cambridge Computer Laboratory (Department of Computer Science and
    8  * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
    9  * DARPA SSITH research programme.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   30  * SUCH DAMAGE.
   31  */
   32 
   33 #include <machine/asm.h>
   34 __FBSDID("$FreeBSD$");
   35 
   36 .macro arm_smccc_1_0    insn
   37 ENTRY(arm_smccc_\insn)
   38         \insn   #0
   39         ldr     x4, [sp]
   40         cbz     x4, 1f
   41         stp     x0, x1, [x4, #16 * 0]
   42         stp     x2, x3, [x4, #16 * 1]
   43 1:      ret
   44 END(arm_smccc_\insn)
   45 .endm
   46 
   47 /*
   48  * int arm_smccc_*(register_t, register_t, register_t, register_t,
   49  *     register_t, register_t, register_t, register_t,
   50  *     struct arm_smccc_res *res)
   51  */
   52 arm_smccc_1_0   hvc
   53 arm_smccc_1_0   smc
   54 
   55 .macro arm_smccc_1_2    insn
   56 ENTRY(arm_smccc_1_2_\insn)
   57         stp     x1, x19, [sp, #-16]!
   58         mov     x19, x0
   59         ldp     x0, x1, [x19, #16 * 0]
   60         ldp     x2, x3, [x19, #16 * 1]
   61         ldp     x4, x5, [x19, #16 * 2]
   62         ldp     x6, x7, [x19, #16 * 3]
   63         ldp     x8, x9, [x19, #16 * 4]
   64         ldp     x10, x11, [x19, #16 * 5]
   65         ldp     x12, x13, [x19, #16 * 6]
   66         ldp     x14, x15, [x19, #16 * 7]
   67         ldp     x16, x17, [x19, #16 * 8]
   68         \insn   #0
   69         ldr     x19, [sp]
   70         cbz     x19, 1f
   71         stp     x0, x1, [x19, #16 * 0]
   72         stp     x2, x3, [x19, #16 * 1]
   73         stp     x4, x5, [x19, #16 * 2]
   74         stp     x6, x7, [x19, #16 * 3]
   75         stp     x8, x9, [x19, #16 * 4]
   76         stp     x10, x11, [x19, #16 * 5]
   77         stp     x12, x13, [x19, #16 * 6]
   78         stp     x14, x15, [x19, #16 * 7]
   79         stp     x16, x17, [x19, #16 * 8]
   80         ldp     xzr, x19, [sp], #16
   81 1:      ret
   82 END(arm_smccc_1_2\insn)
   83 .endm
   84 /* int arm_smccc_1_2_*(const struct arm_smccc_1_2_regs *args,
   85  *     struct arm_smccc_1_2_regs *res)
   86  */
   87 arm_smccc_1_2   hvc
   88 arm_smccc_1_2   smc

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FreeBSD/Linux Kernel Cross Reference sys/dev/psci/smccc_arm64.S

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sys/dev/psci/smccc_arm64.S