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sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h
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1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright(c) 2007-2022 Intel Corporation */ 3 /* $FreeBSD$ */ 4 /** 5 ***************************************************************************** 6 * @file icp_qat_fw_comp.h 7 * @defgroup icp_qat_fw_comp ICP QAT FW Compression Service 8 * Interface Definitions 9 * @ingroup icp_qat_fw 10 * @description 11 * This file documents structs used to provide the interface to the 12 * Compression QAT FW service 13 * 14 *****************************************************************************/ 15 16 #ifndef _ICP_QAT_FW_COMP_H_ 17 #define _ICP_QAT_FW_COMP_H_ 18 19 /* 20 ****************************************************************************** 21 * Include local header files 22 ****************************************************************************** 23 */ 24 #include "icp_qat_fw.h" 25 26 /** 27 ***************************************************************************** 28 * @ingroup icp_qat_fw_comp 29 * Definition of the Compression command types 30 * @description 31 * Enumeration which is used to indicate the ids of functions 32 * that are exposed by the Compression QAT FW service 33 * 34 *****************************************************************************/ 35 36 typedef enum { 37 ICP_QAT_FW_COMP_CMD_STATIC = 0, 38 /*!< Static Compress Request */ 39 40 ICP_QAT_FW_COMP_CMD_DYNAMIC = 1, 41 /*!< Dynamic Compress Request */ 42 43 ICP_QAT_FW_COMP_CMD_DECOMPRESS = 2, 44 /*!< Decompress Request */ 45 46 ICP_QAT_FW_COMP_CMD_DELIMITER 47 /**< Delimiter type */ 48 49 } icp_qat_fw_comp_cmd_id_t; 50 51 /* 52 * REQUEST FLAGS IN COMMON COMPRESSION 53 * In common message it is named as SERVICE SPECIFIC FLAGS. 54 * 55 * + ===== + ------ + ------ + --- + ----- + ----- + ----- + -- + ---- + --- + 56 * | Bit | 15 - 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 57 * + ===== + ------ + ----- + --- + ----- + ----- + ----- + -- + ---- + --- + 58 * | Flags | Rsvd | Dis. |Resvd| Dis. | Enh. |Auto |Sess| Rsvd | Rsvd| 59 * | | Bits | secure | =0 | Type0 | ASB |Select |Type| = 0 | = 0 | 60 * | | = 0 |RAM use | | Header | |Best | | | | 61 * | | |as intmd| | | | | | | | 62 * | | | buf | | | | | | | | 63 * + ===== + ------ + ----- + --- + ------ + ----- + ----- + -- + ---- + --- + 64 * Note: For QAT 2.0 Disable Secure Ram, DisType0 Header and Enhanced ASB bits 65 * are don't care. i.e., these features are removed from QAT 2.0. 66 */ 67 68 /** Flag usage */ 69 70 #define ICP_QAT_FW_COMP_STATELESS_SESSION 0 71 /**< @ingroup icp_qat_fw_comp 72 * Flag representing that session is stateless */ 73 74 #define ICP_QAT_FW_COMP_STATEFUL_SESSION 1 75 /**< @ingroup icp_qat_fw_comp 76 * Flag representing that session is stateful */ 77 78 #define ICP_QAT_FW_COMP_NOT_AUTO_SELECT_BEST 0 79 /**< @ingroup icp_qat_fw_comp 80 * Flag representing that autoselectbest is NOT used */ 81 82 #define ICP_QAT_FW_COMP_AUTO_SELECT_BEST 1 83 /**< @ingroup icp_qat_fw_comp 84 * Flag representing that autoselectbest is used */ 85 86 #define ICP_QAT_FW_COMP_NOT_ENH_AUTO_SELECT_BEST 0 87 /**< @ingroup icp_qat_fw_comp 88 * Flag representing that enhanced autoselectbest is NOT used */ 89 90 #define ICP_QAT_FW_COMP_ENH_AUTO_SELECT_BEST 1 91 /**< @ingroup icp_qat_fw_comp 92 * Flag representing that enhanced autoselectbest is used */ 93 94 #define ICP_QAT_FW_COMP_NOT_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST 0 95 /**< @ingroup icp_qat_fw_comp 96 * Flag representing that enhanced autoselectbest is NOT used */ 97 98 #define ICP_QAT_FW_COMP_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST 1 99 /**< @ingroup icp_qat_fw_comp 100 * Flag representing that enhanced autoselectbest is used */ 101 102 #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_USED_AS_INTMD_BUF 1 103 /**< @ingroup icp_qat_fw_comp 104 * Flag representing secure RAM from being used as 105 * an intermediate buffer is DISABLED. */ 106 107 #define ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF 0 108 /**< @ingroup icp_qat_fw_comp 109 * Flag representing secure RAM from being used as 110 * an intermediate buffer is ENABLED. */ 111 112 /** Flag mask & bit position */ 113 114 #define ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS 2 115 /**< @ingroup icp_qat_fw_comp 116 * Starting bit position for the session type */ 117 118 #define ICP_QAT_FW_COMP_SESSION_TYPE_MASK 0x1 119 /**< @ingroup icp_qat_fw_comp 120 * One bit mask used to determine the session type */ 121 122 #define ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS 3 123 /**< @ingroup icp_qat_fw_comp 124 * Starting bit position for auto select best */ 125 126 #define ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK 0x1 127 /**< @ingroup icp_qat_fw_comp 128 * One bit mask for auto select best */ 129 130 #define ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_BITPOS 4 131 /**< @ingroup icp_qat_fw_comp 132 * Starting bit position for enhanced auto select best */ 133 134 #define ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_MASK 0x1 135 /**< @ingroup icp_qat_fw_comp 136 * One bit mask for enhanced auto select best */ 137 138 #define ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_BITPOS 5 139 /**< @ingroup icp_qat_fw_comp 140 * Starting bit position for disabling type zero header write back 141 when Enhanced autoselect best is enabled. If set firmware does 142 not return type0 store block header, only copies src to dest. 143 (if best output is Type0) */ 144 145 #define ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK 0x1 146 /**< @ingroup icp_qat_fw_comp 147 * One bit mask for auto select best */ 148 149 #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS 7 150 /**< @ingroup icp_qat_fw_comp 151 * Starting bit position for flag used to disable secure ram from 152 * being used as an intermediate buffer. */ 153 154 #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK 0x1 155 /**< @ingroup icp_qat_fw_comp 156 * One bit mask for disable secure ram for use as an intermediate 157 buffer. */ 158 159 /** 160 ****************************************************************************** 161 * @ingroup icp_qat_fw_comp 162 * 163 * @description 164 * Macro used for the generation of the command flags for Compression Request. 165 * This should always be used for the generation of the flags. No direct sets or 166 * masks should be performed on the flags data 167 * 168 * @param sesstype Session Type 169 * @param autoselect AutoSelectBest 170 * @enhanced_asb Enhanced AutoSelectBest 171 * @ret_uncomp RetUnCompressed 172 * @secure_ram Secure Ram usage 173 * 174 *********************************************************************************/ 175 #define ICP_QAT_FW_COMP_FLAGS_BUILD( \ 176 sesstype, autoselect, enhanced_asb, ret_uncomp, secure_ram) \ 177 (((sesstype & ICP_QAT_FW_COMP_SESSION_TYPE_MASK) \ 178 << ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS) | \ 179 ((autoselect & ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK) \ 180 << ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS) | \ 181 ((enhanced_asb & ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_MASK) \ 182 << ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_BITPOS) | \ 183 ((ret_uncomp & ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK) \ 184 << ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_BITPOS) | \ 185 ((secure_ram & ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK) \ 186 << ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS)) 187 188 /** 189 ****************************************************************************** 190 * @ingroup icp_qat_fw_comp 191 * 192 * @description 193 * Macro used for the generation of the command flags for Compression Request. 194 * This should always be used for the generation of the flags. No direct sets or 195 * masks should be performed on the flags data 196 * 197 * @param sesstype Session Type 198 * @param autoselect AutoSelectBest 199 * Selects between compressed and uncompressed output. 200 * No distinction made between static and dynamic 201 * compressed data. 202 * 203 *********************************************************************************/ 204 #define ICP_QAT_FW_COMP_20_FLAGS_BUILD(sesstype, autoselect) \ 205 (((sesstype & ICP_QAT_FW_COMP_SESSION_TYPE_MASK) \ 206 << ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS) | \ 207 ((autoselect & ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK) \ 208 << ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS)) 209 210 /** 211 ****************************************************************************** 212 * @ingroup icp_qat_fw_comp 213 * 214 * @description 215 * Macro for extraction of the session type bit 216 * 217 * @param flags Flags to extract the session type bit from 218 * 219 ******************************************************************************/ 220 #define ICP_QAT_FW_COMP_SESSION_TYPE_GET(flags) \ 221 QAT_FIELD_GET(flags, \ 222 ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS, \ 223 ICP_QAT_FW_COMP_SESSION_TYPE_MASK) 224 225 /** 226 ****************************************************************************** 227 * @ingroup icp_qat_fw_comp 228 * 229 * @description 230 * Macro for extraction of the autoSelectBest bit 231 * 232 * @param flags Flags to extract the autoSelectBest bit from 233 * 234 ******************************************************************************/ 235 #define ICP_QAT_FW_COMP_AUTO_SELECT_BEST_GET(flags) \ 236 QAT_FIELD_GET(flags, \ 237 ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS, \ 238 ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK) 239 240 /** 241 ****************************************************************************** 242 * @ingroup icp_qat_fw_comp 243 * 244 * @description 245 * Macro for extraction of the enhanced asb bit 246 * 247 * @param flags Flags to extract the enhanced asb bit from 248 * 249 ******************************************************************************/ 250 #define ICP_QAT_FW_COMP_EN_ASB_GET(flags) \ 251 QAT_FIELD_GET(flags, \ 252 ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_BITPOS, \ 253 ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_MASK) 254 255 /** 256 ****************************************************************************** 257 * @ingroup icp_qat_fw_comp 258 * 259 * @description 260 * Macro for extraction of the RetUncomp bit 261 * 262 * @param flags Flags to extract the Ret Uncomp bit from 263 * 264 ******************************************************************************/ 265 #define ICP_QAT_FW_COMP_RET_UNCOMP_GET(flags) \ 266 QAT_FIELD_GET(flags, \ 267 ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_BITPOS, \ 268 ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK) 269 270 /** 271 ****************************************************************************** 272 * @ingroup icp_qat_fw_comp 273 * 274 * @description 275 * Macro for extraction of the Secure Ram usage bit 276 * 277 * @param flags Flags to extract the Secure Ram usage from 278 * 279 ******************************************************************************/ 280 #define ICP_QAT_FW_COMP_SECURE_RAM_USE_GET(flags) \ 281 QAT_FIELD_GET(flags, \ 282 ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS, \ 283 ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK) 284 285 /** 286 ****************************************************************************** 287 * @ingroup icp_qat_fw_comp 288 * Definition of the compression header cd pars block 289 * @description 290 * Definition of the compression processing cd pars block. 291 * The structure is a service-specific implementation of the common 292 * structure. 293 ******************************************************************************/ 294 typedef union icp_qat_fw_comp_req_hdr_cd_pars_s { 295 /**< LWs 2-5 */ 296 struct { 297 uint64_t content_desc_addr; 298 /**< Address of the content descriptor */ 299 300 uint16_t content_desc_resrvd1; 301 /**< Content descriptor reserved field */ 302 303 uint8_t content_desc_params_sz; 304 /**< Size of the content descriptor parameters in quad words. 305 * These 306 * parameters describe the session setup configuration info for 307 * the 308 * slices that this request relies upon i.e. the configuration 309 * word and 310 * cipher key needed by the cipher slice if there is a request 311 * for 312 * cipher 313 * processing. */ 314 315 uint8_t content_desc_hdr_resrvd2; 316 /**< Content descriptor reserved field */ 317 318 uint32_t content_desc_resrvd3; 319 /**< Content descriptor reserved field */ 320 } s; 321 322 struct { 323 uint32_t comp_slice_cfg_word[ICP_QAT_FW_NUM_LONGWORDS_2]; 324 /* Compression Slice Config Word */ 325 326 uint32_t content_desc_resrvd4; 327 /**< Content descriptor reserved field */ 328 } sl; 329 330 } icp_qat_fw_comp_req_hdr_cd_pars_t; 331 332 /** 333 ****************************************************************************** 334 * @ingroup icp_qat_fw_comp 335 * Definition of the compression request parameters block 336 * @description 337 * Definition of the compression processing request parameters block. 338 * The structure below forms part of the Compression + Translation 339 * Parameters block spanning LWs 14-21, thus differing from the common 340 * base Parameters block structure. Unused fields must be set to 0. 341 * 342 ******************************************************************************/ 343 typedef struct icp_qat_fw_comp_req_params_s { 344 /**< LW 14 */ 345 uint32_t comp_len; 346 /**< Size of input to process in bytes Note: Only EOP requests can be 347 * odd 348 * for decompression. IA must set LSB to zero for odd sized intermediate 349 * inputs */ 350 351 /**< LW 15 */ 352 uint32_t out_buffer_sz; 353 /**< Size of output buffer in bytes */ 354 355 /**< LW 16 */ 356 union { 357 struct { 358 /** LW 16 */ 359 uint32_t initial_crc32; 360 /**< CRC for processed bytes (input byte count) */ 361 362 /** LW 17 */ 363 uint32_t initial_adler; 364 /**< Adler for processed bytes (input byte count) */ 365 } legacy; 366 367 /** LW 16-17 */ 368 uint64_t crc_data_addr; 369 /**< CRC data structure pointer */ 370 } crc; 371 372 /** LW 18 */ 373 uint32_t req_par_flags; 374 375 /** LW 19 */ 376 uint32_t rsrvd; 377 378 } icp_qat_fw_comp_req_params_t; 379 380 /** 381 ****************************************************************************** 382 * @ingroup icp_qat_fw_comp 383 * 384 * @description 385 * Macro used for the generation of the request parameter flags. 386 * This should always be used for the generation of the flags. No direct sets or 387 * masks should be performed on the flags data 388 * 389 * @param sop SOP Flag, 0 restore, 1 don't restore 390 * @param eop EOP Flag, 0 restore, 1 don't restore 391 * @param bfinal Set bfinal in this block or not 392 * @param cnv Whether internal CNV check is to be performed 393 * * ICP_QAT_FW_COMP_NO_CNV 394 * * ICP_QAT_FW_COMP_CNV 395 * @param cnvnr Whether internal CNV recovery is to be performed 396 * * ICP_QAT_FW_COMP_NO_CNV_RECOVERY 397 * * ICP_QAT_FW_COMP_CNV_RECOVERY 398 * @param crc CRC Mode Flag - 0 legacy, 1 crc data struct 399 * 400 *****************************************************************************/ 401 #define ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD( \ 402 sop, eop, bfinal, cnv, cnvnr, cnvdfx, crc) \ 403 (((sop & ICP_QAT_FW_COMP_SOP_MASK) << ICP_QAT_FW_COMP_SOP_BITPOS) | \ 404 ((eop & ICP_QAT_FW_COMP_EOP_MASK) << ICP_QAT_FW_COMP_EOP_BITPOS) | \ 405 ((bfinal & ICP_QAT_FW_COMP_BFINAL_MASK) \ 406 << ICP_QAT_FW_COMP_BFINAL_BITPOS) | \ 407 ((cnv & ICP_QAT_FW_COMP_CNV_MASK) << ICP_QAT_FW_COMP_CNV_BITPOS) | \ 408 ((cnvnr & ICP_QAT_FW_COMP_CNVNR_MASK) \ 409 << ICP_QAT_FW_COMP_CNVNR_BITPOS) | \ 410 ((cnvdfx & ICP_QAT_FW_COMP_CNV_DFX_MASK) \ 411 << ICP_QAT_FW_COMP_CNV_DFX_BITPOS) | \ 412 ((crc & ICP_QAT_FW_COMP_CRC_MODE_MASK) \ 413 << ICP_QAT_FW_COMP_CRC_MODE_BITPOS)) 414 415 /* 416 * REQUEST FLAGS IN REQUEST PARAMETERS COMPRESSION 417 * 418 * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- + ---- + --- + 419 * --- + 420 * | Bit | 31-20 | 19 | 18 | 17 | 16 | 15 - 7 | 6 | 5-2 | 1 | 0 421 * | 422 * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- | ---- + --- + 423 * --- + 424 * | Flags | Resvd | CRC |Resvd| CNVNR | CNV |Resvd Bits|BFin |Resvd | EOP | 425 * SOP | 426 * | | =0 | Mode| =0 | | | =0 | | =0 | | | 427 * | | | | | | | | | | | | 428 * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- | ---- + --- + 429 * --- + 430 */ 431 432 #define ICP_QAT_FW_COMP_NOT_SOP 0 433 /**< @ingroup icp_qat_fw_comp 434 * Flag representing that a request is NOT Start of Packet */ 435 436 #define ICP_QAT_FW_COMP_SOP 1 437 /**< @ingroup icp_qat_fw_comp 438 * Flag representing that a request IS Start of Packet */ 439 440 #define ICP_QAT_FW_COMP_NOT_EOP 0 441 /**< @ingroup icp_qat_fw_comp 442 * Flag representing that a request is NOT Start of Packet */ 443 444 #define ICP_QAT_FW_COMP_EOP 1 445 /**< @ingroup icp_qat_fw_comp 446 * Flag representing that a request IS End of Packet */ 447 448 #define ICP_QAT_FW_COMP_NOT_BFINAL 0 449 /**< @ingroup icp_qat_fw_comp 450 * Flag representing to indicate firmware this is not the last block */ 451 452 #define ICP_QAT_FW_COMP_BFINAL 1 453 /**< @ingroup icp_qat_fw_comp 454 * Flag representing to indicate firmware this is the last block */ 455 456 #define ICP_QAT_FW_COMP_NO_CNV 0 457 /**< @ingroup icp_qat_fw_comp 458 * Flag indicating that NO cnv check is to be performed on the request */ 459 460 #define ICP_QAT_FW_COMP_CNV 1 461 /**< @ingroup icp_qat_fw_comp 462 * Flag indicating that a cnv check IS to be performed on the request */ 463 464 #define ICP_QAT_FW_COMP_NO_CNV_RECOVERY 0 465 /**< @ingroup icp_qat_fw_comp 466 * Flag indicating that NO cnv recovery is to be performed on the request */ 467 468 #define ICP_QAT_FW_COMP_CNV_RECOVERY 1 469 /**< @ingroup icp_qat_fw_comp 470 * Flag indicating that a cnv recovery is to be performed on the request */ 471 472 #define ICP_QAT_FW_COMP_NO_CNV_DFX 0 473 /**< @ingroup icp_qat_fw_comp 474 * Flag indicating that NO CNV inject error is to be performed on the request */ 475 476 #define ICP_QAT_FW_COMP_CNV_DFX 1 477 /**< @ingroup icp_qat_fw_comp 478 * Flag indicating that CNV inject error is to be performed on the request */ 479 480 #define ICP_QAT_FW_COMP_CRC_MODE_LEGACY 0 481 /**< @ingroup icp_qat_fw_comp 482 * Flag representing to use the legacy CRC mode */ 483 484 #define ICP_QAT_FW_COMP_CRC_MODE_E2E 1 485 /**< @ingroup icp_qat_fw_comp 486 * Flag representing to use the external CRC data struct */ 487 488 #define ICP_QAT_FW_COMP_SOP_BITPOS 0 489 /**< @ingroup icp_qat_fw_comp 490 * Starting bit position for SOP */ 491 492 #define ICP_QAT_FW_COMP_SOP_MASK 0x1 493 /**< @ingroup icp_qat_fw_comp 494 * One bit mask used to determine SOP */ 495 496 #define ICP_QAT_FW_COMP_EOP_BITPOS 1 497 /**< @ingroup icp_qat_fw_comp 498 * Starting bit position for EOP */ 499 500 #define ICP_QAT_FW_COMP_EOP_MASK 0x1 501 /**< @ingroup icp_qat_fw_comp 502 * One bit mask used to determine EOP */ 503 504 #define ICP_QAT_FW_COMP_BFINAL_MASK 0x1 505 /**< @ingroup icp_qat_fw_comp 506 * One bit mask for the bfinal bit */ 507 508 #define ICP_QAT_FW_COMP_BFINAL_BITPOS 6 509 /**< @ingroup icp_qat_fw_comp 510 * Starting bit position for the bfinal bit */ 511 512 #define ICP_QAT_FW_COMP_CNV_MASK 0x1 513 /**< @ingroup icp_qat_fw_comp 514 * One bit mask for the CNV bit */ 515 516 #define ICP_QAT_FW_COMP_CNV_BITPOS 16 517 /**< @ingroup icp_qat_fw_comp 518 * Starting bit position for the CNV bit */ 519 520 #define ICP_QAT_FW_COMP_CNV_RECOVERY_MASK 0x1 521 /**< @ingroup icp_qat_fw_comp 522 * One bit mask for the CNV Recovery bit */ 523 524 #define ICP_QAT_FW_COMP_CNV_RECOVERY_BITPOS 17 525 /**< @ingroup icp_qat_fw_comp 526 * Starting bit position for the CNV Recovery bit */ 527 528 #define ICP_QAT_FW_COMP_CNVNR_MASK 0x1 529 /**< @ingroup icp_qat_fw_comp 530 * One bit mask for the CNV Recovery bit */ 531 532 #define ICP_QAT_FW_COMP_CNVNR_BITPOS 17 533 /**< @ingroup icp_qat_fw_comp 534 * Starting bit position for the CNV Recovery bit */ 535 536 #define ICP_QAT_FW_COMP_CNV_DFX_BITPOS 18 537 /**< @ingroup icp_qat_fw_comp 538 * Starting bit position for the CNV DFX bit */ 539 540 #define ICP_QAT_FW_COMP_CNV_DFX_MASK 0x1 541 /**< @ingroup icp_qat_fw_comp 542 * One bit mask for the CNV DFX bit */ 543 544 #define ICP_QAT_FW_COMP_CRC_MODE_BITPOS 19 545 /**< @ingroup icp_qat_fw_comp 546 * Starting bit position for CRC mode */ 547 548 #define ICP_QAT_FW_COMP_CRC_MODE_MASK 0x1 549 /**< @ingroup icp_qat_fw_comp 550 * One bit mask used to determine CRC mode */ 551 552 #define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS 20 553 /**< @ingroup icp_qat_fw_comp 554 * Starting bit position for xxHash accumulate mode */ 555 556 #define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK 0x1 557 /**< @ingroup icp_qat_fw_comp 558 * One bit mask used to determine xxHash accumulate mode */ 559 560 /** 561 ****************************************************************************** 562 * @ingroup icp_qat_fw_comp 563 * 564 * @description 565 * Macro for extraction of the SOP bit 566 * 567 * @param flags Flags to extract the SOP bit from 568 * 569 ******************************************************************************/ 570 #define ICP_QAT_FW_COMP_SOP_GET(flags) \ 571 QAT_FIELD_GET(flags, \ 572 ICP_QAT_FW_COMP_SOP_BITPOS, \ 573 ICP_QAT_FW_COMP_SOP_MASK) 574 575 /** 576 ****************************************************************************** 577 * @ingroup icp_qat_fw_comp 578 * 579 * @description 580 * Macro for extraction of the EOP bit 581 * 582 * @param flags Flags to extract the EOP bit from 583 * 584 *****************************************************************************/ 585 #define ICP_QAT_FW_COMP_EOP_GET(flags) \ 586 QAT_FIELD_GET(flags, \ 587 ICP_QAT_FW_COMP_EOP_BITPOS, \ 588 ICP_QAT_FW_COMP_EOP_MASK) 589 590 /** 591 ****************************************************************************** 592 * @ingroup icp_qat_fw_comp 593 * 594 * @description 595 * Macro for extraction of the bfinal bit 596 * 597 * @param flags Flags to extract the bfinal bit from 598 * 599 ******************************************************************************/ 600 #define ICP_QAT_FW_COMP_BFINAL_GET(flags) \ 601 QAT_FIELD_GET(flags, \ 602 ICP_QAT_FW_COMP_BFINAL_BITPOS, \ 603 ICP_QAT_FW_COMP_BFINAL_MASK) 604 605 /** 606 ****************************************************************************** 607 * @ingroup icp_qat_fw_comp 608 * 609 * @description 610 * Macro for extraction of the CNV bit 611 * 612 * @param flags Flag set containing the CNV flag 613 * 614 *****************************************************************************/ 615 #define ICP_QAT_FW_COMP_CNV_GET(flags) \ 616 QAT_FIELD_GET(flags, \ 617 ICP_QAT_FW_COMP_CNV_BITPOS, \ 618 ICP_QAT_FW_COMP_CNV_MASK) 619 620 /** 621 ****************************************************************************** 622 * @ingroup icp_qat_fw_comp 623 * 624 * @description 625 * Macro for extraction of the crc mode bit 626 * 627 * @param flags Flags to extract the crc mode bit from 628 * 629 ******************************************************************************/ 630 #define ICP_QAT_FW_COMP_CRC_MODE_GET(flags) \ 631 QAT_FIELD_GET(flags, \ 632 ICP_QAT_FW_COMP_CRC_MODE_BITPOS, \ 633 ICP_QAT_FW_COMP_CRC_MODE_MASK) 634 635 /** 636 ****************************************************************************** 637 * @ingroup icp_qat_fw_comp 638 * 639 * @description 640 * Macro for extraction of the xxHash accumulate mode bit 641 * 642 * @param flags Flags to extract the xxHash accumulate mode bit from 643 * 644 *****************************************************************************/ 645 #define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_GET(flags) \ 646 QAT_FIELD_GET(flags, \ 647 ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS, \ 648 ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK) 649 650 /** 651 ****************************************************************************** 652 * @ingroup icp_qat_fw_comp 653 * 654 * @description 655 * Macro for setting of the xxHash accumulate mode bit 656 * 657 * @param flags Flags to set the xxHash accumulate mode bit to 658 * @param val xxHash accumulate mode to set 659 * 660 *****************************************************************************/ 661 #define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_SET(flags, val) \ 662 QAT_FIELD_SET(flags, \ 663 val, \ 664 ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS, \ 665 ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK) 666 667 /** 668 ****************************************************************************** 669 * @ingroup icp_qat_fw_comp 670 * Definition of the translator request parameters block 671 * @description 672 * Definition of the translator processing request parameters block 673 * The structure below forms part of the Compression + Translation 674 * Parameters block spanning LWs 20-21, thus differing from the common 675 * base Parameters block structure. Unused fields must be set to 0. 676 * 677 ******************************************************************************/ 678 typedef struct icp_qat_fw_xlt_req_params_s { 679 /**< LWs 20-21 */ 680 uint64_t inter_buff_ptr; 681 /**< This field specifies the physical address of an intermediate 682 * buffer SGL array. The array contains a pair of 64-bit 683 * intermediate buffer pointers to SGL buffer descriptors, one pair 684 * per CPM. Please refer to the CPM1.6 Firmware Interface HLD 685 * specification for more details. 686 * Placeholder for QAT2.0. */ 687 } icp_qat_fw_xlt_req_params_t; 688 689 /** 690 ****************************************************************************** 691 * @ingroup icp_qat_fw_comp 692 * Compression header of the content descriptor block 693 * @description 694 * Definition of the service-specific compression control block header 695 * structure. The compression parameters are defined per algorithm 696 * and are located in the icp_qat_hw.h file. This compression 697 * cd block spans LWs 24-29, forming part of the compression + translation 698 * cd block, thus differing from the common base content descriptor 699 * structure. 700 * 701 ******************************************************************************/ 702 typedef struct icp_qat_fw_comp_cd_hdr_s { 703 /**< LW 24 */ 704 uint16_t ram_bank_flags; 705 /**< Flags to show which ram banks to access */ 706 707 uint8_t comp_cfg_offset; 708 /**< Quad word offset from the content descriptor parameters address to 709 * the 710 * parameters for the compression processing */ 711 712 uint8_t next_curr_id; 713 /**< This field combines the next and current id (each four bits) - 714 * the next id is the most significant nibble. 715 * Next Id: Set to the next slice to pass the compressed data through. 716 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through 717 * anymore slices after compression 718 * Current Id: Initialised with the compression slice type */ 719 720 /**< LW 25 */ 721 uint32_t resrvd; 722 723 /**< LWs 26-27 */ 724 uint64_t comp_state_addr; 725 /**< Pointer to compression state */ 726 727 /**< LWs 28-29 */ 728 uint64_t ram_banks_addr; 729 /**< Pointer to banks */ 730 731 } icp_qat_fw_comp_cd_hdr_t; 732 733 #define COMP_CPR_INITIAL_CRC 0 734 #define COMP_CPR_INITIAL_ADLER 1 735 736 /** 737 ****************************************************************************** 738 * @ingroup icp_qat_fw_comp 739 * Translator content descriptor header block 740 * @description 741 * Definition of the structure used to describe the translation processing 742 * to perform on data. The translator parameters are defined per algorithm 743 * and are located in the icp_qat_hw.h file. This translation cd block 744 * spans LWs 30-31, forming part of the compression + translation cd block, 745 * thus differing from the common base content descriptor structure. 746 * 747 ******************************************************************************/ 748 typedef struct icp_qat_fw_xlt_cd_hdr_s { 749 /**< LW 30 */ 750 uint16_t resrvd1; 751 /**< Reserved field and assumed set to 0 */ 752 753 uint8_t resrvd2; 754 /**< Reserved field and assumed set to 0 */ 755 756 uint8_t next_curr_id; 757 /**< This field combines the next and current id (each four bits) - 758 * the next id is the most significant nibble. 759 * Next Id: Set to the next slice to pass the translated data through. 760 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through 761 * any more slices after compression 762 * Current Id: Initialised with the translation slice type */ 763 764 /**< LW 31 */ 765 uint32_t resrvd3; 766 /**< Reserved and should be set to zero, needed for quadword alignment 767 */ 768 } icp_qat_fw_xlt_cd_hdr_t; 769 770 /** 771 ****************************************************************************** 772 * @ingroup icp_qat_fw_comp 773 * Definition of the common Compression QAT FW request 774 * @description 775 * This is a definition of the full request structure for 776 * compression and translation. 777 * 778 ******************************************************************************/ 779 typedef struct icp_qat_fw_comp_req_s { 780 /**< LWs 0-1 */ 781 icp_qat_fw_comn_req_hdr_t comn_hdr; 782 /**< Common request header - for Service Command Id, 783 * use service-specific Compression Command Id. 784 * Service Specific Flags - use Compression Command Flags */ 785 786 /**< LWs 2-5 */ 787 icp_qat_fw_comp_req_hdr_cd_pars_t cd_pars; 788 /**< Compression service-specific content descriptor field which points 789 * either to a content descriptor parameter block or contains the 790 * compression slice config word. */ 791 792 /**< LWs 6-13 */ 793 icp_qat_fw_comn_req_mid_t comn_mid; 794 /**< Common request middle section */ 795 796 /**< LWs 14-19 */ 797 icp_qat_fw_comp_req_params_t comp_pars; 798 /**< Compression request Parameters block */ 799 800 /**< LWs 20-21 */ 801 union { 802 icp_qat_fw_xlt_req_params_t xlt_pars; 803 /**< Translation request Parameters block */ 804 805 uint32_t resrvd1[ICP_QAT_FW_NUM_LONGWORDS_2]; 806 /**< Reserved if not used for translation */ 807 } u1; 808 809 /**< LWs 22-23 */ 810 union { 811 uint32_t resrvd2[ICP_QAT_FW_NUM_LONGWORDS_2]; 812 /**< Reserved - not used if Batch and Pack is disabled.*/ 813 814 uint64_t bnp_res_table_addr; 815 /**< A generic pointer to the unbounded list of 816 * icp_qat_fw_resp_comp_pars_t members. This pointer is only 817 * used when the Batch and Pack is enabled. */ 818 } u3; 819 820 /**< LWs 24-29 */ 821 icp_qat_fw_comp_cd_hdr_t comp_cd_ctrl; 822 /**< Compression request content descriptor control 823 * block header */ 824 825 /**< LWs 30-31 */ 826 union { 827 icp_qat_fw_xlt_cd_hdr_t xlt_cd_ctrl; 828 /**< Translation request content descriptor 829 * control block header */ 830 831 uint32_t resrvd3[ICP_QAT_FW_NUM_LONGWORDS_2]; 832 /**< Reserved if not used for translation */ 833 } u2; 834 835 } icp_qat_fw_comp_req_t; 836 837 /** 838 ****************************************************************************** 839 * @ingroup icp_qat_fw_comp 840 * Definition of the compression QAT FW response descriptor 841 * parameters 842 * @description 843 * This part of the response is specific to the compression response. 844 * 845 ******************************************************************************/ 846 typedef struct icp_qat_fw_resp_comp_pars_s { 847 /**< LW 4 */ 848 uint32_t input_byte_counter; 849 /**< Input byte counter */ 850 851 /**< LW 5 */ 852 uint32_t output_byte_counter; 853 /**< Output byte counter */ 854 855 /** LW 6-7 */ 856 union { 857 struct { 858 /** LW 6 */ 859 uint32_t curr_crc32; 860 /**< Current CRC32 */ 861 862 /** LW 7 */ 863 uint32_t curr_adler_32; 864 /**< Current Adler32 */ 865 } legacy; 866 867 uint32_t resrvd[ICP_QAT_FW_NUM_LONGWORDS_2]; 868 /**< Reserved if not in legacy mode */ 869 } crc; 870 871 } icp_qat_fw_resp_comp_pars_t; 872 873 /** 874 ***************************************************************************** 875 * @ingroup icp_qat_fw_comp 876 * Definition of a single result metadata structure inside Batch and Pack 877 * results table array. It describes the output if single job in the 878 * batch and pack jobs. 879 * Total number of entries in BNP Out table shall be equal to total 880 * number of requests in the 'batch'. 881 * @description 882 * This structure is specific to the compression output. 883 * 884 *****************************************************************************/ 885 typedef struct icp_qat_fw_comp_bnp_out_tbl_entry_s { 886 /**< LWs 0-3 */ 887 icp_qat_fw_resp_comp_pars_t comp_out_pars; 888 /**< Common output params (checksums and byte counts) */ 889 890 /**< LW 4 */ 891 icp_qat_fw_comn_error_t comn_error; 892 /**< This field is overloaded to allow for one 8 bit common error field 893 * or two 8 bit error fields from compression and translator */ 894 895 uint8_t comn_status; 896 /**< Status field which specifies which slice(s) report an error */ 897 898 uint8_t reserved0; 899 /**< Reserved, shall be set to zero */ 900 901 uint32_t reserved1; 902 /**< Reserved, shall be set to zero, 903 added for aligning entries to quadword boundary */ 904 } icp_qat_fw_comp_bnp_out_tbl_entry_t; 905 906 /** 907 ***************************************************************************** 908 * @ingroup icp_qat_fw_comp 909 * Supported modes for skipping regions of input or output buffers. 910 * 911 * @description 912 * This enumeration lists the supported modes for skipping regions of 913 * input or output buffers. 914 * 915 *****************************************************************************/ 916 typedef enum icp_qat_fw_comp_bnp_skip_mode_s { 917 ICP_QAT_FW_SKIP_DISABLED = 0, 918 /**< Skip mode is disabled */ 919 ICP_QAT_FW_SKIP_AT_START = 1, 920 /**< Skip region is at the start of the buffer. */ 921 ICP_QAT_FW_SKIP_AT_END = 2, 922 /**< Skip region is at the end of the buffer. */ 923 ICP_QAT_FW_SKIP_STRIDE = 3 924 /**< Skip region occurs at regular intervals within the buffer. 925 specifies the number of bytes between each 926 skip region. */ 927 } icp_qat_fw_comp_bnp_skip_mode_t; 928 929 /** 930 ***************************************************************************** 931 * @ingroup icp_qat_fw_comn 932 * Flags describing the skip and compression job bahaviour. refer to flag 933 * definitions on skip mode and reset/flush types. 934 * Note: compression behaviour flags are ignored for destination skip info. 935 * @description 936 * Definition of the common request flags. 937 * 938 *****************************************************************************/ 939 typedef uint8_t icp_qat_fw_comp_bnp_flags_t; 940 941 /** 942 ***************************************************************************** 943 * @ingroup icp_qat_fw_comn 944 * Skip Region Data. 945 * @description 946 * This structure contains data relating to configuring skip region 947 * behaviour. A skip region is a region of an input buffer that 948 * should be omitted from processing or a region that should be inserted 949 * into the output buffer. 950 * 951 *****************************************************************************/ 952 typedef struct icp_qat_fw_comp_bnp_skip_info_s { 953 /**< LW 0 */ 954 uint16_t skip_length; 955 /**<Number of bytes to skip when skip mode is enabled */ 956 957 /**< LW 1 */ 958 uint16_t stride_length; 959 /**<Size of the stride between skip regions when skip mode is 960 * enabled */ 961 962 /**< LW 2 */ 963 uint16_t firstSkipOffset; 964 /**< Number of bytes to skip in a buffer before reading/writing the 965 * input/output data. */ 966 967 /**< LWs 3 */ 968 icp_qat_fw_comp_bnp_flags_t bnp_flags; 969 /**< Translation request Parameters block */ 970 971 uint8_t resrvd1; 972 /**< Reserved if not used for translation */ 973 974 } icp_qat_fw_comp_bnp_skip_info_t; 975 976 /** 977 ***************************************************************************** 978 * @ingroup icp_qat_fw_comn 979 * Batch and Pack operation header. 980 * @description 981 * This structure contains address of the next bnp op data, and the 982 * length of the compression operation. 983 *****************************************************************************/ 984 typedef struct icp_qat_fw_comp_bnp_op_header_s { 985 /**< LW 0*/ 986 uint64_t next_opdata_addr; 987 /**< Physical pointer to the Address of the next bnp op data structure. 988 */ 989 990 /**< LW 2*/ 991 uint32_t comp_len; 992 /**< Size of input to process in bytes */ 993 994 /**< LW 3*/ 995 uint32_t resrvd1; 996 /**< Reserved - Should be set to zero. */ 997 998 } icp_qat_fw_comp_bnp_op_header_t; 999 1000 /** 1001 ***************************************************************************** 1002 * @ingroup icp_qat_fw_comn 1003 * Batch and Pack operation op data structure. 1004 * @description 1005 * This structure contains data relating to describing the skipping and 1006 * reset behaviour of source and skipping behaviour of destination buffer 1007 * associated with the input job where job has a single sgl vector, and 1008 * batch and pack might contain multiple jobs. 1009 * The structure also contains a pointer to the next 'job' described by 1010 * the next op_data structure. 1011 * Corresponding SGL Buffer shall physically follow this structure. 1012 *****************************************************************************/ 1013 typedef struct icp_qat_fw_comp_bnp_op_data_s { 1014 icp_qat_fw_comp_bnp_op_header_t bnp_op_header; 1015 /**< Pointer to next Op data, and general information on the operation 1016 */ 1017 icp_qat_fw_comp_bnp_skip_info_t src_bnp_skip_info; 1018 /**< Optional skip regions in the input buffers */ 1019 icp_qat_fw_comp_bnp_skip_info_t dst_bnp_skip_info; 1020 /**< Optional skip regions in the output buffers */ 1021 1022 } icp_qat_fw_comp_bnp_op_data_t; 1023 1024 /** 1025 ****************************************************************************** 1026 * @ingroup icp_qat_fw_comp 1027 * Definition of the Compression Eagle Tail Response 1028 * @description 1029 * This is the response delivered to the ET rings by the Compression 1030 * QAT FW service for all commands 1031 * 1032 ******************************************************************************/ 1033 typedef struct icp_qat_fw_comp_resp_s { 1034 /**< LWs 0-1 */ 1035 icp_qat_fw_comn_resp_hdr_t comn_resp; 1036 /**< Common interface response format see icp_qat_fw.h */ 1037 1038 /**< LWs 2-3 */ 1039 uint64_t opaque_data; 1040 /**< Opaque data passed from the request to the response message */ 1041 1042 /**< LWs 4-7 */ 1043 icp_qat_fw_resp_comp_pars_t comp_resp_pars; 1044 /**< Common response params (checksums and byte counts) */ 1045 } icp_qat_fw_comp_resp_t; 1046 1047 /* RAM Bank defines */ 1048 #define QAT_FW_COMP_BANK_FLAG_MASK 0x1 1049 1050 #define QAT_FW_COMP_BANK_I_BITPOS 8 1051 #define QAT_FW_COMP_BANK_H_BITPOS 7 1052 #define QAT_FW_COMP_BANK_G_BITPOS 6 1053 #define QAT_FW_COMP_BANK_F_BITPOS 5 1054 #define QAT_FW_COMP_BANK_E_BITPOS 4 1055 #define QAT_FW_COMP_BANK_D_BITPOS 3 1056 #define QAT_FW_COMP_BANK_C_BITPOS 2 1057 #define QAT_FW_COMP_BANK_B_BITPOS 1 1058 #define QAT_FW_COMP_BANK_A_BITPOS 0 1059 1060 /** 1061 ****************************************************************************** 1062 * @ingroup icp_qat_fw_comp 1063 * Definition of the ram bank enabled values 1064 * @description 1065 * Enumeration used to define whether a ram bank is enabled or not 1066 * 1067 ******************************************************************************/ 1068 typedef enum { 1069 ICP_QAT_FW_COMP_BANK_DISABLED = 0, /*!< BANK DISABLED */ 1070 ICP_QAT_FW_COMP_BANK_ENABLED = 1, /*!< BANK ENABLED */ 1071 ICP_QAT_FW_COMP_BANK_DELIMITER = 2 /**< Delimiter type */ 1072 } icp_qat_fw_comp_bank_enabled_t; 1073 1074 /** 1075 ****************************************************************************** 1076 * @ingroup icp_qat_fw_comp 1077 * 1078 * @description 1079 * Build the ram bank flags in the compression content descriptor 1080 * which specify which banks are used to save history 1081 * 1082 * @param bank_i_enable 1083 * @param bank_h_enable 1084 * @param bank_g_enable 1085 * @param bank_f_enable 1086 * @param bank_e_enable 1087 * @param bank_d_enable 1088 * @param bank_c_enable 1089 * @param bank_b_enable 1090 * @param bank_a_enable 1091 ******************************************************************************/ 1092 #define ICP_QAT_FW_COMP_RAM_FLAGS_BUILD(bank_i_enable, \ 1093 bank_h_enable, \ 1094 bank_g_enable, \ 1095 bank_f_enable, \ 1096 bank_e_enable, \ 1097 bank_d_enable, \ 1098 bank_c_enable, \ 1099 bank_b_enable, \ 1100 bank_a_enable) \ 1101 ((((bank_i_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1102 << QAT_FW_COMP_BANK_I_BITPOS) | \ 1103 (((bank_h_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1104 << QAT_FW_COMP_BANK_H_BITPOS) | \ 1105 (((bank_g_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1106 << QAT_FW_COMP_BANK_G_BITPOS) | \ 1107 (((bank_f_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1108 << QAT_FW_COMP_BANK_F_BITPOS) | \ 1109 (((bank_e_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1110 << QAT_FW_COMP_BANK_E_BITPOS) | \ 1111 (((bank_d_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1112 << QAT_FW_COMP_BANK_D_BITPOS) | \ 1113 (((bank_c_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1114 << QAT_FW_COMP_BANK_C_BITPOS) | \ 1115 (((bank_b_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1116 << QAT_FW_COMP_BANK_B_BITPOS) | \ 1117 (((bank_a_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1118 << QAT_FW_COMP_BANK_A_BITPOS)) 1119 1120 /** 1121 ***************************************************************************** 1122 * @ingroup icp_qat_fw_comp 1123 * Definition of the xxhash32 acc state buffer 1124 * @description 1125 * This is data structure used in stateful lite for xxhash32 1126 * 1127 *****************************************************************************/ 1128 typedef struct xxhash_acc_state_buff_s { 1129 /**< LW 0 */ 1130 uint32_t in_counter; 1131 /**< Accumulated (total) consumed bytes. As oppose to the per request 1132 * IBC in the response.*/ 1133 1134 /**< LW 1 */ 1135 uint32_t out_counter; 1136 /**< OBC as in the response.*/ 1137 1138 /**< LW 2-5 */ 1139 uint32_t xxhash_state[4]; 1140 /**< Initial value is set by IA to the values stated in HAS.*/ 1141 1142 /**< LW 6-9 */ 1143 uint32_t clear_txt[4]; 1144 /**< Set to 0 for the first request.*/ 1145 } xxhash_acc_state_buff_t; 1146 1147 #endif /* _ICP_QAT_FW_COMP_H_ */
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