1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
3 /* $FreeBSD$ */
4 #include "qat_freebsd.h"
5 #include "adf_cfg.h"
6 #include "adf_common_drv.h"
7 #include "adf_accel_devices.h"
8 #include "icp_qat_uclo.h"
9 #include "icp_qat_fw.h"
10 #include "icp_qat_fw_init_admin.h"
11 #include "adf_cfg_strings.h"
12 #include "adf_transport_access_macros.h"
13 #include "adf_transport_internal.h"
14 #include <sys/types.h>
15 #include <sys/limits.h>
16 #include <sys/kernel.h>
17 #include <sys/systm.h>
18 #include <machine/bus_dma.h>
19 #include <dev/pci/pcireg.h>
20
21 MALLOC_DEFINE(M_QAT, "qat", "qat");
22
23 struct bus_dma_mem_cb_data {
24 struct bus_dmamem *mem;
25 int error;
26 };
27
28 static void
29 bus_dma_mem_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
30 {
31 struct bus_dma_mem_cb_data *d;
32
33 d = arg;
34 d->error = error;
35 if (error)
36 return;
37 d->mem->dma_baddr = segs[0].ds_addr;
38 }
39
40 int
41 bus_dma_mem_create(struct bus_dmamem *mem,
42 bus_dma_tag_t parent,
43 bus_size_t alignment,
44 bus_addr_t lowaddr,
45 bus_size_t len,
46 int flags)
47 {
48 struct bus_dma_mem_cb_data d;
49 int error;
50
51 bzero(mem, sizeof(*mem));
52 error = bus_dma_tag_create(parent,
53 alignment,
54 0,
55 lowaddr,
56 BUS_SPACE_MAXADDR,
57 NULL,
58 NULL,
59 len,
60 1,
61 len,
62 0,
63 NULL,
64 NULL,
65 &mem->dma_tag);
66 if (error) {
67 bus_dma_mem_free(mem);
68 return (error);
69 }
70 error = bus_dmamem_alloc(mem->dma_tag,
71 &mem->dma_vaddr,
72 flags,
73 &mem->dma_map);
74 if (error) {
75 bus_dma_mem_free(mem);
76 return (error);
77 }
78 d.mem = mem;
79 error = bus_dmamap_load(mem->dma_tag,
80 mem->dma_map,
81 mem->dma_vaddr,
82 len,
83 bus_dma_mem_cb,
84 &d,
85 BUS_DMA_NOWAIT);
86 if (error == 0)
87 error = d.error;
88 if (error) {
89 bus_dma_mem_free(mem);
90 return (error);
91 }
92 return (0);
93 }
94
95 void
96 bus_dma_mem_free(struct bus_dmamem *mem)
97 {
98
99 if (mem->dma_baddr != 0)
100 bus_dmamap_unload(mem->dma_tag, mem->dma_map);
101 if (mem->dma_vaddr != NULL)
102 bus_dmamem_free(mem->dma_tag, mem->dma_vaddr, mem->dma_map);
103 if (mem->dma_tag != NULL)
104 bus_dma_tag_destroy(mem->dma_tag);
105 bzero(mem, sizeof(*mem));
106 }
107
108 device_t
109 pci_find_pf(device_t vf)
110 {
111 return (NULL);
112 }
113
114 int
115 pci_set_max_payload(device_t dev, int payload_size)
116 {
117 const int packet_sizes[6] = { 128, 256, 512, 1024, 2048, 4096 };
118 int cap_reg = 0, reg_value = 0, mask = 0;
119
120 for (mask = 0; mask < 6; mask++) {
121 if (payload_size == packet_sizes[mask])
122 break;
123 }
124 if (mask == 6)
125 return -1;
126
127 if (pci_find_cap(dev, PCIY_EXPRESS, &cap_reg) != 0)
128 return -1;
129
130 cap_reg += PCIER_DEVICE_CTL; /* Offset for Device Control Register. */
131 reg_value = pci_read_config(dev, cap_reg, 1);
132 reg_value = (reg_value & 0x1f) | (mask << 5);
133 pci_write_config(dev, cap_reg, reg_value, 1);
134 return 0;
135 }
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