1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
3 /* $FreeBSD$ */
4 #include "qat_freebsd.h"
5 #include "adf_cfg.h"
6 #include "adf_common_drv.h"
7 #include "adf_accel_devices.h"
8 #include "adf_200xx_hw_data.h"
9 #include "adf_fw_counters.h"
10 #include "adf_cfg_device.h"
11 #include <sys/types.h>
12 #include <sys/kernel.h>
13 #include <sys/malloc.h>
14 #include <machine/bus_dma.h>
15 #include <dev/pci/pcireg.h>
16 #include "adf_heartbeat_dbg.h"
17 #include "adf_cnvnr_freq_counters.h"
18
19 static MALLOC_DEFINE(M_QAT_200XX, "qat_200xx", "qat_200xx");
20
21 #define ADF_SYSTEM_DEVICE(device_id) \
22 { \
23 PCI_VENDOR_ID_INTEL, device_id \
24 }
25
26 static const struct pci_device_id adf_pci_tbl[] =
27 { ADF_SYSTEM_DEVICE(ADF_200XX_PCI_DEVICE_ID),
28 {
29 0,
30 } };
31
32 static int
33 adf_probe(device_t dev)
34 {
35 const struct pci_device_id *id;
36
37 for (id = adf_pci_tbl; id->vendor != 0; id++) {
38 if (pci_get_vendor(dev) == id->vendor &&
39 pci_get_device(dev) == id->device) {
40 device_set_desc(dev,
41 "Intel " ADF_200XX_DEVICE_NAME
42 " QuickAssist");
43 return BUS_PROBE_GENERIC;
44 }
45 }
46 return ENXIO;
47 }
48
49 static void
50 adf_cleanup_accel(struct adf_accel_dev *accel_dev)
51 {
52 struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev;
53 int i;
54
55 if (accel_dev->dma_tag)
56 bus_dma_tag_destroy(accel_dev->dma_tag);
57 for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
58 struct adf_bar *bar = &accel_pci_dev->pci_bars[i];
59
60 if (bar->virt_addr)
61 bus_free_resource(accel_pci_dev->pci_dev,
62 SYS_RES_MEMORY,
63 bar->virt_addr);
64 }
65
66 if (accel_dev->hw_device) {
67 switch (pci_get_device(accel_pci_dev->pci_dev)) {
68 case ADF_200XX_PCI_DEVICE_ID:
69 adf_clean_hw_data_200xx(accel_dev->hw_device);
70 break;
71 default:
72 break;
73 }
74 free(accel_dev->hw_device, M_QAT_200XX);
75 accel_dev->hw_device = NULL;
76 }
77 adf_cfg_dev_remove(accel_dev);
78 adf_devmgr_rm_dev(accel_dev, NULL);
79 }
80
81 static int
82 adf_attach(device_t dev)
83 {
84 struct adf_accel_dev *accel_dev;
85 struct adf_accel_pci *accel_pci_dev;
86 struct adf_hw_device_data *hw_data;
87 unsigned int i = 0, bar_nr = 0, reg_val = 0;
88 int ret, rid;
89 struct adf_cfg_device *cfg_dev = NULL;
90
91 /* Set pci MaxPayLoad to 256. Implemented to avoid the issue of
92 * Pci-passthrough causing Maxpayload to be reset to 128 bytes
93 * when the device is reset.
94 */
95 if (pci_get_max_payload(dev) != 256)
96 pci_set_max_payload(dev, 256);
97
98 accel_dev = device_get_softc(dev);
99
100 INIT_LIST_HEAD(&accel_dev->crypto_list);
101 accel_pci_dev = &accel_dev->accel_pci_dev;
102 accel_pci_dev->pci_dev = dev;
103
104 if (bus_get_domain(dev, &accel_pci_dev->node) != 0)
105 accel_pci_dev->node = 0;
106
107 /* XXX: Revisit if we actually need a devmgr table at all. */
108
109 /* Add accel device to accel table.
110 * This should be called before adf_cleanup_accel is called
111 */
112 if (adf_devmgr_add_dev(accel_dev, NULL)) {
113 device_printf(dev, "Failed to add new accelerator device.\n");
114 return ENXIO;
115 }
116
117 /* Allocate and configure device configuration structure */
118 hw_data = malloc(sizeof(*hw_data), M_QAT_200XX, M_WAITOK | M_ZERO);
119
120 accel_dev->hw_device = hw_data;
121 adf_init_hw_data_200xx(accel_dev->hw_device);
122 accel_pci_dev->revid = pci_get_revid(dev);
123 hw_data->fuses = pci_read_config(dev, ADF_DEVICE_FUSECTL_OFFSET, 4);
124 if (accel_pci_dev->revid == 0x00) {
125 device_printf(dev, "A0 stepping is not supported.\n");
126 ret = ENODEV;
127 goto out_err;
128 }
129
130 /* Get PPAERUCM values and store */
131 ret = adf_aer_store_ppaerucm_reg(dev, hw_data);
132 if (ret)
133 goto out_err;
134
135 /* Clear PFIEERRUNCSTSR register bits if they are set */
136 reg_val = pci_read_config(dev, ADF_200XX_PFIEERRUNCSTSR, 4);
137 if (reg_val) {
138 device_printf(
139 dev,
140 "Clearing PFIEERRUNCSTSR, previous status : %0x\n",
141 reg_val);
142 pci_write_config(dev, ADF_200XX_PFIEERRUNCSTSR, reg_val, 4);
143 }
144
145 /* Get Accelerators and Accelerators Engines masks */
146 hw_data->accel_mask = hw_data->get_accel_mask(accel_dev);
147 hw_data->ae_mask = hw_data->get_ae_mask(accel_dev);
148 hw_data->admin_ae_mask = hw_data->ae_mask;
149
150 accel_pci_dev->sku = hw_data->get_sku(hw_data);
151 /* If the device has no acceleration engines then ignore it. */
152 if (!hw_data->accel_mask || !hw_data->ae_mask ||
153 (~hw_data->ae_mask & 0x01)) {
154 device_printf(dev, "No acceleration units found\n");
155 ret = ENXIO;
156 goto out_err;
157 }
158
159 /* Create device configuration table */
160 ret = adf_cfg_dev_add(accel_dev);
161 if (ret)
162 goto out_err;
163 ret = adf_clock_debugfs_add(accel_dev);
164 if (ret)
165 goto out_err;
166
167 pci_set_max_read_req(dev, 1024);
168
169 ret = bus_dma_tag_create(bus_get_dma_tag(dev),
170 1,
171 0,
172 BUS_SPACE_MAXADDR,
173 BUS_SPACE_MAXADDR,
174 NULL,
175 NULL,
176 BUS_SPACE_MAXSIZE,
177 /* BUS_SPACE_UNRESTRICTED */ 1,
178 BUS_SPACE_MAXSIZE,
179 0,
180 NULL,
181 NULL,
182 &accel_dev->dma_tag);
183 if (ret)
184 goto out_err;
185
186 if (hw_data->get_accel_cap) {
187 hw_data->accel_capabilities_mask =
188 hw_data->get_accel_cap(accel_dev);
189 }
190
191 /* Find and map all the device's BARS */
192 for (bar_nr = 0; i < ADF_PCI_MAX_BARS && bar_nr < PCIR_MAX_BAR_0;
193 bar_nr++) {
194 struct adf_bar *bar;
195
196 /*
197 * XXX: This isn't quite right as it will ignore a BAR
198 * that wasn't assigned a valid resource range by the
199 * firmware.
200 */
201 rid = PCIR_BAR(bar_nr);
202 if (bus_get_resource(dev, SYS_RES_MEMORY, rid, NULL, NULL) != 0)
203 continue;
204 bar = &accel_pci_dev->pci_bars[i++];
205 bar->virt_addr = bus_alloc_resource_any(dev,
206 SYS_RES_MEMORY,
207 &rid,
208 RF_ACTIVE);
209 if (!bar->virt_addr) {
210 device_printf(dev, "Failed to map BAR %d\n", bar_nr);
211 ret = ENXIO;
212 goto out_err;
213 }
214 bar->base_addr = rman_get_start(bar->virt_addr);
215 bar->size = rman_get_size(bar->virt_addr);
216 }
217 pci_enable_busmaster(dev);
218
219 if (!accel_dev->hw_device->config_device) {
220 ret = EFAULT;
221 goto out_err;
222 }
223
224 ret = accel_dev->hw_device->config_device(accel_dev);
225 if (ret)
226 goto out_err;
227
228 ret = adf_dev_init(accel_dev);
229 if (ret)
230 goto out_dev_shutdown;
231
232 ret = adf_dev_start(accel_dev);
233 if (ret)
234 goto out_dev_stop;
235
236 cfg_dev = accel_dev->cfg->dev;
237 adf_cfg_device_clear(cfg_dev, accel_dev);
238 free(cfg_dev, M_QAT);
239 accel_dev->cfg->dev = NULL;
240 return ret;
241 out_dev_stop:
242 adf_dev_stop(accel_dev);
243 out_dev_shutdown:
244 adf_dev_shutdown(accel_dev);
245 out_err:
246 adf_cleanup_accel(accel_dev);
247 return ret;
248 }
249
250 static int
251 adf_detach(device_t dev)
252 {
253 struct adf_accel_dev *accel_dev = device_get_softc(dev);
254
255 if (adf_dev_stop(accel_dev)) {
256 device_printf(dev, "Failed to stop QAT accel dev\n");
257 return EBUSY;
258 }
259
260 adf_dev_shutdown(accel_dev);
261
262 adf_cleanup_accel(accel_dev);
263
264 return 0;
265 }
266
267 static device_method_t adf_methods[] = { DEVMETHOD(device_probe, adf_probe),
268 DEVMETHOD(device_attach, adf_attach),
269 DEVMETHOD(device_detach, adf_detach),
270
271 DEVMETHOD_END };
272
273 static driver_t adf_driver = { "qat",
274 adf_methods,
275 sizeof(struct adf_accel_dev) };
276
277 DRIVER_MODULE_ORDERED(qat_200xx, pci, adf_driver, NULL, NULL, SI_ORDER_THIRD);
278 MODULE_VERSION(qat_200xx, 1);
279 MODULE_DEPEND(qat_200xx, qat_common, 1, 1, 1);
280 MODULE_DEPEND(qat_200xx, qat_api, 1, 1, 1);
281 MODULE_DEPEND(qat_200xx, linuxkpi, 1, 1, 1);
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