Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/qbus/if_qt.c
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1 /* $NetBSD: if_qt.c,v 1.6 2005/02/26 12:45:06 simonb Exp $ */ 2 /* 3 * Copyright (c) 1992 Steven M. Schultz 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * @(#)if_qt.c 1.2 (2.11BSD) 2/20/93 29 */ 30 /* 31 * 32 * Modification History 33 * 23-Feb-92 -- sms 34 * Rewrite the buffer handling so that fewer than the maximum number of 35 * buffers may be used (32 receive and 12 transmit buffers consume 66+kb 36 * of main system memory in addition to the internal structures in the 37 * networking code). A freelist of available buffers is maintained now. 38 * When I/O operations complete the associated buffer is placed on the 39 * freelist (a single linked list for simplicity) and when an I/O is 40 * started a buffer is pulled off the list. 41 * 42 * 20-Feb-92 -- sms 43 * It works! Darned board couldn't handle "short" rings - those rings 44 * where only half the entries were made available to the board (the 45 * ring descriptors were the full size, merely half the entries were 46 * flagged as belonging always to the driver). Grrrr. Would have thought 47 * the board could skip over those entries reserved by the driver. 48 * Now to find a way not to have to allocated 32+12 times 1.5kb worth of 49 * buffers... 50 * 51 * 03-Feb-92 -- sms 52 * Released but still not working. The driver now responds to arp and 53 * ping requests. The board is apparently not returning ring descriptors 54 * to the driver so eventually we run out of buffers. Back to the 55 * drawing board. 56 * 57 * 28-Dec-92 -- sms 58 * Still not released. Hiatus in finding free time and thin-netting 59 * the systems (many thanks Terry!). 60 * Added logic to dynamically allocate a vector and initialize it. 61 * 62 * 23-Oct-92 -- sms 63 * The INIT block must (apparently) be quadword aligned [no thanks to 64 * the manual for not mentioning that fact]. The necessary alignment 65 * is achieved by allocating the INIT block from main memory ('malloc' 66 * guarantees click alignment) and mapping it as needed (which is _very_ 67 * infrequently). A check for quadword alignment of the ring descriptors 68 * was added - at present the descriptors are properly aligned, if this 69 * should change then something will have to be done (like do it "right"). 70 * Darned alignment restrictions! 71 * 72 * A couple of typos were corrected (missing parentheses, reversed 73 * arguments to printf calls, etc). 74 * 75 * 13-Oct-92 -- sms@wlv.iipo.gtegsc.com 76 * Created based on the DELQA-PLUS addendum to DELQA User's Guide. 77 * This driver ('qt') is selected at system configuration time. If the 78 * board * is not a DELQA-YM an error message will be printed and the 79 * interface will not be attached. 80 */ 81 82 #include <sys/cdefs.h> 83 __KERNEL_RCSID(0, "$NetBSD: if_qt.c,v 1.6 2005/02/26 12:45:06 simonb Exp $"); 84 85 #include "opt_inet.h" 86 #include "bpfilter.h" 87 88 #include <sys/param.h> 89 #include <sys/systm.h> 90 #include <sys/mbuf.h> 91 #include <sys/protosw.h> 92 #include <sys/socket.h> 93 #include <sys/ioctl.h> 94 #include <sys/errno.h> 95 #include <sys/syslog.h> 96 #include <sys/time.h> 97 #include <sys/kernel.h> 98 99 #include <net/if.h> 100 #include <net/if_ether.h> 101 #include <net/netisr.h> 102 #include <net/route.h> 103 104 #ifdef INET 105 #include <sys/domain.h> 106 #include <netinet/in.h> 107 #include <netinet/in_systm.h> 108 #include <netinet/in_var.h> 109 #include <netinet/ip.h> 110 #endif 111 112 #if NBPFILTER > 0 113 #include <net/bpf.h> 114 #include <net/bpfdesc.h> 115 #endif 116 117 #ifdef NS 118 #include <netns/ns.h> 119 #include <netns/ns_if.h> 120 #endif 121 122 #include <machine/bus.h> 123 124 #include <dev/qbus/ubavar.h> 125 #include <dev/qbus/if_uba.h> 126 #include <dev/qbus/if_qtreg.h> 127 128 #define NRCV QT_MAX_RCV /* Receive descriptors (must be == 32) */ 129 #define NXMT QT_MAX_XMT /* Transmit descriptors (must be == 12) */ 130 #if NRCV != 32 || NXMT != 12 131 hardware requires these sizes. 132 #endif 133 134 /* 135 * Control data structures, must be in DMA-friendly memory. 136 */ 137 struct qt_cdata { 138 struct qt_init qc_init; /* Init block */ 139 struct qt_rring qc_r[NRCV]; /* Receive descriptor ring */ 140 struct qt_tring qc_t[NXMT]; /* Transmit descriptor ring */ 141 }; 142 143 struct qt_softc { 144 struct device sc_dev; /* Configuration common part */ 145 struct ethercom is_ec; /* common part - must be first */ 146 struct evcnt sc_intrcnt; /* Interrupt counting */ 147 #define is_if is_ec.ec_if /* network-visible interface */ 148 u_int8_t is_addr[ETHER_ADDR_LEN]; /* hardware Ethernet address */ 149 bus_space_tag_t sc_iot; 150 bus_addr_t sc_ioh; 151 152 struct ubinfo sc_ui; /* control block address desc */ 153 struct qt_cdata *sc_ib; /* virt address of ctrl block */ 154 struct qt_cdata *sc_pib; /* phys address of ctrl block */ 155 156 struct ifubinfo sc_ifuba; /* UNIBUS resources */ 157 struct ifrw sc_ifr[NRCV]; /* UNIBUS receive buffer maps */ 158 struct ifxmt sc_ifw[NXMT]; /* UNIBUS receive buffer maps */ 159 160 int rindex; /* Receive Completed Index */ 161 int nxtrcv; /* Next Receive Index */ 162 int nrcv; /* Number of Receives active */ 163 164 int xnext; /* Next descriptor to transmit */ 165 int xlast; /* Last descriptor transmitted */ 166 int nxmit; /* # packets in send queue */ 167 168 short vector; /* Interrupt vector assigned */ 169 }; 170 171 static int qtmatch(struct device *, struct cfdata *, void *); 172 static void qtattach(struct device *, struct device *, void *); 173 static void qtintr(void *); 174 static int qtinit(struct ifnet *); 175 static int qtioctl(struct ifnet *, u_long, caddr_t); 176 static int qtturbo(struct qt_softc *); 177 static void qtstart(struct ifnet *ifp); 178 static void qtstop(struct ifnet *ifp, int disable); 179 static void qtsrr(struct qt_softc *, int); 180 static void qtrint(struct qt_softc *sc); 181 static void qttint(struct qt_softc *sc); 182 183 /* static void qtrestart(struct qt_softc *sc); */ 184 185 CFATTACH_DECL(qt, sizeof(struct qt_softc), 186 qtmatch, qtattach, NULL, NULL); 187 188 /* 189 * Maximum packet size needs to include 4 bytes for the CRC 190 * on received packets. 191 */ 192 #define MAXPACKETSIZE (ETHERMTU + sizeof (struct ether_header) + 4) 193 #define MINPACKETSIZE 64 194 195 #define QT_WCSR(csr, val) \ 196 bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val) 197 #define QT_RCSR(csr) \ 198 bus_space_read_2(sc->sc_iot, sc->sc_ioh, csr) 199 200 201 #define loint(x) ((int)(x) & 0xffff) 202 #define hiint(x) (((int)(x) >> 16) & 0x3f) 203 #define XNAME sc->sc_dev.dv_xname 204 205 /* 206 * Check if this card is a turbo delqa. 207 */ 208 int 209 qtmatch(struct device *parent, struct cfdata *cf, void *aux) 210 { 211 struct qt_softc ssc; 212 struct qt_softc *sc = &ssc; 213 struct uba_attach_args *ua = aux; 214 struct uba_softc *ubasc = (struct uba_softc *)parent; 215 struct qt_init *qi; 216 struct ubinfo ui; 217 218 sc->sc_iot = ua->ua_iot; 219 sc->sc_ioh = ua->ua_ioh; 220 if (qtturbo(sc) == 0) 221 return 0; /* Not a turbo card */ 222 223 /* Force the card to interrupt */ 224 ui.ui_size = sizeof(struct qt_init); 225 if (ubmemalloc((void *)parent, &ui, 0)) 226 return 0; /* Failed */ 227 qi = (struct qt_init *)ui.ui_vaddr; 228 memset(qi, 0, sizeof(struct qt_init)); 229 qi->vector = ubasc->uh_lastiv - 4; 230 qi->options = INIT_OPTIONS_INT; 231 232 QT_WCSR(CSR_IBAL, loint(ui.ui_baddr)); 233 QT_WCSR(CSR_IBAH, hiint(ui.ui_baddr)); 234 QT_WCSR(CSR_SRQR, 2); 235 delay(100000); /* Wait some time for interrupt */ 236 QT_WCSR(CSR_SRQR, 3); /* Stop card */ 237 238 ubmemfree((void *)parent, &ui); 239 240 return 10; 241 } 242 243 244 /* 245 * Interface exists. More accurately, something exists at the CSR (see 246 * sys/sys_net.c) -- there's no guarantee it's a DELQA-YM. 247 * 248 * The ring descriptors are initialized, the buffers allocated using first the 249 * DMA region allocated at network load time and then later main memory. The 250 * INIT block is filled in and the device is poked/probed to see if it really 251 * is a DELQA-YM. If the device is not a -YM then a message is printed and 252 * the 'if_attach' call is skipped. For a -YM the START command is issued, 253 * but the device is not marked as running|up - that happens at interrupt level 254 * when the device interrupts to say it has started. 255 */ 256 257 void 258 qtattach(struct device *parent, struct device *self, void *aux) 259 { 260 struct uba_softc *ubasc = (struct uba_softc *)parent; 261 register struct qt_softc *sc = (struct qt_softc *)self; 262 register struct ifnet *ifp = &sc->is_if; 263 struct uba_attach_args *ua = aux; 264 265 uba_intr_establish(ua->ua_icookie, ua->ua_cvec, qtintr, sc, 266 &sc->sc_intrcnt); 267 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt, 268 sc->sc_dev.dv_xname, "intr"); 269 270 sc->sc_iot = ua->ua_iot; 271 sc->sc_ioh = ua->ua_ioh; 272 ubasc->uh_lastiv -= 4; 273 sc->vector = ubasc->uh_lastiv; 274 275 /* 276 * Now allocate the buffers and initialize the buffers. This should _never_ 277 * fail because main memory is allocated after the DMA pool is used up. 278 */ 279 280 sc->is_addr[0] = QT_RCSR(0); 281 sc->is_addr[1] = QT_RCSR(2); 282 sc->is_addr[2] = QT_RCSR(4); 283 sc->is_addr[3] = QT_RCSR(6); 284 sc->is_addr[4] = QT_RCSR(8); 285 sc->is_addr[5] = QT_RCSR(10); 286 287 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 288 ifp->if_softc = sc; 289 ifp->if_flags = IFF_BROADCAST|IFF_MULTICAST; 290 ifp->if_ioctl = qtioctl; 291 ifp->if_start = qtstart; 292 ifp->if_init = qtinit; 293 ifp->if_stop = qtstop; 294 IFQ_SET_READY(&ifp->if_snd); 295 296 printf("\n%s: delqa-plus in Turbo mode, hardware address %s\n", 297 XNAME, ether_sprintf(sc->is_addr)); 298 if_attach(ifp); 299 ether_ifattach(ifp, sc->is_addr); 300 } 301 302 int 303 qtturbo(sc) 304 register struct qt_softc *sc; 305 { 306 register int i; 307 308 /* 309 * Issue the software reset. Delay 150us. The board should now be in 310 * DELQA-Normal mode. Set ITB and DEQTA select. If both bits do not 311 * stay turned on then the board is not a DELQA-YM. 312 */ 313 QT_WCSR(CSR_ARQR, ARQR_SR); 314 QT_WCSR(CSR_ARQR, 0); 315 delay(150L); 316 317 QT_WCSR(CSR_SRR, 0x8001); /* MS | ITB */ 318 i = QT_RCSR(CSR_SRR); 319 QT_WCSR(CSR_SRR, 0x8000); /* Turn off ITB, set DELQA select */ 320 if (i != 0x8001) 321 { 322 printf("qt !-YM\n"); 323 return(0); 324 } 325 /* 326 * Board is a DELQA-YM. Send the commands to enable Turbo mode. Delay 327 * 1 second, testing the SRR register every millisecond to see if the 328 * board has shifted to Turbo mode. 329 */ 330 QT_WCSR(CSR_XCR0, 0x0baf); 331 QT_WCSR(CSR_XCR1, 0xff00); 332 for (i = 0; i < 1000; i++) 333 { 334 if ((QT_RCSR(CSR_SRR) & SRR_RESP) == 1) 335 break; 336 delay(1000L); 337 } 338 if (i >= 1000) 339 { 340 printf("qt !Turbo\n"); 341 return(0); 342 } 343 return(1); 344 } 345 346 int 347 qtinit(struct ifnet *ifp) 348 { 349 register struct qt_softc *sc = ifp->if_softc; 350 register struct qt_init *iniblk; 351 struct ifrw *ifrw; 352 struct ifxmt *ifxp; 353 struct qt_rring *rp; 354 struct qt_tring *tp; 355 register int i, error; 356 357 if (ifp->if_flags & IFF_RUNNING) { 358 /* Cancel any pending I/O. */ 359 qtstop(ifp, 0); 360 } 361 362 if (sc->sc_ib == NULL) { 363 if (if_ubaminit(&sc->sc_ifuba, (void *)sc->sc_dev.dv_parent, 364 MCLBYTES, sc->sc_ifr, NRCV, sc->sc_ifw, NXMT)) { 365 printf("%s: can't initialize\n", XNAME); 366 ifp->if_flags &= ~IFF_UP; 367 return 0; 368 } 369 sc->sc_ui.ui_size = sizeof(struct qt_cdata); 370 if ((error = ubmemalloc((void *)sc->sc_dev.dv_parent, 371 &sc->sc_ui, 0))) { 372 printf(": failed ubmemalloc(), error = %d\n", error); 373 return error; 374 } 375 sc->sc_ib = (struct qt_cdata *)sc->sc_ui.ui_vaddr; 376 sc->sc_pib = (struct qt_cdata *)sc->sc_ui.ui_baddr; 377 378 /* 379 * Fill in most of the INIT block: vector, options (interrupt enable), ring 380 * locations. The physical address is copied from the ROMs as part of the 381 * -YM testing proceedure. The CSR is saved here rather than in qtinit() 382 * because the qtturbo() routine needs it. 383 * 384 * The INIT block must be quadword aligned. Using malloc() guarantees click 385 * (64 byte) alignment. Since the only time the INIT block is referenced is 386 * at 'startup' or 'reset' time there is really no time penalty (and a modest 387 * D space savings) involved. 388 */ 389 memset(sc->sc_ib, 0, sizeof(struct qt_cdata)); 390 iniblk = &sc->sc_ib->qc_init; 391 392 iniblk->vector = sc->vector; 393 memcpy(iniblk->paddr, sc->is_addr, 6); 394 395 iniblk->options = INIT_OPTIONS_INT; 396 iniblk->rx_lo = loint(&sc->sc_pib->qc_r); 397 iniblk->rx_hi = hiint(&sc->sc_pib->qc_r); 398 iniblk->tx_lo = loint(&sc->sc_pib->qc_t); 399 iniblk->tx_hi = hiint(&sc->sc_pib->qc_t); 400 } 401 iniblk = &sc->sc_ib->qc_init; 402 iniblk->mode = ifp->if_flags & IFF_PROMISC ? INIT_MODE_PRO : 0; 403 404 405 /* 406 * Now initialize the receive ring descriptors. Because this routine can be 407 * called with outstanding I/O operations we check the ring descriptors for 408 * a non-zero 'rhost0' (or 'thost0') word and place those buffers back on 409 * the free list. 410 */ 411 for (i = 0; i < NRCV; i++) { 412 rp = &sc->sc_ib->qc_r[i]; 413 ifrw = &sc->sc_ifr[i]; 414 rp->rmd1 = MCLBYTES; 415 rp->rmd4 = loint(ifrw->ifrw_info); 416 rp->rmd5 = hiint(ifrw->ifrw_info); 417 rp->rmd3 = 0; /* clear RMD3_OWN */ 418 } 419 for (i = 0; i < NXMT; i++) { 420 tp = &sc->sc_ib->qc_t[i]; 421 ifxp = &sc->sc_ifw[i]; 422 tp->tmd4 = loint(ifxp->ifw_info); 423 tp->tmd5 = hiint(ifxp->ifw_info); 424 tp->tmd3 = TMD3_OWN; 425 } 426 427 sc->xnext = sc->xlast = sc->nxmit = 0; 428 sc->rindex = 0; 429 sc->nxtrcv = 0; 430 sc->nrcv = 0; 431 432 /* 433 * Now we tell the device the address of the INIT block. The device 434 * _must_ be in the Turbo mode at this time. The "START" command is 435 * then issued to the device. A 1 second timeout is then started. 436 * When the interrupt occurs the IFF_UP|IFF_RUNNING state is entered and 437 * full operations will proceed. If the timeout expires without an interrupt 438 * being received an error is printed, the flags cleared and the device left 439 * marked down. 440 */ 441 QT_WCSR(CSR_IBAL, loint(&sc->sc_pib->qc_init)); 442 QT_WCSR(CSR_IBAH, hiint(&sc->sc_pib->qc_init)); 443 QT_WCSR(CSR_SRQR, 2); 444 445 sc->is_if.if_flags |= IFF_RUNNING; 446 return 0; 447 } 448 449 /* 450 * Start output on interface. 451 */ 452 453 void 454 qtstart(struct ifnet *ifp) 455 { 456 int len, nxmit; 457 register struct qt_softc *sc = ifp->if_softc; 458 register struct qt_tring *rp; 459 struct mbuf *m = NULL; 460 461 for (nxmit = sc->nxmit; nxmit < NXMT; nxmit++) { 462 IF_DEQUEUE(&sc->is_if.if_snd, m); 463 if (m == 0) 464 break; 465 466 rp = &sc->sc_ib->qc_t[sc->xnext]; 467 if ((rp->tmd3 & TMD3_OWN) == 0) 468 panic("qtstart"); 469 470 #if NBPFILTER > 0 471 if (ifp->if_bpf) 472 bpf_mtap(ifp->if_bpf, m); 473 #endif 474 475 len = if_ubaput(&sc->sc_ifuba, &sc->sc_ifw[sc->xnext], m); 476 if (len < MINPACKETSIZE) 477 len = MINPACKETSIZE; 478 rp->tmd3 = len & TMD3_BCT; /* set length,clear ownership */ 479 QT_WCSR(CSR_ARQR, ARQR_TRQ); /* tell device it has buffer */ 480 481 if (++sc->xnext >= NXMT) 482 sc->xnext = 0; 483 } 484 if (sc->nxmit != nxmit) 485 sc->nxmit = nxmit; 486 /* XXX - set OACTIVE */ 487 } 488 489 /* 490 * General interrupt service routine. Receive, transmit, device start 491 * interrupts and timeouts come here. Check for hard device errors and print a 492 * message if any errors are found. If we are waiting for the device to 493 * START then check if the device is now running. 494 */ 495 496 void 497 qtintr(void *arg) 498 { 499 struct qt_softc *sc = arg; 500 struct ifnet *ifp = &sc->is_if; 501 short status; 502 503 504 status = QT_RCSR(CSR_SRR); 505 if (status < 0) 506 /* should we reset the device after a bunch of these errs? */ 507 qtsrr(sc, status); 508 if ((ifp->if_flags & IFF_UP) == 0) 509 return; /* Unwanted interrupt */ 510 qtrint(sc); 511 qttint(sc); 512 qtstart(&sc->is_ec.ec_if); 513 } 514 515 /* 516 * Transmit interrupt service. Only called if there are outstanding transmit 517 * requests which could have completed. The DELQA-YM doesn't provide the 518 * status bits telling the kind (receive, transmit) of interrupt. 519 */ 520 521 #define BBLMIS (TMD2_BBL|TMD2_MIS) 522 523 void 524 qttint(struct qt_softc *sc) 525 { 526 register struct qt_tring *rp; 527 528 while (sc->nxmit > 0) 529 { 530 rp = &sc->sc_ib->qc_t[sc->xlast]; 531 if ((rp->tmd3 & TMD3_OWN) == 0) 532 break; 533 sc->is_if.if_opackets++; 534 /* 535 * Collisions don't count as output errors, but babbling and missing packets 536 * do count as output errors. 537 */ 538 if (rp->tmd2 & TMD2_CER) 539 sc->is_if.if_collisions++; 540 if ((rp->tmd0 & TMD0_ERR1) || 541 ((rp->tmd2 & TMD2_ERR2) && (rp->tmd2 & BBLMIS))) 542 { 543 #ifdef QTDEBUG 544 char buf[100]; 545 bitmask_snprintf(rp->tmd2, TMD2_BITS, buf, 100); 546 printf("%s: tmd2 %s\n", XNAME, buf); 547 #endif 548 sc->is_if.if_oerrors++; 549 } 550 if_ubaend(&sc->sc_ifuba, &sc->sc_ifw[sc->xlast]); 551 if (++sc->xlast >= NXMT) 552 sc->xlast = 0; 553 sc->nxmit--; 554 } 555 } 556 557 /* 558 * Receive interrupt service. Pull packet off the interface and put into 559 * a mbuf chain for processing later. 560 */ 561 562 void 563 qtrint(struct qt_softc *sc) 564 { 565 register struct qt_rring *rp; 566 struct ifnet *ifp = &sc->is_ec.ec_if; 567 struct mbuf *m; 568 int len; 569 570 while (sc->sc_ib->qc_r[(int)sc->rindex].rmd3 & RMD3_OWN) 571 { 572 rp = &sc->sc_ib->qc_r[(int)sc->rindex]; 573 if ((rp->rmd0 & (RMD0_STP|RMD0_ENP)) != (RMD0_STP|RMD0_ENP)) 574 { 575 printf("%s: chained packet\n", XNAME); 576 sc->is_if.if_ierrors++; 577 goto rnext; 578 } 579 len = (rp->rmd1 & RMD1_MCNT) - 4; /* -4 for CRC */ 580 sc->is_if.if_ipackets++; 581 582 if ((rp->rmd0 & RMD0_ERR3) || (rp->rmd2 & RMD2_ERR4)) 583 { 584 #ifdef QTDEBUG 585 char buf[100]; 586 bitmask_snprintf(rp->rmd0, RMD0_BITS, buf, 100); 587 printf("%s: rmd0 %s\n", XNAME, buf); 588 bitmask_snprintf(rp->rmd2, RMD2_BITS, buf, 100); 589 printf("%s: rmd2 %s\n", XNAME, buf); 590 #endif 591 sc->is_if.if_ierrors++; 592 goto rnext; 593 } 594 m = if_ubaget(&sc->sc_ifuba, &sc->sc_ifr[(int)sc->rindex], 595 ifp, len); 596 if (m == 0) { 597 sc->is_if.if_ierrors++; 598 goto rnext; 599 } 600 #if NBPFILTER > 0 601 if (ifp->if_bpf) 602 bpf_mtap(ifp->if_bpf, m); 603 #endif 604 (*ifp->if_input)(ifp, m); 605 rnext: 606 --sc->nrcv; 607 rp->rmd3 = 0; 608 rp->rmd1 = MCLBYTES; 609 if (++sc->rindex >= NRCV) 610 sc->rindex = 0; 611 } 612 QT_WCSR(CSR_ARQR, ARQR_RRQ); /* tell device it has buffer */ 613 } 614 615 int 616 qtioctl(ifp, cmd, data) 617 register struct ifnet *ifp; 618 u_long cmd; 619 caddr_t data; 620 { 621 int s, error; 622 623 s = splnet(); 624 625 error = ether_ioctl(ifp, cmd, data); 626 if (error == ENETRESET) { 627 if (ifp->if_flags & IFF_RUNNING) 628 error = qtinit(ifp); 629 else 630 error = 0; 631 } 632 splx(s); 633 return (error); 634 } 635 636 void 637 qtsrr(sc, srrbits) 638 struct qt_softc *sc; 639 int srrbits; 640 { 641 char buf[100]; 642 bitmask_snprintf(srrbits, SRR_BITS, buf, sizeof buf); 643 printf("%s: srr=%s\n", sc->sc_dev.dv_xname, buf); 644 } 645 646 /* 647 * Stop activity on the interface. 648 * Lose outstanding transmit requests. XXX - not good for multicast. 649 */ 650 void 651 qtstop(struct ifnet *ifp, int disable) 652 { 653 struct qt_softc *sc = ifp->if_softc; 654 int i; 655 656 QT_WCSR(CSR_SRQR, 3); 657 for (i = 0; i < 100; i++) 658 if ((QT_RCSR(CSR_SRR) & SRR_RESP) == 3) 659 break; 660 if (QT_RCSR(CSR_SRR) & SRR_FES) 661 qtsrr(sc, QT_RCSR(CSR_SRR)); 662 /* Forget already queued transmit requests */ 663 while (sc->nxmit > 0) { 664 if_ubaend(&sc->sc_ifuba, &sc->sc_ifw[sc->xlast]); 665 if (++sc->xlast >= NXMT) 666 sc->xlast = 0; 667 sc->nxmit--; 668 } 669 /* Handle late received packets */ 670 qtrint(sc); 671 ifp->if_flags &= ~IFF_RUNNING; 672 } 673 674 #ifdef notyet 675 /* 676 * Reset the device. This moves it from DELQA-T mode to DELQA-Normal mode. 677 * After the reset put the device back in -T mode. Then call qtinit() to 678 * reinitialize the ring structures and issue the 'timeout' for the "device 679 * started interrupt". 680 */ 681 682 void 683 qtreset(sc) 684 register struct qt_softc *sc; 685 { 686 687 qtturbo(sc); 688 qtinit(&sc->is_ec.ec_if); 689 } 690 #endif
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