FreeBSD/Linux Kernel Cross Reference
sys/dev/qbus/uda.c
1 /* $NetBSD: uda.c,v 1.56 2006/03/29 18:17:36 thorpej Exp $ */
2 /*
3 * Copyright (c) 1988 Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * Chris Torek.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * @(#)uda.c 7.32 (Berkeley) 2/13/91
34 */
35
36 /*
37 * Copyright (c) 1996 Ludd, University of Lule}, Sweden.
38 * All rights reserved.
39 *
40 * This code is derived from software contributed to Berkeley by
41 * Chris Torek.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by the University of
54 * California, Berkeley and its contributors.
55 * 4. Neither the name of the University nor the names of its contributors
56 * may be used to endorse or promote products derived from this software
57 * without specific prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * @(#)uda.c 7.32 (Berkeley) 2/13/91
72 */
73
74 /*
75 * UDA50 disk device driver
76 */
77
78 #include <sys/cdefs.h>
79 __KERNEL_RCSID(0, "$NetBSD: uda.c,v 1.56 2006/03/29 18:17:36 thorpej Exp $");
80
81 #include <sys/param.h>
82 #include <sys/kernel.h>
83 #include <sys/systm.h>
84 #include <sys/device.h>
85 #include <sys/buf.h>
86 #include <sys/bufq.h>
87 #include <sys/malloc.h>
88
89 #include <machine/bus.h>
90 #include <machine/sid.h>
91
92 #include <dev/qbus/ubavar.h>
93
94 #include <dev/mscp/mscp.h>
95 #include <dev/mscp/mscpreg.h>
96 #include <dev/mscp/mscpvar.h>
97
98 #include "ioconf.h"
99
100 /*
101 * Software status, per controller.
102 */
103 struct uda_softc {
104 struct device sc_dev; /* Autoconfig info */
105 struct evcnt sc_intrcnt; /* Interrupt counting */
106 struct uba_unit sc_unit; /* Struct common for UBA to communicate */
107 struct ubinfo sc_ui;
108 bus_dma_tag_t sc_dmat;
109 bus_space_tag_t sc_iot;
110 bus_space_handle_t sc_iph;
111 bus_space_handle_t sc_sah;
112 struct mscp_softc *sc_softc; /* MSCP info (per mscpvar.h) */
113 int sc_inq;
114 };
115
116 static int udamatch(struct device *, struct cfdata *, void *);
117 static void udaattach(struct device *, struct device *, void *);
118 static void udareset(struct device *);
119 static void udaintr(void *);
120 static int udaready(struct uba_unit *);
121 static void udactlrdone(struct device *);
122 static int udaprint(void *, const char *);
123 static void udasaerror(struct device *, int);
124 static void udago(struct device *, struct mscp_xi *);
125
126 CFATTACH_DECL(mtc, sizeof(struct uda_softc),
127 udamatch, udaattach, NULL, NULL);
128
129 CFATTACH_DECL(uda, sizeof(struct uda_softc),
130 udamatch, udaattach, NULL, NULL);
131
132 /*
133 * More driver definitions, for generic MSCP code.
134 */
135 struct mscp_ctlr uda_mscp_ctlr = {
136 udactlrdone,
137 udago,
138 udasaerror,
139 };
140
141 int
142 udaprint(void *aux, const char *name)
143 {
144 if (name)
145 aprint_normal("%s: mscpbus", name);
146 return UNCONF;
147 }
148
149 /*
150 * Poke at a supposed UDA50 to see if it is there.
151 */
152 int
153 udamatch(struct device *parent, struct cfdata *cf, void *aux)
154 {
155 struct uba_attach_args *ua = aux;
156 struct mscp_softc mi; /* Nice hack */
157 struct uba_softc *ubasc;
158 int tries;
159
160 /* Get an interrupt vector. */
161 ubasc = (void *)parent;
162
163 mi.mi_iot = ua->ua_iot;
164 mi.mi_iph = ua->ua_ioh;
165 mi.mi_sah = ua->ua_ioh + 2;
166 mi.mi_swh = ua->ua_ioh + 2;
167
168 /*
169 * Initialise the controller (partially). The UDA50 programmer's
170 * manual states that if initialisation fails, it should be retried
171 * at least once, but after a second failure the port should be
172 * considered `down'; it also mentions that the controller should
173 * initialise within ten seconds. Or so I hear; I have not seen
174 * this manual myself.
175 */
176 tries = 0;
177 again:
178
179 bus_space_write_2(mi.mi_iot, mi.mi_iph, 0, 0); /* Start init */
180 if (mscp_waitstep(&mi, MP_STEP1, MP_STEP1) == 0)
181 return 0; /* Nothing here... */
182
183 bus_space_write_2(mi.mi_iot, mi.mi_sah, 0,
184 MP_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | MP_IE |
185 ((ubasc->uh_lastiv - 4) >> 2));
186
187 if (mscp_waitstep(&mi, MP_STEP2, MP_STEP2) == 0) {
188 printf("udaprobe: init step2 no change. sa=%x\n",
189 bus_space_read_2(mi.mi_iot, mi.mi_sah, 0));
190 goto bad;
191 }
192
193 /* should have interrupted by now */
194 return 1;
195 bad:
196 if (++tries < 2)
197 goto again;
198 return 0;
199 }
200
201 void
202 udaattach(struct device *parent, struct device *self, void *aux)
203 {
204 struct uda_softc *sc = device_private(self);
205 struct uba_attach_args *ua = aux;
206 struct uba_softc *uh = (void *)parent;
207 struct mscp_attach_args ma;
208 int error;
209
210 printf("\n");
211
212 uh->uh_lastiv -= 4; /* remove dynamic interrupt vector */
213
214 uba_intr_establish(ua->ua_icookie, ua->ua_cvec,
215 udaintr, sc, &sc->sc_intrcnt);
216 uba_reset_establish(udareset, &sc->sc_dev);
217 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
218 sc->sc_dev.dv_xname, "intr");
219
220 sc->sc_iot = ua->ua_iot;
221 sc->sc_iph = ua->ua_ioh;
222 sc->sc_sah = ua->ua_ioh + 2;
223 sc->sc_dmat = ua->ua_dmat;
224
225 /*
226 * Fill in the uba_unit struct, so we can communicate with the uba.
227 */
228 sc->sc_unit.uu_softc = sc; /* Backpointer to softc */
229 sc->sc_unit.uu_ready = udaready;/* go routine called from adapter */
230 sc->sc_unit.uu_keepbdp = vax_cputype == VAX_750 ? 1 : 0;
231
232 /*
233 * Map the communication area and command and
234 * response packets into Unibus space.
235 */
236 sc->sc_ui.ui_size = sizeof(struct mscp_pack);
237 if ((error = ubmemalloc((void *)parent, &sc->sc_ui, UBA_CANTWAIT)))
238 return printf("ubmemalloc failed: %d\n", error);
239
240 bzero(sc->sc_ui.ui_vaddr, sizeof (struct mscp_pack));
241
242 /*
243 * The only thing that differ UDA's and Tape ctlr's is
244 * their vcid. Beacuse there are no way to determine which
245 * ctlr type it is, we check what is generated and later
246 * set the correct vcid.
247 */
248 ma.ma_type = (device_is_a(self, "mtc") ? MSCPBUS_TAPE : MSCPBUS_DISK);
249
250 ma.ma_mc = &uda_mscp_ctlr;
251 ma.ma_type |= MSCPBUS_UDA;
252 ma.ma_uda = (struct mscp_pack *)sc->sc_ui.ui_vaddr;
253 ma.ma_softc = &sc->sc_softc;
254 ma.ma_iot = sc->sc_iot;
255 ma.ma_iph = sc->sc_iph;
256 ma.ma_sah = sc->sc_sah;
257 ma.ma_swh = sc->sc_sah;
258 ma.ma_dmat = sc->sc_dmat;
259 ma.ma_dmam = sc->sc_ui.ui_dmam;
260 ma.ma_ivec = uh->uh_lastiv;
261 ma.ma_ctlrnr = (ua->ua_iaddr == 0172150 ? 0 : 1); /* XXX */
262 ma.ma_adapnr = uh->uh_nr;
263 config_found(&sc->sc_dev, &ma, udaprint);
264 }
265
266 /*
267 * Start a transfer if there are free resources available, otherwise
268 * let it go in udaready, forget it for now.
269 * Called from mscp routines.
270 */
271 void
272 udago(struct device *usc, struct mscp_xi *mxi)
273 {
274 struct uda_softc *sc = (void *)usc;
275 struct uba_unit *uu;
276 struct buf *bp = mxi->mxi_bp;
277 int err;
278
279 /*
280 * If we already have transfers queued, don't try to load
281 * the map again.
282 */
283 if (sc->sc_inq == 0) {
284 err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam,
285 bp->b_data, bp->b_bcount,
286 (bp->b_flags & B_PHYS ? bp->b_proc : 0), BUS_DMA_NOWAIT);
287 if (err == 0) {
288 mscp_dgo(sc->sc_softc, mxi);
289 return;
290 }
291 }
292 uu = malloc(sizeof(struct uba_unit), M_DEVBUF, M_NOWAIT);
293 if (uu == 0)
294 panic("udago: no mem");
295 uu->uu_ready = udaready;
296 uu->uu_softc = sc;
297 uu->uu_ref = mxi;
298 uba_enqueue(uu);
299 sc->sc_inq++;
300 }
301
302 /*
303 * Called if we have been blocked for resources, and resources
304 * have been freed again. Return 1 if we could start all
305 * transfers again, 0 if we still are waiting.
306 * Called from uba resource free routines.
307 */
308 int
309 udaready(struct uba_unit *uu)
310 {
311 struct uda_softc *sc = uu->uu_softc;
312 struct mscp_xi *mxi = uu->uu_ref;
313 struct buf *bp = mxi->mxi_bp;
314 int err;
315
316 err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, bp->b_data,
317 bp->b_bcount, (bp->b_flags & B_PHYS ? bp->b_proc : 0),
318 BUS_DMA_NOWAIT);
319
320 if (err)
321 return 0;
322 mscp_dgo(sc->sc_softc, mxi);
323 sc->sc_inq--;
324 free(uu, M_DEVBUF);
325 return 1;
326 }
327
328 static struct saerr {
329 int code; /* error code (including UDA_ERR) */
330 const char *desc; /* what it means: Efoo => foo error */
331 } saerr[] = {
332 { 0100001, "Eunibus packet read" },
333 { 0100002, "Eunibus packet write" },
334 { 0100003, "EUDA ROM and RAM parity" },
335 { 0100004, "EUDA RAM parity" },
336 { 0100005, "EUDA ROM parity" },
337 { 0100006, "Eunibus ring read" },
338 { 0100007, "Eunibus ring write" },
339 { 0100010, " unibus interrupt master failure" },
340 { 0100011, "Ehost access timeout" },
341 { 0100012, " host exceeded command limit" },
342 { 0100013, " unibus bus master failure" },
343 { 0100014, " DM XFC fatal error" },
344 { 0100015, " hardware timeout of instruction loop" },
345 { 0100016, " invalid virtual circuit id" },
346 { 0100017, "Eunibus interrupt write" },
347 { 0104000, "Efatal sequence" },
348 { 0104040, " D proc ALU" },
349 { 0104041, "ED proc control ROM parity" },
350 { 0105102, "ED proc w/no BD#2 or RAM parity" },
351 { 0105105, "ED proc RAM buffer" },
352 { 0105152, "ED proc SDI" },
353 { 0105153, "ED proc write mode wrap serdes" },
354 { 0105154, "ED proc read mode serdes, RSGEN & ECC" },
355 { 0106040, "EU proc ALU" },
356 { 0106041, "EU proc control reg" },
357 { 0106042, " U proc DFAIL/cntl ROM parity/BD #1 test CNT" },
358 { 0106047, " U proc const PROM err w/D proc running SDI test" },
359 { 0106055, " unexpected trap" },
360 { 0106071, "EU proc const PROM" },
361 { 0106072, "EU proc control ROM parity" },
362 { 0106200, "Estep 1 data" },
363 { 0107103, "EU proc RAM parity" },
364 { 0107107, "EU proc RAM buffer" },
365 { 0107115, " test count wrong (BD 12)" },
366 { 0112300, "Estep 2" },
367 { 0122240, "ENPR" },
368 { 0122300, "Estep 3" },
369 { 0142300, "Estep 4" },
370 { 0, " unknown error code" }
371 };
372
373 /*
374 * If the error bit was set in the controller status register, gripe,
375 * then (optionally) reset the controller and requeue pending transfers.
376 */
377 void
378 udasaerror(struct device *usc, int doreset)
379 {
380 struct uda_softc *sc = (void *)usc;
381 int code = bus_space_read_2(sc->sc_iot, sc->sc_sah, 0);
382 struct saerr *e;
383
384 if ((code & MP_ERR) == 0)
385 return;
386 for (e = saerr; e->code; e++)
387 if (e->code == code)
388 break;
389 printf("%s: controller error, sa=0%o (%s%s)\n",
390 sc->sc_dev.dv_xname, code, e->desc + 1,
391 *e->desc == 'E' ? " error" : "");
392 #if 0 /* XXX we just avoid panic when autoconfig non-existent KFQSA devices */
393 if (doreset) {
394 mscp_requeue(sc->sc_softc);
395 /* (void) udainit(sc); XXX */
396 }
397 #endif
398 }
399
400 /*
401 * Interrupt routine. Depending on the state of the controller,
402 * continue initialisation, or acknowledge command and response
403 * interrupts, and process responses.
404 */
405 static void
406 udaintr(void *arg)
407 {
408 struct uda_softc *sc = arg;
409 struct uba_softc *uh;
410
411 /* ctlr fatal error */
412 if (bus_space_read_2(sc->sc_iot, sc->sc_sah, 0) & MP_ERR) {
413 udasaerror(&sc->sc_dev, 1);
414 return;
415 }
416 /*
417 * Handle buffer purge requests.
418 * XXX - should be done in bus_dma_sync().
419 */
420 uh = (void *)device_parent(&sc->sc_dev);
421 #ifdef notyet
422 if (ud->mp_ca.ca_bdp) {
423 if (uh->uh_ubapurge)
424 (*uh->uh_ubapurge)(uh, ud->mp_ca.ca_bdp);
425 /* signal purge complete */
426 bus_space_write_2(sc->sc_iot, sc->sc_sah, 0, 0);
427 }
428 #endif
429
430 mscp_intr(sc->sc_softc);
431 }
432
433 /*
434 * A Unibus reset has occurred on UBA uban. Reinitialise the controller(s)
435 * on that Unibus, and requeue outstanding I/O.
436 */
437 static void
438 udareset(struct device *dev)
439 {
440 struct uda_softc *sc = (void *)dev;
441 /*
442 * Our BDP (if any) is gone; our command (if any) is
443 * flushed; the device is no longer mapped; and the
444 * UDA50 is not yet initialised.
445 */
446 if (sc->sc_unit.uu_bdp) {
447 /* printf("<%d>", UBAI_BDP(sc->sc_unit.uu_bdp)); */
448 sc->sc_unit.uu_bdp = 0;
449 }
450
451 /* reset queues and requeue pending transfers */
452 mscp_requeue(sc->sc_softc);
453
454 /*
455 * If it fails to initialise we will notice later and
456 * try again (and again...). Do not call udastart()
457 * here; it will be done after the controller finishes
458 * initialisation.
459 */
460 /* XXX if (udainit(sc)) */
461 printf(" (hung)");
462 }
463
464 void
465 udactlrdone(struct device *usc)
466 {
467 struct uda_softc *sc = (void *)usc;
468 int s;
469
470 s = spluba();
471 uba_done((struct uba_softc *)device_parent(&sc->sc_dev));
472 splx(s);
473 }
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