The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/qcom_dwc3/qcom_dwc3.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.Org>
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  */
   27 
   28 /*
   29  * Qualcomm DWC3 glue
   30  */
   31 
   32 #include <sys/cdefs.h>
   33 __FBSDID("$FreeBSD$");
   34 
   35 #include <sys/param.h>
   36 #include <sys/systm.h>
   37 #include <sys/bus.h>
   38 #include <sys/rman.h>
   39 #include <sys/kernel.h>
   40 #include <sys/module.h>
   41 #include <sys/gpio.h>
   42 #include <machine/bus.h>
   43 
   44 #include <dev/fdt/simplebus.h>
   45 
   46 #include <dev/fdt/fdt_common.h>
   47 #include <dev/ofw/ofw_bus.h>
   48 #include <dev/ofw/ofw_bus_subr.h>
   49 #include <dev/ofw/ofw_subr.h>
   50 
   51 #include <dev/extres/clk/clk.h>
   52 #include <dev/extres/hwreset/hwreset.h>
   53 #include <dev/extres/phy/phy_usb.h>
   54 #include <dev/extres/syscon/syscon.h>
   55 
   56 static struct ofw_compat_data compat_data[] = {
   57         { "qcom,dwc3",                  1},
   58         { NULL,                         0 }
   59 };
   60 
   61 struct qcom_dwc3_softc {
   62         struct simplebus_softc  sc;
   63         device_t                dev;
   64         clk_t                   clk_master;
   65         clk_t                   clk_sleep;
   66         clk_t                   clk_mock_utmi;
   67         int                     type;
   68 };
   69 
   70 static int
   71 qcom_dwc3_probe(device_t dev)
   72 {
   73         phandle_t node;
   74 
   75         if (!ofw_bus_status_okay(dev))
   76                 return (ENXIO);
   77 
   78         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
   79                 return (ENXIO);
   80 
   81         /* Binding says that we need a child node for the actual dwc3 controller */
   82         node = ofw_bus_get_node(dev);
   83         if (OF_child(node) <= 0)
   84                 return (ENXIO);
   85 
   86         device_set_desc(dev, "Qualcomm DWC3");
   87         return (BUS_PROBE_DEFAULT);
   88 }
   89 
   90 static int
   91 qcom_dwc3_attach(device_t dev)
   92 {
   93         struct qcom_dwc3_softc *sc;
   94         device_t cdev;
   95         phandle_t node, child;
   96         int err;
   97 
   98         sc = device_get_softc(dev);
   99         sc->dev = dev;
  100         node = ofw_bus_get_node(dev);
  101         sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
  102 
  103         /* Mandatory clocks */
  104         if (clk_get_by_ofw_name(dev, 0, "master", &sc->clk_master) != 0) {
  105                 device_printf(dev, "Cannot get master clock\n");
  106                 return (ENXIO);
  107         }
  108 
  109         if (clk_get_by_ofw_name(dev, 0, "sleep", &sc->clk_sleep) != 0) {
  110                 device_printf(dev, "Cannot get sleep clock\n");
  111                 return (ENXIO);
  112         }
  113 
  114         if (clk_get_by_ofw_name(dev, 0, "mock_utmi", &sc->clk_mock_utmi) != 0) {
  115                 device_printf(dev, "Cannot get mock_utmi clock\n");
  116                 return (ENXIO);
  117         }
  118 
  119         /*
  120          * TODO: when we support optional reset blocks, take things
  121          * out of reset (well, put them into reset, then take out of reset.)
  122          */
  123 
  124         /*
  125          * Now, iterate over the clocks and enable them.
  126          */
  127         err = clk_enable(sc->clk_master);
  128         if (err != 0) {
  129                 device_printf(dev, "Could not enable clock %s\n",
  130                     clk_get_name(sc->clk_master));
  131                 return (ENXIO);
  132         }
  133         err = clk_enable(sc->clk_sleep);
  134         if (err != 0) {
  135                 device_printf(dev, "Could not enable clock %s\n",
  136                     clk_get_name(sc->clk_sleep));
  137                 return (ENXIO);
  138         }
  139         err = clk_enable(sc->clk_mock_utmi);
  140         if (err != 0) {
  141                 device_printf(dev, "Could not enable clock %s\n",
  142                     clk_get_name(sc->clk_mock_utmi));
  143                 return (ENXIO);
  144         }
  145 
  146         /*
  147          * Rest is glue code.
  148          */
  149 
  150         simplebus_init(dev, node);
  151         if (simplebus_fill_ranges(node, &sc->sc) < 0) {
  152                 device_printf(dev, "could not get ranges\n");
  153                 return (ENXIO);
  154         }
  155 
  156         for (child = OF_child(node); child > 0; child = OF_peer(child)) {
  157                 cdev = simplebus_add_device(dev, child, 0, NULL, -1, NULL);
  158                 if (cdev != NULL)
  159                         device_probe_and_attach(cdev);
  160         }
  161 
  162         return (bus_generic_attach(dev));
  163 }
  164 
  165 static device_method_t qcom_dwc3_methods[] = {
  166         /* Device interface */
  167         DEVMETHOD(device_probe,         qcom_dwc3_probe),
  168         DEVMETHOD(device_attach,        qcom_dwc3_attach),
  169         /* XXX TODO suspend */
  170         /* XXX TODO resume */
  171 
  172         DEVMETHOD_END
  173 };
  174 
  175 DEFINE_CLASS_1(qcom_dwc3, qcom_dwc3_driver, qcom_dwc3_methods,
  176     sizeof(struct qcom_dwc3_softc), simplebus_driver);
  177 DRIVER_MODULE(qcom_dwc3, simplebus, qcom_dwc3_driver, 0, 0);

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