The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/qcom_mdio/qcom_mdio_ipq4018_var.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2022 Adrian Chadd <adrian@FreeBSD.org>.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice unmodified, this list of conditions, and the following
   11  *    disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 #ifndef __QCOM_MDIO_IPQ4018_VAR_H__
   30 #define __QCOM_MDIO_IPQ4018_VAR_H__
   31 
   32 #define MDIO_LOCK(_sc)          mtx_lock(&(_sc)->sc_mtx)
   33 #define MDIO_UNLOCK(_sc)        mtx_unlock(&(_sc)->sc_mtx)
   34 #define MDIO_LOCK_ASSERT(_sc)   mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
   35 
   36 /*
   37  * register space access macros
   38  */
   39 #define MDIO_WRITE(sc, reg, val)        do {    \
   40                 bus_write_4(sc->sc_mem_res, (reg), (val)); \
   41         } while (0)
   42 
   43 #define MDIO_READ(sc, reg)       bus_read_4(sc->sc_mem_res, (reg))
   44 
   45 #define MDIO_BARRIER_WRITE(sc)          bus_barrier((sc)->sc_mem_res,   \
   46             0, (sc)->sc_mem_res_size, BUS_SPACE_BARRIER_WRITE)
   47 #define MDIO_BARRIER_READ(sc)           bus_barrier((sc)->sc_mem_res,   \
   48             0, (sc)->sc_mem_res_size, BUS_SPACE_BARRIER_READ)
   49 #define MDIO_BARRIER_RW(sc)             bus_barrier((sc)->sc_mem_res,   \
   50             0, (sc)->sc_mem_res_size,                                   \
   51             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
   52 
   53 #define MDIO_SET_BITS(sc, reg, bits)    \
   54         GPIO_WRITE(sc, reg,     MDIO_READ(sc, (reg)) | (bits))
   55 
   56 #define MDIO_CLEAR_BITS(sc, reg, bits)  \
   57         GPIO_WRITE(sc, reg,     MDIO_READ(sc, (reg)) & ~(bits))
   58 
   59 struct qcom_mdio_ipq4018_softc {
   60         device_t                sc_dev;
   61         struct mtx              sc_mtx;
   62         struct resource         *sc_mem_res;
   63         size_t                  sc_mem_res_size;
   64         int                     sc_mem_rid;
   65         uint32_t                sc_debug;
   66 };
   67 
   68 #endif  /* __QCOM_MDIO_IPQ4018_VAR_H__ */

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