ecore_gtt_reg_addr.h

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    1 /*
    2  * Copyright (c) 2017-2018 Cavium, Inc. 
    3  * All rights reserved.
    4  *
    5  *  Redistribution and use in source and binary forms, with or without
    6  *  modification, are permitted provided that the following conditions
    7  *  are met:
    8  *
    9  *  1. Redistributions of source code must retain the above copyright
   10  *     notice, this list of conditions and the following disclaimer.
   11  *  2. Redistributions in binary form must reproduce the above copyright
   12  *     notice, this list of conditions and the following disclaimer in the
   13  *     documentation and/or other materials provided with the distribution.
   14  *
   15  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   16  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   19  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   20  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   21  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   22  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   23  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   24  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   25  *  POSSIBILITY OF SUCH DAMAGE.
   26  *
   27  * $FreeBSD$
   28  *
   29  */
   30 
   31 #ifndef GTT_REG_ADDR_H
   32 #define GTT_REG_ADDR_H
   33 
   34 /* Win 2 */
   35 #define GTT_BAR0_MAP_REG_IGU_CMD                                                                             0x00f000UL //Access:RW   DataWidth:0x20   // 
   36 
   37 /* Win 3 */
   38 #define GTT_BAR0_MAP_REG_TSDM_RAM                                                                            0x010000UL //Access:RW   DataWidth:0x20   // 
   39 
   40 /* Win 4 */
   41 #define GTT_BAR0_MAP_REG_MSDM_RAM                                                                            0x011000UL //Access:RW   DataWidth:0x20   // 
   42 
   43 /* Win 5 */
   44 #define GTT_BAR0_MAP_REG_MSDM_RAM_1024                                                                       0x012000UL //Access:RW   DataWidth:0x20   // 
   45 
   46 /* Win 6 */
   47 #define GTT_BAR0_MAP_REG_USDM_RAM                                                                            0x013000UL //Access:RW   DataWidth:0x20   // 
   48 
   49 /* Win 7 */
   50 #define GTT_BAR0_MAP_REG_USDM_RAM_1024                                                                       0x014000UL //Access:RW   DataWidth:0x20   // 
   51 
   52 /* Win 8 */
   53 #define GTT_BAR0_MAP_REG_USDM_RAM_2048                                                                       0x015000UL //Access:RW   DataWidth:0x20   // 
   54 
   55 /* Win 9 */
   56 #define GTT_BAR0_MAP_REG_XSDM_RAM                                                                            0x016000UL //Access:RW   DataWidth:0x20   // 
   57 
   58 /* Win 10 */
   59 #define GTT_BAR0_MAP_REG_YSDM_RAM                                                                            0x017000UL //Access:RW   DataWidth:0x20   // 
   60 
   61 /* Win 11 */
   62 #define GTT_BAR0_MAP_REG_PSDM_RAM                                                                            0x018000UL //Access:RW   DataWidth:0x20   // 
   63 
   64 #endif

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FreeBSD/Linux Kernel Cross Reference sys/dev/qlnx/qlnxe/ecore_gtt_reg_addr.h

FreeBSD/Linux Kernel Cross Reference
sys/dev/qlnx/qlnxe/ecore_gtt_reg_addr.h