ecore_int.h

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    1 /*
    2  * Copyright (c) 2017-2018 Cavium, Inc. 
    3  * All rights reserved.
    4  *
    5  *  Redistribution and use in source and binary forms, with or without
    6  *  modification, are permitted provided that the following conditions
    7  *  are met:
    8  *
    9  *  1. Redistributions of source code must retain the above copyright
   10  *     notice, this list of conditions and the following disclaimer.
   11  *  2. Redistributions in binary form must reproduce the above copyright
   12  *     notice, this list of conditions and the following disclaimer in the
   13  *     documentation and/or other materials provided with the distribution.
   14  *
   15  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   16  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   19  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   20  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   21  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   22  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   23  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   24  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   25  *  POSSIBILITY OF SUCH DAMAGE.
   26  *
   27  * $FreeBSD$
   28  *
   29  */
   30 
   31 #ifndef __ECORE_INT_H__
   32 #define __ECORE_INT_H__
   33 
   34 #include "ecore.h"
   35 #include "ecore_int_api.h"
   36 
   37 #define ECORE_CAU_DEF_RX_TIMER_RES 0
   38 #define ECORE_CAU_DEF_TX_TIMER_RES 0
   39 
   40 #define ECORE_SB_ATT_IDX        0x0001
   41 #define ECORE_SB_EVENT_MASK     0x0003
   42 
   43 #define SB_ALIGNED_SIZE(p_hwfn)                                 \
   44         ALIGNED_TYPE_SIZE(struct status_block_e4, p_hwfn)
   45 
   46 #define ECORE_SB_INVALID_IDX    0xffff
   47 
   48 struct ecore_igu_block
   49 {
   50         u8      status;
   51 #define ECORE_IGU_STATUS_FREE   0x01
   52 #define ECORE_IGU_STATUS_VALID  0x02
   53 #define ECORE_IGU_STATUS_PF     0x04
   54 #define ECORE_IGU_STATUS_DSB    0x08
   55 
   56         u8      vector_number;
   57         u8      function_id;
   58         u8      is_pf;
   59 
   60         /* Index inside IGU [meant for back reference] */
   61         u16 igu_sb_id;
   62 
   63         struct ecore_sb_info *sb_info;
   64 };
   65 
   66 struct ecore_igu_info
   67 {
   68         struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH];
   69         u16 igu_dsb_id;
   70 
   71         /* The numbers can shift when using APIs to switch SBs between PF and
   72          * VF.
   73          */
   74         struct ecore_sb_cnt_info usage;
   75 
   76         /* Determine whether we can shift SBs between VFs and PFs */
   77         bool b_allow_pf_vf_change;
   78 };
   79 
   80 /**
   81  * @brief - Make sure the IGU CAM reflects the resources provided by MFW
   82  *
   83  * @param p_hwfn
   84  * @param p_ptt
   85  */
   86 int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn,
   87                             struct ecore_ptt *p_ptt);
   88 
   89 /**
   90  * @brief - Make sure IGU CAM reflects the default resources once again,
   91  *          starting with a 'dirty' SW database.
   92  * @param p_hwfn
   93  * @param p_ptt
   94  */
   95 int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn,
   96                                     struct ecore_ptt *p_ptt);
   97 
   98 /**
   99  * @brief Translate the weakly-defined client sb-id into an IGU sb-id
  100  *
  101  * @param p_hwfn
  102  * @param sb_id - user provided sb_id
  103  *
  104  * @return an index inside IGU CAM where the SB resides
  105  */
  106 u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id);
  107 
  108 /**
  109  * @brief return a pointer to an unused valid SB
  110  *
  111  * @param p_hwfn
  112  * @param b_is_pf - true iff we want a SB belonging to a PF
  113  *
  114  * @return point to an igu_block, OSAL_NULL if none is available
  115  */
  116 struct ecore_igu_block *
  117 ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf);
  118 
  119 /* TODO Names of function may change... */
  120 void ecore_int_igu_init_pure_rt(struct ecore_hwfn       *p_hwfn,
  121                                  struct ecore_ptt       *p_ptt,
  122                                  bool                   b_set,
  123                                  bool                   b_slowpath);
  124 
  125 void ecore_int_igu_init_rt(struct ecore_hwfn            *p_hwfn);
  126 
  127 /**
  128  * @brief ecore_int_igu_read_cam - Reads the IGU CAM.
  129  *      This function needs to be called during hardware
  130  *      prepare. It reads the info from igu cam to know which
  131  *      status block is the default / base status block etc.
  132  *
  133  * @param p_hwfn
  134  * @param p_ptt
  135  *
  136  * @return enum _ecore_status_t
  137  */
  138 enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn   *p_hwfn,
  139                                             struct ecore_ptt    *p_ptt);
  140 
  141 typedef enum _ecore_status_t(*ecore_int_comp_cb_t)(struct ecore_hwfn *p_hwfn,
  142                                                    void *cookie);
  143 /**
  144  * @brief ecore_int_register_cb - Register callback func for
  145  *      slowhwfn statusblock.
  146  *
  147  *      Every protocol that uses the slowhwfn status block
  148  *      should register a callback function that will be called
  149  *      once there is an update of the sp status block.
  150  *
  151  * @param p_hwfn
  152  * @param comp_cb - function to be called when there is an
  153  *                  interrupt on the sp sb
  154  *
  155  * @param cookie  - passed to the callback function
  156  * @param sb_idx  - OUT parameter which gives the chosen index
  157  *                  for this protocol.
  158  * @param p_fw_cons  - pointer to the actual address of the
  159  *                     consumer for this protocol.
  160  *
  161  * @return enum _ecore_status_t
  162  */
  163 enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn    *p_hwfn,
  164                                            ecore_int_comp_cb_t  comp_cb,
  165                                            void                 *cookie,
  166                                            u8                   *sb_idx,
  167                                            __le16               **p_fw_cons);
  168 /**
  169  * @brief ecore_int_unregister_cb - Unregisters callback
  170  *      function from sp sb.
  171  *      Partner of ecore_int_register_cb -> should be called
  172  *      when no longer required.
  173  *
  174  * @param p_hwfn
  175  * @param pi
  176  *
  177  * @return enum _ecore_status_t
  178  */
  179 enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn,
  180                                              u8 pi);
  181 
  182 /**
  183  * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id.
  184  *
  185  * @param p_hwfn
  186  *
  187  * @return u16
  188  */
  189 u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn);
  190 
  191 /**
  192  * @brief Status block cleanup. Should be called for each status
  193  *        block that will be used -> both PF / VF
  194  *
  195  * @param p_hwfn
  196  * @param p_ptt
  197  * @param sb_id         - igu status block id
  198  * @param opaque        - opaque fid of the sb owner.
  199  * @param cleanup_set   - set(1) / clear(0)
  200  */
  201 void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn        *p_hwfn,
  202                                        struct ecore_ptt         *p_ptt,
  203                                        u16                      sb_id,
  204                                        u16                      opaque,
  205                                        bool                     b_set);
  206 
  207 /**
  208  * @brief ecore_int_cau_conf - configure cau for a given status
  209  *        block
  210  *
  211  * @param p_hwfn
  212  * @param ptt
  213  * @param sb_phys
  214  * @param igu_sb_id
  215  * @param vf_number
  216  * @param vf_valid
  217  */
  218 void ecore_int_cau_conf_sb(struct ecore_hwfn    *p_hwfn,
  219                            struct ecore_ptt     *p_ptt,
  220                            dma_addr_t           sb_phys,
  221                            u16                  igu_sb_id,
  222                            u16                  vf_number,
  223                            u8                   vf_valid);
  224 
  225 /**
  226 * @brief ecore_int_alloc
  227 *
  228 * @param p_hwfn
  229  * @param p_ptt
  230 *
  231 * @return enum _ecore_status_t
  232 */
  233 enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn  *p_hwfn,
  234                                      struct ecore_ptt   *p_ptt);
  235 
  236 /**
  237 * @brief ecore_int_free
  238 *
  239 * @param p_hwfn
  240 */
  241 void ecore_int_free(struct ecore_hwfn *p_hwfn);
  242 
  243 /**
  244 * @brief ecore_int_setup
  245 *
  246 * @param p_hwfn
  247 * @param p_ptt
  248 */
  249 void ecore_int_setup(struct ecore_hwfn  *p_hwfn,
  250                      struct ecore_ptt   *p_ptt);
  251 
  252 /**
  253  * @brief - Enable Interrupt & Attention for hw function
  254  *
  255  * @param p_hwfn
  256  * @param p_ptt
  257  * @param int_mode
  258  *
  259 * @return enum _ecore_status_t
  260  */
  261 enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn,
  262                                           struct ecore_ptt *p_ptt,
  263                                           enum ecore_int_mode int_mode);
  264 
  265 /**
  266  * @brief - Initialize CAU status block entry
  267  *
  268  * @param p_hwfn
  269  * @param p_sb_entry
  270  * @param pf_id
  271  * @param vf_number
  272  * @param vf_valid
  273  */
  274 void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn,
  275                              struct cau_sb_entry *p_sb_entry, u8 pf_id,
  276                              u16 vf_number, u8 vf_valid);
  277 
  278 enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn,
  279                                              struct ecore_ptt *p_ptt,
  280                                              u8 timer_res, u16 sb_id, bool tx);
  281 #ifndef ASIC_ONLY
  282 #define ECORE_MAPPING_MEMORY_SIZE(dev) \
  283         ((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \
  284          136 : NUM_OF_SBS(dev))
  285 #else
  286 #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev)
  287 #endif
  288 
  289 enum _ecore_status_t ecore_pglueb_rbc_attn_handler(struct ecore_hwfn *p_hwfn,
  290                                                    struct ecore_ptt *p_ptt);
  291 
  292 #endif /* __ECORE_INT_H__ */

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FreeBSD/Linux Kernel Cross Reference sys/dev/qlnx/qlnxe/ecore_int.h

FreeBSD/Linux Kernel Cross Reference
sys/dev/qlnx/qlnxe/ecore_int.h