Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/dev/qlnx/qlnxr/qlnxr_os.c
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /* 2 * Copyright (c) 2018-2019 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * File: qlnxr_os.c 30 */ 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include "qlnxr_def.h" 35 36 SYSCTL_NODE(_dev, OID_AUTO, qnxr, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 37 "Qlogic RDMA module"); 38 39 uint32_t delayed_ack = 0; 40 SYSCTL_UINT(_dev_qnxr, OID_AUTO, delayed_ack, CTLFLAG_RW, &delayed_ack, 1, 41 "iWARP: Delayed Ack: 0 - Disabled 1 - Enabled. Default: Disabled"); 42 43 uint32_t timestamp = 1; 44 SYSCTL_UINT(_dev_qnxr, OID_AUTO, timestamp, CTLFLAG_RW, ×tamp, 1, 45 "iWARP: Timestamp: 0 - Disabled 1 - Enabled. Default:Enabled"); 46 47 uint32_t rcv_wnd_size = 0; 48 SYSCTL_UINT(_dev_qnxr, OID_AUTO, rcv_wnd_size, CTLFLAG_RW, &rcv_wnd_size, 1, 49 "iWARP: Receive Window Size in K. Default 1M"); 50 51 uint32_t crc_needed = 1; 52 SYSCTL_UINT(_dev_qnxr, OID_AUTO, crc_needed, CTLFLAG_RW, &crc_needed, 1, 53 "iWARP: CRC needed 0 - Disabled 1 - Enabled. Default:Enabled"); 54 55 uint32_t peer2peer = 1; 56 SYSCTL_UINT(_dev_qnxr, OID_AUTO, peer2peer, CTLFLAG_RW, &peer2peer, 1, 57 "iWARP: Support peer2peer ULPs 0 - Disabled 1 - Enabled. Default:Enabled"); 58 59 uint32_t mpa_enhanced = 1; 60 SYSCTL_UINT(_dev_qnxr, OID_AUTO, mpa_enhanced, CTLFLAG_RW, &mpa_enhanced, 1, 61 "iWARP: MPA Enhanced mode. Default:1"); 62 63 uint32_t rtr_type = 7; 64 SYSCTL_UINT(_dev_qnxr, OID_AUTO, rtr_type, CTLFLAG_RW, &rtr_type, 1, 65 "iWARP: RDMAP opcode to use for the RTR message: BITMAP 1: RDMA_SEND 2: RDMA_WRITE 4: RDMA_READ. Default: 7"); 66 67 #define QNXR_WQ_MULTIPLIER_MIN (1) 68 #define QNXR_WQ_MULTIPLIER_MAX (7) 69 #define QNXR_WQ_MULTIPLIER_DFT (3) 70 71 uint32_t wq_multiplier= QNXR_WQ_MULTIPLIER_DFT; 72 SYSCTL_UINT(_dev_qnxr, OID_AUTO, wq_multiplier, CTLFLAG_RW, &wq_multiplier, 1, 73 " When creating a WQ the actual number of WQE created will" 74 " be multiplied by this number (default is 3)."); 75 static ssize_t 76 show_rev(struct device *device, struct device_attribute *attr, 77 char *buf) 78 { 79 struct qlnxr_dev *dev = dev_get_drvdata(device); 80 81 return sprintf(buf, "0x%x\n", dev->cdev->vendor_id); 82 } 83 84 static ssize_t 85 show_hca_type(struct device *device, 86 struct device_attribute *attr, char *buf) 87 { 88 struct qlnxr_dev *dev = dev_get_drvdata(device); 89 return sprintf(buf, "QLogic0x%x\n", dev->cdev->device_id); 90 } 91 92 static ssize_t 93 show_fw_ver(struct device *device, 94 struct device_attribute *attr, char *buf) 95 { 96 struct qlnxr_dev *dev = dev_get_drvdata(device); 97 uint32_t fw_ver = (uint32_t) dev->attr.fw_ver; 98 99 return sprintf(buf, "%d.%d.%d\n", 100 (fw_ver >> 24) & 0xff, (fw_ver >> 16) & 0xff, 101 (fw_ver >> 8) & 0xff); 102 } 103 static ssize_t 104 show_board(struct device *device, 105 struct device_attribute *attr, char *buf) 106 { 107 struct qlnxr_dev *dev = dev_get_drvdata(device); 108 return sprintf(buf, "%x\n", dev->cdev->device_id); 109 } 110 111 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 112 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca_type, NULL); 113 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 114 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 115 116 static struct device_attribute *qlnxr_class_attributes[] = { 117 &dev_attr_hw_rev, 118 &dev_attr_hca_type, 119 &dev_attr_fw_ver, 120 &dev_attr_board_id 121 }; 122 123 static void 124 qlnxr_ib_dispatch_event(qlnxr_dev_t *dev, uint8_t port_num, 125 enum ib_event_type type) 126 { 127 struct ib_event ibev; 128 129 QL_DPRINT12(dev->ha, "enter\n"); 130 131 ibev.device = &dev->ibdev; 132 ibev.element.port_num = port_num; 133 ibev.event = type; 134 135 ib_dispatch_event(&ibev); 136 137 QL_DPRINT12(dev->ha, "exit\n"); 138 } 139 140 static int 141 __qlnxr_iw_destroy_listen(struct iw_cm_id *cm_id) 142 { 143 qlnxr_iw_destroy_listen(cm_id); 144 145 return (0); 146 } 147 148 static int 149 qlnxr_register_device(qlnxr_dev_t *dev) 150 { 151 struct ib_device *ibdev; 152 struct iw_cm_verbs *iwcm; 153 int ret; 154 155 QL_DPRINT12(dev->ha, "enter\n"); 156 157 ibdev = &dev->ibdev; 158 159 #define qlnxr_ib_ah qlnxr_ah 160 #define qlnxr_ib_cq qlnxr_cq 161 #define qlnxr_ib_pd qlnxr_pd 162 #define qlnxr_ib_qp qlnxr_qp 163 #define qlnxr_ib_srq qlnxr_srq 164 #define qlnxr_ib_ucontext qlnxr_ucontext 165 INIT_IB_DEVICE_OPS(&ibdev->ops, qlnxr, QLNXR); 166 strlcpy(ibdev->name, "qlnxr%d", IB_DEVICE_NAME_MAX); 167 168 memset(&ibdev->node_guid, 0, sizeof(ibdev->node_guid)); 169 memcpy(&ibdev->node_guid, dev->ha->primary_mac, ETHER_ADDR_LEN); 170 171 memcpy(ibdev->node_desc, QLNXR_NODE_DESC, sizeof(QLNXR_NODE_DESC)); 172 173 ibdev->owner = THIS_MODULE; 174 ibdev->uverbs_abi_ver = 7; 175 ibdev->local_dma_lkey = 0; 176 177 ibdev->uverbs_cmd_mask = 178 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 179 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 180 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 181 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 182 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 183 (1ull << IB_USER_VERBS_CMD_REG_MR) | 184 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 185 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 186 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 187 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 188 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) | 189 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 190 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 191 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 192 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 193 (1ull << IB_USER_VERBS_CMD_POLL_CQ) | 194 (1ull << IB_USER_VERBS_CMD_POST_SEND) | 195 (1ull << IB_USER_VERBS_CMD_POST_RECV); 196 197 if (QLNX_IS_IWARP(dev)) { 198 ibdev->node_type = RDMA_NODE_RNIC; 199 ibdev->query_gid = qlnxr_iw_query_gid; 200 } else { 201 ibdev->node_type = RDMA_NODE_IB_CA; 202 ibdev->query_gid = qlnxr_query_gid; 203 ibdev->uverbs_cmd_mask |= 204 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 205 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 206 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 207 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 208 (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV); 209 ibdev->create_srq = qlnxr_create_srq; 210 ibdev->destroy_srq = qlnxr_destroy_srq; 211 ibdev->modify_srq = qlnxr_modify_srq; 212 ibdev->query_srq = qlnxr_query_srq; 213 ibdev->post_srq_recv = qlnxr_post_srq_recv; 214 } 215 216 ibdev->phys_port_cnt = 1; 217 ibdev->num_comp_vectors = dev->num_cnq; 218 219 /* mandatory verbs. */ 220 ibdev->query_device = qlnxr_query_device; 221 ibdev->query_port = qlnxr_query_port; 222 ibdev->modify_port = qlnxr_modify_port; 223 224 ibdev->alloc_ucontext = qlnxr_alloc_ucontext; 225 ibdev->dealloc_ucontext = qlnxr_dealloc_ucontext; 226 /* mandatory to support user space verbs consumer. */ 227 ibdev->mmap = qlnxr_mmap; 228 229 ibdev->alloc_pd = qlnxr_alloc_pd; 230 ibdev->dealloc_pd = qlnxr_dealloc_pd; 231 232 ibdev->create_cq = qlnxr_create_cq; 233 ibdev->destroy_cq = qlnxr_destroy_cq; 234 ibdev->resize_cq = qlnxr_resize_cq; 235 ibdev->req_notify_cq = qlnxr_arm_cq; 236 237 ibdev->create_qp = qlnxr_create_qp; 238 ibdev->modify_qp = qlnxr_modify_qp; 239 ibdev->query_qp = qlnxr_query_qp; 240 ibdev->destroy_qp = qlnxr_destroy_qp; 241 242 ibdev->query_pkey = qlnxr_query_pkey; 243 ibdev->create_ah = qlnxr_create_ah; 244 ibdev->destroy_ah = qlnxr_destroy_ah; 245 ibdev->query_ah = qlnxr_query_ah; 246 ibdev->modify_ah = qlnxr_modify_ah; 247 ibdev->get_dma_mr = qlnxr_get_dma_mr; 248 ibdev->dereg_mr = qlnxr_dereg_mr; 249 ibdev->reg_user_mr = qlnxr_reg_user_mr; 250 251 #if __FreeBSD_version >= 1102000 252 ibdev->alloc_mr = qlnxr_alloc_mr; 253 ibdev->map_mr_sg = qlnxr_map_mr_sg; 254 ibdev->get_port_immutable = qlnxr_get_port_immutable; 255 #else 256 ibdev->reg_phys_mr = qlnxr_reg_kernel_mr; 257 ibdev->alloc_fast_reg_mr = qlnxr_alloc_frmr; 258 ibdev->alloc_fast_reg_page_list = qlnxr_alloc_frmr_page_list; 259 ibdev->free_fast_reg_page_list = qlnxr_free_frmr_page_list; 260 #endif /* #if __FreeBSD_version >= 1102000 */ 261 262 ibdev->poll_cq = qlnxr_poll_cq; 263 ibdev->post_send = qlnxr_post_send; 264 ibdev->post_recv = qlnxr_post_recv; 265 ibdev->process_mad = qlnxr_process_mad; 266 267 ibdev->dma_device = &dev->pdev.dev; 268 269 ibdev->get_link_layer = qlnxr_link_layer; 270 271 if (QLNX_IS_IWARP(dev)) { 272 iwcm = kmalloc(sizeof(*iwcm), GFP_KERNEL); 273 274 device_printf(dev->ha->pci_dev, "device is IWARP\n"); 275 if (iwcm == NULL) 276 return (-ENOMEM); 277 278 ibdev->iwcm = iwcm; 279 280 iwcm->connect = qlnxr_iw_connect; 281 iwcm->accept = qlnxr_iw_accept; 282 iwcm->reject = qlnxr_iw_reject; 283 284 #if (__FreeBSD_version >= 1004000) && (__FreeBSD_version < 1102000) 285 286 iwcm->create_listen_ep = qlnxr_iw_create_listen; 287 iwcm->destroy_listen_ep = qlnxr_iw_destroy_listen; 288 #else 289 iwcm->create_listen = qlnxr_iw_create_listen; 290 iwcm->destroy_listen = __qlnxr_iw_destroy_listen; 291 #endif 292 iwcm->add_ref = qlnxr_iw_qp_add_ref; 293 iwcm->rem_ref = qlnxr_iw_qp_rem_ref; 294 iwcm->get_qp = qlnxr_iw_get_qp; 295 } 296 297 ret = ib_register_device(ibdev, NULL); 298 if (ret) { 299 kfree(iwcm); 300 } 301 302 QL_DPRINT12(dev->ha, "exit\n"); 303 return ret; 304 } 305 306 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo)) 307 308 static void 309 qlnxr_intr(void *handle) 310 { 311 struct qlnxr_cnq *cnq = handle; 312 struct qlnxr_cq *cq; 313 struct regpair *cq_handle; 314 u16 hw_comp_cons, sw_comp_cons; 315 qlnx_host_t *ha; 316 317 ha = cnq->dev->ha; 318 319 QL_DPRINT12(ha, "enter cnq = %p\n", handle); 320 321 ecore_sb_ack(cnq->sb, IGU_INT_DISABLE, 0 /*do not update*/); 322 323 ecore_sb_update_sb_idx(cnq->sb); 324 325 hw_comp_cons = le16_to_cpu(*cnq->hw_cons_ptr); 326 sw_comp_cons = ecore_chain_get_cons_idx(&cnq->pbl); 327 328 rmb(); 329 330 QL_DPRINT12(ha, "enter cnq = %p hw_comp_cons = 0x%x sw_comp_cons = 0x%x\n", 331 handle, hw_comp_cons, sw_comp_cons); 332 333 while (sw_comp_cons != hw_comp_cons) { 334 cq_handle = (struct regpair *)ecore_chain_consume(&cnq->pbl); 335 cq = (struct qlnxr_cq *)(uintptr_t)HILO_U64(cq_handle->hi, 336 cq_handle->lo); 337 338 if (cq == NULL) { 339 QL_DPRINT11(ha, "cq == NULL\n"); 340 break; 341 } 342 343 if (cq->sig != QLNXR_CQ_MAGIC_NUMBER) { 344 QL_DPRINT11(ha, 345 "cq->sig = 0x%x QLNXR_CQ_MAGIC_NUMBER = 0x%x\n", 346 cq->sig, QLNXR_CQ_MAGIC_NUMBER); 347 break; 348 } 349 cq->arm_flags = 0; 350 351 if (!cq->destroyed && cq->ibcq.comp_handler) { 352 QL_DPRINT11(ha, "calling comp_handler = %p " 353 "ibcq = %p cq_context = 0x%x\n", 354 &cq->ibcq, cq->ibcq.cq_context); 355 356 (*cq->ibcq.comp_handler) (&cq->ibcq, cq->ibcq.cq_context); 357 } 358 cq->cnq_notif++; 359 360 sw_comp_cons = ecore_chain_get_cons_idx(&cnq->pbl); 361 362 cnq->n_comp++; 363 } 364 365 ecore_rdma_cnq_prod_update(cnq->dev->rdma_ctx, cnq->index, sw_comp_cons); 366 367 ecore_sb_ack(cnq->sb, IGU_INT_ENABLE, 1 /*update*/); 368 369 QL_DPRINT12(ha, "exit cnq = %p\n", handle); 370 return; 371 } 372 373 static void 374 qlnxr_release_irqs(struct qlnxr_dev *dev) 375 { 376 int i; 377 qlnx_host_t *ha; 378 379 ha = dev->ha; 380 381 QL_DPRINT12(ha, "enter\n"); 382 383 for (i = 0; i < dev->num_cnq; i++) { 384 if (dev->cnq_array[i].irq_handle) 385 (void)bus_teardown_intr(dev->ha->pci_dev, 386 dev->cnq_array[i].irq, 387 dev->cnq_array[i].irq_handle); 388 389 if (dev->cnq_array[i].irq) 390 (void) bus_release_resource(dev->ha->pci_dev, 391 SYS_RES_IRQ, 392 dev->cnq_array[i].irq_rid, 393 dev->cnq_array[i].irq); 394 } 395 QL_DPRINT12(ha, "exit\n"); 396 return; 397 } 398 399 static int 400 qlnxr_setup_irqs(struct qlnxr_dev *dev) 401 { 402 int start_irq_rid; 403 int i; 404 qlnx_host_t *ha; 405 406 ha = dev->ha; 407 408 start_irq_rid = dev->sb_start + 2; 409 410 QL_DPRINT12(ha, "enter start_irq_rid = %d num_rss = %d\n", 411 start_irq_rid, dev->ha->num_rss); 412 413 for (i = 0; i < dev->num_cnq; i++) { 414 dev->cnq_array[i].irq_rid = start_irq_rid + i; 415 416 dev->cnq_array[i].irq = bus_alloc_resource_any(dev->ha->pci_dev, 417 SYS_RES_IRQ, 418 &dev->cnq_array[i].irq_rid, 419 (RF_ACTIVE | RF_SHAREABLE)); 420 421 if (dev->cnq_array[i].irq == NULL) { 422 QL_DPRINT11(ha, 423 "bus_alloc_resource_any failed irq_rid = %d\n", 424 dev->cnq_array[i].irq_rid); 425 426 goto qlnxr_setup_irqs_err; 427 } 428 429 if (bus_setup_intr(dev->ha->pci_dev, 430 dev->cnq_array[i].irq, 431 (INTR_TYPE_NET | INTR_MPSAFE), 432 NULL, qlnxr_intr, &dev->cnq_array[i], 433 &dev->cnq_array[i].irq_handle)) { 434 QL_DPRINT11(ha, "bus_setup_intr failed\n"); 435 goto qlnxr_setup_irqs_err; 436 } 437 QL_DPRINT12(ha, "irq_rid = %d irq = %p irq_handle = %p\n", 438 dev->cnq_array[i].irq_rid, dev->cnq_array[i].irq, 439 dev->cnq_array[i].irq_handle); 440 } 441 442 QL_DPRINT12(ha, "exit\n"); 443 return (0); 444 445 qlnxr_setup_irqs_err: 446 qlnxr_release_irqs(dev); 447 448 QL_DPRINT12(ha, "exit -1\n"); 449 return (-1); 450 } 451 452 static void 453 qlnxr_free_resources(struct qlnxr_dev *dev) 454 { 455 int i; 456 qlnx_host_t *ha; 457 458 ha = dev->ha; 459 460 QL_DPRINT12(ha, "enter dev->num_cnq = %d\n", dev->num_cnq); 461 462 if (QLNX_IS_IWARP(dev)) { 463 if (dev->iwarp_wq != NULL) 464 destroy_workqueue(dev->iwarp_wq); 465 } 466 467 for (i = 0; i < dev->num_cnq; i++) { 468 qlnx_free_mem_sb(dev->ha, &dev->sb_array[i]); 469 ecore_chain_free(&dev->ha->cdev, &dev->cnq_array[i].pbl); 470 } 471 472 bzero(dev->cnq_array, (sizeof(struct qlnxr_cnq) * QLNXR_MAX_MSIX)); 473 bzero(dev->sb_array, (sizeof(struct ecore_sb_info) * QLNXR_MAX_MSIX)); 474 bzero(dev->sgid_tbl, (sizeof(union ib_gid) * QLNXR_MAX_SGID)); 475 476 if (mtx_initialized(&dev->idr_lock)) 477 mtx_destroy(&dev->idr_lock); 478 479 if (mtx_initialized(&dev->sgid_lock)) 480 mtx_destroy(&dev->sgid_lock); 481 482 QL_DPRINT12(ha, "exit\n"); 483 return; 484 } 485 486 static int 487 qlnxr_alloc_resources(struct qlnxr_dev *dev) 488 { 489 uint16_t n_entries; 490 int i, rc; 491 qlnx_host_t *ha; 492 493 ha = dev->ha; 494 495 QL_DPRINT12(ha, "enter\n"); 496 497 bzero(dev->sgid_tbl, (sizeof (union ib_gid) * QLNXR_MAX_SGID)); 498 499 mtx_init(&dev->idr_lock, "idr_lock", NULL, MTX_DEF); 500 mtx_init(&dev->sgid_lock, "sgid_lock", NULL, MTX_DEF); 501 502 idr_init(&dev->qpidr); 503 504 bzero(dev->sb_array, (sizeof (struct ecore_sb_info) * QLNXR_MAX_MSIX)); 505 bzero(dev->cnq_array, (sizeof (struct qlnxr_cnq) * QLNXR_MAX_MSIX)); 506 507 dev->sb_start = ecore_rdma_get_sb_id(dev->rdma_ctx, 0); 508 509 QL_DPRINT12(ha, "dev->sb_start = 0x%x\n", dev->sb_start); 510 511 /* Allocate CNQ PBLs */ 512 513 n_entries = min_t(u32, ECORE_RDMA_MAX_CNQ_SIZE, QLNXR_ROCE_MAX_CNQ_SIZE); 514 515 for (i = 0; i < dev->num_cnq; i++) { 516 rc = qlnx_alloc_mem_sb(dev->ha, &dev->sb_array[i], 517 dev->sb_start + i); 518 if (rc) 519 goto qlnxr_alloc_resources_exit; 520 521 rc = ecore_chain_alloc(&dev->ha->cdev, 522 ECORE_CHAIN_USE_TO_CONSUME_PRODUCE, 523 ECORE_CHAIN_MODE_PBL, 524 ECORE_CHAIN_CNT_TYPE_U16, 525 n_entries, 526 sizeof(struct regpair *), 527 &dev->cnq_array[i].pbl, 528 NULL); 529 530 /* configure cnq, except name since ibdev.name is still NULL */ 531 dev->cnq_array[i].dev = dev; 532 dev->cnq_array[i].sb = &dev->sb_array[i]; 533 dev->cnq_array[i].hw_cons_ptr = 534 &(dev->sb_array[i].sb_virt->pi_array[ECORE_ROCE_PROTOCOL_INDEX]); 535 dev->cnq_array[i].index = i; 536 sprintf(dev->cnq_array[i].name, "qlnxr%d@pci:%d", 537 i, (dev->ha->pci_func)); 538 } 539 540 QL_DPRINT12(ha, "exit\n"); 541 return 0; 542 543 qlnxr_alloc_resources_exit: 544 545 qlnxr_free_resources(dev); 546 547 QL_DPRINT12(ha, "exit -ENOMEM\n"); 548 return -ENOMEM; 549 } 550 551 void 552 qlnxr_affiliated_event(void *context, u8 e_code, void *fw_handle) 553 { 554 #define EVENT_TYPE_NOT_DEFINED 0 555 #define EVENT_TYPE_CQ 1 556 #define EVENT_TYPE_QP 2 557 #define EVENT_TYPE_GENERAL 3 558 559 struct qlnxr_dev *dev = (struct qlnxr_dev *)context; 560 struct regpair *async_handle = (struct regpair *)fw_handle; 561 u64 roceHandle64 = ((u64)async_handle->hi << 32) + async_handle->lo; 562 struct qlnxr_cq *cq = (struct qlnxr_cq *)(uintptr_t)roceHandle64; 563 struct qlnxr_qp *qp = (struct qlnxr_qp *)(uintptr_t)roceHandle64; 564 u8 event_type = EVENT_TYPE_NOT_DEFINED; 565 struct ib_event event; 566 qlnx_host_t *ha; 567 568 ha = dev->ha; 569 570 QL_DPRINT12(ha, "enter context = %p e_code = 0x%x fw_handle = %p\n", 571 context, e_code, fw_handle); 572 573 if (QLNX_IS_IWARP(dev)) { 574 switch (e_code) { 575 case ECORE_IWARP_EVENT_CQ_OVERFLOW: 576 event.event = IB_EVENT_CQ_ERR; 577 event_type = EVENT_TYPE_CQ; 578 break; 579 580 default: 581 QL_DPRINT12(ha, 582 "unsupported event %d on handle=%llx\n", 583 e_code, roceHandle64); 584 break; 585 } 586 } else { 587 switch (e_code) { 588 case ROCE_ASYNC_EVENT_CQ_OVERFLOW_ERR: 589 event.event = IB_EVENT_CQ_ERR; 590 event_type = EVENT_TYPE_CQ; 591 break; 592 593 case ROCE_ASYNC_EVENT_SQ_DRAINED: 594 event.event = IB_EVENT_SQ_DRAINED; 595 event_type = EVENT_TYPE_QP; 596 break; 597 598 case ROCE_ASYNC_EVENT_QP_CATASTROPHIC_ERR: 599 event.event = IB_EVENT_QP_FATAL; 600 event_type = EVENT_TYPE_QP; 601 break; 602 603 case ROCE_ASYNC_EVENT_LOCAL_INVALID_REQUEST_ERR: 604 event.event = IB_EVENT_QP_REQ_ERR; 605 event_type = EVENT_TYPE_QP; 606 break; 607 608 case ROCE_ASYNC_EVENT_LOCAL_ACCESS_ERR: 609 event.event = IB_EVENT_QP_ACCESS_ERR; 610 event_type = EVENT_TYPE_QP; 611 break; 612 613 /* NOTE the following are not implemented in FW 614 * ROCE_ASYNC_EVENT_CQ_ERR 615 * ROCE_ASYNC_EVENT_COMM_EST 616 */ 617 /* TODO associate the following events - 618 * ROCE_ASYNC_EVENT_SRQ_LIMIT 619 * ROCE_ASYNC_EVENT_LAST_WQE_REACHED 620 * ROCE_ASYNC_EVENT_LOCAL_CATASTROPHIC_ERR (un-affiliated) 621 */ 622 default: 623 QL_DPRINT12(ha, 624 "unsupported event 0x%x on fw_handle = %p\n", 625 e_code, fw_handle); 626 break; 627 } 628 } 629 630 switch (event_type) { 631 case EVENT_TYPE_CQ: 632 if (cq && cq->sig == QLNXR_CQ_MAGIC_NUMBER) { 633 struct ib_cq *ibcq = &cq->ibcq; 634 635 if (ibcq->event_handler) { 636 event.device = ibcq->device; 637 event.element.cq = ibcq; 638 ibcq->event_handler(&event, ibcq->cq_context); 639 } 640 } else { 641 QL_DPRINT11(ha, 642 "CQ event with invalid CQ pointer" 643 " Handle = %llx\n", roceHandle64); 644 } 645 QL_DPRINT12(ha, 646 "CQ event 0x%x on handle = %p\n", e_code, cq); 647 break; 648 649 case EVENT_TYPE_QP: 650 if (qp && qp->sig == QLNXR_QP_MAGIC_NUMBER) { 651 struct ib_qp *ibqp = &qp->ibqp; 652 653 if (ibqp->event_handler) { 654 event.device = ibqp->device; 655 event.element.qp = ibqp; 656 ibqp->event_handler(&event, ibqp->qp_context); 657 } 658 } else { 659 QL_DPRINT11(ha, 660 "QP event 0x%x with invalid QP pointer" 661 " qp handle = %p\n", 662 e_code, roceHandle64); 663 } 664 QL_DPRINT12(ha, "QP event 0x%x on qp handle = %p\n", 665 e_code, qp); 666 break; 667 668 case EVENT_TYPE_GENERAL: 669 break; 670 671 default: 672 break; 673 } 674 675 QL_DPRINT12(ha, "exit\n"); 676 677 return; 678 } 679 680 void 681 qlnxr_unaffiliated_event(void *context, u8 e_code) 682 { 683 struct qlnxr_dev *dev = (struct qlnxr_dev *)context; 684 qlnx_host_t *ha; 685 686 ha = dev->ha; 687 688 QL_DPRINT12(ha, "enter/exit \n"); 689 return; 690 } 691 692 static int 693 qlnxr_set_device_attr(struct qlnxr_dev *dev) 694 { 695 struct ecore_rdma_device *ecore_attr; 696 struct qlnxr_device_attr *attr; 697 u32 page_size; 698 699 ecore_attr = ecore_rdma_query_device(dev->rdma_ctx); 700 701 page_size = ~dev->attr.page_size_caps + 1; 702 if(page_size > PAGE_SIZE) { 703 QL_DPRINT12(dev->ha, "Kernel page size : %ld is smaller than" 704 " minimum page size : %ld required by qlnxr\n", 705 PAGE_SIZE, page_size); 706 return -ENODEV; 707 } 708 attr = &dev->attr; 709 attr->vendor_id = ecore_attr->vendor_id; 710 attr->vendor_part_id = ecore_attr->vendor_part_id; 711 712 QL_DPRINT12(dev->ha, "in qlnxr_set_device_attr, vendor : %x device : %x\n", 713 attr->vendor_id, attr->vendor_part_id); 714 715 attr->hw_ver = ecore_attr->hw_ver; 716 attr->fw_ver = ecore_attr->fw_ver; 717 attr->node_guid = ecore_attr->node_guid; 718 attr->sys_image_guid = ecore_attr->sys_image_guid; 719 attr->max_cnq = ecore_attr->max_cnq; 720 attr->max_sge = ecore_attr->max_sge; 721 attr->max_inline = ecore_attr->max_inline; 722 attr->max_sqe = min_t(u32, ecore_attr->max_wqe, QLNXR_MAX_SQE); 723 attr->max_rqe = min_t(u32, ecore_attr->max_wqe, QLNXR_MAX_RQE); 724 attr->max_qp_resp_rd_atomic_resc = ecore_attr->max_qp_resp_rd_atomic_resc; 725 attr->max_qp_req_rd_atomic_resc = ecore_attr->max_qp_req_rd_atomic_resc; 726 attr->max_dev_resp_rd_atomic_resc = 727 ecore_attr->max_dev_resp_rd_atomic_resc; 728 attr->max_cq = ecore_attr->max_cq; 729 attr->max_qp = ecore_attr->max_qp; 730 attr->max_mr = ecore_attr->max_mr; 731 attr->max_mr_size = ecore_attr->max_mr_size; 732 attr->max_cqe = min_t(u64, ecore_attr->max_cqe, QLNXR_MAX_CQES); 733 attr->max_mw = ecore_attr->max_mw; 734 attr->max_fmr = ecore_attr->max_fmr; 735 attr->max_mr_mw_fmr_pbl = ecore_attr->max_mr_mw_fmr_pbl; 736 attr->max_mr_mw_fmr_size = ecore_attr->max_mr_mw_fmr_size; 737 attr->max_pd = ecore_attr->max_pd; 738 attr->max_ah = ecore_attr->max_ah; 739 attr->max_pkey = ecore_attr->max_pkey; 740 attr->max_srq = ecore_attr->max_srq; 741 attr->max_srq_wr = ecore_attr->max_srq_wr; 742 //attr->dev_caps = ecore_attr->dev_caps; 743 attr->page_size_caps = ecore_attr->page_size_caps; 744 attr->dev_ack_delay = ecore_attr->dev_ack_delay; 745 attr->reserved_lkey = ecore_attr->reserved_lkey; 746 attr->bad_pkey_counter = ecore_attr->bad_pkey_counter; 747 attr->max_stats_queues = ecore_attr->max_stats_queues; 748 749 return 0; 750 } 751 752 static int 753 qlnxr_init_hw(struct qlnxr_dev *dev) 754 { 755 struct ecore_rdma_events events; 756 struct ecore_rdma_add_user_out_params out_params; 757 struct ecore_rdma_cnq_params *cur_pbl; 758 struct ecore_rdma_start_in_params *in_params; 759 dma_addr_t p_phys_table; 760 u32 page_cnt; 761 int rc = 0; 762 int i; 763 qlnx_host_t *ha; 764 765 ha = dev->ha; 766 767 QL_DPRINT12(ha, "enter\n"); 768 769 in_params = kzalloc(sizeof(*in_params), GFP_KERNEL); 770 if (!in_params) { 771 rc = -ENOMEM; 772 goto out; 773 } 774 775 bzero(&out_params, sizeof(struct ecore_rdma_add_user_out_params)); 776 bzero(&events, sizeof(struct ecore_rdma_events)); 777 778 in_params->desired_cnq = dev->num_cnq; 779 780 for (i = 0; i < dev->num_cnq; i++) { 781 cur_pbl = &in_params->cnq_pbl_list[i]; 782 783 page_cnt = ecore_chain_get_page_cnt(&dev->cnq_array[i].pbl); 784 cur_pbl->num_pbl_pages = page_cnt; 785 786 p_phys_table = ecore_chain_get_pbl_phys(&dev->cnq_array[i].pbl); 787 cur_pbl->pbl_ptr = (u64)p_phys_table; 788 } 789 790 events.affiliated_event = qlnxr_affiliated_event; 791 events.unaffiliated_event = qlnxr_unaffiliated_event; 792 events.context = dev; 793 794 in_params->events = &events; 795 in_params->roce.cq_mode = ECORE_RDMA_CQ_MODE_32_BITS; 796 in_params->max_mtu = dev->ha->max_frame_size; 797 798 if (QLNX_IS_IWARP(dev)) { 799 if (delayed_ack) 800 in_params->iwarp.flags |= ECORE_IWARP_DA_EN; 801 802 if (timestamp) 803 in_params->iwarp.flags |= ECORE_IWARP_TS_EN; 804 805 in_params->iwarp.rcv_wnd_size = rcv_wnd_size*1024; 806 in_params->iwarp.crc_needed = crc_needed; 807 in_params->iwarp.ooo_num_rx_bufs = 808 (MAX_RXMIT_CONNS * in_params->iwarp.rcv_wnd_size) / 809 in_params->max_mtu; 810 811 in_params->iwarp.mpa_peer2peer = peer2peer; 812 in_params->iwarp.mpa_rev = 813 mpa_enhanced ? ECORE_MPA_REV2 : ECORE_MPA_REV1; 814 in_params->iwarp.mpa_rtr = rtr_type; 815 } 816 817 memcpy(&in_params->mac_addr[0], dev->ha->primary_mac, ETH_ALEN); 818 819 rc = ecore_rdma_start(dev->rdma_ctx, in_params); 820 if (rc) 821 goto out; 822 823 rc = ecore_rdma_add_user(dev->rdma_ctx, &out_params); 824 if (rc) 825 goto out; 826 827 dev->db_addr = (void *)(uintptr_t)out_params.dpi_addr; 828 dev->db_phys_addr = out_params.dpi_phys_addr; 829 dev->db_size = out_params.dpi_size; 830 dev->dpi = out_params.dpi; 831 832 qlnxr_set_device_attr(dev); 833 834 QL_DPRINT12(ha, 835 "cdev->doorbells = %p, db_phys_addr = %p db_size = 0x%x\n", 836 (void *)ha->cdev.doorbells, 837 (void *)ha->cdev.db_phys_addr, ha->cdev.db_size); 838 839 QL_DPRINT12(ha, 840 "db_addr = %p db_phys_addr = %p db_size = 0x%x dpi = 0x%x\n", 841 (void *)dev->db_addr, (void *)dev->db_phys_addr, 842 dev->db_size, dev->dpi); 843 out: 844 kfree(in_params); 845 846 QL_DPRINT12(ha, "exit\n"); 847 return rc; 848 } 849 850 static void 851 qlnxr_build_sgid_mac(union ib_gid *sgid, unsigned char *mac_addr, 852 bool is_vlan, u16 vlan_id) 853 { 854 sgid->global.subnet_prefix = OSAL_CPU_TO_BE64(0xfe80000000000000LL); 855 sgid->raw[8] = mac_addr[0] ^ 2; 856 sgid->raw[9] = mac_addr[1]; 857 sgid->raw[10] = mac_addr[2]; 858 if (is_vlan) { 859 sgid->raw[11] = vlan_id >> 8; 860 sgid->raw[12] = vlan_id & 0xff; 861 } else { 862 sgid->raw[11] = 0xff; 863 sgid->raw[12] = 0xfe; 864 } 865 sgid->raw[13] = mac_addr[3]; 866 sgid->raw[14] = mac_addr[4]; 867 sgid->raw[15] = mac_addr[5]; 868 } 869 static bool 870 qlnxr_add_sgid(struct qlnxr_dev *dev, union ib_gid *new_sgid); 871 872 static void 873 qlnxr_add_ip_based_gid(struct qlnxr_dev *dev, struct ifnet *ifp) 874 { 875 struct ifaddr *ifa; 876 union ib_gid gid; 877 878 CK_STAILQ_FOREACH(ifa, &ifp->if_addrhead, ifa_link) { 879 if (ifa->ifa_addr && ifa->ifa_addr->sa_family == AF_INET) { 880 QL_DPRINT12(dev->ha, "IP address : %x\n", ((struct sockaddr_in *) ifa->ifa_addr)->sin_addr.s_addr); 881 ipv6_addr_set_v4mapped( 882 ((struct sockaddr_in *) ifa->ifa_addr)->sin_addr.s_addr, 883 (struct in6_addr *)&gid); 884 QL_DPRINT12(dev->ha, "gid generated : %llx\n", gid); 885 886 qlnxr_add_sgid(dev, &gid); 887 } 888 } 889 for (int i = 0; i < 16; i++) { 890 QL_DPRINT12(dev->ha, "gid generated : %x\n", gid.raw[i]); 891 } 892 } 893 894 static bool 895 qlnxr_add_sgid(struct qlnxr_dev *dev, union ib_gid *new_sgid) 896 { 897 union ib_gid zero_sgid = { { 0 } }; 898 int i; 899 //unsigned long flags; 900 mtx_lock(&dev->sgid_lock); 901 for (i = 0; i < QLNXR_MAX_SGID; i++) { 902 if (!memcmp(&dev->sgid_tbl[i], &zero_sgid, 903 sizeof(union ib_gid))) { 904 /* found free entry */ 905 memcpy(&dev->sgid_tbl[i], new_sgid, 906 sizeof(union ib_gid)); 907 QL_DPRINT12(dev->ha, "copying sgid : %llx\n", 908 *new_sgid); 909 mtx_unlock(&dev->sgid_lock); 910 //TODO ib_dispatch event here? 911 return true; 912 } else if (!memcmp(&dev->sgid_tbl[i], new_sgid, 913 sizeof(union ib_gid))) { 914 /* entry already present, no addition required */ 915 mtx_unlock(&dev->sgid_lock); 916 QL_DPRINT12(dev->ha, "sgid present : %llx\n", 917 *new_sgid); 918 return false; 919 } 920 } 921 if (i == QLNXR_MAX_SGID) { 922 QL_DPRINT12(dev->ha, "didn't find an empty entry in sgid_tbl\n"); 923 } 924 mtx_unlock(&dev->sgid_lock); 925 return false; 926 } 927 928 static bool qlnxr_del_sgid(struct qlnxr_dev *dev, union ib_gid *gid) 929 { 930 int found = false; 931 int i; 932 //unsigned long flags; 933 934 QL_DPRINT12(dev->ha, "removing gid %llx %llx\n", 935 gid->global.interface_id, 936 gid->global.subnet_prefix); 937 mtx_lock(&dev->sgid_lock); 938 /* first is the default sgid which cannot be deleted */ 939 for (i = 1; i < QLNXR_MAX_SGID; i++) { 940 if (!memcmp(&dev->sgid_tbl[i], gid, sizeof(union ib_gid))) { 941 /* found matching entry */ 942 memset(&dev->sgid_tbl[i], 0, sizeof(union ib_gid)); 943 found = true; 944 break; 945 } 946 } 947 mtx_unlock(&dev->sgid_lock); 948 949 return found; 950 } 951 952 #if __FreeBSD_version < 1100000 953 954 static inline int 955 is_vlan_dev(struct ifnet *ifp) 956 { 957 return (ifp->if_type == IFT_L2VLAN); 958 } 959 960 static inline uint16_t 961 vlan_dev_vlan_id(struct ifnet *ifp) 962 { 963 uint16_t vtag; 964 965 if (VLAN_TAG(ifp, &vtag) == 0) 966 return (vtag); 967 968 return (0); 969 } 970 971 #endif /* #if __FreeBSD_version < 1100000 */ 972 973 static void 974 qlnxr_add_sgids(struct qlnxr_dev *dev) 975 { 976 qlnx_host_t *ha = dev->ha; 977 u16 vlan_id; 978 bool is_vlan; 979 union ib_gid vgid; 980 981 qlnxr_add_ip_based_gid(dev, ha->ifp); 982 /* MAC/VLAN base GIDs */ 983 is_vlan = is_vlan_dev(ha->ifp); 984 vlan_id = (is_vlan) ? vlan_dev_vlan_id(ha->ifp) : 0; 985 qlnxr_build_sgid_mac(&vgid, ha->primary_mac, is_vlan, vlan_id); 986 qlnxr_add_sgid(dev, &vgid); 987 } 988 989 static int 990 qlnxr_add_default_sgid(struct qlnxr_dev *dev) 991 { 992 /* GID Index 0 - Invariant manufacturer-assigned EUI-64 */ 993 union ib_gid *sgid = &dev->sgid_tbl[0]; 994 struct ecore_rdma_device *qattr; 995 qlnx_host_t *ha; 996 ha = dev->ha; 997 998 qattr = ecore_rdma_query_device(dev->rdma_ctx); 999 if(sgid == NULL) 1000 QL_DPRINT12(ha, "sgid = NULL?\n"); 1001 1002 sgid->global.subnet_prefix = OSAL_CPU_TO_BE64(0xfe80000000000000LL); 1003 QL_DPRINT12(ha, "node_guid = %llx", dev->attr.node_guid); 1004 memcpy(&sgid->raw[8], &qattr->node_guid, 1005 sizeof(qattr->node_guid)); 1006 //memcpy(&sgid->raw[8], &dev->attr.node_guid, 1007 // sizeof(dev->attr.node_guid)); 1008 QL_DPRINT12(ha, "DEFAULT sgid=[%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x]\n", 1009 sgid->raw[0], sgid->raw[1], sgid->raw[2], sgid->raw[3], sgid->raw[4], sgid->raw[5], 1010 sgid->raw[6], sgid->raw[7], sgid->raw[8], sgid->raw[9], sgid->raw[10], sgid->raw[11], 1011 sgid->raw[12], sgid->raw[13], sgid->raw[14], sgid->raw[15]); 1012 return 0; 1013 } 1014 1015 static int qlnxr_addr_event (struct qlnxr_dev *dev, 1016 unsigned long event, 1017 struct ifnet *ifp, 1018 union ib_gid *gid) 1019 { 1020 bool is_vlan = false; 1021 union ib_gid vgid; 1022 u16 vlan_id = 0xffff; 1023 1024 QL_DPRINT12(dev->ha, "Link event occured\n"); 1025 is_vlan = is_vlan_dev(dev->ha->ifp); 1026 vlan_id = (is_vlan) ? vlan_dev_vlan_id(dev->ha->ifp) : 0; 1027 1028 switch (event) { 1029 case NETDEV_UP : 1030 qlnxr_add_sgid(dev, gid); 1031 if (is_vlan) { 1032 qlnxr_build_sgid_mac(&vgid, dev->ha->primary_mac, is_vlan, vlan_id); 1033 qlnxr_add_sgid(dev, &vgid); 1034 } 1035 break; 1036 case NETDEV_DOWN : 1037 qlnxr_del_sgid(dev, gid); 1038 if (is_vlan) { 1039 qlnxr_build_sgid_mac(&vgid, dev->ha->primary_mac, is_vlan, vlan_id); 1040 qlnxr_del_sgid(dev, &vgid); 1041 } 1042 break; 1043 default : 1044 break; 1045 } 1046 return 1; 1047 } 1048 1049 static int qlnxr_inetaddr_event(struct notifier_block *notifier, 1050 unsigned long event, void *ptr) 1051 { 1052 struct ifaddr *ifa = ptr; 1053 union ib_gid gid; 1054 struct qlnxr_dev *dev = container_of(notifier, struct qlnxr_dev, nb_inet); 1055 qlnx_host_t *ha = dev->ha; 1056 1057 ipv6_addr_set_v4mapped( 1058 ((struct sockaddr_in *) ifa->ifa_addr)->sin_addr.s_addr, 1059 (struct in6_addr *)&gid); 1060 return qlnxr_addr_event(dev, event, ha->ifp, &gid); 1061 } 1062 1063 static int 1064 qlnxr_register_inet(struct qlnxr_dev *dev) 1065 { 1066 int ret; 1067 dev->nb_inet.notifier_call = qlnxr_inetaddr_event; 1068 ret = register_inetaddr_notifier(&dev->nb_inet); 1069 if (ret) { 1070 QL_DPRINT12(dev->ha, "Failed to register inetaddr\n"); 1071 return ret; 1072 } 1073 /* TODO : add for CONFIG_IPV6) */ 1074 return 0; 1075 } 1076 1077 static int 1078 qlnxr_build_sgid_tbl(struct qlnxr_dev *dev) 1079 { 1080 qlnxr_add_default_sgid(dev); 1081 qlnxr_add_sgids(dev); 1082 return 0; 1083 } 1084 1085 static struct qlnx_rdma_if qlnxr_drv; 1086 1087 static void * 1088 qlnxr_add(void *eth_dev) 1089 { 1090 struct qlnxr_dev *dev; 1091 int ret; 1092 //device_t pci_dev; 1093 qlnx_host_t *ha; 1094 1095 ha = eth_dev; 1096 1097 QL_DPRINT12(ha, "enter [ha = %p]\n", ha); 1098 1099 dev = (struct qlnxr_dev *)ib_alloc_device(sizeof(struct qlnxr_dev)); 1100 1101 if (dev == NULL) 1102 return (NULL); 1103 1104 dev->ha = eth_dev; 1105 dev->cdev = &ha->cdev; 1106 /* Added to extend Application support */ 1107 linux_pci_attach_device(dev->ha->pci_dev, NULL, NULL, &dev->pdev); 1108 1109 dev->rdma_ctx = &ha->cdev.hwfns[0]; 1110 dev->wq_multiplier = wq_multiplier; 1111 dev->num_cnq = QLNX_NUM_CNQ; 1112 1113 QL_DPRINT12(ha, 1114 "ha = %p dev = %p ha->cdev = %p\n", 1115 ha, dev, &ha->cdev); 1116 QL_DPRINT12(ha, 1117 "dev->cdev = %p dev->rdma_ctx = %p\n", 1118 dev->cdev, dev->rdma_ctx); 1119 1120 ret = qlnxr_alloc_resources(dev); 1121 1122 if (ret) 1123 goto qlnxr_add_err; 1124 1125 ret = qlnxr_setup_irqs(dev); 1126 1127 if (ret) { 1128 qlnxr_free_resources(dev); 1129 goto qlnxr_add_err; 1130 } 1131 1132 ret = qlnxr_init_hw(dev); 1133 1134 if (ret) { 1135 qlnxr_release_irqs(dev); 1136 qlnxr_free_resources(dev); 1137 goto qlnxr_add_err; 1138 } 1139 1140 qlnxr_register_device(dev); 1141 for (int i = 0; i < ARRAY_SIZE(qlnxr_class_attributes); ++i) { 1142 if (device_create_file(&dev->ibdev.dev, qlnxr_class_attributes[i])) 1143 goto sysfs_err; 1144 } 1145 qlnxr_build_sgid_tbl(dev); 1146 //ret = qlnxr_register_inet(dev); 1147 QL_DPRINT12(ha, "exit\n"); 1148 if (!test_and_set_bit(QLNXR_ENET_STATE_BIT, &dev->enet_state)) { 1149 QL_DPRINT12(ha, "dispatching IB_PORT_ACITVE event\n"); 1150 qlnxr_ib_dispatch_event(dev, QLNXR_PORT, 1151 IB_EVENT_PORT_ACTIVE); 1152 } 1153 1154 return (dev); 1155 sysfs_err: 1156 for (int i = 0; i < ARRAY_SIZE(qlnxr_class_attributes); ++i) { 1157 device_remove_file(&dev->ibdev.dev, qlnxr_class_attributes[i]); 1158 } 1159 ib_unregister_device(&dev->ibdev); 1160 1161 qlnxr_add_err: 1162 ib_dealloc_device(&dev->ibdev); 1163 1164 QL_DPRINT12(ha, "exit failed\n"); 1165 return (NULL); 1166 } 1167 1168 static void 1169 qlnxr_remove_sysfiles(struct qlnxr_dev *dev) 1170 { 1171 int i; 1172 for (i = 0; i < ARRAY_SIZE(qlnxr_class_attributes); ++i) 1173 device_remove_file(&dev->ibdev.dev, qlnxr_class_attributes[i]); 1174 } 1175 1176 static int 1177 qlnxr_remove(void *eth_dev, void *qlnx_rdma_dev) 1178 { 1179 struct qlnxr_dev *dev; 1180 qlnx_host_t *ha; 1181 1182 dev = qlnx_rdma_dev; 1183 ha = eth_dev; 1184 1185 if ((ha == NULL) || (dev == NULL)) 1186 return (0); 1187 1188 QL_DPRINT12(ha, "enter ha = %p qlnx_rdma_dev = %p pd_count = %d\n", 1189 ha, qlnx_rdma_dev, dev->pd_count); 1190 1191 qlnxr_ib_dispatch_event(dev, QLNXR_PORT, 1192 IB_EVENT_PORT_ERR); 1193 1194 if (QLNX_IS_IWARP(dev)) { 1195 if (dev->pd_count) 1196 return (EBUSY); 1197 } 1198 1199 ib_unregister_device(&dev->ibdev); 1200 1201 if (QLNX_IS_ROCE(dev)) { 1202 if (dev->pd_count) 1203 return (EBUSY); 1204 } 1205 1206 ecore_rdma_remove_user(dev->rdma_ctx, dev->dpi); 1207 ecore_rdma_stop(dev->rdma_ctx); 1208 1209 qlnxr_release_irqs(dev); 1210 1211 qlnxr_free_resources(dev); 1212 1213 qlnxr_remove_sysfiles(dev); 1214 ib_dealloc_device(&dev->ibdev); 1215 1216 linux_pci_detach_device(&dev->pdev); 1217 1218 QL_DPRINT12(ha, "exit ha = %p qlnx_rdma_dev = %p\n", ha, qlnx_rdma_dev); 1219 return (0); 1220 } 1221 1222 int 1223 qlnx_rdma_ll2_set_mac_filter(void *rdma_ctx, uint8_t *old_mac_address, 1224 uint8_t *new_mac_address) 1225 { 1226 struct ecore_hwfn *p_hwfn = rdma_ctx; 1227 struct qlnx_host *ha; 1228 int ret = 0; 1229 1230 ha = (struct qlnx_host *)(p_hwfn->p_dev); 1231 QL_DPRINT2(ha, "enter rdma_ctx (%p)\n", rdma_ctx); 1232 1233 if (old_mac_address) 1234 ecore_llh_remove_mac_filter(p_hwfn->p_dev, 0, old_mac_address); 1235 1236 if (new_mac_address) 1237 ret = ecore_llh_add_mac_filter(p_hwfn->p_dev, 0, new_mac_address); 1238 1239 QL_DPRINT2(ha, "exit rdma_ctx (%p)\n", rdma_ctx); 1240 return (ret); 1241 } 1242 1243 static void 1244 qlnxr_mac_address_change(struct qlnxr_dev *dev) 1245 { 1246 qlnx_host_t *ha; 1247 1248 ha = dev->ha; 1249 1250 QL_DPRINT12(ha, "enter/exit\n"); 1251 1252 return; 1253 } 1254 1255 static void 1256 qlnxr_notify(void *eth_dev, void *qlnx_rdma_dev, enum qlnx_rdma_event event) 1257 { 1258 struct qlnxr_dev *dev; 1259 qlnx_host_t *ha; 1260 1261 dev = qlnx_rdma_dev; 1262 1263 if (dev == NULL) 1264 return; 1265 1266 ha = dev->ha; 1267 1268 QL_DPRINT12(ha, "enter (%p, %d)\n", qlnx_rdma_dev, event); 1269 1270 switch (event) { 1271 case QLNX_ETHDEV_UP: 1272 if (!test_and_set_bit(QLNXR_ENET_STATE_BIT, &dev->enet_state)) 1273 qlnxr_ib_dispatch_event(dev, QLNXR_PORT, 1274 IB_EVENT_PORT_ACTIVE); 1275 break; 1276 1277 case QLNX_ETHDEV_CHANGE_ADDR: 1278 qlnxr_mac_address_change(dev); 1279 break; 1280 1281 case QLNX_ETHDEV_DOWN: 1282 if (test_and_set_bit(QLNXR_ENET_STATE_BIT, &dev->enet_state)) 1283 qlnxr_ib_dispatch_event(dev, QLNXR_PORT, 1284 IB_EVENT_PORT_ERR); 1285 break; 1286 } 1287 1288 QL_DPRINT12(ha, "exit (%p, %d)\n", qlnx_rdma_dev, event); 1289 return; 1290 } 1291 1292 static int 1293 qlnxr_mod_load(void) 1294 { 1295 int ret; 1296 1297 qlnxr_drv.add = qlnxr_add; 1298 qlnxr_drv.remove = qlnxr_remove; 1299 qlnxr_drv.notify = qlnxr_notify; 1300 1301 ret = qlnx_rdma_register_if(&qlnxr_drv); 1302 1303 return (ret); 1304 } 1305 1306 static int 1307 qlnxr_mod_unload(void) 1308 { 1309 int ret; 1310 1311 ret = qlnx_rdma_deregister_if(&qlnxr_drv); 1312 return (ret); 1313 } 1314 1315 static int 1316 qlnxr_event_handler(module_t mod, int event, void *arg) 1317 { 1318 1319 int ret = 0; 1320 1321 switch (event) { 1322 case MOD_LOAD: 1323 ret = qlnxr_mod_load(); 1324 break; 1325 1326 case MOD_UNLOAD: 1327 ret = qlnxr_mod_unload(); 1328 break; 1329 1330 default: 1331 break; 1332 } 1333 1334 return (ret); 1335 } 1336 1337 static moduledata_t qlnxr_mod_info = { 1338 .name = "qlnxr", 1339 .evhand = qlnxr_event_handler, 1340 }; 1341 1342 MODULE_VERSION(qlnxr, 1); 1343 MODULE_DEPEND(qlnxr, if_qlnxe, 1, 1, 1); 1344 MODULE_DEPEND(qlnxr, ibcore, 1, 1, 1); 1345 1346 #if __FreeBSD_version >= 1100000 1347 MODULE_DEPEND(qlnxr, linuxkpi, 1, 1, 1); 1348 #endif /* #if __FreeBSD_version >= 1100000 */ 1349 1350 DECLARE_MODULE(qlnxr, qlnxr_mod_info, SI_SUB_LAST, SI_ORDER_ANY);
Cache object: a0dcd672d0bea792c0c16a2f3c840c71
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]