Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/qlxgb/qla_os.c
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1 /* 2 * Copyright (c) 2010-2011 Qlogic Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * File: qla_os.c 30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include "qla_os.h" 37 #include "qla_reg.h" 38 #include "qla_hw.h" 39 #include "qla_def.h" 40 #include "qla_inline.h" 41 #include "qla_ver.h" 42 #include "qla_glbl.h" 43 #include "qla_dbg.h" 44 45 /* 46 * Some PCI Configuration Space Related Defines 47 */ 48 49 #ifndef PCI_VENDOR_QLOGIC 50 #define PCI_VENDOR_QLOGIC 0x1077 51 #endif 52 53 #ifndef PCI_PRODUCT_QLOGIC_ISP8020 54 #define PCI_PRODUCT_QLOGIC_ISP8020 0x8020 55 #endif 56 57 #define PCI_QLOGIC_ISP8020 \ 58 ((PCI_PRODUCT_QLOGIC_ISP8020 << 16) | PCI_VENDOR_QLOGIC) 59 60 /* 61 * static functions 62 */ 63 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 64 static void qla_free_parent_dma_tag(qla_host_t *ha); 65 static int qla_alloc_xmt_bufs(qla_host_t *ha); 66 static void qla_free_xmt_bufs(qla_host_t *ha); 67 static int qla_alloc_rcv_bufs(qla_host_t *ha); 68 static void qla_free_rcv_bufs(qla_host_t *ha); 69 70 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 71 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 72 static void qla_release(qla_host_t *ha); 73 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 74 int error); 75 static void qla_stop(qla_host_t *ha); 76 static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 77 static void qla_tx_done(void *context, int pending); 78 79 /* 80 * Hooks to the Operating Systems 81 */ 82 static int qla_pci_probe (device_t); 83 static int qla_pci_attach (device_t); 84 static int qla_pci_detach (device_t); 85 86 static void qla_init(void *arg); 87 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 88 static int qla_media_change(struct ifnet *ifp); 89 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 90 91 static device_method_t qla_pci_methods[] = { 92 /* Device interface */ 93 DEVMETHOD(device_probe, qla_pci_probe), 94 DEVMETHOD(device_attach, qla_pci_attach), 95 DEVMETHOD(device_detach, qla_pci_detach), 96 { 0, 0 } 97 }; 98 99 static driver_t qla_pci_driver = { 100 "ql", qla_pci_methods, sizeof (qla_host_t), 101 }; 102 103 static devclass_t qla80xx_devclass; 104 105 DRIVER_MODULE(qla80xx, pci, qla_pci_driver, qla80xx_devclass, 0, 0); 106 107 MODULE_DEPEND(qla80xx, pci, 1, 1, 1); 108 MODULE_DEPEND(qla80xx, ether, 1, 1, 1); 109 110 MALLOC_DEFINE(M_QLA8XXXBUF, "qla80xxbuf", "Buffers for qla80xx driver"); 111 112 uint32_t std_replenish = 8; 113 uint32_t jumbo_replenish = 2; 114 uint32_t rcv_pkt_thres = 128; 115 uint32_t rcv_pkt_thres_d = 32; 116 uint32_t snd_pkt_thres = 16; 117 uint32_t free_pkt_thres = (NUM_TX_DESCRIPTORS / 2); 118 119 static char dev_str[64]; 120 121 /* 122 * Name: qla_pci_probe 123 * Function: Validate the PCI device to be a QLA80XX device 124 */ 125 static int 126 qla_pci_probe(device_t dev) 127 { 128 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 129 case PCI_QLOGIC_ISP8020: 130 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 131 "Qlogic ISP 80xx PCI CNA Adapter-Ethernet Function", 132 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 133 QLA_VERSION_BUILD); 134 device_set_desc(dev, dev_str); 135 break; 136 default: 137 return (ENXIO); 138 } 139 140 if (bootverbose) 141 printf("%s: %s\n ", __func__, dev_str); 142 143 return (BUS_PROBE_DEFAULT); 144 } 145 146 static void 147 qla_add_sysctls(qla_host_t *ha) 148 { 149 device_t dev = ha->pci_dev; 150 151 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 152 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 153 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RD, 154 (void *)ha, 0, 155 qla_sysctl_get_stats, "I", "Statistics"); 156 157 dbg_level = 0; 158 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 159 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 160 OID_AUTO, "debug", CTLFLAG_RW, 161 &dbg_level, dbg_level, "Debug Level"); 162 163 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 164 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 165 OID_AUTO, "std_replenish", CTLFLAG_RW, 166 &std_replenish, std_replenish, 167 "Threshold for Replenishing Standard Frames"); 168 169 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 170 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 171 OID_AUTO, "jumbo_replenish", CTLFLAG_RW, 172 &jumbo_replenish, jumbo_replenish, 173 "Threshold for Replenishing Jumbo Frames"); 174 175 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 176 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 177 OID_AUTO, "rcv_pkt_thres", CTLFLAG_RW, 178 &rcv_pkt_thres, rcv_pkt_thres, 179 "Threshold for # of rcv pkts to trigger indication isr"); 180 181 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 182 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 183 OID_AUTO, "rcv_pkt_thres_d", CTLFLAG_RW, 184 &rcv_pkt_thres_d, rcv_pkt_thres_d, 185 "Threshold for # of rcv pkts to trigger indication defered"); 186 187 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 188 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 189 OID_AUTO, "snd_pkt_thres", CTLFLAG_RW, 190 &snd_pkt_thres, snd_pkt_thres, 191 "Threshold for # of snd packets"); 192 193 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 194 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 195 OID_AUTO, "free_pkt_thres", CTLFLAG_RW, 196 &free_pkt_thres, free_pkt_thres, 197 "Threshold for # of packets to free at a time"); 198 199 return; 200 } 201 202 static void 203 qla_watchdog(void *arg) 204 { 205 qla_host_t *ha = arg; 206 qla_hw_t *hw; 207 struct ifnet *ifp; 208 209 hw = &ha->hw; 210 ifp = ha->ifp; 211 212 if (ha->flags.qla_watchdog_exit) 213 return; 214 215 if (!ha->flags.qla_watchdog_pause) { 216 if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) { 217 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 218 } else if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 219 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 220 } 221 } 222 ha->watchdog_ticks = ha->watchdog_ticks++ % 1000; 223 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 224 qla_watchdog, ha); 225 } 226 227 /* 228 * Name: qla_pci_attach 229 * Function: attaches the device to the operating system 230 */ 231 static int 232 qla_pci_attach(device_t dev) 233 { 234 qla_host_t *ha = NULL; 235 uint32_t rsrc_len, i; 236 237 QL_DPRINT2((dev, "%s: enter\n", __func__)); 238 239 if ((ha = device_get_softc(dev)) == NULL) { 240 device_printf(dev, "cannot get softc\n"); 241 return (ENOMEM); 242 } 243 244 memset(ha, 0, sizeof (qla_host_t)); 245 246 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8020) { 247 device_printf(dev, "device is not ISP8020\n"); 248 return (ENXIO); 249 } 250 251 ha->pci_func = pci_get_function(dev); 252 253 ha->pci_dev = dev; 254 255 pci_enable_busmaster(dev); 256 257 ha->reg_rid = PCIR_BAR(0); 258 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 259 RF_ACTIVE); 260 261 if (ha->pci_reg == NULL) { 262 device_printf(dev, "unable to map any ports\n"); 263 goto qla_pci_attach_err; 264 } 265 266 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 267 ha->reg_rid); 268 269 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 270 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 271 mtx_init(&ha->rx_lock, "qla80xx_rx_lock", MTX_NETWORK_LOCK, MTX_DEF); 272 mtx_init(&ha->rxj_lock, "qla80xx_rxj_lock", MTX_NETWORK_LOCK, MTX_DEF); 273 ha->flags.lock_init = 1; 274 275 ha->msix_count = pci_msix_count(dev); 276 277 if (ha->msix_count < qla_get_msix_count(ha)) { 278 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 279 ha->msix_count); 280 goto qla_pci_attach_err; 281 } 282 283 QL_DPRINT2((dev, "%s: ha %p irq %p pci_func 0x%x rsrc_count 0x%08x" 284 " msix_count 0x%x pci_reg %p\n", __func__, ha, 285 ha->irq, ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 286 287 ha->msix_count = qla_get_msix_count(ha); 288 289 if (pci_alloc_msix(dev, &ha->msix_count)) { 290 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 291 ha->msix_count); 292 ha->msix_count = 0; 293 goto qla_pci_attach_err; 294 } 295 296 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 297 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 298 taskqueue_thread_enqueue, &ha->tx_tq); 299 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 300 device_get_nameunit(ha->pci_dev)); 301 302 for (i = 0; i < ha->msix_count; i++) { 303 ha->irq_vec[i].irq_rid = i+1; 304 ha->irq_vec[i].ha = ha; 305 306 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 307 &ha->irq_vec[i].irq_rid, 308 (RF_ACTIVE | RF_SHAREABLE)); 309 310 if (ha->irq_vec[i].irq == NULL) { 311 device_printf(dev, "could not allocate interrupt\n"); 312 goto qla_pci_attach_err; 313 } 314 315 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 316 (INTR_TYPE_NET | INTR_MPSAFE), 317 NULL, qla_isr, &ha->irq_vec[i], 318 &ha->irq_vec[i].handle)) { 319 device_printf(dev, "could not setup interrupt\n"); 320 goto qla_pci_attach_err; 321 } 322 323 TASK_INIT(&ha->irq_vec[i].rcv_task, 0, qla_rcv,\ 324 &ha->irq_vec[i]); 325 326 ha->irq_vec[i].rcv_tq = taskqueue_create_fast("qla_rcvq", 327 M_NOWAIT, taskqueue_thread_enqueue, 328 &ha->irq_vec[i].rcv_tq); 329 330 taskqueue_start_threads(&ha->irq_vec[i].rcv_tq, 1, PI_NET, 331 "%s rcvq", 332 device_get_nameunit(ha->pci_dev)); 333 } 334 335 qla_add_sysctls(ha); 336 337 /* add hardware specific sysctls */ 338 qla_hw_add_sysctls(ha); 339 340 /* initialize hardware */ 341 if (qla_init_hw(ha)) { 342 device_printf(dev, "%s: qla_init_hw failed\n", __func__); 343 goto qla_pci_attach_err; 344 } 345 346 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 347 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 348 ha->fw_ver_build); 349 350 //qla_get_hw_caps(ha); 351 qla_read_mac_addr(ha); 352 353 /* allocate parent dma tag */ 354 if (qla_alloc_parent_dma_tag(ha)) { 355 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 356 __func__); 357 goto qla_pci_attach_err; 358 } 359 360 /* alloc all dma buffers */ 361 if (qla_alloc_dma(ha)) { 362 device_printf(dev, "%s: qla_alloc_dma failed\n", __func__); 363 goto qla_pci_attach_err; 364 } 365 366 /* create the o.s ethernet interface */ 367 qla_init_ifnet(dev, ha); 368 369 ha->flags.qla_watchdog_active = 1; 370 ha->flags.qla_watchdog_pause = 1; 371 372 callout_init(&ha->tx_callout, TRUE); 373 374 /* create ioctl device interface */ 375 if (qla_make_cdev(ha)) { 376 device_printf(dev, "%s: qla_make_cdev failed\n", __func__); 377 goto qla_pci_attach_err; 378 } 379 380 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 381 qla_watchdog, ha); 382 383 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 384 return (0); 385 386 qla_pci_attach_err: 387 388 qla_release(ha); 389 390 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 391 return (ENXIO); 392 } 393 394 /* 395 * Name: qla_pci_detach 396 * Function: Unhooks the device from the operating system 397 */ 398 static int 399 qla_pci_detach(device_t dev) 400 { 401 qla_host_t *ha = NULL; 402 struct ifnet *ifp; 403 int i; 404 405 QL_DPRINT2((dev, "%s: enter\n", __func__)); 406 407 if ((ha = device_get_softc(dev)) == NULL) { 408 device_printf(dev, "cannot get softc\n"); 409 return (ENOMEM); 410 } 411 412 ifp = ha->ifp; 413 414 QLA_LOCK(ha, __func__); 415 qla_stop(ha); 416 QLA_UNLOCK(ha, __func__); 417 418 if (ha->tx_tq) { 419 taskqueue_drain(ha->tx_tq, &ha->tx_task); 420 taskqueue_free(ha->tx_tq); 421 } 422 423 for (i = 0; i < ha->msix_count; i++) { 424 taskqueue_drain(ha->irq_vec[i].rcv_tq, 425 &ha->irq_vec[i].rcv_task); 426 taskqueue_free(ha->irq_vec[i].rcv_tq); 427 } 428 429 qla_release(ha); 430 431 QL_DPRINT2((dev, "%s: exit\n", __func__)); 432 433 return (0); 434 } 435 436 /* 437 * SYSCTL Related Callbacks 438 */ 439 static int 440 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 441 { 442 int err, ret = 0; 443 qla_host_t *ha; 444 445 err = sysctl_handle_int(oidp, &ret, 0, req); 446 447 if (err) 448 return (err); 449 450 ha = (qla_host_t *)arg1; 451 //qla_get_stats(ha); 452 QL_DPRINT2((ha->pci_dev, "%s: called ret %d\n", __func__, ret)); 453 return (err); 454 } 455 456 457 /* 458 * Name: qla_release 459 * Function: Releases the resources allocated for the device 460 */ 461 static void 462 qla_release(qla_host_t *ha) 463 { 464 device_t dev; 465 int i; 466 467 dev = ha->pci_dev; 468 469 qla_del_cdev(ha); 470 471 if (ha->flags.qla_watchdog_active) 472 ha->flags.qla_watchdog_exit = 1; 473 474 callout_stop(&ha->tx_callout); 475 qla_mdelay(__func__, 100); 476 477 if (ha->ifp != NULL) 478 ether_ifdetach(ha->ifp); 479 480 qla_free_dma(ha); 481 qla_free_parent_dma_tag(ha); 482 483 for (i = 0; i < ha->msix_count; i++) { 484 if (ha->irq_vec[i].handle) 485 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 486 ha->irq_vec[i].handle); 487 if (ha->irq_vec[i].irq) 488 (void) bus_release_resource(dev, SYS_RES_IRQ, 489 ha->irq_vec[i].irq_rid, 490 ha->irq_vec[i].irq); 491 } 492 if (ha->msix_count) 493 pci_release_msi(dev); 494 495 if (ha->flags.lock_init) { 496 mtx_destroy(&ha->tx_lock); 497 mtx_destroy(&ha->rx_lock); 498 mtx_destroy(&ha->rxj_lock); 499 mtx_destroy(&ha->hw_lock); 500 } 501 502 if (ha->pci_reg) 503 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 504 ha->pci_reg); 505 } 506 507 /* 508 * DMA Related Functions 509 */ 510 511 static void 512 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 513 { 514 *((bus_addr_t *)arg) = 0; 515 516 if (error) { 517 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 518 return; 519 } 520 521 QL_ASSERT((nsegs == 1), ("%s: %d segments returned!", __func__, nsegs)); 522 523 *((bus_addr_t *)arg) = segs[0].ds_addr; 524 525 return; 526 } 527 528 int 529 qla_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 530 { 531 int ret = 0; 532 device_t dev; 533 bus_addr_t b_addr; 534 535 dev = ha->pci_dev; 536 537 QL_DPRINT2((dev, "%s: enter\n", __func__)); 538 539 ret = bus_dma_tag_create( 540 ha->parent_tag,/* parent */ 541 dma_buf->alignment, 542 ((bus_size_t)(1ULL << 32)),/* boundary */ 543 BUS_SPACE_MAXADDR, /* lowaddr */ 544 BUS_SPACE_MAXADDR, /* highaddr */ 545 NULL, NULL, /* filter, filterarg */ 546 dma_buf->size, /* maxsize */ 547 1, /* nsegments */ 548 dma_buf->size, /* maxsegsize */ 549 0, /* flags */ 550 NULL, NULL, /* lockfunc, lockarg */ 551 &dma_buf->dma_tag); 552 553 if (ret) { 554 device_printf(dev, "%s: could not create dma tag\n", __func__); 555 goto qla_alloc_dmabuf_exit; 556 } 557 ret = bus_dmamem_alloc(dma_buf->dma_tag, 558 (void **)&dma_buf->dma_b, 559 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 560 &dma_buf->dma_map); 561 if (ret) { 562 bus_dma_tag_destroy(dma_buf->dma_tag); 563 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 564 goto qla_alloc_dmabuf_exit; 565 } 566 567 ret = bus_dmamap_load(dma_buf->dma_tag, 568 dma_buf->dma_map, 569 dma_buf->dma_b, 570 dma_buf->size, 571 qla_dmamap_callback, 572 &b_addr, BUS_DMA_NOWAIT); 573 574 if (ret || !b_addr) { 575 bus_dma_tag_destroy(dma_buf->dma_tag); 576 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 577 dma_buf->dma_map); 578 ret = -1; 579 goto qla_alloc_dmabuf_exit; 580 } 581 582 dma_buf->dma_addr = b_addr; 583 584 qla_alloc_dmabuf_exit: 585 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 586 __func__, ret, (void *)dma_buf->dma_tag, 587 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 588 dma_buf->size)); 589 590 return ret; 591 } 592 593 void 594 qla_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 595 { 596 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 597 bus_dma_tag_destroy(dma_buf->dma_tag); 598 } 599 600 static int 601 qla_alloc_parent_dma_tag(qla_host_t *ha) 602 { 603 int ret; 604 device_t dev; 605 606 dev = ha->pci_dev; 607 608 /* 609 * Allocate parent DMA Tag 610 */ 611 ret = bus_dma_tag_create( 612 bus_get_dma_tag(dev), /* parent */ 613 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 614 BUS_SPACE_MAXADDR, /* lowaddr */ 615 BUS_SPACE_MAXADDR, /* highaddr */ 616 NULL, NULL, /* filter, filterarg */ 617 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 618 0, /* nsegments */ 619 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 620 0, /* flags */ 621 NULL, NULL, /* lockfunc, lockarg */ 622 &ha->parent_tag); 623 624 if (ret) { 625 device_printf(dev, "%s: could not create parent dma tag\n", 626 __func__); 627 return (-1); 628 } 629 630 ha->flags.parent_tag = 1; 631 632 return (0); 633 } 634 635 static void 636 qla_free_parent_dma_tag(qla_host_t *ha) 637 { 638 if (ha->flags.parent_tag) { 639 bus_dma_tag_destroy(ha->parent_tag); 640 ha->flags.parent_tag = 0; 641 } 642 } 643 644 /* 645 * Name: qla_init_ifnet 646 * Function: Creates the Network Device Interface and Registers it with the O.S 647 */ 648 649 static void 650 qla_init_ifnet(device_t dev, qla_host_t *ha) 651 { 652 struct ifnet *ifp; 653 654 QL_DPRINT2((dev, "%s: enter\n", __func__)); 655 656 ifp = ha->ifp = if_alloc(IFT_ETHER); 657 658 if (ifp == NULL) 659 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 660 661 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 662 663 ifp->if_mtu = ETHERMTU; 664 ifp->if_baudrate = (1 * 1000 * 1000 *1000); 665 ifp->if_init = qla_init; 666 ifp->if_softc = ha; 667 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 668 ifp->if_ioctl = qla_ioctl; 669 ifp->if_start = qla_start; 670 671 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 672 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 673 IFQ_SET_READY(&ifp->if_snd); 674 675 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 676 677 ether_ifattach(ifp, qla_get_mac_addr(ha)); 678 679 ifp->if_capabilities = IFCAP_HWCSUM | 680 IFCAP_TSO4 | 681 IFCAP_JUMBO_MTU; 682 683 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 684 685 #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) 686 ifp->if_timer = 0; 687 ifp->if_watchdog = NULL; 688 #endif /* #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) */ 689 690 ifp->if_capenable = ifp->if_capabilities; 691 692 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 693 694 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 695 696 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 697 NULL); 698 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 699 700 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 701 702 QL_DPRINT2((dev, "%s: exit\n", __func__)); 703 704 return; 705 } 706 707 static void 708 qla_init_locked(qla_host_t *ha) 709 { 710 struct ifnet *ifp = ha->ifp; 711 712 qla_stop(ha); 713 714 if (qla_alloc_xmt_bufs(ha) != 0) 715 return; 716 717 if (qla_alloc_rcv_bufs(ha) != 0) 718 return; 719 720 if (qla_config_lro(ha)) 721 return; 722 723 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 724 725 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 726 727 ha->flags.stop_rcv = 0; 728 if (qla_init_hw_if(ha) == 0) { 729 ifp = ha->ifp; 730 ifp->if_drv_flags |= IFF_DRV_RUNNING; 731 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 732 ha->flags.qla_watchdog_pause = 0; 733 } 734 735 return; 736 } 737 738 static void 739 qla_init(void *arg) 740 { 741 qla_host_t *ha; 742 743 ha = (qla_host_t *)arg; 744 745 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 746 747 QLA_LOCK(ha, __func__); 748 qla_init_locked(ha); 749 QLA_UNLOCK(ha, __func__); 750 751 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 752 } 753 754 static void 755 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 756 { 757 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 758 struct ifmultiaddr *ifma; 759 int mcnt = 0; 760 struct ifnet *ifp = ha->ifp; 761 762 if_maddr_rlock(ifp); 763 764 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 765 766 if (ifma->ifma_addr->sa_family != AF_LINK) 767 continue; 768 769 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 770 break; 771 772 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 773 &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 774 775 mcnt++; 776 } 777 778 if_maddr_runlock(ifp); 779 780 qla_hw_set_multi(ha, mta, mcnt, add_multi); 781 782 return; 783 } 784 785 static int 786 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 787 { 788 int ret = 0; 789 struct ifreq *ifr = (struct ifreq *)data; 790 struct ifaddr *ifa = (struct ifaddr *)data; 791 qla_host_t *ha; 792 793 ha = (qla_host_t *)ifp->if_softc; 794 795 switch (cmd) { 796 case SIOCSIFADDR: 797 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 798 __func__, cmd)); 799 800 if (ifa->ifa_addr->sa_family == AF_INET) { 801 ifp->if_flags |= IFF_UP; 802 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 803 QLA_LOCK(ha, __func__); 804 qla_init_locked(ha); 805 QLA_UNLOCK(ha, __func__); 806 } 807 QL_DPRINT4((ha->pci_dev, 808 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 809 __func__, cmd, ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 810 811 arp_ifinit(ifp, ifa); 812 if (ntohl(IA_SIN(ifa)->sin_addr.s_addr) != INADDR_ANY) { 813 qla_config_ipv4_addr(ha, 814 (IA_SIN(ifa)->sin_addr.s_addr)); 815 } 816 } else { 817 ether_ioctl(ifp, cmd, data); 818 } 819 break; 820 821 case SIOCSIFMTU: 822 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 823 __func__, cmd)); 824 825 if (ifr->ifr_mtu > QLA_MAX_FRAME_SIZE - ETHER_HDR_LEN) { 826 ret = EINVAL; 827 } else { 828 QLA_LOCK(ha, __func__); 829 ifp->if_mtu = ifr->ifr_mtu; 830 ha->max_frame_size = 831 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 832 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 833 ret = qla_set_max_mtu(ha, ha->max_frame_size, 834 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 835 } 836 QLA_UNLOCK(ha, __func__); 837 838 if (ret) 839 ret = EINVAL; 840 } 841 842 break; 843 844 case SIOCSIFFLAGS: 845 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 846 __func__, cmd)); 847 848 if (ifp->if_flags & IFF_UP) { 849 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 850 if ((ifp->if_flags ^ ha->if_flags) & 851 IFF_PROMISC) { 852 qla_set_promisc(ha); 853 } else if ((ifp->if_flags ^ ha->if_flags) & 854 IFF_ALLMULTI) { 855 qla_set_allmulti(ha); 856 } 857 } else { 858 QLA_LOCK(ha, __func__); 859 qla_init_locked(ha); 860 ha->max_frame_size = ifp->if_mtu + 861 ETHER_HDR_LEN + ETHER_CRC_LEN; 862 ret = qla_set_max_mtu(ha, ha->max_frame_size, 863 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 864 QLA_UNLOCK(ha, __func__); 865 } 866 } else { 867 QLA_LOCK(ha, __func__); 868 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 869 qla_stop(ha); 870 ha->if_flags = ifp->if_flags; 871 QLA_UNLOCK(ha, __func__); 872 } 873 break; 874 875 case SIOCADDMULTI: 876 QL_DPRINT4((ha->pci_dev, 877 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 878 879 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 880 qla_set_multi(ha, 1); 881 } 882 break; 883 884 case SIOCDELMULTI: 885 QL_DPRINT4((ha->pci_dev, 886 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 887 888 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 889 qla_set_multi(ha, 0); 890 } 891 break; 892 893 case SIOCSIFMEDIA: 894 case SIOCGIFMEDIA: 895 QL_DPRINT4((ha->pci_dev, 896 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 897 __func__, cmd)); 898 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 899 break; 900 901 case SIOCSIFCAP: 902 { 903 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 904 905 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 906 __func__, cmd)); 907 908 if (mask & IFCAP_HWCSUM) 909 ifp->if_capenable ^= IFCAP_HWCSUM; 910 if (mask & IFCAP_TSO4) 911 ifp->if_capenable ^= IFCAP_TSO4; 912 if (mask & IFCAP_TSO6) 913 ifp->if_capenable ^= IFCAP_TSO6; 914 if (mask & IFCAP_VLAN_HWTAGGING) 915 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 916 917 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 918 qla_init(ha); 919 920 VLAN_CAPABILITIES(ifp); 921 break; 922 } 923 924 default: 925 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 926 __func__, cmd)); 927 ret = ether_ioctl(ifp, cmd, data); 928 break; 929 } 930 931 return (ret); 932 } 933 934 static int 935 qla_media_change(struct ifnet *ifp) 936 { 937 qla_host_t *ha; 938 struct ifmedia *ifm; 939 int ret = 0; 940 941 ha = (qla_host_t *)ifp->if_softc; 942 943 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 944 945 ifm = &ha->media; 946 947 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 948 ret = EINVAL; 949 950 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 951 952 return (ret); 953 } 954 955 static void 956 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 957 { 958 qla_host_t *ha; 959 960 ha = (qla_host_t *)ifp->if_softc; 961 962 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 963 964 ifmr->ifm_status = IFM_AVALID; 965 ifmr->ifm_active = IFM_ETHER; 966 967 qla_update_link_state(ha); 968 if (ha->hw.flags.link_up) { 969 ifmr->ifm_status |= IFM_ACTIVE; 970 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 971 } 972 973 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 974 (ha->hw.flags.link_up ? "link_up" : "link_down"))); 975 976 return; 977 } 978 979 void 980 qla_start(struct ifnet *ifp) 981 { 982 struct mbuf *m_head; 983 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 984 985 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 986 987 if (!mtx_trylock(&ha->tx_lock)) { 988 QL_DPRINT8((ha->pci_dev, 989 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 990 return; 991 } 992 993 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 994 IFF_DRV_RUNNING) { 995 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 996 QLA_TX_UNLOCK(ha); 997 return; 998 } 999 1000 if (!ha->watchdog_ticks) 1001 qla_update_link_state(ha); 1002 1003 if (!ha->hw.flags.link_up) { 1004 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1005 QLA_TX_UNLOCK(ha); 1006 return; 1007 } 1008 1009 while (ifp->if_snd.ifq_head != NULL) { 1010 IF_DEQUEUE(&ifp->if_snd, m_head); 1011 1012 if (m_head == NULL) { 1013 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1014 __func__)); 1015 break; 1016 } 1017 1018 if (qla_send(ha, &m_head)) { 1019 if (m_head == NULL) 1020 break; 1021 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1022 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1023 IF_PREPEND(&ifp->if_snd, m_head); 1024 break; 1025 } 1026 /* Send a copy of the frame to the BPF listener */ 1027 ETHER_BPF_MTAP(ifp, m_head); 1028 } 1029 QLA_TX_UNLOCK(ha); 1030 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1031 return; 1032 } 1033 1034 static int 1035 qla_send(qla_host_t *ha, struct mbuf **m_headp) 1036 { 1037 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1038 bus_dmamap_t map; 1039 int nsegs; 1040 int ret = -1; 1041 uint32_t tx_idx; 1042 struct mbuf *m_head = *m_headp; 1043 1044 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1045 1046 if ((ret = bus_dmamap_create(ha->tx_tag, BUS_DMA_NOWAIT, &map))) { 1047 ha->err_tx_dmamap_create++; 1048 device_printf(ha->pci_dev, 1049 "%s: bus_dmamap_create failed[%d, %d]\n", 1050 __func__, ret, m_head->m_pkthdr.len); 1051 return (ret); 1052 } 1053 1054 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1055 BUS_DMA_NOWAIT); 1056 1057 if (ret == EFBIG) { 1058 1059 struct mbuf *m; 1060 1061 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1062 m_head->m_pkthdr.len)); 1063 1064 m = m_defrag(m_head, M_NOWAIT); 1065 if (m == NULL) { 1066 ha->err_tx_defrag++; 1067 m_freem(m_head); 1068 *m_headp = NULL; 1069 device_printf(ha->pci_dev, 1070 "%s: m_defrag() = NULL [%d]\n", 1071 __func__, ret); 1072 return (ENOBUFS); 1073 } 1074 m_head = m; 1075 1076 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1077 segs, &nsegs, BUS_DMA_NOWAIT))) { 1078 1079 ha->err_tx_dmamap_load++; 1080 1081 device_printf(ha->pci_dev, 1082 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1083 __func__, ret, m_head->m_pkthdr.len); 1084 1085 bus_dmamap_destroy(ha->tx_tag, map); 1086 if (ret != ENOMEM) { 1087 m_freem(m_head); 1088 *m_headp = NULL; 1089 } 1090 return (ret); 1091 } 1092 } else if (ret) { 1093 ha->err_tx_dmamap_load++; 1094 1095 device_printf(ha->pci_dev, 1096 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1097 __func__, ret, m_head->m_pkthdr.len); 1098 1099 bus_dmamap_destroy(ha->tx_tag, map); 1100 1101 if (ret != ENOMEM) { 1102 m_freem(m_head); 1103 *m_headp = NULL; 1104 } 1105 return (ret); 1106 } 1107 1108 QL_ASSERT((nsegs != 0), ("qla_send: empty packet")); 1109 1110 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1111 1112 if (!(ret = qla_hw_send(ha, segs, nsegs, &tx_idx, m_head))) { 1113 ha->tx_buf[tx_idx].m_head = m_head; 1114 ha->tx_buf[tx_idx].map = map; 1115 } else { 1116 if (ret == EINVAL) { 1117 m_freem(m_head); 1118 *m_headp = NULL; 1119 } 1120 } 1121 1122 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1123 return (ret); 1124 } 1125 1126 static void 1127 qla_stop(qla_host_t *ha) 1128 { 1129 struct ifnet *ifp = ha->ifp; 1130 device_t dev; 1131 1132 dev = ha->pci_dev; 1133 1134 ha->flags.qla_watchdog_pause = 1; 1135 qla_mdelay(__func__, 100); 1136 1137 ha->flags.stop_rcv = 1; 1138 qla_hw_stop_rcv(ha); 1139 1140 qla_del_hw_if(ha); 1141 1142 qla_free_lro(ha); 1143 1144 qla_free_xmt_bufs(ha); 1145 qla_free_rcv_bufs(ha); 1146 1147 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1148 1149 return; 1150 } 1151 1152 /* 1153 * Buffer Management Functions for Transmit and Receive Rings 1154 */ 1155 static int 1156 qla_alloc_xmt_bufs(qla_host_t *ha) 1157 { 1158 if (bus_dma_tag_create(NULL, /* parent */ 1159 1, 0, /* alignment, bounds */ 1160 BUS_SPACE_MAXADDR, /* lowaddr */ 1161 BUS_SPACE_MAXADDR, /* highaddr */ 1162 NULL, NULL, /* filter, filterarg */ 1163 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1164 QLA_MAX_SEGMENTS, /* nsegments */ 1165 PAGE_SIZE, /* maxsegsize */ 1166 BUS_DMA_ALLOCNOW, /* flags */ 1167 NULL, /* lockfunc */ 1168 NULL, /* lockfuncarg */ 1169 &ha->tx_tag)) { 1170 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1171 __func__); 1172 return (ENOMEM); 1173 } 1174 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1175 1176 return 0; 1177 } 1178 1179 /* 1180 * Release mbuf after it sent on the wire 1181 */ 1182 static void 1183 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1184 { 1185 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1186 1187 if (txb->m_head) { 1188 1189 bus_dmamap_unload(ha->tx_tag, txb->map); 1190 bus_dmamap_destroy(ha->tx_tag, txb->map); 1191 1192 m_freem(txb->m_head); 1193 txb->m_head = NULL; 1194 } 1195 1196 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1197 } 1198 1199 static void 1200 qla_free_xmt_bufs(qla_host_t *ha) 1201 { 1202 int i; 1203 1204 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1205 qla_clear_tx_buf(ha, &ha->tx_buf[i]); 1206 1207 if (ha->tx_tag != NULL) { 1208 bus_dma_tag_destroy(ha->tx_tag); 1209 ha->tx_tag = NULL; 1210 } 1211 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1212 1213 return; 1214 } 1215 1216 1217 static int 1218 qla_alloc_rcv_bufs(qla_host_t *ha) 1219 { 1220 int i, j, ret = 0; 1221 qla_rx_buf_t *rxb; 1222 1223 if (bus_dma_tag_create(NULL, /* parent */ 1224 1, 0, /* alignment, bounds */ 1225 BUS_SPACE_MAXADDR, /* lowaddr */ 1226 BUS_SPACE_MAXADDR, /* highaddr */ 1227 NULL, NULL, /* filter, filterarg */ 1228 MJUM9BYTES, /* maxsize */ 1229 1, /* nsegments */ 1230 MJUM9BYTES, /* maxsegsize */ 1231 BUS_DMA_ALLOCNOW, /* flags */ 1232 NULL, /* lockfunc */ 1233 NULL, /* lockfuncarg */ 1234 &ha->rx_tag)) { 1235 1236 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1237 __func__); 1238 1239 return (ENOMEM); 1240 } 1241 1242 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1243 bzero((void *)ha->rx_jbuf, 1244 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1245 1246 for (i = 0; i < MAX_SDS_RINGS; i++) { 1247 ha->hw.sds[i].sdsr_next = 0; 1248 ha->hw.sds[i].rxb_free = NULL; 1249 ha->hw.sds[i].rx_free = 0; 1250 ha->hw.sds[i].rxjb_free = NULL; 1251 ha->hw.sds[i].rxj_free = 0; 1252 } 1253 1254 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1255 1256 rxb = &ha->rx_buf[i]; 1257 1258 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1259 1260 if (ret) { 1261 device_printf(ha->pci_dev, 1262 "%s: dmamap[%d] failed\n", __func__, i); 1263 1264 for (j = 0; j < i; j++) { 1265 bus_dmamap_destroy(ha->rx_tag, 1266 ha->rx_buf[j].map); 1267 } 1268 goto qla_alloc_rcv_bufs_failed; 1269 } 1270 } 1271 1272 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_NORMAL); 1273 1274 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1275 rxb = &ha->rx_buf[i]; 1276 rxb->handle = i; 1277 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 0))) { 1278 /* 1279 * set the physical address in the corresponding 1280 * descriptor entry in the receive ring/queue for the 1281 * hba 1282 */ 1283 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_NORMAL, i, 1284 rxb->handle, rxb->paddr, 1285 (rxb->m_head)->m_pkthdr.len); 1286 } else { 1287 device_printf(ha->pci_dev, 1288 "%s: qla_get_mbuf [standard(%d)] failed\n", 1289 __func__, i); 1290 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1291 goto qla_alloc_rcv_bufs_failed; 1292 } 1293 } 1294 1295 1296 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1297 1298 rxb = &ha->rx_jbuf[i]; 1299 1300 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1301 1302 if (ret) { 1303 device_printf(ha->pci_dev, 1304 "%s: dmamap[%d] failed\n", __func__, i); 1305 1306 for (j = 0; j < i; j++) { 1307 bus_dmamap_destroy(ha->rx_tag, 1308 ha->rx_jbuf[j].map); 1309 } 1310 goto qla_alloc_rcv_bufs_failed; 1311 } 1312 } 1313 1314 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_JUMBO); 1315 1316 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1317 rxb = &ha->rx_jbuf[i]; 1318 rxb->handle = i; 1319 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 1))) { 1320 /* 1321 * set the physical address in the corresponding 1322 * descriptor entry in the receive ring/queue for the 1323 * hba 1324 */ 1325 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_JUMBO, i, 1326 rxb->handle, rxb->paddr, 1327 (rxb->m_head)->m_pkthdr.len); 1328 } else { 1329 device_printf(ha->pci_dev, 1330 "%s: qla_get_mbuf [jumbo(%d)] failed\n", 1331 __func__, i); 1332 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1333 goto qla_alloc_rcv_bufs_failed; 1334 } 1335 } 1336 1337 return (0); 1338 1339 qla_alloc_rcv_bufs_failed: 1340 qla_free_rcv_bufs(ha); 1341 return (ret); 1342 } 1343 1344 static void 1345 qla_free_rcv_bufs(qla_host_t *ha) 1346 { 1347 int i; 1348 qla_rx_buf_t *rxb; 1349 1350 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1351 rxb = &ha->rx_buf[i]; 1352 if (rxb->m_head != NULL) { 1353 bus_dmamap_unload(ha->rx_tag, rxb->map); 1354 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1355 m_freem(rxb->m_head); 1356 rxb->m_head = NULL; 1357 } 1358 } 1359 1360 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1361 rxb = &ha->rx_jbuf[i]; 1362 if (rxb->m_head != NULL) { 1363 bus_dmamap_unload(ha->rx_tag, rxb->map); 1364 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1365 m_freem(rxb->m_head); 1366 rxb->m_head = NULL; 1367 } 1368 } 1369 1370 if (ha->rx_tag != NULL) { 1371 bus_dma_tag_destroy(ha->rx_tag); 1372 ha->rx_tag = NULL; 1373 } 1374 1375 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1376 bzero((void *)ha->rx_jbuf, 1377 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1378 1379 for (i = 0; i < MAX_SDS_RINGS; i++) { 1380 ha->hw.sds[i].sdsr_next = 0; 1381 ha->hw.sds[i].rxb_free = NULL; 1382 ha->hw.sds[i].rx_free = 0; 1383 ha->hw.sds[i].rxjb_free = NULL; 1384 ha->hw.sds[i].rxj_free = 0; 1385 } 1386 1387 return; 1388 } 1389 1390 int 1391 qla_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp, 1392 uint32_t jumbo) 1393 { 1394 register struct mbuf *mp = nmp; 1395 struct ifnet *ifp; 1396 int ret = 0; 1397 uint32_t offset; 1398 1399 QL_DPRINT2((ha->pci_dev, "%s: jumbo(0x%x) enter\n", __func__, jumbo)); 1400 1401 ifp = ha->ifp; 1402 1403 if (mp == NULL) { 1404 1405 if (!jumbo) { 1406 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1407 1408 if (mp == NULL) { 1409 ha->err_m_getcl++; 1410 ret = ENOBUFS; 1411 device_printf(ha->pci_dev, 1412 "%s: m_getcl failed\n", __func__); 1413 goto exit_qla_get_mbuf; 1414 } 1415 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1416 } else { 1417 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, 1418 MJUM9BYTES); 1419 if (mp == NULL) { 1420 ha->err_m_getjcl++; 1421 ret = ENOBUFS; 1422 device_printf(ha->pci_dev, 1423 "%s: m_getjcl failed\n", __func__); 1424 goto exit_qla_get_mbuf; 1425 } 1426 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1427 } 1428 } else { 1429 if (!jumbo) 1430 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1431 else 1432 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1433 1434 mp->m_data = mp->m_ext.ext_buf; 1435 mp->m_next = NULL; 1436 } 1437 1438 1439 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1440 if (offset) { 1441 offset = 8 - offset; 1442 m_adj(mp, offset); 1443 } 1444 1445 /* 1446 * Using memory from the mbuf cluster pool, invoke the bus_dma 1447 * machinery to arrange the memory mapping. 1448 */ 1449 ret = bus_dmamap_load(ha->rx_tag, rxb->map, 1450 mtod(mp, void *), mp->m_len, 1451 qla_dmamap_callback, &rxb->paddr, 1452 BUS_DMA_NOWAIT); 1453 if (ret || !rxb->paddr) { 1454 m_free(mp); 1455 rxb->m_head = NULL; 1456 device_printf(ha->pci_dev, 1457 "%s: bus_dmamap_load failed\n", __func__); 1458 ret = -1; 1459 goto exit_qla_get_mbuf; 1460 } 1461 rxb->m_head = mp; 1462 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1463 1464 exit_qla_get_mbuf: 1465 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1466 return (ret); 1467 } 1468 1469 static void 1470 qla_tx_done(void *context, int pending) 1471 { 1472 qla_host_t *ha = context; 1473 1474 qla_hw_tx_done(ha); 1475 qla_start(ha->ifp); 1476 } 1477
Cache object: 01ddcc6ce8720a7343f2be0215f2cca0
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