The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/raid/twe/twereg.h

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    1 /*-
    2  * Copyright (c) 2000 Michael Smith
    3  * Copyright (c) 2003 Paul Saab
    4  * Copyright (c) 2003 Vinod Kashyap
    5  * Copyright (c) 2000 BSDi
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  *      $FreeBSD: src/sys/dev/twe/twereg.h,v 1.12 2012/11/17 01:52:19 svnexp Exp $
   30  */
   31 
   32 /* 
   33  * Register names, bit definitions, structure names and members are
   34  * identical with those in the Linux driver where possible and sane 
   35  * for simplicity's sake.  (The TW_ prefix has become TWE_)
   36  * Some defines that are clearly irrelevant to FreeBSD have been
   37  * removed.
   38  */
   39 
   40 /* control register bit definitions */
   41 #define TWE_CONTROL_CLEAR_HOST_INTERRUPT        0x00080000
   42 #define TWE_CONTROL_CLEAR_ATTENTION_INTERRUPT   0x00040000
   43 #define TWE_CONTROL_MASK_COMMAND_INTERRUPT      0x00020000
   44 #define TWE_CONTROL_MASK_RESPONSE_INTERRUPT     0x00010000
   45 #define TWE_CONTROL_UNMASK_COMMAND_INTERRUPT    0x00008000
   46 #define TWE_CONTROL_UNMASK_RESPONSE_INTERRUPT   0x00004000
   47 #define TWE_CONTROL_CLEAR_ERROR_STATUS          0x00000200
   48 #define TWE_CONTROL_ISSUE_SOFT_RESET            0x00000100
   49 #define TWE_CONTROL_ENABLE_INTERRUPTS           0x00000080
   50 #define TWE_CONTROL_DISABLE_INTERRUPTS          0x00000040
   51 #define TWE_CONTROL_ISSUE_HOST_INTERRUPT        0x00000020
   52 #define TWE_CONTROL_CLEAR_PARITY_ERROR          0x00800000
   53 #define TWE_CONTROL_CLEAR_PCI_ABORT             0x00100000
   54 
   55 #define TWE_SOFT_RESET(sc)      TWE_CONTROL(sc, TWE_CONTROL_ISSUE_SOFT_RESET |          \
   56                                            TWE_CONTROL_CLEAR_HOST_INTERRUPT |           \
   57                                            TWE_CONTROL_CLEAR_ATTENTION_INTERRUPT |      \
   58                                            TWE_CONTROL_MASK_COMMAND_INTERRUPT |         \
   59                                            TWE_CONTROL_MASK_RESPONSE_INTERRUPT |        \
   60                                            TWE_CONTROL_CLEAR_ERROR_STATUS |             \
   61                                            TWE_CONTROL_DISABLE_INTERRUPTS)
   62 
   63 /* status register bit definitions */
   64 #define TWE_STATUS_MAJOR_VERSION_MASK           0xF0000000
   65 #define TWE_STATUS_MINOR_VERSION_MASK           0x0F000000
   66 #define TWE_STATUS_PCI_PARITY_ERROR             0x00800000
   67 #define TWE_STATUS_QUEUE_ERROR                  0x00400000
   68 #define TWE_STATUS_MICROCONTROLLER_ERROR        0x00200000
   69 #define TWE_STATUS_PCI_ABORT                    0x00100000
   70 #define TWE_STATUS_HOST_INTERRUPT               0x00080000
   71 #define TWE_STATUS_ATTENTION_INTERRUPT          0x00040000
   72 #define TWE_STATUS_COMMAND_INTERRUPT            0x00020000
   73 #define TWE_STATUS_RESPONSE_INTERRUPT           0x00010000
   74 #define TWE_STATUS_COMMAND_QUEUE_FULL           0x00008000
   75 #define TWE_STATUS_RESPONSE_QUEUE_EMPTY         0x00004000
   76 #define TWE_STATUS_MICROCONTROLLER_READY        0x00002000
   77 #define TWE_STATUS_COMMAND_QUEUE_EMPTY          0x00001000
   78 #define TWE_STATUS_ALL_INTERRUPTS               0x000F0000
   79 #define TWE_STATUS_CLEARABLE_BITS               0x00D00000
   80 #define TWE_STATUS_EXPECTED_BITS                0x00002000
   81 #define TWE_STATUS_UNEXPECTED_BITS              0x00F80000
   82 
   83 /* XXX this is a little harsh, but necessary to chase down firmware problems */
   84 #define TWE_STATUS_PANIC_BITS                   (TWE_STATUS_MICROCONTROLLER_ERROR)
   85 
   86 /* for use with the %b kprintf format */
   87 #define TWE_STATUS_BITS_DESCRIPTION \
   88         "\2\15CQEMPTY\16UCREADY\17RQEMPTY\20CQFULL\21RINTR\22CINTR\23AINTR\24HINTR\25PCIABRT\26MCERR\27QERR\30PCIPERR\n"
   89 
   90 /* detect inconsistencies in the status register */
   91 #define TWE_STATUS_ERRORS(x)                            \
   92         (((x & TWE_STATUS_PCI_ABORT)            ||      \
   93           (x & TWE_STATUS_PCI_PARITY_ERROR)     ||      \
   94           (x & TWE_STATUS_QUEUE_ERROR)          ||      \
   95           (x & TWE_STATUS_MICROCONTROLLER_ERROR)) &&    \
   96          (x & TWE_STATUS_MICROCONTROLLER_READY))
   97 
   98 /* Response queue bit definitions */
   99 #define TWE_RESPONSE_ID_MASK            0x00000FF0
  100 
  101 /* PCI related defines */
  102 #define TWE_IO_CONFIG_REG               0x10
  103 #define TWE_DEVICE_NAME                 "3ware Storage Controller"
  104 #define TWE_VENDOR_ID                   0x13C1
  105 #define TWE_DEVICE_ID                   0x1000
  106 #define TWE_DEVICE_ID_ASIC              0x1001
  107 #define TWE_PCI_CLEAR_PARITY_ERROR      0xc100
  108 #define TWE_PCI_CLEAR_PCI_ABORT         0x2000
  109 
  110 /* command packet opcodes */
  111 #define TWE_OP_NOP                      0x00
  112 #define TWE_OP_INIT_CONNECTION          0x01
  113 #define TWE_OP_READ                     0x02
  114 #define TWE_OP_WRITE                    0x03
  115 #define TWE_OP_READVERIFY               0x04
  116 #define TWE_OP_VERIFY                   0x05
  117 #define TWE_OP_ZEROUNIT                 0x08
  118 #define TWE_OP_REPLACEUNIT              0x09
  119 #define TWE_OP_HOTSWAP                  0x0a
  120 #define TWE_OP_SETATAFEATURE            0x0c
  121 #define TWE_OP_FLUSH                    0x0e
  122 #define TWE_OP_ABORT                    0x0f
  123 #define TWE_OP_CHECKSTATUS              0x10
  124 #define TWE_OP_ATA_PASSTHROUGH          0x11
  125 #define TWE_OP_GET_PARAM                0x12
  126 #define TWE_OP_SET_PARAM                0x13
  127 #define TWE_OP_CREATEUNIT               0x14
  128 #define TWE_OP_DELETEUNIT               0x15
  129 #define TWE_OP_REBUILDUNIT              0x17
  130 #define TWE_OP_SECTOR_INFO              0x1a
  131 #define TWE_OP_AEN_LISTEN               0x1c
  132 #define TWE_OP_CMD_PACKET               0x1d
  133 #define TWE_OP_CMD_WITH_DATA            0x1f
  134 
  135 /* command status values */
  136 #define TWE_STATUS_RESET                0xff    /* controller requests reset */
  137 #define TWE_STATUS_FATAL                0xc0    /* fatal errors not requiring reset */
  138 #define TWE_STATUS_WARNING              0x80    /* warnings */
  139 #define TWE_STAUS_INFO                  0x40    /* informative status */
  140 
  141 /* misc defines */
  142 #define TWE_ALIGNMENT                   0x200
  143 #define TWE_ALIGNMASK                   (TWE_ALIGNMENT - 1)
  144 #define TWE_MAX_UNITS                   16
  145 #define TWE_COMMAND_ALIGNMENT_MASK      0x1ff
  146 #define TWE_INIT_MESSAGE_CREDITS        0xff    /* older firmware has issues with 256 commands */
  147 #define TWE_SHUTDOWN_MESSAGE_CREDITS    0x001
  148 #define TWE_INIT_COMMAND_PACKET_SIZE    0x3
  149 #define TWE_MAX_SGL_LENGTH              62
  150 #define TWE_MAX_ATA_SGL_LENGTH          60
  151 #define TWE_MAX_PASSTHROUGH             4096
  152 #define TWE_Q_LENGTH                    TWE_INIT_MESSAGE_CREDITS
  153 #define TWE_Q_START                     0
  154 #define TWE_MAX_RESET_TRIES             3
  155 #define TWE_BLOCK_SIZE                  0x200   /* 512-byte blocks */
  156 #define TWE_SECTOR_SIZE                 0x200   /* generic I/O bufffer */
  157 #define TWE_IOCTL                       0x80
  158 #define TWE_MAX_AEN_TRIES               100
  159 #define TWE_UNIT_ONLINE                 1
  160 
  161 /* scatter/gather list entry */
  162 typedef struct
  163 {
  164     u_int32_t   address;
  165     u_int32_t   length;
  166 } __packed TWE_SG_Entry;
  167 
  168 typedef struct {
  169     u_int8_t    opcode:5;               /* TWE_OP_INITCONNECTION */
  170     u_int8_t    res1:3;         
  171     u_int8_t    size;
  172     u_int8_t    request_id;
  173     u_int8_t    res2:4;
  174     u_int8_t    host_id:4;
  175     u_int8_t    status;
  176     u_int8_t    flags;
  177     u_int16_t   message_credits;
  178     u_int32_t   response_queue_pointer;
  179 } __packed TWE_Command_INITCONNECTION;
  180 
  181 typedef struct
  182 {
  183     u_int8_t    opcode:5;               /* TWE_OP_READ/TWE_OP_WRITE */
  184     u_int8_t    res1:3;
  185     u_int8_t    size;
  186     u_int8_t    request_id;
  187     u_int8_t    unit:4;
  188     u_int8_t    host_id:4;
  189     u_int8_t    status;
  190     u_int8_t    flags;
  191     u_int16_t   block_count;
  192     u_int32_t   lba;
  193     TWE_SG_Entry sgl[TWE_MAX_SGL_LENGTH];
  194 } __packed TWE_Command_IO;
  195 
  196 typedef struct
  197 {
  198     u_int8_t    opcode:5;               /* TWE_OP_HOTSWAP */
  199     u_int8_t    res1:3;
  200     u_int8_t    size;
  201     u_int8_t    request_id;
  202     u_int8_t    unit:4;
  203     u_int8_t    host_id:4;
  204     u_int8_t    status;
  205     u_int8_t    flags;
  206     u_int8_t    action;
  207 #define TWE_OP_HOTSWAP_REMOVE           0x00    /* remove assumed-degraded unit */
  208 #define TWE_OP_HOTSWAP_ADD_CBOD         0x01    /* add CBOD to empty port */
  209 #define TWE_OP_HOTSWAP_ADD_SPARE        0x02    /* add spare to empty port */
  210     u_int8_t    aport;
  211 } __packed TWE_Command_HOTSWAP;
  212 
  213 typedef struct
  214 {
  215     u_int8_t    opcode:5;               /* TWE_OP_SETATAFEATURE */
  216     u_int8_t    res1:3;
  217     u_int8_t    size;
  218     u_int8_t    request_id;
  219     u_int8_t    unit:4;
  220     u_int8_t    host_id:4;
  221     u_int8_t    status;
  222     u_int8_t    flags;
  223     u_int8_t    feature;
  224 #define TWE_OP_SETATAFEATURE_WCE        0x02
  225 #define TWE_OP_SETATAFEATURE_DIS_WCE    0x82
  226     u_int8_t    feature_mode;
  227     u_int16_t   all_units;
  228     u_int16_t   persistence;
  229 } __packed TWE_Command_SETATAFEATURE;
  230 
  231 typedef struct
  232 {
  233     u_int8_t    opcode:5;               /* TWE_OP_CHECKSTATUS */
  234     u_int8_t    res1:3;
  235     u_int8_t    size;
  236     u_int8_t    request_id;
  237     u_int8_t    unit:4;
  238     u_int8_t    res2:4;
  239     u_int8_t    status;
  240     u_int8_t    flags;
  241     u_int16_t   target_status;          /* set low byte to target request's ID */
  242 } __packed TWE_Command_CHECKSTATUS;
  243 
  244 typedef struct
  245 {
  246     u_int8_t    opcode:5;               /* TWE_OP_GETPARAM, TWE_OP_SETPARAM */
  247     u_int8_t    res1:3;
  248     u_int8_t    size;
  249     u_int8_t    request_id;
  250     u_int8_t    unit:4;
  251     u_int8_t    host_id:4;
  252     u_int8_t    status;
  253     u_int8_t    flags;
  254     u_int16_t   param_count;
  255     TWE_SG_Entry sgl[TWE_MAX_SGL_LENGTH];
  256 } __packed TWE_Command_PARAM;
  257 
  258 typedef struct
  259 {
  260     u_int8_t    opcode:5;               /* TWE_OP_REBUILDUNIT */
  261     u_int8_t    res1:3;
  262     u_int8_t    size;
  263     u_int8_t    request_id;
  264     u_int8_t    src_unit:4;
  265     u_int8_t    host_id:4;
  266     u_int8_t    status;
  267     u_int8_t    flags;
  268     u_int8_t    action:7;
  269 #define TWE_OP_REBUILDUNIT_NOP          0
  270 #define TWE_OP_REBUILDUNIT_STOP         2       /* stop all rebuilds */
  271 #define TWE_OP_REBUILDUNIT_START        4       /* start rebuild with lowest unit */
  272 #define TWE_OP_REBUILDUNIT_STARTUNIT    5       /* rebuild src_unit (not supported) */
  273     u_int8_t    cs:1;                           /* request state change on src_unit */
  274     u_int8_t    logical_subunit;                /* for RAID10 rebuild of logical subunit */
  275 } __packed TWE_Command_REBUILDUNIT;
  276 
  277 typedef struct
  278 {
  279     u_int8_t    opcode:5;
  280     u_int8_t    sgl_offset:3;
  281     u_int8_t    size;
  282     u_int8_t    request_id;
  283     u_int8_t    unit:4;
  284     u_int8_t    host_id:4;
  285     u_int8_t    status;
  286     u_int8_t    flags;
  287     u_int16_t   param;
  288     u_int16_t   features;
  289     u_int16_t   sector_count;
  290     u_int16_t   sector_num;
  291     u_int16_t   cylinder_lo;
  292     u_int16_t   cylinder_hi;
  293     u_int8_t    drive_head;
  294     u_int8_t    command;
  295     TWE_SG_Entry sgl[TWE_MAX_ATA_SGL_LENGTH];
  296 } __packed TWE_Command_ATA;
  297 
  298 typedef struct
  299 {
  300     u_int8_t    opcode:5;
  301     u_int8_t    sgl_offset:3;
  302     u_int8_t    size;
  303     u_int8_t    request_id;
  304     u_int8_t    unit:4;
  305     u_int8_t    host_id:4;
  306     u_int8_t    status;
  307     u_int8_t    flags;
  308 #define TWE_FLAGS_SUCCESS       0x00
  309 #define TWE_FLAGS_INFORMATIONAL 0x01
  310 #define TWE_FLAGS_WARNING       0x02
  311 #define TWE_FLAGS_FATAL         0x03
  312 #define TWE_FLAGS_PERCENTAGE    (1<<8)  /* bits 0-6 indicate completion percentage */
  313     u_int16_t   count;                  /* block count, parameter count, message credits */
  314 } __packed TWE_Command_Generic;
  315 
  316 /* command packet - must be TWE_ALIGNMENT aligned */
  317 typedef union
  318 {
  319     TWE_Command_INITCONNECTION  initconnection;
  320     TWE_Command_IO              io;
  321     TWE_Command_PARAM           param;
  322     TWE_Command_CHECKSTATUS     checkstatus;
  323     TWE_Command_REBUILDUNIT     rebuildunit;
  324     TWE_Command_SETATAFEATURE   setatafeature;
  325     TWE_Command_ATA             ata;
  326     TWE_Command_Generic         generic;
  327     u_int8_t                    pad[512];
  328 } TWE_Command;
  329 
  330 /* response queue entry */
  331 typedef union
  332 {
  333     struct 
  334     {
  335         u_int32_t       undefined_1:4;
  336         u_int32_t       response_id:8;
  337         u_int32_t       undefined_2:20;
  338     } u;
  339     u_int32_t   value;
  340 } TWE_Response_Queue;
  341 
  342 /*
  343  * From 3ware's documentation:
  344  *   All parameters maintained by the controller are grouped into related tables.
  345  *   Tables are are accessed indirectly via get and set parameter commands.
  346  *   To access a specific parameter in a table, the table ID and parameter index
  347  *   are used to uniquely identify a parameter.  Table 0xffff is the directory
  348  *   table and provides a list of the table IDs and sizes of all other tables.
  349  *   Index zero in each table specifies the entire table, and index one specifies
  350  *   the size of the table.  An entire table can be read or set by using index zero.
  351  */
  352 
  353 #define TWE_PARAM_PARAM_ALL     0
  354 #define TWE_PARAM_PARAM_SIZE    1
  355 
  356 #define TWE_PARAM_DIRECTORY     0xffff                  /* size is 4 * number of tables */
  357 #define TWE_PARAM_DIRECTORY_TABLES              2       /* 16 bits * number of tables */
  358 #define TWE_PARAM_DIRECTORY_SIZES               3       /* 16 bits * number of tables */
  359 
  360 #define TWE_PARAM_DRIVESUMMARY  0x0002
  361 #define TWE_PARAM_DRIVESUMMARY_Num              2       /* number of physical drives [2] */
  362 #define TWE_PARAM_DRIVESUMMARY_Status           3       /* array giving drive status per aport */
  363 #define TWE_PARAM_DRIVESTATUS_Missing   0x00
  364 #define TWE_PARAM_DRIVESTATUS_NotSupp   0xfe
  365 #define TWE_PARAM_DRIVESTATUS_Present   0xff
  366 
  367 #define TWE_PARAM_UNITSUMMARY   0x0003
  368 #define TWE_PARAM_UNITSUMMARY_Num               2       /* number of logical units [2] */
  369 #define TWE_PARAM_UNITSUMMARY_Status            3       /* array giving unit status [16] */
  370 #define TWE_PARAM_UNITSTATUS_Online             (1<<0)
  371 #define TWE_PARAM_UNITSTATUS_Complete           (1<<1)
  372 #define TWE_PARAM_UNITSTATUS_MASK               0xfc
  373 #define TWE_PARAM_UNITSTATUS_Normal             0xfc
  374 #define TWE_PARAM_UNITSTATUS_Initialising       0xf4    /* cannot be incomplete */
  375 #define TWE_PARAM_UNITSTATUS_Degraded           0xec
  376 #define TWE_PARAM_UNITSTATUS_Rebuilding         0xdc    /* cannot be incomplete */
  377 #define TWE_PARAM_UNITSTATUS_Verifying          0xcc    /* cannot be incomplete */
  378 #define TWE_PARAM_UNITSTATUS_Corrupt            0xbc    /* cannot be complete */
  379 #define TWE_PARAM_UNITSTATUS_Missing            0x00    /* cannot be complete or online */
  380 
  381 #define TWE_PARAM_DRIVEINFO     0x0200                  /* add drive number 0x00-0x0f XXX docco confused 0x0100 vs 0x0200 */
  382 #define TWE_PARAM_DRIVEINFO_Size                2       /* size in blocks [4] */
  383 #define TWE_PARAM_DRIVEINFO_Model               3       /* drive model string [40] */
  384 #define TWE_PARAM_DRIVEINFO_Serial              4       /* drive serial number [20] */
  385 #define TWE_PARAM_DRIVEINFO_PhysCylNum          5       /* physical geometry [2] */
  386 #define TWE_PARAM_DRIVEINFO_PhysHeadNum         6       /* [2] */
  387 #define TWE_PARAM_DRIVEINFO_PhysSectorNym       7       /* [2] */
  388 #define TWE_PARAM_DRIVEINFO_LogCylNum           8       /* logical geometry [2] */
  389 #define TWE_PARAM_DRIVEINFO_LogHeadNum          9       /* [2] */
  390 #define TWE_PARAM_DRIVEINFO_LogSectorNum        10      /* [2] */
  391 #define TWE_PARAM_DRIVEINFO_UnitNum             11      /* unit number this drive is associated with or 0xff [1] */
  392 #define TWE_PARAM_DRIVEINFO_DriveFlags          12      /* N/A [1] */
  393 
  394 #define TWE_PARAM_APORTTIMEOUT  0x02c0                  /* add (aport_number * 3) to parameter index */
  395 #define TWE_PARAM_APORTTIMEOUT_READ             2       /* read timeouts last 24hrs [2] */
  396 #define TWE_PARAM_APORTTIMEOUT_WRITE            3       /* write timeouts last 24hrs [2] */
  397 #define TWE_PARAM_APORTTIMEOUT_DEGRADE          4       /* degrade threshold [2] */
  398 
  399 #define TWE_PARAM_UNITINFO      0x0300                  /* add unit number 0x00-0x0f */
  400 #define TWE_PARAM_UNITINFO_Number               2       /* unit number [1] */
  401 #define TWE_PARAM_UNITINFO_Status               3       /* unit status [1] */
  402 #define TWE_PARAM_UNITINFO_Capacity             4       /* unit capacity in blocks [4] */
  403 #define TWE_PARAM_UNITINFO_DescriptorSize       5       /* unit descriptor size + 3 bytes [2] */
  404 #define TWE_PARAM_UNITINFO_Descriptor           6       /* unit descriptor, TWE_UnitDescriptor or TWE_Array_Descriptor */
  405 #define TWE_PARAM_UNITINFO_Flags                7       /* unit flags [1] */
  406 #define TWE_PARAM_UNITFLAGS_WCE                 (1<<0)
  407 
  408 #define TWE_PARAM_AEN           0x0401
  409 #define TWE_PARAM_AEN_UnitCode                  2       /* (unit number << 8) | AEN code [2] */
  410 #define TWE_AEN_QUEUE_EMPTY             0x00
  411 #define TWE_AEN_SOFT_RESET              0x01
  412 #define TWE_AEN_DEGRADED_MIRROR         0x02    /* reports unit */
  413 #define TWE_AEN_CONTROLLER_ERROR        0x03
  414 #define TWE_AEN_REBUILD_FAIL            0x04    /* reports unit */
  415 #define TWE_AEN_REBUILD_DONE            0x05    /* reports unit */
  416 #define TWE_AEN_INCOMP_UNIT             0x06    /* reports unit */
  417 #define TWE_AEN_INIT_DONE               0x07    /* reports unit */
  418 #define TWE_AEN_UNCLEAN_SHUTDOWN        0x08    /* reports unit */
  419 #define TWE_AEN_APORT_TIMEOUT           0x09    /* reports unit, rate limited to 1 per 2^16 errors */
  420 #define TWE_AEN_DRIVE_ERROR             0x0a    /* reports unit */
  421 #define TWE_AEN_REBUILD_STARTED         0x0b    /* reports unit */
  422 #define TWE_AEN_QUEUE_FULL              0xff
  423 #define TWE_AEN_TABLE_UNDEFINED         0x15
  424 #define TWE_AEN_CODE(x)                 ((x) & 0xff)
  425 #define TWE_AEN_UNIT(x)                 ((x) >> 8)
  426 
  427 #define TWE_PARAM_VERSION       0x0402
  428 #define TWE_PARAM_VERSION_Mon                   2       /* monitor version [16] */
  429 #define TWE_PARAM_VERSION_FW                    3       /* firmware version [16] */
  430 #define TWE_PARAM_VERSION_BIOS                  4       /* BIOSs version [16] */
  431 #define TWE_PARAM_VERSION_PCB                   5       /* PCB version [8] */
  432 #define TWE_PARAM_VERSION_ATA                   6       /* A-chip version [8] */
  433 #define TWE_PARAM_VERSION_PCI                   7       /* P-chip version [8] */
  434 #define TWE_PARAM_VERSION_CtrlModel             8       /* N/A */
  435 #define TWE_PARAM_VERSION_CtrlSerial            9       /* N/A */
  436 #define TWE_PARAM_VERSION_SBufSize              10      /* N/A */
  437 #define TWE_PARAM_VERSION_CompCode              11      /* compatibility code [4] */
  438 
  439 #define TWE_PARAM_CONTROLLER    0x0403
  440 #define TWE_PARAM_CONTROLLER_DCBSectors         2       /* # sectors reserved for DCB per drive [2] */
  441 #define TWE_PARAM_CONTROLLER_PortCount          3       /* number of drive ports [1] */
  442 
  443 #define TWE_PARAM_FEATURES      0x404
  444 #define TWE_PARAM_FEATURES_DriverShutdown       2       /* set to 1 if driver supports shutdown notification [1] */
  445 
  446 typedef struct
  447 {
  448     u_int8_t            num_subunits;   /* must be zero */
  449     u_int8_t            configuration;
  450 #define TWE_UD_CONFIG_CBOD      0x0c    /* JBOD with DCB, used for mirrors */
  451 #define TWE_UD_CONFIG_SPARE     0x0d    /* same as CBOD, but firmware will use as spare */
  452 #define TWE_UD_CONFIG_SUBUNIT   0x0e    /* drive is a subunit in an array */
  453 #define TWE_UD_CONFIG_JBOD      0x0f    /* plain drive */
  454     u_int8_t            phys_drv_num;   /* may be 0xff if port can't be determined at runtime */
  455     u_int8_t            log_drv_num;    /* must be zero for configuration == 0x0f */
  456     u_int32_t           start_lba;
  457     u_int32_t           block_count;    /* actual drive size if configuration == 0x0f, otherwise less DCB size */
  458 } __packed TWE_Unit_Descriptor;
  459 
  460 typedef struct
  461 {
  462     u_int8_t            flag;                   /* must be 0xff */
  463     u_int8_t            res1;
  464     u_int8_t            mirunit_status[4];      /* bitmap of functional subunits in each mirror */
  465     u_int8_t            res2[6];
  466 } __packed TWE_Mirror_Descriptor;
  467 
  468 typedef struct
  469 {
  470     u_int8_t            num_subunits;   /* number of subunits, or number of mirror units in RAID10 */
  471     u_int8_t            configuration;
  472 #define TWE_UD_CONFIG_RAID0     0x00
  473 #define TWE_UD_CONFIG_RAID1     0x01
  474 #define TWE_UD_CONFIG_TwinStor  0x02
  475 #define TWE_UD_CONFIG_RAID5     0x05
  476 #define TWE_UD_CONFIG_RAID10    0x06
  477     u_int8_t            stripe_size;
  478 #define TWE_UD_STRIPE_4k        0x03
  479 #define TWE_UD_STRIPE_8k        0x04
  480 #define TWE_UD_STRIPE_16k       0x05
  481 #define TWE_UD_STRIPE_32k       0x06
  482 #define TWE_UD_STRIPE_64k       0x07
  483     u_int8_t            log_drv_status; /* bitmap of functional subunits, or mirror units in RAID10 */
  484     u_int32_t           start_lba;
  485     u_int32_t           block_count;    /* actual drive size if configuration == 0x0f, otherwise less DCB size */
  486     TWE_Unit_Descriptor subunit[0];     /* subunit descriptors, in RAID10 mode is [mirunit][subunit] */
  487 } __packed TWE_Array_Descriptor;
  488 
  489 typedef struct
  490 {
  491     u_int16_t   table_id;
  492     u_int8_t    parameter_id;
  493     u_int8_t    parameter_size_bytes;
  494     u_int8_t    data[0];
  495 } __packed TWE_Param;

Cache object: 17269f72488b384834a2158d0ef689a4


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