FreeBSD/Linux Kernel Cross Reference
sys/dev/ral/rt2560.c
1 /* $FreeBSD: releng/11.0/sys/dev/ral/rt2560.c 300752 2016-05-26 16:05:19Z avos $ */
2
3 /*-
4 * Copyright (c) 2005, 2006
5 * Damien Bergamini <damien.bergamini@free.fr>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #include <sys/cdefs.h>
21 __FBSDID("$FreeBSD: releng/11.0/sys/dev/ral/rt2560.c 300752 2016-05-26 16:05:19Z avos $");
22
23 /*-
24 * Ralink Technology RT2560 chipset driver
25 * http://www.ralinktech.com/
26 */
27
28 #include <sys/param.h>
29 #include <sys/sysctl.h>
30 #include <sys/sockio.h>
31 #include <sys/mbuf.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
36 #include <sys/lock.h>
37 #include <sys/mutex.h>
38 #include <sys/module.h>
39 #include <sys/bus.h>
40 #include <sys/endian.h>
41
42 #include <machine/bus.h>
43 #include <machine/resource.h>
44 #include <sys/rman.h>
45
46 #include <net/bpf.h>
47 #include <net/if.h>
48 #include <net/if_var.h>
49 #include <net/if_arp.h>
50 #include <net/ethernet.h>
51 #include <net/if_dl.h>
52 #include <net/if_media.h>
53 #include <net/if_types.h>
54
55 #include <net80211/ieee80211_var.h>
56 #include <net80211/ieee80211_radiotap.h>
57 #include <net80211/ieee80211_regdomain.h>
58 #include <net80211/ieee80211_ratectl.h>
59
60 #include <netinet/in.h>
61 #include <netinet/in_systm.h>
62 #include <netinet/in_var.h>
63 #include <netinet/ip.h>
64 #include <netinet/if_ether.h>
65
66 #include <dev/ral/rt2560reg.h>
67 #include <dev/ral/rt2560var.h>
68
69 #define RT2560_RSSI(sc, rssi) \
70 ((rssi) > (RT2560_NOISE_FLOOR + (sc)->rssi_corr) ? \
71 ((rssi) - RT2560_NOISE_FLOOR - (sc)->rssi_corr) : 0)
72
73 #define RAL_DEBUG
74 #ifdef RAL_DEBUG
75 #define DPRINTF(sc, fmt, ...) do { \
76 if (sc->sc_debug > 0) \
77 printf(fmt, __VA_ARGS__); \
78 } while (0)
79 #define DPRINTFN(sc, n, fmt, ...) do { \
80 if (sc->sc_debug >= (n)) \
81 printf(fmt, __VA_ARGS__); \
82 } while (0)
83 #else
84 #define DPRINTF(sc, fmt, ...)
85 #define DPRINTFN(sc, n, fmt, ...)
86 #endif
87
88 static struct ieee80211vap *rt2560_vap_create(struct ieee80211com *,
89 const char [IFNAMSIZ], int, enum ieee80211_opmode,
90 int, const uint8_t [IEEE80211_ADDR_LEN],
91 const uint8_t [IEEE80211_ADDR_LEN]);
92 static void rt2560_vap_delete(struct ieee80211vap *);
93 static void rt2560_dma_map_addr(void *, bus_dma_segment_t *, int,
94 int);
95 static int rt2560_alloc_tx_ring(struct rt2560_softc *,
96 struct rt2560_tx_ring *, int);
97 static void rt2560_reset_tx_ring(struct rt2560_softc *,
98 struct rt2560_tx_ring *);
99 static void rt2560_free_tx_ring(struct rt2560_softc *,
100 struct rt2560_tx_ring *);
101 static int rt2560_alloc_rx_ring(struct rt2560_softc *,
102 struct rt2560_rx_ring *, int);
103 static void rt2560_reset_rx_ring(struct rt2560_softc *,
104 struct rt2560_rx_ring *);
105 static void rt2560_free_rx_ring(struct rt2560_softc *,
106 struct rt2560_rx_ring *);
107 static int rt2560_newstate(struct ieee80211vap *,
108 enum ieee80211_state, int);
109 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
110 static void rt2560_encryption_intr(struct rt2560_softc *);
111 static void rt2560_tx_intr(struct rt2560_softc *);
112 static void rt2560_prio_intr(struct rt2560_softc *);
113 static void rt2560_decryption_intr(struct rt2560_softc *);
114 static void rt2560_rx_intr(struct rt2560_softc *);
115 static void rt2560_beacon_update(struct ieee80211vap *, int item);
116 static void rt2560_beacon_expire(struct rt2560_softc *);
117 static void rt2560_wakeup_expire(struct rt2560_softc *);
118 static void rt2560_scan_start(struct ieee80211com *);
119 static void rt2560_scan_end(struct ieee80211com *);
120 static void rt2560_getradiocaps(struct ieee80211com *, int, int *,
121 struct ieee80211_channel[]);
122 static void rt2560_set_channel(struct ieee80211com *);
123 static void rt2560_setup_tx_desc(struct rt2560_softc *,
124 struct rt2560_tx_desc *, uint32_t, int, int, int,
125 bus_addr_t);
126 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *,
127 struct ieee80211_node *);
128 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *,
129 struct ieee80211_node *);
130 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *,
131 struct ieee80211_node *);
132 static int rt2560_transmit(struct ieee80211com *, struct mbuf *);
133 static void rt2560_start(struct rt2560_softc *);
134 static void rt2560_watchdog(void *);
135 static void rt2560_parent(struct ieee80211com *);
136 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t,
137 uint8_t);
138 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t);
139 static void rt2560_rf_write(struct rt2560_softc *, uint8_t,
140 uint32_t);
141 static void rt2560_set_chan(struct rt2560_softc *,
142 struct ieee80211_channel *);
143 #if 0
144 static void rt2560_disable_rf_tune(struct rt2560_softc *);
145 #endif
146 static void rt2560_enable_tsf_sync(struct rt2560_softc *);
147 static void rt2560_enable_tsf(struct rt2560_softc *);
148 static void rt2560_update_plcp(struct rt2560_softc *);
149 static void rt2560_update_slot(struct ieee80211com *);
150 static void rt2560_set_basicrates(struct rt2560_softc *,
151 const struct ieee80211_rateset *);
152 static void rt2560_update_led(struct rt2560_softc *, int, int);
153 static void rt2560_set_bssid(struct rt2560_softc *, const uint8_t *);
154 static void rt2560_set_macaddr(struct rt2560_softc *,
155 const uint8_t *);
156 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *);
157 static void rt2560_update_promisc(struct ieee80211com *);
158 static const char *rt2560_get_rf(int);
159 static void rt2560_read_config(struct rt2560_softc *);
160 static int rt2560_bbp_init(struct rt2560_softc *);
161 static void rt2560_set_txantenna(struct rt2560_softc *, int);
162 static void rt2560_set_rxantenna(struct rt2560_softc *, int);
163 static void rt2560_init_locked(struct rt2560_softc *);
164 static void rt2560_init(void *);
165 static void rt2560_stop_locked(struct rt2560_softc *);
166 static int rt2560_raw_xmit(struct ieee80211_node *, struct mbuf *,
167 const struct ieee80211_bpf_params *);
168
169 static const struct {
170 uint32_t reg;
171 uint32_t val;
172 } rt2560_def_mac[] = {
173 RT2560_DEF_MAC
174 };
175
176 static const struct {
177 uint8_t reg;
178 uint8_t val;
179 } rt2560_def_bbp[] = {
180 RT2560_DEF_BBP
181 };
182
183 static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2;
184 static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2;
185 static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2;
186 static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2;
187 static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2;
188 static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2;
189 static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2;
190 static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2;
191
192 static const uint8_t rt2560_chan_2ghz[] =
193 { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 };
194
195 static const uint8_t rt2560_chan_5ghz[] =
196 { 36, 40, 44, 48, 52, 56, 60, 64,
197 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140,
198 149, 153, 157, 161 };
199
200 static const struct {
201 uint8_t chan;
202 uint32_t r1, r2, r4;
203 } rt2560_rf5222[] = {
204 RT2560_RF5222
205 };
206
207 int
208 rt2560_attach(device_t dev, int id)
209 {
210 struct rt2560_softc *sc = device_get_softc(dev);
211 struct ieee80211com *ic = &sc->sc_ic;
212 int error;
213
214 sc->sc_dev = dev;
215
216 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
217 MTX_DEF | MTX_RECURSE);
218
219 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
220 mbufq_init(&sc->sc_snd, ifqmaxlen);
221
222 /* retrieve RT2560 rev. no */
223 sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
224
225 /* retrieve RF rev. no and various other things from EEPROM */
226 rt2560_read_config(sc);
227
228 device_printf(dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n",
229 sc->asic_rev, rt2560_get_rf(sc->rf_rev));
230
231 /*
232 * Allocate Tx and Rx rings.
233 */
234 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
235 if (error != 0) {
236 device_printf(sc->sc_dev, "could not allocate Tx ring\n");
237 goto fail1;
238 }
239
240 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
241 if (error != 0) {
242 device_printf(sc->sc_dev, "could not allocate ATIM ring\n");
243 goto fail2;
244 }
245
246 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
247 if (error != 0) {
248 device_printf(sc->sc_dev, "could not allocate Prio ring\n");
249 goto fail3;
250 }
251
252 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
253 if (error != 0) {
254 device_printf(sc->sc_dev, "could not allocate Beacon ring\n");
255 goto fail4;
256 }
257
258 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
259 if (error != 0) {
260 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
261 goto fail5;
262 }
263
264 /* retrieve MAC address */
265 rt2560_get_macaddr(sc, ic->ic_macaddr);
266
267 ic->ic_softc = sc;
268 ic->ic_name = device_get_nameunit(dev);
269 ic->ic_opmode = IEEE80211_M_STA;
270 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
271
272 /* set device capabilities */
273 ic->ic_caps =
274 IEEE80211_C_STA /* station mode */
275 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
276 | IEEE80211_C_HOSTAP /* hostap mode */
277 | IEEE80211_C_MONITOR /* monitor mode */
278 | IEEE80211_C_AHDEMO /* adhoc demo mode */
279 | IEEE80211_C_WDS /* 4-address traffic works */
280 | IEEE80211_C_MBSS /* mesh point link mode */
281 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
282 | IEEE80211_C_SHSLOT /* short slot time supported */
283 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
284 | IEEE80211_C_BGSCAN /* capable of bg scanning */
285 #ifdef notyet
286 | IEEE80211_C_TXFRAG /* handle tx frags */
287 #endif
288 ;
289
290 rt2560_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
291 ic->ic_channels);
292
293 ieee80211_ifattach(ic);
294 ic->ic_raw_xmit = rt2560_raw_xmit;
295 ic->ic_updateslot = rt2560_update_slot;
296 ic->ic_update_promisc = rt2560_update_promisc;
297 ic->ic_scan_start = rt2560_scan_start;
298 ic->ic_scan_end = rt2560_scan_end;
299 ic->ic_getradiocaps = rt2560_getradiocaps;
300 ic->ic_set_channel = rt2560_set_channel;
301
302 ic->ic_vap_create = rt2560_vap_create;
303 ic->ic_vap_delete = rt2560_vap_delete;
304 ic->ic_parent = rt2560_parent;
305 ic->ic_transmit = rt2560_transmit;
306
307 ieee80211_radiotap_attach(ic,
308 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
309 RT2560_TX_RADIOTAP_PRESENT,
310 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
311 RT2560_RX_RADIOTAP_PRESENT);
312
313 /*
314 * Add a few sysctl knobs.
315 */
316 #ifdef RAL_DEBUG
317 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
318 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
319 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
320 #endif
321 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
322 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
323 "txantenna", CTLFLAG_RW, &sc->tx_ant, 0, "tx antenna (0=auto)");
324
325 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
326 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
327 "rxantenna", CTLFLAG_RW, &sc->rx_ant, 0, "rx antenna (0=auto)");
328
329 if (bootverbose)
330 ieee80211_announce(ic);
331
332 return 0;
333
334 fail5: rt2560_free_tx_ring(sc, &sc->bcnq);
335 fail4: rt2560_free_tx_ring(sc, &sc->prioq);
336 fail3: rt2560_free_tx_ring(sc, &sc->atimq);
337 fail2: rt2560_free_tx_ring(sc, &sc->txq);
338 fail1: mtx_destroy(&sc->sc_mtx);
339
340 return ENXIO;
341 }
342
343 int
344 rt2560_detach(void *xsc)
345 {
346 struct rt2560_softc *sc = xsc;
347 struct ieee80211com *ic = &sc->sc_ic;
348
349 rt2560_stop(sc);
350
351 ieee80211_ifdetach(ic);
352 mbufq_drain(&sc->sc_snd);
353
354 rt2560_free_tx_ring(sc, &sc->txq);
355 rt2560_free_tx_ring(sc, &sc->atimq);
356 rt2560_free_tx_ring(sc, &sc->prioq);
357 rt2560_free_tx_ring(sc, &sc->bcnq);
358 rt2560_free_rx_ring(sc, &sc->rxq);
359
360 mtx_destroy(&sc->sc_mtx);
361
362 return 0;
363 }
364
365 static struct ieee80211vap *
366 rt2560_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
367 enum ieee80211_opmode opmode, int flags,
368 const uint8_t bssid[IEEE80211_ADDR_LEN],
369 const uint8_t mac[IEEE80211_ADDR_LEN])
370 {
371 struct rt2560_softc *sc = ic->ic_softc;
372 struct rt2560_vap *rvp;
373 struct ieee80211vap *vap;
374
375 switch (opmode) {
376 case IEEE80211_M_STA:
377 case IEEE80211_M_IBSS:
378 case IEEE80211_M_AHDEMO:
379 case IEEE80211_M_MONITOR:
380 case IEEE80211_M_HOSTAP:
381 case IEEE80211_M_MBSS:
382 /* XXXRP: TBD */
383 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
384 device_printf(sc->sc_dev, "only 1 vap supported\n");
385 return NULL;
386 }
387 if (opmode == IEEE80211_M_STA)
388 flags |= IEEE80211_CLONE_NOBEACONS;
389 break;
390 case IEEE80211_M_WDS:
391 if (TAILQ_EMPTY(&ic->ic_vaps) ||
392 ic->ic_opmode != IEEE80211_M_HOSTAP) {
393 device_printf(sc->sc_dev,
394 "wds only supported in ap mode\n");
395 return NULL;
396 }
397 /*
398 * Silently remove any request for a unique
399 * bssid; WDS vap's always share the local
400 * mac address.
401 */
402 flags &= ~IEEE80211_CLONE_BSSID;
403 break;
404 default:
405 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
406 return NULL;
407 }
408 rvp = malloc(sizeof(struct rt2560_vap), M_80211_VAP, M_WAITOK | M_ZERO);
409 vap = &rvp->ral_vap;
410 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
411
412 /* override state transition machine */
413 rvp->ral_newstate = vap->iv_newstate;
414 vap->iv_newstate = rt2560_newstate;
415 vap->iv_update_beacon = rt2560_beacon_update;
416
417 ieee80211_ratectl_init(vap);
418 /* complete setup */
419 ieee80211_vap_attach(vap, ieee80211_media_change,
420 ieee80211_media_status, mac);
421 if (TAILQ_FIRST(&ic->ic_vaps) == vap)
422 ic->ic_opmode = opmode;
423 return vap;
424 }
425
426 static void
427 rt2560_vap_delete(struct ieee80211vap *vap)
428 {
429 struct rt2560_vap *rvp = RT2560_VAP(vap);
430
431 ieee80211_ratectl_deinit(vap);
432 ieee80211_vap_detach(vap);
433 free(rvp, M_80211_VAP);
434 }
435
436 void
437 rt2560_resume(void *xsc)
438 {
439 struct rt2560_softc *sc = xsc;
440
441 if (sc->sc_ic.ic_nrunning > 0)
442 rt2560_init(sc);
443 }
444
445 static void
446 rt2560_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
447 {
448 if (error != 0)
449 return;
450
451 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
452
453 *(bus_addr_t *)arg = segs[0].ds_addr;
454 }
455
456 static int
457 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
458 int count)
459 {
460 int i, error;
461
462 ring->count = count;
463 ring->queued = 0;
464 ring->cur = ring->next = 0;
465 ring->cur_encrypt = ring->next_encrypt = 0;
466
467 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
468 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
469 count * RT2560_TX_DESC_SIZE, 1, count * RT2560_TX_DESC_SIZE,
470 0, NULL, NULL, &ring->desc_dmat);
471 if (error != 0) {
472 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
473 goto fail;
474 }
475
476 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
477 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
478 if (error != 0) {
479 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
480 goto fail;
481 }
482
483 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
484 count * RT2560_TX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr,
485 0);
486 if (error != 0) {
487 device_printf(sc->sc_dev, "could not load desc DMA map\n");
488 goto fail;
489 }
490
491 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF,
492 M_NOWAIT | M_ZERO);
493 if (ring->data == NULL) {
494 device_printf(sc->sc_dev, "could not allocate soft data\n");
495 error = ENOMEM;
496 goto fail;
497 }
498
499 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
500 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
501 MCLBYTES, RT2560_MAX_SCATTER, MCLBYTES, 0, NULL, NULL,
502 &ring->data_dmat);
503 if (error != 0) {
504 device_printf(sc->sc_dev, "could not create data DMA tag\n");
505 goto fail;
506 }
507
508 for (i = 0; i < count; i++) {
509 error = bus_dmamap_create(ring->data_dmat, 0,
510 &ring->data[i].map);
511 if (error != 0) {
512 device_printf(sc->sc_dev, "could not create DMA map\n");
513 goto fail;
514 }
515 }
516
517 return 0;
518
519 fail: rt2560_free_tx_ring(sc, ring);
520 return error;
521 }
522
523 static void
524 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
525 {
526 struct rt2560_tx_desc *desc;
527 struct rt2560_tx_data *data;
528 int i;
529
530 for (i = 0; i < ring->count; i++) {
531 desc = &ring->desc[i];
532 data = &ring->data[i];
533
534 if (data->m != NULL) {
535 bus_dmamap_sync(ring->data_dmat, data->map,
536 BUS_DMASYNC_POSTWRITE);
537 bus_dmamap_unload(ring->data_dmat, data->map);
538 m_freem(data->m);
539 data->m = NULL;
540 }
541
542 if (data->ni != NULL) {
543 ieee80211_free_node(data->ni);
544 data->ni = NULL;
545 }
546
547 desc->flags = 0;
548 }
549
550 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
551
552 ring->queued = 0;
553 ring->cur = ring->next = 0;
554 ring->cur_encrypt = ring->next_encrypt = 0;
555 }
556
557 static void
558 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
559 {
560 struct rt2560_tx_data *data;
561 int i;
562
563 if (ring->desc != NULL) {
564 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
565 BUS_DMASYNC_POSTWRITE);
566 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
567 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
568 }
569
570 if (ring->desc_dmat != NULL)
571 bus_dma_tag_destroy(ring->desc_dmat);
572
573 if (ring->data != NULL) {
574 for (i = 0; i < ring->count; i++) {
575 data = &ring->data[i];
576
577 if (data->m != NULL) {
578 bus_dmamap_sync(ring->data_dmat, data->map,
579 BUS_DMASYNC_POSTWRITE);
580 bus_dmamap_unload(ring->data_dmat, data->map);
581 m_freem(data->m);
582 }
583
584 if (data->ni != NULL)
585 ieee80211_free_node(data->ni);
586
587 if (data->map != NULL)
588 bus_dmamap_destroy(ring->data_dmat, data->map);
589 }
590
591 free(ring->data, M_DEVBUF);
592 }
593
594 if (ring->data_dmat != NULL)
595 bus_dma_tag_destroy(ring->data_dmat);
596 }
597
598 static int
599 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
600 int count)
601 {
602 struct rt2560_rx_desc *desc;
603 struct rt2560_rx_data *data;
604 bus_addr_t physaddr;
605 int i, error;
606
607 ring->count = count;
608 ring->cur = ring->next = 0;
609 ring->cur_decrypt = 0;
610
611 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
612 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
613 count * RT2560_RX_DESC_SIZE, 1, count * RT2560_RX_DESC_SIZE,
614 0, NULL, NULL, &ring->desc_dmat);
615 if (error != 0) {
616 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
617 goto fail;
618 }
619
620 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
621 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
622 if (error != 0) {
623 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
624 goto fail;
625 }
626
627 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
628 count * RT2560_RX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr,
629 0);
630 if (error != 0) {
631 device_printf(sc->sc_dev, "could not load desc DMA map\n");
632 goto fail;
633 }
634
635 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF,
636 M_NOWAIT | M_ZERO);
637 if (ring->data == NULL) {
638 device_printf(sc->sc_dev, "could not allocate soft data\n");
639 error = ENOMEM;
640 goto fail;
641 }
642
643 /*
644 * Pre-allocate Rx buffers and populate Rx ring.
645 */
646 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
647 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
648 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
649 if (error != 0) {
650 device_printf(sc->sc_dev, "could not create data DMA tag\n");
651 goto fail;
652 }
653
654 for (i = 0; i < count; i++) {
655 desc = &sc->rxq.desc[i];
656 data = &sc->rxq.data[i];
657
658 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
659 if (error != 0) {
660 device_printf(sc->sc_dev, "could not create DMA map\n");
661 goto fail;
662 }
663
664 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
665 if (data->m == NULL) {
666 device_printf(sc->sc_dev,
667 "could not allocate rx mbuf\n");
668 error = ENOMEM;
669 goto fail;
670 }
671
672 error = bus_dmamap_load(ring->data_dmat, data->map,
673 mtod(data->m, void *), MCLBYTES, rt2560_dma_map_addr,
674 &physaddr, 0);
675 if (error != 0) {
676 device_printf(sc->sc_dev,
677 "could not load rx buf DMA map");
678 goto fail;
679 }
680
681 desc->flags = htole32(RT2560_RX_BUSY);
682 desc->physaddr = htole32(physaddr);
683 }
684
685 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
686
687 return 0;
688
689 fail: rt2560_free_rx_ring(sc, ring);
690 return error;
691 }
692
693 static void
694 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
695 {
696 int i;
697
698 for (i = 0; i < ring->count; i++) {
699 ring->desc[i].flags = htole32(RT2560_RX_BUSY);
700 ring->data[i].drop = 0;
701 }
702
703 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
704
705 ring->cur = ring->next = 0;
706 ring->cur_decrypt = 0;
707 }
708
709 static void
710 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
711 {
712 struct rt2560_rx_data *data;
713 int i;
714
715 if (ring->desc != NULL) {
716 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
717 BUS_DMASYNC_POSTWRITE);
718 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
719 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
720 }
721
722 if (ring->desc_dmat != NULL)
723 bus_dma_tag_destroy(ring->desc_dmat);
724
725 if (ring->data != NULL) {
726 for (i = 0; i < ring->count; i++) {
727 data = &ring->data[i];
728
729 if (data->m != NULL) {
730 bus_dmamap_sync(ring->data_dmat, data->map,
731 BUS_DMASYNC_POSTREAD);
732 bus_dmamap_unload(ring->data_dmat, data->map);
733 m_freem(data->m);
734 }
735
736 if (data->map != NULL)
737 bus_dmamap_destroy(ring->data_dmat, data->map);
738 }
739
740 free(ring->data, M_DEVBUF);
741 }
742
743 if (ring->data_dmat != NULL)
744 bus_dma_tag_destroy(ring->data_dmat);
745 }
746
747 static int
748 rt2560_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
749 {
750 struct rt2560_vap *rvp = RT2560_VAP(vap);
751 struct rt2560_softc *sc = vap->iv_ic->ic_softc;
752 int error;
753
754 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
755 /* abort TSF synchronization */
756 RAL_WRITE(sc, RT2560_CSR14, 0);
757
758 /* turn association led off */
759 rt2560_update_led(sc, 0, 0);
760 }
761
762 error = rvp->ral_newstate(vap, nstate, arg);
763
764 if (error == 0 && nstate == IEEE80211_S_RUN) {
765 struct ieee80211_node *ni = vap->iv_bss;
766 struct mbuf *m;
767
768 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
769 rt2560_update_plcp(sc);
770 rt2560_set_basicrates(sc, &ni->ni_rates);
771 rt2560_set_bssid(sc, ni->ni_bssid);
772 }
773
774 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
775 vap->iv_opmode == IEEE80211_M_IBSS ||
776 vap->iv_opmode == IEEE80211_M_MBSS) {
777 m = ieee80211_beacon_alloc(ni);
778 if (m == NULL) {
779 device_printf(sc->sc_dev,
780 "could not allocate beacon\n");
781 return ENOBUFS;
782 }
783 ieee80211_ref_node(ni);
784 error = rt2560_tx_bcn(sc, m, ni);
785 if (error != 0)
786 return error;
787 }
788
789 /* turn association led on */
790 rt2560_update_led(sc, 1, 0);
791
792 if (vap->iv_opmode != IEEE80211_M_MONITOR)
793 rt2560_enable_tsf_sync(sc);
794 else
795 rt2560_enable_tsf(sc);
796 }
797 return error;
798 }
799
800 /*
801 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
802 * 93C66).
803 */
804 static uint16_t
805 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
806 {
807 uint32_t tmp;
808 uint16_t val;
809 int n;
810
811 /* clock C once before the first command */
812 RT2560_EEPROM_CTL(sc, 0);
813
814 RT2560_EEPROM_CTL(sc, RT2560_S);
815 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
816 RT2560_EEPROM_CTL(sc, RT2560_S);
817
818 /* write start bit (1) */
819 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
820 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
821
822 /* write READ opcode (10) */
823 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
824 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
825 RT2560_EEPROM_CTL(sc, RT2560_S);
826 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
827
828 /* write address (A5-A0 or A7-A0) */
829 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
830 for (; n >= 0; n--) {
831 RT2560_EEPROM_CTL(sc, RT2560_S |
832 (((addr >> n) & 1) << RT2560_SHIFT_D));
833 RT2560_EEPROM_CTL(sc, RT2560_S |
834 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C);
835 }
836
837 RT2560_EEPROM_CTL(sc, RT2560_S);
838
839 /* read data Q15-Q0 */
840 val = 0;
841 for (n = 15; n >= 0; n--) {
842 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
843 tmp = RAL_READ(sc, RT2560_CSR21);
844 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
845 RT2560_EEPROM_CTL(sc, RT2560_S);
846 }
847
848 RT2560_EEPROM_CTL(sc, 0);
849
850 /* clear Chip Select and clock C */
851 RT2560_EEPROM_CTL(sc, RT2560_S);
852 RT2560_EEPROM_CTL(sc, 0);
853 RT2560_EEPROM_CTL(sc, RT2560_C);
854
855 return val;
856 }
857
858 /*
859 * Some frames were processed by the hardware cipher engine and are ready for
860 * transmission.
861 */
862 static void
863 rt2560_encryption_intr(struct rt2560_softc *sc)
864 {
865 struct rt2560_tx_desc *desc;
866 int hw;
867
868 /* retrieve last descriptor index processed by cipher engine */
869 hw = RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr;
870 hw /= RT2560_TX_DESC_SIZE;
871
872 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
873 BUS_DMASYNC_POSTREAD);
874
875 while (sc->txq.next_encrypt != hw) {
876 if (sc->txq.next_encrypt == sc->txq.cur_encrypt) {
877 printf("hw encrypt %d, cur_encrypt %d\n", hw,
878 sc->txq.cur_encrypt);
879 break;
880 }
881
882 desc = &sc->txq.desc[sc->txq.next_encrypt];
883
884 if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
885 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY))
886 break;
887
888 /* for TKIP, swap eiv field to fix a bug in ASIC */
889 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) ==
890 RT2560_TX_CIPHER_TKIP)
891 desc->eiv = bswap32(desc->eiv);
892
893 /* mark the frame ready for transmission */
894 desc->flags |= htole32(RT2560_TX_VALID);
895 desc->flags |= htole32(RT2560_TX_BUSY);
896
897 DPRINTFN(sc, 15, "encryption done idx=%u\n",
898 sc->txq.next_encrypt);
899
900 sc->txq.next_encrypt =
901 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
902 }
903
904 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
905 BUS_DMASYNC_PREWRITE);
906
907 /* kick Tx */
908 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
909 }
910
911 static void
912 rt2560_tx_intr(struct rt2560_softc *sc)
913 {
914 struct rt2560_tx_desc *desc;
915 struct rt2560_tx_data *data;
916 struct mbuf *m;
917 struct ieee80211vap *vap;
918 struct ieee80211_node *ni;
919 uint32_t flags;
920 int retrycnt, status;
921
922 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
923 BUS_DMASYNC_POSTREAD);
924
925 for (;;) {
926 desc = &sc->txq.desc[sc->txq.next];
927 data = &sc->txq.data[sc->txq.next];
928
929 flags = le32toh(desc->flags);
930 if ((flags & RT2560_TX_BUSY) ||
931 (flags & RT2560_TX_CIPHER_BUSY) ||
932 !(flags & RT2560_TX_VALID))
933 break;
934
935 m = data->m;
936 ni = data->ni;
937 vap = ni->ni_vap;
938
939 switch (flags & RT2560_TX_RESULT_MASK) {
940 case RT2560_TX_SUCCESS:
941 retrycnt = 0;
942
943 DPRINTFN(sc, 10, "%s\n", "data frame sent successfully");
944 if (data->rix != IEEE80211_FIXED_RATE_NONE)
945 ieee80211_ratectl_tx_complete(vap, ni,
946 IEEE80211_RATECTL_TX_SUCCESS,
947 &retrycnt, NULL);
948 status = 0;
949 break;
950
951 case RT2560_TX_SUCCESS_RETRY:
952 retrycnt = RT2560_TX_RETRYCNT(flags);
953
954 DPRINTFN(sc, 9, "data frame sent after %u retries\n",
955 retrycnt);
956 if (data->rix != IEEE80211_FIXED_RATE_NONE)
957 ieee80211_ratectl_tx_complete(vap, ni,
958 IEEE80211_RATECTL_TX_SUCCESS,
959 &retrycnt, NULL);
960 status = 0;
961 break;
962
963 case RT2560_TX_FAIL_RETRY:
964 retrycnt = RT2560_TX_RETRYCNT(flags);
965
966 DPRINTFN(sc, 9, "data frame failed after %d retries\n",
967 retrycnt);
968 if (data->rix != IEEE80211_FIXED_RATE_NONE)
969 ieee80211_ratectl_tx_complete(vap, ni,
970 IEEE80211_RATECTL_TX_FAILURE,
971 &retrycnt, NULL);
972 status = 1;
973 break;
974
975 case RT2560_TX_FAIL_INVALID:
976 case RT2560_TX_FAIL_OTHER:
977 default:
978 device_printf(sc->sc_dev, "sending data frame failed "
979 "0x%08x\n", flags);
980 status = 1;
981 }
982
983 bus_dmamap_sync(sc->txq.data_dmat, data->map,
984 BUS_DMASYNC_POSTWRITE);
985 bus_dmamap_unload(sc->txq.data_dmat, data->map);
986
987 ieee80211_tx_complete(ni, m, status);
988 data->ni = NULL;
989 data->m = NULL;
990
991 /* descriptor is no longer valid */
992 desc->flags &= ~htole32(RT2560_TX_VALID);
993
994 DPRINTFN(sc, 15, "tx done idx=%u\n", sc->txq.next);
995
996 sc->txq.queued--;
997 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
998 }
999
1000 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1001 BUS_DMASYNC_PREWRITE);
1002
1003 if (sc->prioq.queued == 0 && sc->txq.queued == 0)
1004 sc->sc_tx_timer = 0;
1005
1006 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1)
1007 rt2560_start(sc);
1008 }
1009
1010 static void
1011 rt2560_prio_intr(struct rt2560_softc *sc)
1012 {
1013 struct rt2560_tx_desc *desc;
1014 struct rt2560_tx_data *data;
1015 struct ieee80211_node *ni;
1016 struct mbuf *m;
1017 int flags;
1018
1019 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1020 BUS_DMASYNC_POSTREAD);
1021
1022 for (;;) {
1023 desc = &sc->prioq.desc[sc->prioq.next];
1024 data = &sc->prioq.data[sc->prioq.next];
1025
1026 flags = le32toh(desc->flags);
1027 if ((flags & RT2560_TX_BUSY) || (flags & RT2560_TX_VALID) == 0)
1028 break;
1029
1030 switch (flags & RT2560_TX_RESULT_MASK) {
1031 case RT2560_TX_SUCCESS:
1032 DPRINTFN(sc, 10, "%s\n", "mgt frame sent successfully");
1033 break;
1034
1035 case RT2560_TX_SUCCESS_RETRY:
1036 DPRINTFN(sc, 9, "mgt frame sent after %u retries\n",
1037 (flags >> 5) & 0x7);
1038 break;
1039
1040 case RT2560_TX_FAIL_RETRY:
1041 DPRINTFN(sc, 9, "%s\n",
1042 "sending mgt frame failed (too much retries)");
1043 break;
1044
1045 case RT2560_TX_FAIL_INVALID:
1046 case RT2560_TX_FAIL_OTHER:
1047 default:
1048 device_printf(sc->sc_dev, "sending mgt frame failed "
1049 "0x%08x\n", flags);
1050 break;
1051 }
1052
1053 bus_dmamap_sync(sc->prioq.data_dmat, data->map,
1054 BUS_DMASYNC_POSTWRITE);
1055 bus_dmamap_unload(sc->prioq.data_dmat, data->map);
1056
1057 m = data->m;
1058 data->m = NULL;
1059 ni = data->ni;
1060 data->ni = NULL;
1061
1062 /* descriptor is no longer valid */
1063 desc->flags &= ~htole32(RT2560_TX_VALID);
1064
1065 DPRINTFN(sc, 15, "prio done idx=%u\n", sc->prioq.next);
1066
1067 sc->prioq.queued--;
1068 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
1069
1070 if (m->m_flags & M_TXCB)
1071 ieee80211_process_callback(ni, m,
1072 (flags & RT2560_TX_RESULT_MASK) &~
1073 (RT2560_TX_SUCCESS | RT2560_TX_SUCCESS_RETRY));
1074 m_freem(m);
1075 ieee80211_free_node(ni);
1076 }
1077
1078 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1079 BUS_DMASYNC_PREWRITE);
1080
1081 if (sc->prioq.queued == 0 && sc->txq.queued == 0)
1082 sc->sc_tx_timer = 0;
1083
1084 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT)
1085 rt2560_start(sc);
1086 }
1087
1088 /*
1089 * Some frames were processed by the hardware cipher engine and are ready for
1090 * handoff to the IEEE802.11 layer.
1091 */
1092 static void
1093 rt2560_decryption_intr(struct rt2560_softc *sc)
1094 {
1095 struct ieee80211com *ic = &sc->sc_ic;
1096 struct rt2560_rx_desc *desc;
1097 struct rt2560_rx_data *data;
1098 bus_addr_t physaddr;
1099 struct ieee80211_frame *wh;
1100 struct ieee80211_node *ni;
1101 struct mbuf *mnew, *m;
1102 int hw, error;
1103 int8_t rssi, nf;
1104
1105 /* retrieve last descriptor index processed by cipher engine */
1106 hw = RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr;
1107 hw /= RT2560_RX_DESC_SIZE;
1108
1109 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1110 BUS_DMASYNC_POSTREAD);
1111
1112 for (; sc->rxq.cur_decrypt != hw;) {
1113 desc = &sc->rxq.desc[sc->rxq.cur_decrypt];
1114 data = &sc->rxq.data[sc->rxq.cur_decrypt];
1115
1116 if ((le32toh(desc->flags) & RT2560_RX_BUSY) ||
1117 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY))
1118 break;
1119
1120 if (data->drop) {
1121 counter_u64_add(ic->ic_ierrors, 1);
1122 goto skip;
1123 }
1124
1125 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 &&
1126 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) {
1127 counter_u64_add(ic->ic_ierrors, 1);
1128 goto skip;
1129 }
1130
1131 /*
1132 * Try to allocate a new mbuf for this ring element and load it
1133 * before processing the current mbuf. If the ring element
1134 * cannot be loaded, drop the received packet and reuse the old
1135 * mbuf. In the unlikely case that the old mbuf can't be
1136 * reloaded either, explicitly panic.
1137 */
1138 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1139 if (mnew == NULL) {
1140 counter_u64_add(ic->ic_ierrors, 1);
1141 goto skip;
1142 }
1143
1144 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1145 BUS_DMASYNC_POSTREAD);
1146 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1147
1148 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1149 mtod(mnew, void *), MCLBYTES, rt2560_dma_map_addr,
1150 &physaddr, 0);
1151 if (error != 0) {
1152 m_freem(mnew);
1153
1154 /* try to reload the old mbuf */
1155 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1156 mtod(data->m, void *), MCLBYTES,
1157 rt2560_dma_map_addr, &physaddr, 0);
1158 if (error != 0) {
1159 /* very unlikely that it will fail... */
1160 panic("%s: could not load old rx mbuf",
1161 device_get_name(sc->sc_dev));
1162 }
1163 counter_u64_add(ic->ic_ierrors, 1);
1164 goto skip;
1165 }
1166
1167 /*
1168 * New mbuf successfully loaded, update Rx ring and continue
1169 * processing.
1170 */
1171 m = data->m;
1172 data->m = mnew;
1173 desc->physaddr = htole32(physaddr);
1174
1175 /* finalize mbuf */
1176 m->m_pkthdr.len = m->m_len =
1177 (le32toh(desc->flags) >> 16) & 0xfff;
1178
1179 rssi = RT2560_RSSI(sc, desc->rssi);
1180 nf = RT2560_NOISE_FLOOR;
1181 if (ieee80211_radiotap_active(ic)) {
1182 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
1183 uint32_t tsf_lo, tsf_hi;
1184
1185 /* get timestamp (low and high 32 bits) */
1186 tsf_hi = RAL_READ(sc, RT2560_CSR17);
1187 tsf_lo = RAL_READ(sc, RT2560_CSR16);
1188
1189 tap->wr_tsf =
1190 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1191 tap->wr_flags = 0;
1192 tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1193 (desc->flags & htole32(RT2560_RX_OFDM)) ?
1194 IEEE80211_T_OFDM : IEEE80211_T_CCK);
1195 tap->wr_antenna = sc->rx_ant;
1196 tap->wr_antsignal = nf + rssi;
1197 tap->wr_antnoise = nf;
1198 }
1199
1200 sc->sc_flags |= RT2560_F_INPUT_RUNNING;
1201 RAL_UNLOCK(sc);
1202 wh = mtod(m, struct ieee80211_frame *);
1203 ni = ieee80211_find_rxnode(ic,
1204 (struct ieee80211_frame_min *)wh);
1205 if (ni != NULL) {
1206 (void) ieee80211_input(ni, m, rssi, nf);
1207 ieee80211_free_node(ni);
1208 } else
1209 (void) ieee80211_input_all(ic, m, rssi, nf);
1210
1211 RAL_LOCK(sc);
1212 sc->sc_flags &= ~RT2560_F_INPUT_RUNNING;
1213 skip: desc->flags = htole32(RT2560_RX_BUSY);
1214
1215 DPRINTFN(sc, 15, "decryption done idx=%u\n", sc->rxq.cur_decrypt);
1216
1217 sc->rxq.cur_decrypt =
1218 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
1219 }
1220
1221 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1222 BUS_DMASYNC_PREWRITE);
1223 }
1224
1225 /*
1226 * Some frames were received. Pass them to the hardware cipher engine before
1227 * sending them to the 802.11 layer.
1228 */
1229 static void
1230 rt2560_rx_intr(struct rt2560_softc *sc)
1231 {
1232 struct rt2560_rx_desc *desc;
1233 struct rt2560_rx_data *data;
1234
1235 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1236 BUS_DMASYNC_POSTREAD);
1237
1238 for (;;) {
1239 desc = &sc->rxq.desc[sc->rxq.cur];
1240 data = &sc->rxq.data[sc->rxq.cur];
1241
1242 if ((le32toh(desc->flags) & RT2560_RX_BUSY) ||
1243 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY))
1244 break;
1245
1246 data->drop = 0;
1247
1248 if ((le32toh(desc->flags) & RT2560_RX_PHY_ERROR) ||
1249 (le32toh(desc->flags) & RT2560_RX_CRC_ERROR)) {
1250 /*
1251 * This should not happen since we did not request
1252 * to receive those frames when we filled RXCSR0.
1253 */
1254 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1255 le32toh(desc->flags));
1256 data->drop = 1;
1257 }
1258
1259 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) {
1260 DPRINTFN(sc, 5, "%s\n", "bad length");
1261 data->drop = 1;
1262 }
1263
1264 /* mark the frame for decryption */
1265 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY);
1266
1267 DPRINTFN(sc, 15, "rx done idx=%u\n", sc->rxq.cur);
1268
1269 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
1270 }
1271
1272 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1273 BUS_DMASYNC_PREWRITE);
1274
1275 /* kick decrypt */
1276 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
1277 }
1278
1279 static void
1280 rt2560_beacon_update(struct ieee80211vap *vap, int item)
1281 {
1282 struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off;
1283
1284 setbit(bo->bo_flags, item);
1285 }
1286
1287 /*
1288 * This function is called periodically in IBSS mode when a new beacon must be
1289 * sent out.
1290 */
1291 static void
1292 rt2560_beacon_expire(struct rt2560_softc *sc)
1293 {
1294 struct ieee80211com *ic = &sc->sc_ic;
1295 struct rt2560_tx_data *data;
1296
1297 if (ic->ic_opmode != IEEE80211_M_IBSS &&
1298 ic->ic_opmode != IEEE80211_M_HOSTAP &&
1299 ic->ic_opmode != IEEE80211_M_MBSS)
1300 return;
1301
1302 data = &sc->bcnq.data[sc->bcnq.next];
1303 /*
1304 * Don't send beacon if bsschan isn't set
1305 */
1306 if (data->ni == NULL)
1307 return;
1308
1309 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
1310 bus_dmamap_unload(sc->bcnq.data_dmat, data->map);
1311
1312 /* XXX 1 =>'s mcast frames which means all PS sta's will wakeup! */
1313 ieee80211_beacon_update(data->ni, data->m, 1);
1314
1315 rt2560_tx_bcn(sc, data->m, data->ni);
1316
1317 DPRINTFN(sc, 15, "%s", "beacon expired\n");
1318
1319 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT;
1320 }
1321
1322 /* ARGSUSED */
1323 static void
1324 rt2560_wakeup_expire(struct rt2560_softc *sc)
1325 {
1326 DPRINTFN(sc, 2, "%s", "wakeup expired\n");
1327 }
1328
1329 void
1330 rt2560_intr(void *arg)
1331 {
1332 struct rt2560_softc *sc = arg;
1333 uint32_t r;
1334
1335 RAL_LOCK(sc);
1336
1337 /* disable interrupts */
1338 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
1339
1340 /* don't re-enable interrupts if we're shutting down */
1341 if (!(sc->sc_flags & RT2560_F_RUNNING)) {
1342 RAL_UNLOCK(sc);
1343 return;
1344 }
1345
1346 r = RAL_READ(sc, RT2560_CSR7);
1347 RAL_WRITE(sc, RT2560_CSR7, r);
1348
1349 if (r & RT2560_BEACON_EXPIRE)
1350 rt2560_beacon_expire(sc);
1351
1352 if (r & RT2560_WAKEUP_EXPIRE)
1353 rt2560_wakeup_expire(sc);
1354
1355 if (r & RT2560_ENCRYPTION_DONE)
1356 rt2560_encryption_intr(sc);
1357
1358 if (r & RT2560_TX_DONE)
1359 rt2560_tx_intr(sc);
1360
1361 if (r & RT2560_PRIO_DONE)
1362 rt2560_prio_intr(sc);
1363
1364 if (r & RT2560_DECRYPTION_DONE)
1365 rt2560_decryption_intr(sc);
1366
1367 if (r & RT2560_RX_DONE) {
1368 rt2560_rx_intr(sc);
1369 rt2560_encryption_intr(sc);
1370 }
1371
1372 /* re-enable interrupts */
1373 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
1374
1375 RAL_UNLOCK(sc);
1376 }
1377
1378 #define RAL_SIFS 10 /* us */
1379
1380 #define RT2560_TXRX_TURNAROUND 10 /* us */
1381
1382 static uint8_t
1383 rt2560_plcp_signal(int rate)
1384 {
1385 switch (rate) {
1386 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1387 case 12: return 0xb;
1388 case 18: return 0xf;
1389 case 24: return 0xa;
1390 case 36: return 0xe;
1391 case 48: return 0x9;
1392 case 72: return 0xd;
1393 case 96: return 0x8;
1394 case 108: return 0xc;
1395
1396 /* CCK rates (NB: not IEEE std, device-specific) */
1397 case 2: return 0x0;
1398 case 4: return 0x1;
1399 case 11: return 0x2;
1400 case 22: return 0x3;
1401 }
1402 return 0xff; /* XXX unsupported/unknown rate */
1403 }
1404
1405 static void
1406 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
1407 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1408 {
1409 struct ieee80211com *ic = &sc->sc_ic;
1410 uint16_t plcp_length;
1411 int remainder;
1412
1413 desc->flags = htole32(flags);
1414 desc->flags |= htole32(len << 16);
1415
1416 desc->physaddr = htole32(physaddr);
1417 desc->wme = htole16(
1418 RT2560_AIFSN(2) |
1419 RT2560_LOGCWMIN(3) |
1420 RT2560_LOGCWMAX(8));
1421
1422 /* setup PLCP fields */
1423 desc->plcp_signal = rt2560_plcp_signal(rate);
1424 desc->plcp_service = 4;
1425
1426 len += IEEE80211_CRC_LEN;
1427 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1428 desc->flags |= htole32(RT2560_TX_OFDM);
1429
1430 plcp_length = len & 0xfff;
1431 desc->plcp_length_hi = plcp_length >> 6;
1432 desc->plcp_length_lo = plcp_length & 0x3f;
1433 } else {
1434 plcp_length = howmany(16 * len, rate);
1435 if (rate == 22) {
1436 remainder = (16 * len) % 22;
1437 if (remainder != 0 && remainder < 7)
1438 desc->plcp_service |= RT2560_PLCP_LENGEXT;
1439 }
1440 desc->plcp_length_hi = plcp_length >> 8;
1441 desc->plcp_length_lo = plcp_length & 0xff;
1442
1443 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1444 desc->plcp_signal |= 0x08;
1445 }
1446
1447 if (!encrypt)
1448 desc->flags |= htole32(RT2560_TX_VALID);
1449 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY)
1450 : htole32(RT2560_TX_BUSY);
1451 }
1452
1453 static int
1454 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
1455 struct ieee80211_node *ni)
1456 {
1457 struct ieee80211vap *vap = ni->ni_vap;
1458 struct rt2560_tx_desc *desc;
1459 struct rt2560_tx_data *data;
1460 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1461 int nsegs, rate, error;
1462
1463 desc = &sc->bcnq.desc[sc->bcnq.cur];
1464 data = &sc->bcnq.data[sc->bcnq.cur];
1465
1466 /* XXX maybe a separate beacon rate? */
1467 rate = vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)].mgmtrate;
1468
1469 error = bus_dmamap_load_mbuf_sg(sc->bcnq.data_dmat, data->map, m0,
1470 segs, &nsegs, BUS_DMA_NOWAIT);
1471 if (error != 0) {
1472 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1473 error);
1474 m_freem(m0);
1475 return error;
1476 }
1477
1478 if (ieee80211_radiotap_active_vap(vap)) {
1479 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1480
1481 tap->wt_flags = 0;
1482 tap->wt_rate = rate;
1483 tap->wt_antenna = sc->tx_ant;
1484
1485 ieee80211_radiotap_tx(vap, m0);
1486 }
1487
1488 data->m = m0;
1489 data->ni = ni;
1490
1491 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
1492 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, segs->ds_addr);
1493
1494 DPRINTFN(sc, 10, "sending beacon frame len=%u idx=%u rate=%u\n",
1495 m0->m_pkthdr.len, sc->bcnq.cur, rate);
1496
1497 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1498 bus_dmamap_sync(sc->bcnq.desc_dmat, sc->bcnq.desc_map,
1499 BUS_DMASYNC_PREWRITE);
1500
1501 sc->bcnq.cur = (sc->bcnq.cur + 1) % RT2560_BEACON_RING_COUNT;
1502
1503 return 0;
1504 }
1505
1506 static int
1507 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
1508 struct ieee80211_node *ni)
1509 {
1510 struct ieee80211vap *vap = ni->ni_vap;
1511 struct ieee80211com *ic = ni->ni_ic;
1512 struct rt2560_tx_desc *desc;
1513 struct rt2560_tx_data *data;
1514 struct ieee80211_frame *wh;
1515 struct ieee80211_key *k;
1516 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1517 uint16_t dur;
1518 uint32_t flags = 0;
1519 int nsegs, rate, error;
1520
1521 desc = &sc->prioq.desc[sc->prioq.cur];
1522 data = &sc->prioq.data[sc->prioq.cur];
1523
1524 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
1525
1526 wh = mtod(m0, struct ieee80211_frame *);
1527
1528 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1529 k = ieee80211_crypto_encap(ni, m0);
1530 if (k == NULL) {
1531 m_freem(m0);
1532 return ENOBUFS;
1533 }
1534 }
1535
1536 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0,
1537 segs, &nsegs, 0);
1538 if (error != 0) {
1539 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1540 error);
1541 m_freem(m0);
1542 return error;
1543 }
1544
1545 if (ieee80211_radiotap_active_vap(vap)) {
1546 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1547
1548 tap->wt_flags = 0;
1549 tap->wt_rate = rate;
1550 tap->wt_antenna = sc->tx_ant;
1551
1552 ieee80211_radiotap_tx(vap, m0);
1553 }
1554
1555 data->m = m0;
1556 data->ni = ni;
1557 /* management frames are not taken into account for amrr */
1558 data->rix = IEEE80211_FIXED_RATE_NONE;
1559
1560 wh = mtod(m0, struct ieee80211_frame *);
1561
1562 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1563 flags |= RT2560_TX_ACK;
1564
1565 dur = ieee80211_ack_duration(ic->ic_rt,
1566 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1567 *(uint16_t *)wh->i_dur = htole16(dur);
1568
1569 /* tell hardware to add timestamp for probe responses */
1570 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1571 IEEE80211_FC0_TYPE_MGT &&
1572 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1573 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1574 flags |= RT2560_TX_TIMESTAMP;
1575 }
1576
1577 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0,
1578 segs->ds_addr);
1579
1580 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1581 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1582 BUS_DMASYNC_PREWRITE);
1583
1584 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1585 m0->m_pkthdr.len, sc->prioq.cur, rate);
1586
1587 /* kick prio */
1588 sc->prioq.queued++;
1589 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1590 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1591
1592 return 0;
1593 }
1594
1595 static int
1596 rt2560_sendprot(struct rt2560_softc *sc,
1597 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1598 {
1599 struct ieee80211com *ic = ni->ni_ic;
1600 const struct ieee80211_frame *wh;
1601 struct rt2560_tx_desc *desc;
1602 struct rt2560_tx_data *data;
1603 struct mbuf *mprot;
1604 int protrate, ackrate, pktlen, flags, isshort, error;
1605 uint16_t dur;
1606 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1607 int nsegs;
1608
1609 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1610 ("protection %d", prot));
1611
1612 wh = mtod(m, const struct ieee80211_frame *);
1613 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1614
1615 protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1616 ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1617
1618 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1619 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1620 + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1621 flags = RT2560_TX_MORE_FRAG;
1622 if (prot == IEEE80211_PROT_RTSCTS) {
1623 /* NB: CTS is the same size as an ACK */
1624 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1625 flags |= RT2560_TX_ACK;
1626 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1627 } else {
1628 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1629 }
1630 if (mprot == NULL) {
1631 /* XXX stat + msg */
1632 return ENOBUFS;
1633 }
1634
1635 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1636 data = &sc->txq.data[sc->txq.cur_encrypt];
1637
1638 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map,
1639 mprot, segs, &nsegs, 0);
1640 if (error != 0) {
1641 device_printf(sc->sc_dev,
1642 "could not map mbuf (error %d)\n", error);
1643 m_freem(mprot);
1644 return error;
1645 }
1646
1647 data->m = mprot;
1648 data->ni = ieee80211_ref_node(ni);
1649 /* ctl frames are not taken into account for amrr */
1650 data->rix = IEEE80211_FIXED_RATE_NONE;
1651
1652 rt2560_setup_tx_desc(sc, desc, flags, mprot->m_pkthdr.len, protrate, 1,
1653 segs->ds_addr);
1654
1655 bus_dmamap_sync(sc->txq.data_dmat, data->map,
1656 BUS_DMASYNC_PREWRITE);
1657
1658 sc->txq.queued++;
1659 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1660
1661 return 0;
1662 }
1663
1664 static int
1665 rt2560_tx_raw(struct rt2560_softc *sc, struct mbuf *m0,
1666 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
1667 {
1668 struct ieee80211vap *vap = ni->ni_vap;
1669 struct ieee80211com *ic = ni->ni_ic;
1670 struct rt2560_tx_desc *desc;
1671 struct rt2560_tx_data *data;
1672 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1673 uint32_t flags;
1674 int nsegs, rate, error;
1675
1676 desc = &sc->prioq.desc[sc->prioq.cur];
1677 data = &sc->prioq.data[sc->prioq.cur];
1678
1679 rate = params->ibp_rate0;
1680 if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
1681 /* XXX fall back to mcast/mgmt rate? */
1682 m_freem(m0);
1683 return EINVAL;
1684 }
1685
1686 flags = 0;
1687 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1688 flags |= RT2560_TX_ACK;
1689 if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1690 error = rt2560_sendprot(sc, m0, ni,
1691 params->ibp_flags & IEEE80211_BPF_RTS ?
1692 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1693 rate);
1694 if (error) {
1695 m_freem(m0);
1696 return error;
1697 }
1698 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1699 }
1700
1701 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0,
1702 segs, &nsegs, 0);
1703 if (error != 0) {
1704 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1705 error);
1706 m_freem(m0);
1707 return error;
1708 }
1709
1710 if (ieee80211_radiotap_active_vap(vap)) {
1711 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1712
1713 tap->wt_flags = 0;
1714 tap->wt_rate = rate;
1715 tap->wt_antenna = sc->tx_ant;
1716
1717 ieee80211_radiotap_tx(ni->ni_vap, m0);
1718 }
1719
1720 data->m = m0;
1721 data->ni = ni;
1722
1723 /* XXX need to setup descriptor ourself */
1724 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len,
1725 rate, (params->ibp_flags & IEEE80211_BPF_CRYPTO) != 0,
1726 segs->ds_addr);
1727
1728 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1729 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1730 BUS_DMASYNC_PREWRITE);
1731
1732 DPRINTFN(sc, 10, "sending raw frame len=%u idx=%u rate=%u\n",
1733 m0->m_pkthdr.len, sc->prioq.cur, rate);
1734
1735 /* kick prio */
1736 sc->prioq.queued++;
1737 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1738 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1739
1740 return 0;
1741 }
1742
1743 static int
1744 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
1745 struct ieee80211_node *ni)
1746 {
1747 struct ieee80211vap *vap = ni->ni_vap;
1748 struct ieee80211com *ic = ni->ni_ic;
1749 struct rt2560_tx_desc *desc;
1750 struct rt2560_tx_data *data;
1751 struct ieee80211_frame *wh;
1752 const struct ieee80211_txparam *tp;
1753 struct ieee80211_key *k;
1754 struct mbuf *mnew;
1755 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1756 uint16_t dur;
1757 uint32_t flags;
1758 int nsegs, rate, error;
1759
1760 wh = mtod(m0, struct ieee80211_frame *);
1761
1762 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1763 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1764 rate = tp->mcastrate;
1765 } else if (m0->m_flags & M_EAPOL) {
1766 rate = tp->mgmtrate;
1767 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1768 rate = tp->ucastrate;
1769 } else {
1770 (void) ieee80211_ratectl_rate(ni, NULL, 0);
1771 rate = ni->ni_txrate;
1772 }
1773
1774 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1775 k = ieee80211_crypto_encap(ni, m0);
1776 if (k == NULL) {
1777 m_freem(m0);
1778 return ENOBUFS;
1779 }
1780
1781 /* packet header may have moved, reset our local pointer */
1782 wh = mtod(m0, struct ieee80211_frame *);
1783 }
1784
1785 flags = 0;
1786 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1787 int prot = IEEE80211_PROT_NONE;
1788 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1789 prot = IEEE80211_PROT_RTSCTS;
1790 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1791 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1792 prot = ic->ic_protmode;
1793 if (prot != IEEE80211_PROT_NONE) {
1794 error = rt2560_sendprot(sc, m0, ni, prot, rate);
1795 if (error) {
1796 m_freem(m0);
1797 return error;
1798 }
1799 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1800 }
1801 }
1802
1803 data = &sc->txq.data[sc->txq.cur_encrypt];
1804 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1805
1806 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, m0,
1807 segs, &nsegs, 0);
1808 if (error != 0 && error != EFBIG) {
1809 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1810 error);
1811 m_freem(m0);
1812 return error;
1813 }
1814 if (error != 0) {
1815 mnew = m_defrag(m0, M_NOWAIT);
1816 if (mnew == NULL) {
1817 device_printf(sc->sc_dev,
1818 "could not defragment mbuf\n");
1819 m_freem(m0);
1820 return ENOBUFS;
1821 }
1822 m0 = mnew;
1823
1824 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map,
1825 m0, segs, &nsegs, 0);
1826 if (error != 0) {
1827 device_printf(sc->sc_dev,
1828 "could not map mbuf (error %d)\n", error);
1829 m_freem(m0);
1830 return error;
1831 }
1832
1833 /* packet header may have moved, reset our local pointer */
1834 wh = mtod(m0, struct ieee80211_frame *);
1835 }
1836
1837 if (ieee80211_radiotap_active_vap(vap)) {
1838 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1839
1840 tap->wt_flags = 0;
1841 tap->wt_rate = rate;
1842 tap->wt_antenna = sc->tx_ant;
1843
1844 ieee80211_radiotap_tx(vap, m0);
1845 }
1846
1847 data->m = m0;
1848 data->ni = ni;
1849
1850 /* remember link conditions for rate adaptation algorithm */
1851 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1852 data->rix = ni->ni_txrate;
1853 /* XXX probably need last rssi value and not avg */
1854 data->rssi = ic->ic_node_getrssi(ni);
1855 } else
1856 data->rix = IEEE80211_FIXED_RATE_NONE;
1857
1858 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1859 flags |= RT2560_TX_ACK;
1860
1861 dur = ieee80211_ack_duration(ic->ic_rt,
1862 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1863 *(uint16_t *)wh->i_dur = htole16(dur);
1864 }
1865
1866 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1,
1867 segs->ds_addr);
1868
1869 bus_dmamap_sync(sc->txq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1870 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1871 BUS_DMASYNC_PREWRITE);
1872
1873 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1874 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate);
1875
1876 /* kick encrypt */
1877 sc->txq.queued++;
1878 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1879 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
1880
1881 return 0;
1882 }
1883
1884 static int
1885 rt2560_transmit(struct ieee80211com *ic, struct mbuf *m)
1886 {
1887 struct rt2560_softc *sc = ic->ic_softc;
1888 int error;
1889
1890 RAL_LOCK(sc);
1891 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) {
1892 RAL_UNLOCK(sc);
1893 return (ENXIO);
1894 }
1895 error = mbufq_enqueue(&sc->sc_snd, m);
1896 if (error) {
1897 RAL_UNLOCK(sc);
1898 return (error);
1899 }
1900 rt2560_start(sc);
1901 RAL_UNLOCK(sc);
1902
1903 return (0);
1904 }
1905
1906 static void
1907 rt2560_start(struct rt2560_softc *sc)
1908 {
1909 struct ieee80211_node *ni;
1910 struct mbuf *m;
1911
1912 RAL_LOCK_ASSERT(sc);
1913
1914 while (sc->txq.queued < RT2560_TX_RING_COUNT - 1 &&
1915 (m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
1916 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1917 if (rt2560_tx_data(sc, m, ni) != 0) {
1918 if_inc_counter(ni->ni_vap->iv_ifp,
1919 IFCOUNTER_OERRORS, 1);
1920 ieee80211_free_node(ni);
1921 break;
1922 }
1923 sc->sc_tx_timer = 5;
1924 }
1925 }
1926
1927 static void
1928 rt2560_watchdog(void *arg)
1929 {
1930 struct rt2560_softc *sc = arg;
1931
1932 RAL_LOCK_ASSERT(sc);
1933
1934 KASSERT(sc->sc_flags & RT2560_F_RUNNING, ("not running"));
1935
1936 if (sc->sc_invalid) /* card ejected */
1937 return;
1938
1939 rt2560_encryption_intr(sc);
1940 rt2560_tx_intr(sc);
1941
1942 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1943 device_printf(sc->sc_dev, "device timeout\n");
1944 rt2560_init_locked(sc);
1945 counter_u64_add(sc->sc_ic.ic_oerrors, 1);
1946 /* NB: callout is reset in rt2560_init() */
1947 return;
1948 }
1949 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc);
1950 }
1951
1952 static void
1953 rt2560_parent(struct ieee80211com *ic)
1954 {
1955 struct rt2560_softc *sc = ic->ic_softc;
1956 int startall = 0;
1957
1958 RAL_LOCK(sc);
1959 if (ic->ic_nrunning > 0) {
1960 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) {
1961 rt2560_init_locked(sc);
1962 startall = 1;
1963 } else
1964 rt2560_update_promisc(ic);
1965 } else if (sc->sc_flags & RT2560_F_RUNNING)
1966 rt2560_stop_locked(sc);
1967 RAL_UNLOCK(sc);
1968 if (startall)
1969 ieee80211_start_all(ic);
1970 }
1971
1972 static void
1973 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
1974 {
1975 uint32_t tmp;
1976 int ntries;
1977
1978 for (ntries = 0; ntries < 100; ntries++) {
1979 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
1980 break;
1981 DELAY(1);
1982 }
1983 if (ntries == 100) {
1984 device_printf(sc->sc_dev, "could not write to BBP\n");
1985 return;
1986 }
1987
1988 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
1989 RAL_WRITE(sc, RT2560_BBPCSR, tmp);
1990
1991 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
1992 }
1993
1994 static uint8_t
1995 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
1996 {
1997 uint32_t val;
1998 int ntries;
1999
2000 for (ntries = 0; ntries < 100; ntries++) {
2001 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2002 break;
2003 DELAY(1);
2004 }
2005 if (ntries == 100) {
2006 device_printf(sc->sc_dev, "could not read from BBP\n");
2007 return 0;
2008 }
2009
2010 val = RT2560_BBP_BUSY | reg << 8;
2011 RAL_WRITE(sc, RT2560_BBPCSR, val);
2012
2013 for (ntries = 0; ntries < 100; ntries++) {
2014 val = RAL_READ(sc, RT2560_BBPCSR);
2015 if (!(val & RT2560_BBP_BUSY))
2016 return val & 0xff;
2017 DELAY(1);
2018 }
2019
2020 device_printf(sc->sc_dev, "could not read from BBP\n");
2021 return 0;
2022 }
2023
2024 static void
2025 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2026 {
2027 uint32_t tmp;
2028 int ntries;
2029
2030 for (ntries = 0; ntries < 100; ntries++) {
2031 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
2032 break;
2033 DELAY(1);
2034 }
2035 if (ntries == 100) {
2036 device_printf(sc->sc_dev, "could not write to RF\n");
2037 return;
2038 }
2039
2040 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
2041 (reg & 0x3);
2042 RAL_WRITE(sc, RT2560_RFCSR, tmp);
2043
2044 /* remember last written value in sc */
2045 sc->rf_regs[reg] = val;
2046
2047 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
2048 }
2049
2050 static void
2051 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
2052 {
2053 struct ieee80211com *ic = &sc->sc_ic;
2054 uint8_t power, tmp;
2055 u_int i, chan;
2056
2057 chan = ieee80211_chan2ieee(ic, c);
2058 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
2059
2060 if (IEEE80211_IS_CHAN_2GHZ(c))
2061 power = min(sc->txpow[chan - 1], 31);
2062 else
2063 power = 31;
2064
2065 /* adjust txpower using ifconfig settings */
2066 power -= (100 - ic->ic_txpowlimit) / 8;
2067
2068 DPRINTFN(sc, 2, "setting channel to %u, txpower to %u\n", chan, power);
2069
2070 switch (sc->rf_rev) {
2071 case RT2560_RF_2522:
2072 rt2560_rf_write(sc, RAL_RF1, 0x00814);
2073 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2522_r2[chan - 1]);
2074 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2075 break;
2076
2077 case RT2560_RF_2523:
2078 rt2560_rf_write(sc, RAL_RF1, 0x08804);
2079 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2523_r2[chan - 1]);
2080 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
2081 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2082 break;
2083
2084 case RT2560_RF_2524:
2085 rt2560_rf_write(sc, RAL_RF1, 0x0c808);
2086 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2524_r2[chan - 1]);
2087 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2088 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2089 break;
2090
2091 case RT2560_RF_2525:
2092 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2093 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_hi_r2[chan - 1]);
2094 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2095 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2096
2097 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2098 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_r2[chan - 1]);
2099 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2100 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2101 break;
2102
2103 case RT2560_RF_2525E:
2104 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2105 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525e_r2[chan - 1]);
2106 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2107 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
2108 break;
2109
2110 case RT2560_RF_2526:
2111 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_hi_r2[chan - 1]);
2112 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
2113 rt2560_rf_write(sc, RAL_RF1, 0x08804);
2114
2115 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_r2[chan - 1]);
2116 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2117 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
2118 break;
2119
2120 /* dual-band RF */
2121 case RT2560_RF_5222:
2122 for (i = 0; rt2560_rf5222[i].chan != chan; i++);
2123
2124 rt2560_rf_write(sc, RAL_RF1, rt2560_rf5222[i].r1);
2125 rt2560_rf_write(sc, RAL_RF2, rt2560_rf5222[i].r2);
2126 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2127 rt2560_rf_write(sc, RAL_RF4, rt2560_rf5222[i].r4);
2128 break;
2129 default:
2130 printf("unknown ral rev=%d\n", sc->rf_rev);
2131 }
2132
2133 /* XXX */
2134 if ((ic->ic_flags & IEEE80211_F_SCAN) == 0) {
2135 /* set Japan filter bit for channel 14 */
2136 tmp = rt2560_bbp_read(sc, 70);
2137
2138 tmp &= ~RT2560_JAPAN_FILTER;
2139 if (chan == 14)
2140 tmp |= RT2560_JAPAN_FILTER;
2141
2142 rt2560_bbp_write(sc, 70, tmp);
2143
2144 /* clear CRC errors */
2145 RAL_READ(sc, RT2560_CNT0);
2146 }
2147 }
2148
2149 static void
2150 rt2560_getradiocaps(struct ieee80211com *ic,
2151 int maxchans, int *nchans, struct ieee80211_channel chans[])
2152 {
2153 struct rt2560_softc *sc = ic->ic_softc;
2154 uint8_t bands[IEEE80211_MODE_BYTES];
2155
2156 memset(bands, 0, sizeof(bands));
2157 setbit(bands, IEEE80211_MODE_11B);
2158 setbit(bands, IEEE80211_MODE_11G);
2159 ieee80211_add_channel_list_2ghz(chans, maxchans, nchans,
2160 rt2560_chan_2ghz, nitems(rt2560_chan_2ghz), bands, 0);
2161
2162 if (sc->rf_rev == RT2560_RF_5222) {
2163 setbit(bands, IEEE80211_MODE_11A);
2164 ieee80211_add_channel_list_5ghz(chans, maxchans, nchans,
2165 rt2560_chan_5ghz, nitems(rt2560_chan_5ghz), bands, 0);
2166 }
2167 }
2168
2169 static void
2170 rt2560_set_channel(struct ieee80211com *ic)
2171 {
2172 struct rt2560_softc *sc = ic->ic_softc;
2173
2174 RAL_LOCK(sc);
2175 rt2560_set_chan(sc, ic->ic_curchan);
2176 RAL_UNLOCK(sc);
2177
2178 }
2179
2180 #if 0
2181 /*
2182 * Disable RF auto-tuning.
2183 */
2184 static void
2185 rt2560_disable_rf_tune(struct rt2560_softc *sc)
2186 {
2187 uint32_t tmp;
2188
2189 if (sc->rf_rev != RT2560_RF_2523) {
2190 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
2191 rt2560_rf_write(sc, RAL_RF1, tmp);
2192 }
2193
2194 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
2195 rt2560_rf_write(sc, RAL_RF3, tmp);
2196
2197 DPRINTFN(sc, 2, "%s", "disabling RF autotune\n");
2198 }
2199 #endif
2200
2201 /*
2202 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2203 * synchronization.
2204 */
2205 static void
2206 rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2207 {
2208 struct ieee80211com *ic = &sc->sc_ic;
2209 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2210 uint16_t logcwmin, preload;
2211 uint32_t tmp;
2212
2213 /* first, disable TSF synchronization */
2214 RAL_WRITE(sc, RT2560_CSR14, 0);
2215
2216 tmp = 16 * vap->iv_bss->ni_intval;
2217 RAL_WRITE(sc, RT2560_CSR12, tmp);
2218
2219 RAL_WRITE(sc, RT2560_CSR13, 0);
2220
2221 logcwmin = 5;
2222 preload = (vap->iv_opmode == IEEE80211_M_STA) ? 384 : 1024;
2223 tmp = logcwmin << 16 | preload;
2224 RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
2225
2226 /* finally, enable TSF synchronization */
2227 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
2228 if (ic->ic_opmode == IEEE80211_M_STA)
2229 tmp |= RT2560_ENABLE_TSF_SYNC(1);
2230 else
2231 tmp |= RT2560_ENABLE_TSF_SYNC(2) |
2232 RT2560_ENABLE_BEACON_GENERATOR;
2233 RAL_WRITE(sc, RT2560_CSR14, tmp);
2234
2235 DPRINTF(sc, "%s", "enabling TSF synchronization\n");
2236 }
2237
2238 static void
2239 rt2560_enable_tsf(struct rt2560_softc *sc)
2240 {
2241 RAL_WRITE(sc, RT2560_CSR14, 0);
2242 RAL_WRITE(sc, RT2560_CSR14,
2243 RT2560_ENABLE_TSF_SYNC(2) | RT2560_ENABLE_TSF);
2244 }
2245
2246 static void
2247 rt2560_update_plcp(struct rt2560_softc *sc)
2248 {
2249 struct ieee80211com *ic = &sc->sc_ic;
2250
2251 /* no short preamble for 1Mbps */
2252 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
2253
2254 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) {
2255 /* values taken from the reference driver */
2256 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401);
2257 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
2258 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403);
2259 } else {
2260 /* same values as above or'ed 0x8 */
2261 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409);
2262 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
2263 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b);
2264 }
2265
2266 DPRINTF(sc, "updating PLCP for %s preamble\n",
2267 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long");
2268 }
2269
2270 /*
2271 * This function can be called by ieee80211_set_shortslottime(). Refer to
2272 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed.
2273 */
2274 static void
2275 rt2560_update_slot(struct ieee80211com *ic)
2276 {
2277 struct rt2560_softc *sc = ic->ic_softc;
2278 uint8_t slottime;
2279 uint16_t tx_sifs, tx_pifs, tx_difs, eifs;
2280 uint32_t tmp;
2281
2282 #ifndef FORCE_SLOTTIME
2283 slottime = IEEE80211_GET_SLOTTIME(ic);
2284 #else
2285 /*
2286 * Setting slot time according to "short slot time" capability
2287 * in beacon/probe_resp seems to cause problem to acknowledge
2288 * certain AP's data frames transimitted at CCK/DS rates: the
2289 * problematic AP keeps retransmitting data frames, probably
2290 * because MAC level acks are not received by hardware.
2291 * So we cheat a little bit here by claiming we are capable of
2292 * "short slot time" but setting hardware slot time to the normal
2293 * slot time. ral(4) does not seem to have trouble to receive
2294 * frames transmitted using short slot time even if hardware
2295 * slot time is set to normal slot time. If we didn't use this
2296 * trick, we would have to claim that short slot time is not
2297 * supported; this would give relative poor RX performance
2298 * (-1Mb~-2Mb lower) and the _whole_ BSS would stop using short
2299 * slot time.
2300 */
2301 slottime = IEEE80211_DUR_SLOT;
2302 #endif
2303
2304 /* update the MAC slot boundaries */
2305 tx_sifs = RAL_SIFS - RT2560_TXRX_TURNAROUND;
2306 tx_pifs = tx_sifs + slottime;
2307 tx_difs = IEEE80211_DUR_DIFS(tx_sifs, slottime);
2308 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2309
2310 tmp = RAL_READ(sc, RT2560_CSR11);
2311 tmp = (tmp & ~0x1f00) | slottime << 8;
2312 RAL_WRITE(sc, RT2560_CSR11, tmp);
2313
2314 tmp = tx_pifs << 16 | tx_sifs;
2315 RAL_WRITE(sc, RT2560_CSR18, tmp);
2316
2317 tmp = eifs << 16 | tx_difs;
2318 RAL_WRITE(sc, RT2560_CSR19, tmp);
2319
2320 DPRINTF(sc, "setting slottime to %uus\n", slottime);
2321 }
2322
2323 static void
2324 rt2560_set_basicrates(struct rt2560_softc *sc,
2325 const struct ieee80211_rateset *rs)
2326 {
2327 struct ieee80211com *ic = &sc->sc_ic;
2328 uint32_t mask = 0;
2329 uint8_t rate;
2330 int i;
2331
2332 for (i = 0; i < rs->rs_nrates; i++) {
2333 rate = rs->rs_rates[i];
2334
2335 if (!(rate & IEEE80211_RATE_BASIC))
2336 continue;
2337
2338 mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt,
2339 IEEE80211_RV(rate));
2340 }
2341
2342 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, mask);
2343
2344 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
2345 }
2346
2347 static void
2348 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2349 {
2350 uint32_t tmp;
2351
2352 /* set ON period to 70ms and OFF period to 30ms */
2353 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
2354 RAL_WRITE(sc, RT2560_LEDCSR, tmp);
2355 }
2356
2357 static void
2358 rt2560_set_bssid(struct rt2560_softc *sc, const uint8_t *bssid)
2359 {
2360 uint32_t tmp;
2361
2362 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2363 RAL_WRITE(sc, RT2560_CSR5, tmp);
2364
2365 tmp = bssid[4] | bssid[5] << 8;
2366 RAL_WRITE(sc, RT2560_CSR6, tmp);
2367
2368 DPRINTF(sc, "setting BSSID to %6D\n", bssid, ":");
2369 }
2370
2371 static void
2372 rt2560_set_macaddr(struct rt2560_softc *sc, const uint8_t *addr)
2373 {
2374 uint32_t tmp;
2375
2376 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2377 RAL_WRITE(sc, RT2560_CSR3, tmp);
2378
2379 tmp = addr[4] | addr[5] << 8;
2380 RAL_WRITE(sc, RT2560_CSR4, tmp);
2381
2382 DPRINTF(sc, "setting MAC address to %6D\n", addr, ":");
2383 }
2384
2385 static void
2386 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2387 {
2388 uint32_t tmp;
2389
2390 tmp = RAL_READ(sc, RT2560_CSR3);
2391 addr[0] = tmp & 0xff;
2392 addr[1] = (tmp >> 8) & 0xff;
2393 addr[2] = (tmp >> 16) & 0xff;
2394 addr[3] = (tmp >> 24);
2395
2396 tmp = RAL_READ(sc, RT2560_CSR4);
2397 addr[4] = tmp & 0xff;
2398 addr[5] = (tmp >> 8) & 0xff;
2399 }
2400
2401 static void
2402 rt2560_update_promisc(struct ieee80211com *ic)
2403 {
2404 struct rt2560_softc *sc = ic->ic_softc;
2405 uint32_t tmp;
2406
2407 tmp = RAL_READ(sc, RT2560_RXCSR0);
2408
2409 tmp &= ~RT2560_DROP_NOT_TO_ME;
2410 if (ic->ic_promisc == 0)
2411 tmp |= RT2560_DROP_NOT_TO_ME;
2412
2413 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2414
2415 DPRINTF(sc, "%s promiscuous mode\n",
2416 (ic->ic_promisc > 0) ? "entering" : "leaving");
2417 }
2418
2419 static const char *
2420 rt2560_get_rf(int rev)
2421 {
2422 switch (rev) {
2423 case RT2560_RF_2522: return "RT2522";
2424 case RT2560_RF_2523: return "RT2523";
2425 case RT2560_RF_2524: return "RT2524";
2426 case RT2560_RF_2525: return "RT2525";
2427 case RT2560_RF_2525E: return "RT2525e";
2428 case RT2560_RF_2526: return "RT2526";
2429 case RT2560_RF_5222: return "RT5222";
2430 default: return "unknown";
2431 }
2432 }
2433
2434 static void
2435 rt2560_read_config(struct rt2560_softc *sc)
2436 {
2437 uint16_t val;
2438 int i;
2439
2440 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
2441 sc->rf_rev = (val >> 11) & 0x7;
2442 sc->hw_radio = (val >> 10) & 0x1;
2443 sc->led_mode = (val >> 6) & 0x7;
2444 sc->rx_ant = (val >> 4) & 0x3;
2445 sc->tx_ant = (val >> 2) & 0x3;
2446 sc->nb_ant = val & 0x3;
2447
2448 /* read default values for BBP registers */
2449 for (i = 0; i < 16; i++) {
2450 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
2451 if (val == 0 || val == 0xffff)
2452 continue;
2453
2454 sc->bbp_prom[i].reg = val >> 8;
2455 sc->bbp_prom[i].val = val & 0xff;
2456 }
2457
2458 /* read Tx power for all b/g channels */
2459 for (i = 0; i < 14 / 2; i++) {
2460 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
2461 sc->txpow[i * 2] = val & 0xff;
2462 sc->txpow[i * 2 + 1] = val >> 8;
2463 }
2464 for (i = 0; i < 14; ++i) {
2465 if (sc->txpow[i] > 31)
2466 sc->txpow[i] = 24;
2467 }
2468
2469 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CALIBRATE);
2470 if ((val & 0xff) == 0xff)
2471 sc->rssi_corr = RT2560_DEFAULT_RSSI_CORR;
2472 else
2473 sc->rssi_corr = val & 0xff;
2474 DPRINTF(sc, "rssi correction %d, calibrate 0x%02x\n",
2475 sc->rssi_corr, val);
2476 }
2477
2478
2479 static void
2480 rt2560_scan_start(struct ieee80211com *ic)
2481 {
2482 struct rt2560_softc *sc = ic->ic_softc;
2483
2484 /* abort TSF synchronization */
2485 RAL_WRITE(sc, RT2560_CSR14, 0);
2486 rt2560_set_bssid(sc, ieee80211broadcastaddr);
2487 }
2488
2489 static void
2490 rt2560_scan_end(struct ieee80211com *ic)
2491 {
2492 struct rt2560_softc *sc = ic->ic_softc;
2493 struct ieee80211vap *vap = ic->ic_scan->ss_vap;
2494
2495 rt2560_enable_tsf_sync(sc);
2496 /* XXX keep local copy */
2497 rt2560_set_bssid(sc, vap->iv_bss->ni_bssid);
2498 }
2499
2500 static int
2501 rt2560_bbp_init(struct rt2560_softc *sc)
2502 {
2503 int i, ntries;
2504
2505 /* wait for BBP to be ready */
2506 for (ntries = 0; ntries < 100; ntries++) {
2507 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
2508 break;
2509 DELAY(1);
2510 }
2511 if (ntries == 100) {
2512 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2513 return EIO;
2514 }
2515
2516 /* initialize BBP registers to default values */
2517 for (i = 0; i < nitems(rt2560_def_bbp); i++) {
2518 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2519 rt2560_def_bbp[i].val);
2520 }
2521
2522 /* initialize BBP registers to values stored in EEPROM */
2523 for (i = 0; i < 16; i++) {
2524 if (sc->bbp_prom[i].reg == 0 && sc->bbp_prom[i].val == 0)
2525 break;
2526 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2527 }
2528 rt2560_bbp_write(sc, 17, 0x48); /* XXX restore bbp17 */
2529
2530 return 0;
2531 }
2532
2533 static void
2534 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2535 {
2536 uint32_t tmp;
2537 uint8_t tx;
2538
2539 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
2540 if (antenna == 1)
2541 tx |= RT2560_BBP_ANTA;
2542 else if (antenna == 2)
2543 tx |= RT2560_BBP_ANTB;
2544 else
2545 tx |= RT2560_BBP_DIVERSITY;
2546
2547 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2548 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 ||
2549 sc->rf_rev == RT2560_RF_5222)
2550 tx |= RT2560_BBP_FLIPIQ;
2551
2552 rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
2553
2554 /* update values for CCK and OFDM in BBPCSR1 */
2555 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
2556 tmp |= (tx & 0x7) << 16 | (tx & 0x7);
2557 RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
2558 }
2559
2560 static void
2561 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2562 {
2563 uint8_t rx;
2564
2565 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
2566 if (antenna == 1)
2567 rx |= RT2560_BBP_ANTA;
2568 else if (antenna == 2)
2569 rx |= RT2560_BBP_ANTB;
2570 else
2571 rx |= RT2560_BBP_DIVERSITY;
2572
2573 /* need to force no I/Q flip for RF 2525e and 2526 */
2574 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526)
2575 rx &= ~RT2560_BBP_FLIPIQ;
2576
2577 rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
2578 }
2579
2580 static void
2581 rt2560_init_locked(struct rt2560_softc *sc)
2582 {
2583 struct ieee80211com *ic = &sc->sc_ic;
2584 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2585 uint32_t tmp;
2586 int i;
2587
2588 RAL_LOCK_ASSERT(sc);
2589
2590 rt2560_stop_locked(sc);
2591
2592 /* setup tx rings */
2593 tmp = RT2560_PRIO_RING_COUNT << 24 |
2594 RT2560_ATIM_RING_COUNT << 16 |
2595 RT2560_TX_RING_COUNT << 8 |
2596 RT2560_TX_DESC_SIZE;
2597
2598 /* rings must be initialized in this exact order */
2599 RAL_WRITE(sc, RT2560_TXCSR2, tmp);
2600 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
2601 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
2602 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
2603 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
2604
2605 /* setup rx ring */
2606 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
2607
2608 RAL_WRITE(sc, RT2560_RXCSR1, tmp);
2609 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
2610
2611 /* initialize MAC registers to default values */
2612 for (i = 0; i < nitems(rt2560_def_mac); i++)
2613 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
2614
2615 rt2560_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr);
2616
2617 /* set basic rate set (will be updated later) */
2618 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
2619
2620 rt2560_update_slot(ic);
2621 rt2560_update_plcp(sc);
2622 rt2560_update_led(sc, 0, 0);
2623
2624 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2625 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
2626
2627 if (rt2560_bbp_init(sc) != 0) {
2628 rt2560_stop_locked(sc);
2629 return;
2630 }
2631
2632 rt2560_set_txantenna(sc, sc->tx_ant);
2633 rt2560_set_rxantenna(sc, sc->rx_ant);
2634
2635 /* set default BSS channel */
2636 rt2560_set_chan(sc, ic->ic_curchan);
2637
2638 /* kick Rx */
2639 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
2640 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2641 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
2642 if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2643 ic->ic_opmode != IEEE80211_M_MBSS)
2644 tmp |= RT2560_DROP_TODS;
2645 if (ic->ic_promisc == 0)
2646 tmp |= RT2560_DROP_NOT_TO_ME;
2647 }
2648 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2649
2650 /* clear old FCS and Rx FIFO errors */
2651 RAL_READ(sc, RT2560_CNT0);
2652 RAL_READ(sc, RT2560_CNT4);
2653
2654 /* clear any pending interrupts */
2655 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2656
2657 /* enable interrupts */
2658 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
2659
2660 sc->sc_flags |= RT2560_F_RUNNING;
2661
2662 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc);
2663 }
2664
2665 static void
2666 rt2560_init(void *priv)
2667 {
2668 struct rt2560_softc *sc = priv;
2669 struct ieee80211com *ic = &sc->sc_ic;
2670
2671 RAL_LOCK(sc);
2672 rt2560_init_locked(sc);
2673 RAL_UNLOCK(sc);
2674
2675 if (sc->sc_flags & RT2560_F_RUNNING)
2676 ieee80211_start_all(ic); /* start all vap's */
2677 }
2678
2679 static void
2680 rt2560_stop_locked(struct rt2560_softc *sc)
2681 {
2682 volatile int *flags = &sc->sc_flags;
2683
2684 RAL_LOCK_ASSERT(sc);
2685
2686 while (*flags & RT2560_F_INPUT_RUNNING)
2687 msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2688
2689 callout_stop(&sc->watchdog_ch);
2690 sc->sc_tx_timer = 0;
2691
2692 if (sc->sc_flags & RT2560_F_RUNNING) {
2693 sc->sc_flags &= ~RT2560_F_RUNNING;
2694
2695 /* abort Tx */
2696 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
2697
2698 /* disable Rx */
2699 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
2700
2701 /* reset ASIC (imply reset BBP) */
2702 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2703 RAL_WRITE(sc, RT2560_CSR1, 0);
2704
2705 /* disable interrupts */
2706 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
2707
2708 /* reset Tx and Rx rings */
2709 rt2560_reset_tx_ring(sc, &sc->txq);
2710 rt2560_reset_tx_ring(sc, &sc->atimq);
2711 rt2560_reset_tx_ring(sc, &sc->prioq);
2712 rt2560_reset_tx_ring(sc, &sc->bcnq);
2713 rt2560_reset_rx_ring(sc, &sc->rxq);
2714 }
2715 }
2716
2717 void
2718 rt2560_stop(void *arg)
2719 {
2720 struct rt2560_softc *sc = arg;
2721
2722 RAL_LOCK(sc);
2723 rt2560_stop_locked(sc);
2724 RAL_UNLOCK(sc);
2725 }
2726
2727 static int
2728 rt2560_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2729 const struct ieee80211_bpf_params *params)
2730 {
2731 struct ieee80211com *ic = ni->ni_ic;
2732 struct rt2560_softc *sc = ic->ic_softc;
2733
2734 RAL_LOCK(sc);
2735
2736 /* prevent management frames from being sent if we're not ready */
2737 if (!(sc->sc_flags & RT2560_F_RUNNING)) {
2738 RAL_UNLOCK(sc);
2739 m_freem(m);
2740 return ENETDOWN;
2741 }
2742 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
2743 RAL_UNLOCK(sc);
2744 m_freem(m);
2745 return ENOBUFS; /* XXX */
2746 }
2747
2748 if (params == NULL) {
2749 /*
2750 * Legacy path; interpret frame contents to decide
2751 * precisely how to send the frame.
2752 */
2753 if (rt2560_tx_mgt(sc, m, ni) != 0)
2754 goto bad;
2755 } else {
2756 /*
2757 * Caller supplied explicit parameters to use in
2758 * sending the frame.
2759 */
2760 if (rt2560_tx_raw(sc, m, ni, params))
2761 goto bad;
2762 }
2763 sc->sc_tx_timer = 5;
2764
2765 RAL_UNLOCK(sc);
2766
2767 return 0;
2768 bad:
2769 RAL_UNLOCK(sc);
2770 return EIO; /* XXX */
2771 }
Cache object: c9600dd13728b793a51fa8fb465a5793
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