Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ral/rt2560.c
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1 /* $FreeBSD$ */ 2 3 /*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __FBSDID("$FreeBSD$"); 22 23 /*- 24 * Ralink Technology RT2560 chipset driver 25 * http://www.ralinktech.com/ 26 */ 27 28 #include <sys/param.h> 29 #include <sys/sysctl.h> 30 #include <sys/sockio.h> 31 #include <sys/mbuf.h> 32 #include <sys/kernel.h> 33 #include <sys/socket.h> 34 #include <sys/systm.h> 35 #include <sys/malloc.h> 36 #include <sys/lock.h> 37 #include <sys/mutex.h> 38 #include <sys/module.h> 39 #include <sys/bus.h> 40 #include <sys/endian.h> 41 42 #include <machine/bus.h> 43 #include <machine/resource.h> 44 #include <sys/rman.h> 45 46 #include <net/bpf.h> 47 #include <net/if.h> 48 #include <net/if_var.h> 49 #include <net/if_arp.h> 50 #include <net/ethernet.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 55 #include <net80211/ieee80211_var.h> 56 #include <net80211/ieee80211_radiotap.h> 57 #include <net80211/ieee80211_regdomain.h> 58 #include <net80211/ieee80211_ratectl.h> 59 60 #include <netinet/in.h> 61 #include <netinet/in_systm.h> 62 #include <netinet/in_var.h> 63 #include <netinet/ip.h> 64 #include <netinet/if_ether.h> 65 66 #include <dev/ral/rt2560reg.h> 67 #include <dev/ral/rt2560var.h> 68 69 #define RT2560_RSSI(sc, rssi) \ 70 ((rssi) > (RT2560_NOISE_FLOOR + (sc)->rssi_corr) ? \ 71 ((rssi) - RT2560_NOISE_FLOOR - (sc)->rssi_corr) : 0) 72 73 #define RAL_DEBUG 74 #ifdef RAL_DEBUG 75 #define DPRINTF(sc, fmt, ...) do { \ 76 if (sc->sc_debug > 0) \ 77 printf(fmt, __VA_ARGS__); \ 78 } while (0) 79 #define DPRINTFN(sc, n, fmt, ...) do { \ 80 if (sc->sc_debug >= (n)) \ 81 printf(fmt, __VA_ARGS__); \ 82 } while (0) 83 #else 84 #define DPRINTF(sc, fmt, ...) 85 #define DPRINTFN(sc, n, fmt, ...) 86 #endif 87 88 static struct ieee80211vap *rt2560_vap_create(struct ieee80211com *, 89 const char [IFNAMSIZ], int, enum ieee80211_opmode, 90 int, const uint8_t [IEEE80211_ADDR_LEN], 91 const uint8_t [IEEE80211_ADDR_LEN]); 92 static void rt2560_vap_delete(struct ieee80211vap *); 93 static void rt2560_dma_map_addr(void *, bus_dma_segment_t *, int, 94 int); 95 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 96 struct rt2560_tx_ring *, int); 97 static void rt2560_reset_tx_ring(struct rt2560_softc *, 98 struct rt2560_tx_ring *); 99 static void rt2560_free_tx_ring(struct rt2560_softc *, 100 struct rt2560_tx_ring *); 101 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 102 struct rt2560_rx_ring *, int); 103 static void rt2560_reset_rx_ring(struct rt2560_softc *, 104 struct rt2560_rx_ring *); 105 static void rt2560_free_rx_ring(struct rt2560_softc *, 106 struct rt2560_rx_ring *); 107 static int rt2560_newstate(struct ieee80211vap *, 108 enum ieee80211_state, int); 109 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 110 static void rt2560_encryption_intr(struct rt2560_softc *); 111 static void rt2560_tx_intr(struct rt2560_softc *); 112 static void rt2560_prio_intr(struct rt2560_softc *); 113 static void rt2560_decryption_intr(struct rt2560_softc *); 114 static void rt2560_rx_intr(struct rt2560_softc *); 115 static void rt2560_beacon_update(struct ieee80211vap *, int item); 116 static void rt2560_beacon_expire(struct rt2560_softc *); 117 static void rt2560_wakeup_expire(struct rt2560_softc *); 118 static void rt2560_scan_start(struct ieee80211com *); 119 static void rt2560_scan_end(struct ieee80211com *); 120 static void rt2560_getradiocaps(struct ieee80211com *, int, int *, 121 struct ieee80211_channel[]); 122 static void rt2560_set_channel(struct ieee80211com *); 123 static void rt2560_setup_tx_desc(struct rt2560_softc *, 124 struct rt2560_tx_desc *, uint32_t, int, int, int, 125 bus_addr_t); 126 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 127 struct ieee80211_node *); 128 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 129 struct ieee80211_node *); 130 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 131 struct ieee80211_node *); 132 static int rt2560_transmit(struct ieee80211com *, struct mbuf *); 133 static void rt2560_start(struct rt2560_softc *); 134 static void rt2560_watchdog(void *); 135 static void rt2560_parent(struct ieee80211com *); 136 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, 137 uint8_t); 138 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 139 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, 140 uint32_t); 141 static void rt2560_set_chan(struct rt2560_softc *, 142 struct ieee80211_channel *); 143 #if 0 144 static void rt2560_disable_rf_tune(struct rt2560_softc *); 145 #endif 146 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 147 static void rt2560_enable_tsf(struct rt2560_softc *); 148 static void rt2560_update_plcp(struct rt2560_softc *); 149 static void rt2560_update_slot(struct ieee80211com *); 150 static void rt2560_set_basicrates(struct rt2560_softc *, 151 const struct ieee80211_rateset *); 152 static void rt2560_update_led(struct rt2560_softc *, int, int); 153 static void rt2560_set_bssid(struct rt2560_softc *, const uint8_t *); 154 static void rt2560_set_macaddr(struct rt2560_softc *, 155 const uint8_t *); 156 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 157 static void rt2560_update_promisc(struct ieee80211com *); 158 static const char *rt2560_get_rf(int); 159 static void rt2560_read_config(struct rt2560_softc *); 160 static int rt2560_bbp_init(struct rt2560_softc *); 161 static void rt2560_set_txantenna(struct rt2560_softc *, int); 162 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 163 static void rt2560_init_locked(struct rt2560_softc *); 164 static void rt2560_init(void *); 165 static void rt2560_stop_locked(struct rt2560_softc *); 166 static int rt2560_raw_xmit(struct ieee80211_node *, struct mbuf *, 167 const struct ieee80211_bpf_params *); 168 169 static const struct { 170 uint32_t reg; 171 uint32_t val; 172 } rt2560_def_mac[] = { 173 RT2560_DEF_MAC 174 }; 175 176 static const struct { 177 uint8_t reg; 178 uint8_t val; 179 } rt2560_def_bbp[] = { 180 RT2560_DEF_BBP 181 }; 182 183 static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 184 static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 185 static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 186 static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 187 static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 188 static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 189 static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 190 static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 191 192 static const uint8_t rt2560_chan_5ghz[] = 193 { 36, 40, 44, 48, 52, 56, 60, 64, 194 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 195 149, 153, 157, 161 }; 196 197 static const struct { 198 uint8_t chan; 199 uint32_t r1, r2, r4; 200 } rt2560_rf5222[] = { 201 RT2560_RF5222 202 }; 203 204 int 205 rt2560_attach(device_t dev, int id) 206 { 207 struct rt2560_softc *sc = device_get_softc(dev); 208 struct ieee80211com *ic = &sc->sc_ic; 209 int error; 210 211 sc->sc_dev = dev; 212 213 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 214 MTX_DEF | MTX_RECURSE); 215 216 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); 217 mbufq_init(&sc->sc_snd, ifqmaxlen); 218 219 /* retrieve RT2560 rev. no */ 220 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 221 222 /* retrieve RF rev. no and various other things from EEPROM */ 223 rt2560_read_config(sc); 224 225 device_printf(dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 226 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 227 228 /* 229 * Allocate Tx and Rx rings. 230 */ 231 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 232 if (error != 0) { 233 device_printf(sc->sc_dev, "could not allocate Tx ring\n"); 234 goto fail1; 235 } 236 237 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 238 if (error != 0) { 239 device_printf(sc->sc_dev, "could not allocate ATIM ring\n"); 240 goto fail2; 241 } 242 243 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 244 if (error != 0) { 245 device_printf(sc->sc_dev, "could not allocate Prio ring\n"); 246 goto fail3; 247 } 248 249 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 250 if (error != 0) { 251 device_printf(sc->sc_dev, "could not allocate Beacon ring\n"); 252 goto fail4; 253 } 254 255 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 256 if (error != 0) { 257 device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 258 goto fail5; 259 } 260 261 /* retrieve MAC address */ 262 rt2560_get_macaddr(sc, ic->ic_macaddr); 263 264 ic->ic_softc = sc; 265 ic->ic_name = device_get_nameunit(dev); 266 ic->ic_opmode = IEEE80211_M_STA; 267 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 268 269 /* set device capabilities */ 270 ic->ic_caps = 271 IEEE80211_C_STA /* station mode */ 272 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 273 | IEEE80211_C_HOSTAP /* hostap mode */ 274 | IEEE80211_C_MONITOR /* monitor mode */ 275 | IEEE80211_C_AHDEMO /* adhoc demo mode */ 276 | IEEE80211_C_WDS /* 4-address traffic works */ 277 | IEEE80211_C_MBSS /* mesh point link mode */ 278 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 279 | IEEE80211_C_SHSLOT /* short slot time supported */ 280 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 281 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 282 #ifdef notyet 283 | IEEE80211_C_TXFRAG /* handle tx frags */ 284 #endif 285 ; 286 287 rt2560_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 288 ic->ic_channels); 289 290 ieee80211_ifattach(ic); 291 ic->ic_raw_xmit = rt2560_raw_xmit; 292 ic->ic_updateslot = rt2560_update_slot; 293 ic->ic_update_promisc = rt2560_update_promisc; 294 ic->ic_scan_start = rt2560_scan_start; 295 ic->ic_scan_end = rt2560_scan_end; 296 ic->ic_getradiocaps = rt2560_getradiocaps; 297 ic->ic_set_channel = rt2560_set_channel; 298 299 ic->ic_vap_create = rt2560_vap_create; 300 ic->ic_vap_delete = rt2560_vap_delete; 301 ic->ic_parent = rt2560_parent; 302 ic->ic_transmit = rt2560_transmit; 303 304 ieee80211_radiotap_attach(ic, 305 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 306 RT2560_TX_RADIOTAP_PRESENT, 307 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 308 RT2560_RX_RADIOTAP_PRESENT); 309 310 /* 311 * Add a few sysctl knobs. 312 */ 313 #ifdef RAL_DEBUG 314 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 315 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 316 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 317 #endif 318 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 319 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 320 "txantenna", CTLFLAG_RW, &sc->tx_ant, 0, "tx antenna (0=auto)"); 321 322 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 323 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 324 "rxantenna", CTLFLAG_RW, &sc->rx_ant, 0, "rx antenna (0=auto)"); 325 326 if (bootverbose) 327 ieee80211_announce(ic); 328 329 return 0; 330 331 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 332 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 333 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 334 fail2: rt2560_free_tx_ring(sc, &sc->txq); 335 fail1: mtx_destroy(&sc->sc_mtx); 336 337 return ENXIO; 338 } 339 340 int 341 rt2560_detach(void *xsc) 342 { 343 struct rt2560_softc *sc = xsc; 344 struct ieee80211com *ic = &sc->sc_ic; 345 346 rt2560_stop(sc); 347 348 ieee80211_ifdetach(ic); 349 mbufq_drain(&sc->sc_snd); 350 351 rt2560_free_tx_ring(sc, &sc->txq); 352 rt2560_free_tx_ring(sc, &sc->atimq); 353 rt2560_free_tx_ring(sc, &sc->prioq); 354 rt2560_free_tx_ring(sc, &sc->bcnq); 355 rt2560_free_rx_ring(sc, &sc->rxq); 356 357 mtx_destroy(&sc->sc_mtx); 358 359 return 0; 360 } 361 362 static struct ieee80211vap * 363 rt2560_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 364 enum ieee80211_opmode opmode, int flags, 365 const uint8_t bssid[IEEE80211_ADDR_LEN], 366 const uint8_t mac[IEEE80211_ADDR_LEN]) 367 { 368 struct rt2560_softc *sc = ic->ic_softc; 369 struct rt2560_vap *rvp; 370 struct ieee80211vap *vap; 371 372 switch (opmode) { 373 case IEEE80211_M_STA: 374 case IEEE80211_M_IBSS: 375 case IEEE80211_M_AHDEMO: 376 case IEEE80211_M_MONITOR: 377 case IEEE80211_M_HOSTAP: 378 case IEEE80211_M_MBSS: 379 /* XXXRP: TBD */ 380 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 381 device_printf(sc->sc_dev, "only 1 vap supported\n"); 382 return NULL; 383 } 384 if (opmode == IEEE80211_M_STA) 385 flags |= IEEE80211_CLONE_NOBEACONS; 386 break; 387 case IEEE80211_M_WDS: 388 if (TAILQ_EMPTY(&ic->ic_vaps) || 389 ic->ic_opmode != IEEE80211_M_HOSTAP) { 390 device_printf(sc->sc_dev, 391 "wds only supported in ap mode\n"); 392 return NULL; 393 } 394 /* 395 * Silently remove any request for a unique 396 * bssid; WDS vap's always share the local 397 * mac address. 398 */ 399 flags &= ~IEEE80211_CLONE_BSSID; 400 break; 401 default: 402 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode); 403 return NULL; 404 } 405 rvp = malloc(sizeof(struct rt2560_vap), M_80211_VAP, M_WAITOK | M_ZERO); 406 vap = &rvp->ral_vap; 407 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid); 408 409 /* override state transition machine */ 410 rvp->ral_newstate = vap->iv_newstate; 411 vap->iv_newstate = rt2560_newstate; 412 vap->iv_update_beacon = rt2560_beacon_update; 413 414 ieee80211_ratectl_init(vap); 415 /* complete setup */ 416 ieee80211_vap_attach(vap, ieee80211_media_change, 417 ieee80211_media_status, mac); 418 if (TAILQ_FIRST(&ic->ic_vaps) == vap) 419 ic->ic_opmode = opmode; 420 return vap; 421 } 422 423 static void 424 rt2560_vap_delete(struct ieee80211vap *vap) 425 { 426 struct rt2560_vap *rvp = RT2560_VAP(vap); 427 428 ieee80211_ratectl_deinit(vap); 429 ieee80211_vap_detach(vap); 430 free(rvp, M_80211_VAP); 431 } 432 433 void 434 rt2560_resume(void *xsc) 435 { 436 struct rt2560_softc *sc = xsc; 437 438 if (sc->sc_ic.ic_nrunning > 0) 439 rt2560_init(sc); 440 } 441 442 static void 443 rt2560_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 444 { 445 if (error != 0) 446 return; 447 448 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 449 450 *(bus_addr_t *)arg = segs[0].ds_addr; 451 } 452 453 static int 454 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 455 int count) 456 { 457 int i, error; 458 459 ring->count = count; 460 ring->queued = 0; 461 ring->cur = ring->next = 0; 462 ring->cur_encrypt = ring->next_encrypt = 0; 463 464 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 465 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 466 count * RT2560_TX_DESC_SIZE, 1, count * RT2560_TX_DESC_SIZE, 467 0, NULL, NULL, &ring->desc_dmat); 468 if (error != 0) { 469 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 470 goto fail; 471 } 472 473 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 474 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 475 if (error != 0) { 476 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 477 goto fail; 478 } 479 480 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 481 count * RT2560_TX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr, 482 0); 483 if (error != 0) { 484 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 485 goto fail; 486 } 487 488 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 489 M_NOWAIT | M_ZERO); 490 if (ring->data == NULL) { 491 device_printf(sc->sc_dev, "could not allocate soft data\n"); 492 error = ENOMEM; 493 goto fail; 494 } 495 496 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 497 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 498 MCLBYTES, RT2560_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, 499 &ring->data_dmat); 500 if (error != 0) { 501 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 502 goto fail; 503 } 504 505 for (i = 0; i < count; i++) { 506 error = bus_dmamap_create(ring->data_dmat, 0, 507 &ring->data[i].map); 508 if (error != 0) { 509 device_printf(sc->sc_dev, "could not create DMA map\n"); 510 goto fail; 511 } 512 } 513 514 return 0; 515 516 fail: rt2560_free_tx_ring(sc, ring); 517 return error; 518 } 519 520 static void 521 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 522 { 523 struct rt2560_tx_desc *desc; 524 struct rt2560_tx_data *data; 525 int i; 526 527 for (i = 0; i < ring->count; i++) { 528 desc = &ring->desc[i]; 529 data = &ring->data[i]; 530 531 if (data->m != NULL) { 532 bus_dmamap_sync(ring->data_dmat, data->map, 533 BUS_DMASYNC_POSTWRITE); 534 bus_dmamap_unload(ring->data_dmat, data->map); 535 m_freem(data->m); 536 data->m = NULL; 537 } 538 539 if (data->ni != NULL) { 540 ieee80211_free_node(data->ni); 541 data->ni = NULL; 542 } 543 544 desc->flags = 0; 545 } 546 547 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 548 549 ring->queued = 0; 550 ring->cur = ring->next = 0; 551 ring->cur_encrypt = ring->next_encrypt = 0; 552 } 553 554 static void 555 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 556 { 557 struct rt2560_tx_data *data; 558 int i; 559 560 if (ring->desc != NULL) { 561 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 562 BUS_DMASYNC_POSTWRITE); 563 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 564 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 565 } 566 567 if (ring->desc_dmat != NULL) 568 bus_dma_tag_destroy(ring->desc_dmat); 569 570 if (ring->data != NULL) { 571 for (i = 0; i < ring->count; i++) { 572 data = &ring->data[i]; 573 574 if (data->m != NULL) { 575 bus_dmamap_sync(ring->data_dmat, data->map, 576 BUS_DMASYNC_POSTWRITE); 577 bus_dmamap_unload(ring->data_dmat, data->map); 578 m_freem(data->m); 579 } 580 581 if (data->ni != NULL) 582 ieee80211_free_node(data->ni); 583 584 if (data->map != NULL) 585 bus_dmamap_destroy(ring->data_dmat, data->map); 586 } 587 588 free(ring->data, M_DEVBUF); 589 } 590 591 if (ring->data_dmat != NULL) 592 bus_dma_tag_destroy(ring->data_dmat); 593 } 594 595 static int 596 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 597 int count) 598 { 599 struct rt2560_rx_desc *desc; 600 struct rt2560_rx_data *data; 601 bus_addr_t physaddr; 602 int i, error; 603 604 ring->count = count; 605 ring->cur = ring->next = 0; 606 ring->cur_decrypt = 0; 607 608 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 609 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 610 count * RT2560_RX_DESC_SIZE, 1, count * RT2560_RX_DESC_SIZE, 611 0, NULL, NULL, &ring->desc_dmat); 612 if (error != 0) { 613 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 614 goto fail; 615 } 616 617 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 618 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 619 if (error != 0) { 620 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 621 goto fail; 622 } 623 624 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 625 count * RT2560_RX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr, 626 0); 627 if (error != 0) { 628 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 629 goto fail; 630 } 631 632 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 633 M_NOWAIT | M_ZERO); 634 if (ring->data == NULL) { 635 device_printf(sc->sc_dev, "could not allocate soft data\n"); 636 error = ENOMEM; 637 goto fail; 638 } 639 640 /* 641 * Pre-allocate Rx buffers and populate Rx ring. 642 */ 643 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 644 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 645 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 646 if (error != 0) { 647 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 648 goto fail; 649 } 650 651 for (i = 0; i < count; i++) { 652 desc = &sc->rxq.desc[i]; 653 data = &sc->rxq.data[i]; 654 655 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 656 if (error != 0) { 657 device_printf(sc->sc_dev, "could not create DMA map\n"); 658 goto fail; 659 } 660 661 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 662 if (data->m == NULL) { 663 device_printf(sc->sc_dev, 664 "could not allocate rx mbuf\n"); 665 error = ENOMEM; 666 goto fail; 667 } 668 669 error = bus_dmamap_load(ring->data_dmat, data->map, 670 mtod(data->m, void *), MCLBYTES, rt2560_dma_map_addr, 671 &physaddr, 0); 672 if (error != 0) { 673 device_printf(sc->sc_dev, 674 "could not load rx buf DMA map"); 675 goto fail; 676 } 677 678 desc->flags = htole32(RT2560_RX_BUSY); 679 desc->physaddr = htole32(physaddr); 680 } 681 682 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 683 684 return 0; 685 686 fail: rt2560_free_rx_ring(sc, ring); 687 return error; 688 } 689 690 static void 691 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 692 { 693 int i; 694 695 for (i = 0; i < ring->count; i++) { 696 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 697 ring->data[i].drop = 0; 698 } 699 700 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 701 702 ring->cur = ring->next = 0; 703 ring->cur_decrypt = 0; 704 } 705 706 static void 707 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 708 { 709 struct rt2560_rx_data *data; 710 int i; 711 712 if (ring->desc != NULL) { 713 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 714 BUS_DMASYNC_POSTWRITE); 715 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 716 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 717 } 718 719 if (ring->desc_dmat != NULL) 720 bus_dma_tag_destroy(ring->desc_dmat); 721 722 if (ring->data != NULL) { 723 for (i = 0; i < ring->count; i++) { 724 data = &ring->data[i]; 725 726 if (data->m != NULL) { 727 bus_dmamap_sync(ring->data_dmat, data->map, 728 BUS_DMASYNC_POSTREAD); 729 bus_dmamap_unload(ring->data_dmat, data->map); 730 m_freem(data->m); 731 } 732 733 if (data->map != NULL) 734 bus_dmamap_destroy(ring->data_dmat, data->map); 735 } 736 737 free(ring->data, M_DEVBUF); 738 } 739 740 if (ring->data_dmat != NULL) 741 bus_dma_tag_destroy(ring->data_dmat); 742 } 743 744 static int 745 rt2560_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 746 { 747 struct rt2560_vap *rvp = RT2560_VAP(vap); 748 struct rt2560_softc *sc = vap->iv_ic->ic_softc; 749 int error; 750 751 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 752 /* abort TSF synchronization */ 753 RAL_WRITE(sc, RT2560_CSR14, 0); 754 755 /* turn association led off */ 756 rt2560_update_led(sc, 0, 0); 757 } 758 759 error = rvp->ral_newstate(vap, nstate, arg); 760 761 if (error == 0 && nstate == IEEE80211_S_RUN) { 762 struct ieee80211_node *ni = vap->iv_bss; 763 struct mbuf *m; 764 765 if (vap->iv_opmode != IEEE80211_M_MONITOR) { 766 rt2560_update_plcp(sc); 767 rt2560_set_basicrates(sc, &ni->ni_rates); 768 rt2560_set_bssid(sc, ni->ni_bssid); 769 } 770 771 if (vap->iv_opmode == IEEE80211_M_HOSTAP || 772 vap->iv_opmode == IEEE80211_M_IBSS || 773 vap->iv_opmode == IEEE80211_M_MBSS) { 774 m = ieee80211_beacon_alloc(ni); 775 if (m == NULL) { 776 device_printf(sc->sc_dev, 777 "could not allocate beacon\n"); 778 return ENOBUFS; 779 } 780 ieee80211_ref_node(ni); 781 error = rt2560_tx_bcn(sc, m, ni); 782 if (error != 0) 783 return error; 784 } 785 786 /* turn association led on */ 787 rt2560_update_led(sc, 1, 0); 788 789 if (vap->iv_opmode != IEEE80211_M_MONITOR) 790 rt2560_enable_tsf_sync(sc); 791 else 792 rt2560_enable_tsf(sc); 793 } 794 return error; 795 } 796 797 /* 798 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 799 * 93C66). 800 */ 801 static uint16_t 802 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 803 { 804 uint32_t tmp; 805 uint16_t val; 806 int n; 807 808 /* clock C once before the first command */ 809 RT2560_EEPROM_CTL(sc, 0); 810 811 RT2560_EEPROM_CTL(sc, RT2560_S); 812 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 813 RT2560_EEPROM_CTL(sc, RT2560_S); 814 815 /* write start bit (1) */ 816 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 817 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 818 819 /* write READ opcode (10) */ 820 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 821 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 822 RT2560_EEPROM_CTL(sc, RT2560_S); 823 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 824 825 /* write address (A5-A0 or A7-A0) */ 826 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 827 for (; n >= 0; n--) { 828 RT2560_EEPROM_CTL(sc, RT2560_S | 829 (((addr >> n) & 1) << RT2560_SHIFT_D)); 830 RT2560_EEPROM_CTL(sc, RT2560_S | 831 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 832 } 833 834 RT2560_EEPROM_CTL(sc, RT2560_S); 835 836 /* read data Q15-Q0 */ 837 val = 0; 838 for (n = 15; n >= 0; n--) { 839 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 840 tmp = RAL_READ(sc, RT2560_CSR21); 841 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 842 RT2560_EEPROM_CTL(sc, RT2560_S); 843 } 844 845 RT2560_EEPROM_CTL(sc, 0); 846 847 /* clear Chip Select and clock C */ 848 RT2560_EEPROM_CTL(sc, RT2560_S); 849 RT2560_EEPROM_CTL(sc, 0); 850 RT2560_EEPROM_CTL(sc, RT2560_C); 851 852 return val; 853 } 854 855 /* 856 * Some frames were processed by the hardware cipher engine and are ready for 857 * transmission. 858 */ 859 static void 860 rt2560_encryption_intr(struct rt2560_softc *sc) 861 { 862 struct rt2560_tx_desc *desc; 863 int hw; 864 865 /* retrieve last descriptor index processed by cipher engine */ 866 hw = RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr; 867 hw /= RT2560_TX_DESC_SIZE; 868 869 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 870 BUS_DMASYNC_POSTREAD); 871 872 while (sc->txq.next_encrypt != hw) { 873 if (sc->txq.next_encrypt == sc->txq.cur_encrypt) { 874 printf("hw encrypt %d, cur_encrypt %d\n", hw, 875 sc->txq.cur_encrypt); 876 break; 877 } 878 879 desc = &sc->txq.desc[sc->txq.next_encrypt]; 880 881 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 882 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY)) 883 break; 884 885 /* for TKIP, swap eiv field to fix a bug in ASIC */ 886 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 887 RT2560_TX_CIPHER_TKIP) 888 desc->eiv = bswap32(desc->eiv); 889 890 /* mark the frame ready for transmission */ 891 desc->flags |= htole32(RT2560_TX_VALID); 892 desc->flags |= htole32(RT2560_TX_BUSY); 893 894 DPRINTFN(sc, 15, "encryption done idx=%u\n", 895 sc->txq.next_encrypt); 896 897 sc->txq.next_encrypt = 898 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 899 } 900 901 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 902 BUS_DMASYNC_PREWRITE); 903 904 /* kick Tx */ 905 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 906 } 907 908 static void 909 rt2560_tx_intr(struct rt2560_softc *sc) 910 { 911 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs; 912 struct rt2560_tx_desc *desc; 913 struct rt2560_tx_data *data; 914 struct mbuf *m; 915 struct ieee80211_node *ni; 916 uint32_t flags; 917 int status; 918 919 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 920 BUS_DMASYNC_POSTREAD); 921 922 txs->flags = IEEE80211_RATECTL_STATUS_LONG_RETRY; 923 for (;;) { 924 desc = &sc->txq.desc[sc->txq.next]; 925 data = &sc->txq.data[sc->txq.next]; 926 927 flags = le32toh(desc->flags); 928 if ((flags & RT2560_TX_BUSY) || 929 (flags & RT2560_TX_CIPHER_BUSY) || 930 !(flags & RT2560_TX_VALID)) 931 break; 932 933 m = data->m; 934 ni = data->ni; 935 936 switch (flags & RT2560_TX_RESULT_MASK) { 937 case RT2560_TX_SUCCESS: 938 txs->status = IEEE80211_RATECTL_TX_SUCCESS; 939 txs->long_retries = 0; 940 941 DPRINTFN(sc, 10, "%s\n", "data frame sent successfully"); 942 if (data->rix != IEEE80211_FIXED_RATE_NONE) 943 ieee80211_ratectl_tx_complete(ni, txs); 944 status = 0; 945 break; 946 947 case RT2560_TX_SUCCESS_RETRY: 948 txs->status = IEEE80211_RATECTL_TX_SUCCESS; 949 txs->long_retries = RT2560_TX_RETRYCNT(flags); 950 951 DPRINTFN(sc, 9, "data frame sent after %u retries\n", 952 txs->long_retries); 953 if (data->rix != IEEE80211_FIXED_RATE_NONE) 954 ieee80211_ratectl_tx_complete(ni, txs); 955 status = 0; 956 break; 957 958 case RT2560_TX_FAIL_RETRY: 959 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG; 960 txs->long_retries = RT2560_TX_RETRYCNT(flags); 961 962 DPRINTFN(sc, 9, "data frame failed after %d retries\n", 963 txs->long_retries); 964 if (data->rix != IEEE80211_FIXED_RATE_NONE) 965 ieee80211_ratectl_tx_complete(ni, txs); 966 status = 1; 967 break; 968 969 case RT2560_TX_FAIL_INVALID: 970 case RT2560_TX_FAIL_OTHER: 971 default: 972 device_printf(sc->sc_dev, "sending data frame failed " 973 "0x%08x\n", flags); 974 status = 1; 975 } 976 977 bus_dmamap_sync(sc->txq.data_dmat, data->map, 978 BUS_DMASYNC_POSTWRITE); 979 bus_dmamap_unload(sc->txq.data_dmat, data->map); 980 981 ieee80211_tx_complete(ni, m, status); 982 data->ni = NULL; 983 data->m = NULL; 984 985 /* descriptor is no longer valid */ 986 desc->flags &= ~htole32(RT2560_TX_VALID); 987 988 DPRINTFN(sc, 15, "tx done idx=%u\n", sc->txq.next); 989 990 sc->txq.queued--; 991 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 992 } 993 994 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 995 BUS_DMASYNC_PREWRITE); 996 997 if (sc->prioq.queued == 0 && sc->txq.queued == 0) 998 sc->sc_tx_timer = 0; 999 1000 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1) 1001 rt2560_start(sc); 1002 } 1003 1004 static void 1005 rt2560_prio_intr(struct rt2560_softc *sc) 1006 { 1007 struct rt2560_tx_desc *desc; 1008 struct rt2560_tx_data *data; 1009 struct ieee80211_node *ni; 1010 struct mbuf *m; 1011 int flags; 1012 1013 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1014 BUS_DMASYNC_POSTREAD); 1015 1016 for (;;) { 1017 desc = &sc->prioq.desc[sc->prioq.next]; 1018 data = &sc->prioq.data[sc->prioq.next]; 1019 1020 flags = le32toh(desc->flags); 1021 if ((flags & RT2560_TX_BUSY) || (flags & RT2560_TX_VALID) == 0) 1022 break; 1023 1024 switch (flags & RT2560_TX_RESULT_MASK) { 1025 case RT2560_TX_SUCCESS: 1026 DPRINTFN(sc, 10, "%s\n", "mgt frame sent successfully"); 1027 break; 1028 1029 case RT2560_TX_SUCCESS_RETRY: 1030 DPRINTFN(sc, 9, "mgt frame sent after %u retries\n", 1031 (flags >> 5) & 0x7); 1032 break; 1033 1034 case RT2560_TX_FAIL_RETRY: 1035 DPRINTFN(sc, 9, "%s\n", 1036 "sending mgt frame failed (too much retries)"); 1037 break; 1038 1039 case RT2560_TX_FAIL_INVALID: 1040 case RT2560_TX_FAIL_OTHER: 1041 default: 1042 device_printf(sc->sc_dev, "sending mgt frame failed " 1043 "0x%08x\n", flags); 1044 break; 1045 } 1046 1047 bus_dmamap_sync(sc->prioq.data_dmat, data->map, 1048 BUS_DMASYNC_POSTWRITE); 1049 bus_dmamap_unload(sc->prioq.data_dmat, data->map); 1050 1051 m = data->m; 1052 data->m = NULL; 1053 ni = data->ni; 1054 data->ni = NULL; 1055 1056 /* descriptor is no longer valid */ 1057 desc->flags &= ~htole32(RT2560_TX_VALID); 1058 1059 DPRINTFN(sc, 15, "prio done idx=%u\n", sc->prioq.next); 1060 1061 sc->prioq.queued--; 1062 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1063 1064 if (m->m_flags & M_TXCB) 1065 ieee80211_process_callback(ni, m, 1066 (flags & RT2560_TX_RESULT_MASK) &~ 1067 (RT2560_TX_SUCCESS | RT2560_TX_SUCCESS_RETRY)); 1068 m_freem(m); 1069 ieee80211_free_node(ni); 1070 } 1071 1072 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1073 BUS_DMASYNC_PREWRITE); 1074 1075 if (sc->prioq.queued == 0 && sc->txq.queued == 0) 1076 sc->sc_tx_timer = 0; 1077 1078 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT) 1079 rt2560_start(sc); 1080 } 1081 1082 /* 1083 * Some frames were processed by the hardware cipher engine and are ready for 1084 * handoff to the IEEE802.11 layer. 1085 */ 1086 static void 1087 rt2560_decryption_intr(struct rt2560_softc *sc) 1088 { 1089 struct ieee80211com *ic = &sc->sc_ic; 1090 struct rt2560_rx_desc *desc; 1091 struct rt2560_rx_data *data; 1092 bus_addr_t physaddr; 1093 struct ieee80211_frame *wh; 1094 struct ieee80211_node *ni; 1095 struct mbuf *mnew, *m; 1096 int hw, error; 1097 int8_t rssi, nf; 1098 1099 /* retrieve last descriptor index processed by cipher engine */ 1100 hw = RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr; 1101 hw /= RT2560_RX_DESC_SIZE; 1102 1103 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1104 BUS_DMASYNC_POSTREAD); 1105 1106 for (; sc->rxq.cur_decrypt != hw;) { 1107 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1108 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1109 1110 if ((le32toh(desc->flags) & RT2560_RX_BUSY) || 1111 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY)) 1112 break; 1113 1114 if (data->drop) { 1115 counter_u64_add(ic->ic_ierrors, 1); 1116 goto skip; 1117 } 1118 1119 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1120 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1121 counter_u64_add(ic->ic_ierrors, 1); 1122 goto skip; 1123 } 1124 1125 /* 1126 * Try to allocate a new mbuf for this ring element and load it 1127 * before processing the current mbuf. If the ring element 1128 * cannot be loaded, drop the received packet and reuse the old 1129 * mbuf. In the unlikely case that the old mbuf can't be 1130 * reloaded either, explicitly panic. 1131 */ 1132 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1133 if (mnew == NULL) { 1134 counter_u64_add(ic->ic_ierrors, 1); 1135 goto skip; 1136 } 1137 1138 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1139 BUS_DMASYNC_POSTREAD); 1140 bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1141 1142 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1143 mtod(mnew, void *), MCLBYTES, rt2560_dma_map_addr, 1144 &physaddr, 0); 1145 if (error != 0) { 1146 m_freem(mnew); 1147 1148 /* try to reload the old mbuf */ 1149 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1150 mtod(data->m, void *), MCLBYTES, 1151 rt2560_dma_map_addr, &physaddr, 0); 1152 if (error != 0) { 1153 /* very unlikely that it will fail... */ 1154 panic("%s: could not load old rx mbuf", 1155 device_get_name(sc->sc_dev)); 1156 } 1157 counter_u64_add(ic->ic_ierrors, 1); 1158 goto skip; 1159 } 1160 1161 /* 1162 * New mbuf successfully loaded, update Rx ring and continue 1163 * processing. 1164 */ 1165 m = data->m; 1166 data->m = mnew; 1167 desc->physaddr = htole32(physaddr); 1168 1169 /* finalize mbuf */ 1170 m->m_pkthdr.len = m->m_len = 1171 (le32toh(desc->flags) >> 16) & 0xfff; 1172 1173 rssi = RT2560_RSSI(sc, desc->rssi); 1174 nf = RT2560_NOISE_FLOOR; 1175 if (ieee80211_radiotap_active(ic)) { 1176 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1177 uint32_t tsf_lo, tsf_hi; 1178 1179 /* get timestamp (low and high 32 bits) */ 1180 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1181 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1182 1183 tap->wr_tsf = 1184 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1185 tap->wr_flags = 0; 1186 tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1187 (desc->flags & htole32(RT2560_RX_OFDM)) ? 1188 IEEE80211_T_OFDM : IEEE80211_T_CCK); 1189 tap->wr_antenna = sc->rx_ant; 1190 tap->wr_antsignal = nf + rssi; 1191 tap->wr_antnoise = nf; 1192 } 1193 1194 sc->sc_flags |= RT2560_F_INPUT_RUNNING; 1195 RAL_UNLOCK(sc); 1196 wh = mtod(m, struct ieee80211_frame *); 1197 ni = ieee80211_find_rxnode(ic, 1198 (struct ieee80211_frame_min *)wh); 1199 if (ni != NULL) { 1200 (void) ieee80211_input(ni, m, rssi, nf); 1201 ieee80211_free_node(ni); 1202 } else 1203 (void) ieee80211_input_all(ic, m, rssi, nf); 1204 1205 RAL_LOCK(sc); 1206 sc->sc_flags &= ~RT2560_F_INPUT_RUNNING; 1207 skip: desc->flags = htole32(RT2560_RX_BUSY); 1208 1209 DPRINTFN(sc, 15, "decryption done idx=%u\n", sc->rxq.cur_decrypt); 1210 1211 sc->rxq.cur_decrypt = 1212 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1213 } 1214 1215 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1216 BUS_DMASYNC_PREWRITE); 1217 } 1218 1219 /* 1220 * Some frames were received. Pass them to the hardware cipher engine before 1221 * sending them to the 802.11 layer. 1222 */ 1223 static void 1224 rt2560_rx_intr(struct rt2560_softc *sc) 1225 { 1226 struct rt2560_rx_desc *desc; 1227 struct rt2560_rx_data *data; 1228 1229 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1230 BUS_DMASYNC_POSTREAD); 1231 1232 for (;;) { 1233 desc = &sc->rxq.desc[sc->rxq.cur]; 1234 data = &sc->rxq.data[sc->rxq.cur]; 1235 1236 if ((le32toh(desc->flags) & RT2560_RX_BUSY) || 1237 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY)) 1238 break; 1239 1240 data->drop = 0; 1241 1242 if ((le32toh(desc->flags) & RT2560_RX_PHY_ERROR) || 1243 (le32toh(desc->flags) & RT2560_RX_CRC_ERROR)) { 1244 /* 1245 * This should not happen since we did not request 1246 * to receive those frames when we filled RXCSR0. 1247 */ 1248 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 1249 le32toh(desc->flags)); 1250 data->drop = 1; 1251 } 1252 1253 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1254 DPRINTFN(sc, 5, "%s\n", "bad length"); 1255 data->drop = 1; 1256 } 1257 1258 /* mark the frame for decryption */ 1259 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1260 1261 DPRINTFN(sc, 15, "rx done idx=%u\n", sc->rxq.cur); 1262 1263 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1264 } 1265 1266 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1267 BUS_DMASYNC_PREWRITE); 1268 1269 /* kick decrypt */ 1270 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1271 } 1272 1273 static void 1274 rt2560_beacon_update(struct ieee80211vap *vap, int item) 1275 { 1276 struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 1277 1278 setbit(bo->bo_flags, item); 1279 } 1280 1281 /* 1282 * This function is called periodically in IBSS mode when a new beacon must be 1283 * sent out. 1284 */ 1285 static void 1286 rt2560_beacon_expire(struct rt2560_softc *sc) 1287 { 1288 struct ieee80211com *ic = &sc->sc_ic; 1289 struct rt2560_tx_data *data; 1290 1291 if (ic->ic_opmode != IEEE80211_M_IBSS && 1292 ic->ic_opmode != IEEE80211_M_HOSTAP && 1293 ic->ic_opmode != IEEE80211_M_MBSS) 1294 return; 1295 1296 data = &sc->bcnq.data[sc->bcnq.next]; 1297 /* 1298 * Don't send beacon if bsschan isn't set 1299 */ 1300 if (data->ni == NULL) 1301 return; 1302 1303 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_POSTWRITE); 1304 bus_dmamap_unload(sc->bcnq.data_dmat, data->map); 1305 1306 /* XXX 1 =>'s mcast frames which means all PS sta's will wakeup! */ 1307 ieee80211_beacon_update(data->ni, data->m, 1); 1308 1309 rt2560_tx_bcn(sc, data->m, data->ni); 1310 1311 DPRINTFN(sc, 15, "%s", "beacon expired\n"); 1312 1313 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1314 } 1315 1316 /* ARGSUSED */ 1317 static void 1318 rt2560_wakeup_expire(struct rt2560_softc *sc) 1319 { 1320 DPRINTFN(sc, 2, "%s", "wakeup expired\n"); 1321 } 1322 1323 void 1324 rt2560_intr(void *arg) 1325 { 1326 struct rt2560_softc *sc = arg; 1327 uint32_t r; 1328 1329 RAL_LOCK(sc); 1330 1331 /* disable interrupts */ 1332 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1333 1334 /* don't re-enable interrupts if we're shutting down */ 1335 if (!(sc->sc_flags & RT2560_F_RUNNING)) { 1336 RAL_UNLOCK(sc); 1337 return; 1338 } 1339 1340 r = RAL_READ(sc, RT2560_CSR7); 1341 RAL_WRITE(sc, RT2560_CSR7, r); 1342 1343 if (r & RT2560_BEACON_EXPIRE) 1344 rt2560_beacon_expire(sc); 1345 1346 if (r & RT2560_WAKEUP_EXPIRE) 1347 rt2560_wakeup_expire(sc); 1348 1349 if (r & RT2560_ENCRYPTION_DONE) 1350 rt2560_encryption_intr(sc); 1351 1352 if (r & RT2560_TX_DONE) 1353 rt2560_tx_intr(sc); 1354 1355 if (r & RT2560_PRIO_DONE) 1356 rt2560_prio_intr(sc); 1357 1358 if (r & RT2560_DECRYPTION_DONE) 1359 rt2560_decryption_intr(sc); 1360 1361 if (r & RT2560_RX_DONE) { 1362 rt2560_rx_intr(sc); 1363 rt2560_encryption_intr(sc); 1364 } 1365 1366 /* re-enable interrupts */ 1367 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1368 1369 RAL_UNLOCK(sc); 1370 } 1371 1372 #define RAL_SIFS 10 /* us */ 1373 1374 #define RT2560_TXRX_TURNAROUND 10 /* us */ 1375 1376 static uint8_t 1377 rt2560_plcp_signal(int rate) 1378 { 1379 switch (rate) { 1380 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1381 case 12: return 0xb; 1382 case 18: return 0xf; 1383 case 24: return 0xa; 1384 case 36: return 0xe; 1385 case 48: return 0x9; 1386 case 72: return 0xd; 1387 case 96: return 0x8; 1388 case 108: return 0xc; 1389 1390 /* CCK rates (NB: not IEEE std, device-specific) */ 1391 case 2: return 0x0; 1392 case 4: return 0x1; 1393 case 11: return 0x2; 1394 case 22: return 0x3; 1395 } 1396 return 0xff; /* XXX unsupported/unknown rate */ 1397 } 1398 1399 static void 1400 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1401 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1402 { 1403 struct ieee80211com *ic = &sc->sc_ic; 1404 uint16_t plcp_length; 1405 int remainder; 1406 1407 desc->flags = htole32(flags); 1408 desc->flags |= htole32(len << 16); 1409 1410 desc->physaddr = htole32(physaddr); 1411 desc->wme = htole16( 1412 RT2560_AIFSN(2) | 1413 RT2560_LOGCWMIN(3) | 1414 RT2560_LOGCWMAX(8)); 1415 1416 /* setup PLCP fields */ 1417 desc->plcp_signal = rt2560_plcp_signal(rate); 1418 desc->plcp_service = 4; 1419 1420 len += IEEE80211_CRC_LEN; 1421 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1422 desc->flags |= htole32(RT2560_TX_OFDM); 1423 1424 plcp_length = len & 0xfff; 1425 desc->plcp_length_hi = plcp_length >> 6; 1426 desc->plcp_length_lo = plcp_length & 0x3f; 1427 } else { 1428 plcp_length = howmany(16 * len, rate); 1429 if (rate == 22) { 1430 remainder = (16 * len) % 22; 1431 if (remainder != 0 && remainder < 7) 1432 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1433 } 1434 desc->plcp_length_hi = plcp_length >> 8; 1435 desc->plcp_length_lo = plcp_length & 0xff; 1436 1437 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1438 desc->plcp_signal |= 0x08; 1439 } 1440 1441 if (!encrypt) 1442 desc->flags |= htole32(RT2560_TX_VALID); 1443 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) 1444 : htole32(RT2560_TX_BUSY); 1445 } 1446 1447 static int 1448 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1449 struct ieee80211_node *ni) 1450 { 1451 struct ieee80211vap *vap = ni->ni_vap; 1452 struct rt2560_tx_desc *desc; 1453 struct rt2560_tx_data *data; 1454 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1455 int nsegs, rate, error; 1456 1457 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1458 data = &sc->bcnq.data[sc->bcnq.cur]; 1459 1460 /* XXX maybe a separate beacon rate? */ 1461 rate = vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)].mgmtrate; 1462 1463 error = bus_dmamap_load_mbuf_sg(sc->bcnq.data_dmat, data->map, m0, 1464 segs, &nsegs, BUS_DMA_NOWAIT); 1465 if (error != 0) { 1466 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1467 error); 1468 m_freem(m0); 1469 return error; 1470 } 1471 1472 if (ieee80211_radiotap_active_vap(vap)) { 1473 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1474 1475 tap->wt_flags = 0; 1476 tap->wt_rate = rate; 1477 tap->wt_antenna = sc->tx_ant; 1478 1479 ieee80211_radiotap_tx(vap, m0); 1480 } 1481 1482 data->m = m0; 1483 data->ni = ni; 1484 1485 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1486 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, segs->ds_addr); 1487 1488 DPRINTFN(sc, 10, "sending beacon frame len=%u idx=%u rate=%u\n", 1489 m0->m_pkthdr.len, sc->bcnq.cur, rate); 1490 1491 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1492 bus_dmamap_sync(sc->bcnq.desc_dmat, sc->bcnq.desc_map, 1493 BUS_DMASYNC_PREWRITE); 1494 1495 sc->bcnq.cur = (sc->bcnq.cur + 1) % RT2560_BEACON_RING_COUNT; 1496 1497 return 0; 1498 } 1499 1500 static int 1501 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1502 struct ieee80211_node *ni) 1503 { 1504 struct ieee80211vap *vap = ni->ni_vap; 1505 struct ieee80211com *ic = ni->ni_ic; 1506 struct rt2560_tx_desc *desc; 1507 struct rt2560_tx_data *data; 1508 struct ieee80211_frame *wh; 1509 struct ieee80211_key *k; 1510 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1511 uint16_t dur; 1512 uint32_t flags = 0; 1513 int nsegs, rate, error; 1514 1515 desc = &sc->prioq.desc[sc->prioq.cur]; 1516 data = &sc->prioq.data[sc->prioq.cur]; 1517 1518 rate = ni->ni_txparms->mgmtrate; 1519 1520 wh = mtod(m0, struct ieee80211_frame *); 1521 1522 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1523 k = ieee80211_crypto_encap(ni, m0); 1524 if (k == NULL) { 1525 m_freem(m0); 1526 return ENOBUFS; 1527 } 1528 } 1529 1530 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0, 1531 segs, &nsegs, 0); 1532 if (error != 0) { 1533 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1534 error); 1535 m_freem(m0); 1536 return error; 1537 } 1538 1539 if (ieee80211_radiotap_active_vap(vap)) { 1540 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1541 1542 tap->wt_flags = 0; 1543 tap->wt_rate = rate; 1544 tap->wt_antenna = sc->tx_ant; 1545 1546 ieee80211_radiotap_tx(vap, m0); 1547 } 1548 1549 data->m = m0; 1550 data->ni = ni; 1551 /* management frames are not taken into account for amrr */ 1552 data->rix = IEEE80211_FIXED_RATE_NONE; 1553 1554 wh = mtod(m0, struct ieee80211_frame *); 1555 1556 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1557 flags |= RT2560_TX_ACK; 1558 1559 dur = ieee80211_ack_duration(ic->ic_rt, 1560 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1561 *(uint16_t *)wh->i_dur = htole16(dur); 1562 1563 /* tell hardware to add timestamp for probe responses */ 1564 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1565 IEEE80211_FC0_TYPE_MGT && 1566 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1567 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1568 flags |= RT2560_TX_TIMESTAMP; 1569 } 1570 1571 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1572 segs->ds_addr); 1573 1574 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1575 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1576 BUS_DMASYNC_PREWRITE); 1577 1578 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1579 m0->m_pkthdr.len, sc->prioq.cur, rate); 1580 1581 /* kick prio */ 1582 sc->prioq.queued++; 1583 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1584 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1585 1586 return 0; 1587 } 1588 1589 static int 1590 rt2560_sendprot(struct rt2560_softc *sc, 1591 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1592 { 1593 struct ieee80211com *ic = ni->ni_ic; 1594 struct rt2560_tx_desc *desc; 1595 struct rt2560_tx_data *data; 1596 struct mbuf *mprot; 1597 int protrate, flags, error; 1598 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1599 int nsegs; 1600 1601 mprot = ieee80211_alloc_prot(ni, m, rate, prot); 1602 if (mprot == NULL) { 1603 if_inc_counter(ni->ni_vap->iv_ifp, IFCOUNTER_OERRORS, 1); 1604 device_printf(sc->sc_dev, 1605 "could not allocate mbuf for protection mode %d\n", prot); 1606 return ENOBUFS; 1607 } 1608 1609 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1610 data = &sc->txq.data[sc->txq.cur_encrypt]; 1611 1612 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, 1613 mprot, segs, &nsegs, 0); 1614 if (error != 0) { 1615 device_printf(sc->sc_dev, 1616 "could not map mbuf (error %d)\n", error); 1617 m_freem(mprot); 1618 return error; 1619 } 1620 1621 data->m = mprot; 1622 data->ni = ieee80211_ref_node(ni); 1623 /* ctl frames are not taken into account for amrr */ 1624 data->rix = IEEE80211_FIXED_RATE_NONE; 1625 1626 protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1627 flags = RT2560_TX_MORE_FRAG; 1628 if (prot == IEEE80211_PROT_RTSCTS) 1629 flags |= RT2560_TX_ACK; 1630 1631 rt2560_setup_tx_desc(sc, desc, flags, mprot->m_pkthdr.len, protrate, 1, 1632 segs->ds_addr); 1633 1634 bus_dmamap_sync(sc->txq.data_dmat, data->map, 1635 BUS_DMASYNC_PREWRITE); 1636 1637 sc->txq.queued++; 1638 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1639 1640 return 0; 1641 } 1642 1643 static int 1644 rt2560_tx_raw(struct rt2560_softc *sc, struct mbuf *m0, 1645 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params) 1646 { 1647 struct ieee80211vap *vap = ni->ni_vap; 1648 struct ieee80211com *ic = ni->ni_ic; 1649 struct rt2560_tx_desc *desc; 1650 struct rt2560_tx_data *data; 1651 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1652 uint32_t flags; 1653 int nsegs, rate, error; 1654 1655 desc = &sc->prioq.desc[sc->prioq.cur]; 1656 data = &sc->prioq.data[sc->prioq.cur]; 1657 1658 rate = params->ibp_rate0; 1659 if (!ieee80211_isratevalid(ic->ic_rt, rate)) { 1660 /* XXX fall back to mcast/mgmt rate? */ 1661 m_freem(m0); 1662 return EINVAL; 1663 } 1664 1665 flags = 0; 1666 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 1667 flags |= RT2560_TX_ACK; 1668 if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) { 1669 error = rt2560_sendprot(sc, m0, ni, 1670 params->ibp_flags & IEEE80211_BPF_RTS ? 1671 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY, 1672 rate); 1673 if (error) { 1674 m_freem(m0); 1675 return error; 1676 } 1677 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1678 } 1679 1680 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0, 1681 segs, &nsegs, 0); 1682 if (error != 0) { 1683 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1684 error); 1685 m_freem(m0); 1686 return error; 1687 } 1688 1689 if (ieee80211_radiotap_active_vap(vap)) { 1690 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1691 1692 tap->wt_flags = 0; 1693 tap->wt_rate = rate; 1694 tap->wt_antenna = sc->tx_ant; 1695 1696 ieee80211_radiotap_tx(ni->ni_vap, m0); 1697 } 1698 1699 data->m = m0; 1700 data->ni = ni; 1701 1702 /* XXX need to setup descriptor ourself */ 1703 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, 1704 rate, (params->ibp_flags & IEEE80211_BPF_CRYPTO) != 0, 1705 segs->ds_addr); 1706 1707 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1708 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1709 BUS_DMASYNC_PREWRITE); 1710 1711 DPRINTFN(sc, 10, "sending raw frame len=%u idx=%u rate=%u\n", 1712 m0->m_pkthdr.len, sc->prioq.cur, rate); 1713 1714 /* kick prio */ 1715 sc->prioq.queued++; 1716 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1717 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1718 1719 return 0; 1720 } 1721 1722 static int 1723 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1724 struct ieee80211_node *ni) 1725 { 1726 struct ieee80211vap *vap = ni->ni_vap; 1727 struct ieee80211com *ic = ni->ni_ic; 1728 struct rt2560_tx_desc *desc; 1729 struct rt2560_tx_data *data; 1730 struct ieee80211_frame *wh; 1731 const struct ieee80211_txparam *tp = ni->ni_txparms; 1732 struct ieee80211_key *k; 1733 struct mbuf *mnew; 1734 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1735 uint16_t dur; 1736 uint32_t flags; 1737 int nsegs, rate, error; 1738 1739 wh = mtod(m0, struct ieee80211_frame *); 1740 1741 if (m0->m_flags & M_EAPOL) { 1742 rate = tp->mgmtrate; 1743 } else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1744 rate = tp->mcastrate; 1745 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1746 rate = tp->ucastrate; 1747 } else { 1748 (void) ieee80211_ratectl_rate(ni, NULL, 0); 1749 rate = ni->ni_txrate; 1750 } 1751 1752 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1753 k = ieee80211_crypto_encap(ni, m0); 1754 if (k == NULL) { 1755 m_freem(m0); 1756 return ENOBUFS; 1757 } 1758 1759 /* packet header may have moved, reset our local pointer */ 1760 wh = mtod(m0, struct ieee80211_frame *); 1761 } 1762 1763 flags = 0; 1764 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1765 int prot = IEEE80211_PROT_NONE; 1766 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1767 prot = IEEE80211_PROT_RTSCTS; 1768 else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1769 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1770 prot = ic->ic_protmode; 1771 if (prot != IEEE80211_PROT_NONE) { 1772 error = rt2560_sendprot(sc, m0, ni, prot, rate); 1773 if (error) { 1774 m_freem(m0); 1775 return error; 1776 } 1777 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1778 } 1779 } 1780 1781 data = &sc->txq.data[sc->txq.cur_encrypt]; 1782 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1783 1784 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, m0, 1785 segs, &nsegs, 0); 1786 if (error != 0 && error != EFBIG) { 1787 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1788 error); 1789 m_freem(m0); 1790 return error; 1791 } 1792 if (error != 0) { 1793 mnew = m_defrag(m0, M_NOWAIT); 1794 if (mnew == NULL) { 1795 device_printf(sc->sc_dev, 1796 "could not defragment mbuf\n"); 1797 m_freem(m0); 1798 return ENOBUFS; 1799 } 1800 m0 = mnew; 1801 1802 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, 1803 m0, segs, &nsegs, 0); 1804 if (error != 0) { 1805 device_printf(sc->sc_dev, 1806 "could not map mbuf (error %d)\n", error); 1807 m_freem(m0); 1808 return error; 1809 } 1810 1811 /* packet header may have moved, reset our local pointer */ 1812 wh = mtod(m0, struct ieee80211_frame *); 1813 } 1814 1815 if (ieee80211_radiotap_active_vap(vap)) { 1816 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1817 1818 tap->wt_flags = 0; 1819 tap->wt_rate = rate; 1820 tap->wt_antenna = sc->tx_ant; 1821 1822 ieee80211_radiotap_tx(vap, m0); 1823 } 1824 1825 data->m = m0; 1826 data->ni = ni; 1827 1828 /* remember link conditions for rate adaptation algorithm */ 1829 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1830 data->rix = ni->ni_txrate; 1831 /* XXX probably need last rssi value and not avg */ 1832 data->rssi = ic->ic_node_getrssi(ni); 1833 } else 1834 data->rix = IEEE80211_FIXED_RATE_NONE; 1835 1836 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1837 flags |= RT2560_TX_ACK; 1838 1839 dur = ieee80211_ack_duration(ic->ic_rt, 1840 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1841 *(uint16_t *)wh->i_dur = htole16(dur); 1842 } 1843 1844 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1845 segs->ds_addr); 1846 1847 bus_dmamap_sync(sc->txq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1848 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 1849 BUS_DMASYNC_PREWRITE); 1850 1851 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1852 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate); 1853 1854 /* kick encrypt */ 1855 sc->txq.queued++; 1856 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1857 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1858 1859 return 0; 1860 } 1861 1862 static int 1863 rt2560_transmit(struct ieee80211com *ic, struct mbuf *m) 1864 { 1865 struct rt2560_softc *sc = ic->ic_softc; 1866 int error; 1867 1868 RAL_LOCK(sc); 1869 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) { 1870 RAL_UNLOCK(sc); 1871 return (ENXIO); 1872 } 1873 error = mbufq_enqueue(&sc->sc_snd, m); 1874 if (error) { 1875 RAL_UNLOCK(sc); 1876 return (error); 1877 } 1878 rt2560_start(sc); 1879 RAL_UNLOCK(sc); 1880 1881 return (0); 1882 } 1883 1884 static void 1885 rt2560_start(struct rt2560_softc *sc) 1886 { 1887 struct ieee80211_node *ni; 1888 struct mbuf *m; 1889 1890 RAL_LOCK_ASSERT(sc); 1891 1892 while (sc->txq.queued < RT2560_TX_RING_COUNT - 1 && 1893 (m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1894 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1895 if (rt2560_tx_data(sc, m, ni) != 0) { 1896 if_inc_counter(ni->ni_vap->iv_ifp, 1897 IFCOUNTER_OERRORS, 1); 1898 ieee80211_free_node(ni); 1899 break; 1900 } 1901 sc->sc_tx_timer = 5; 1902 } 1903 } 1904 1905 static void 1906 rt2560_watchdog(void *arg) 1907 { 1908 struct rt2560_softc *sc = arg; 1909 1910 RAL_LOCK_ASSERT(sc); 1911 1912 KASSERT(sc->sc_flags & RT2560_F_RUNNING, ("not running")); 1913 1914 if (sc->sc_invalid) /* card ejected */ 1915 return; 1916 1917 rt2560_encryption_intr(sc); 1918 rt2560_tx_intr(sc); 1919 1920 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1921 device_printf(sc->sc_dev, "device timeout\n"); 1922 rt2560_init_locked(sc); 1923 counter_u64_add(sc->sc_ic.ic_oerrors, 1); 1924 /* NB: callout is reset in rt2560_init() */ 1925 return; 1926 } 1927 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc); 1928 } 1929 1930 static void 1931 rt2560_parent(struct ieee80211com *ic) 1932 { 1933 struct rt2560_softc *sc = ic->ic_softc; 1934 int startall = 0; 1935 1936 RAL_LOCK(sc); 1937 if (ic->ic_nrunning > 0) { 1938 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) { 1939 rt2560_init_locked(sc); 1940 startall = 1; 1941 } else 1942 rt2560_update_promisc(ic); 1943 } else if (sc->sc_flags & RT2560_F_RUNNING) 1944 rt2560_stop_locked(sc); 1945 RAL_UNLOCK(sc); 1946 if (startall) 1947 ieee80211_start_all(ic); 1948 } 1949 1950 static void 1951 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 1952 { 1953 uint32_t tmp; 1954 int ntries; 1955 1956 for (ntries = 0; ntries < 100; ntries++) { 1957 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 1958 break; 1959 DELAY(1); 1960 } 1961 if (ntries == 100) { 1962 device_printf(sc->sc_dev, "could not write to BBP\n"); 1963 return; 1964 } 1965 1966 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 1967 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 1968 1969 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1970 } 1971 1972 static uint8_t 1973 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 1974 { 1975 uint32_t val; 1976 int ntries; 1977 1978 for (ntries = 0; ntries < 100; ntries++) { 1979 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 1980 break; 1981 DELAY(1); 1982 } 1983 if (ntries == 100) { 1984 device_printf(sc->sc_dev, "could not read from BBP\n"); 1985 return 0; 1986 } 1987 1988 val = RT2560_BBP_BUSY | reg << 8; 1989 RAL_WRITE(sc, RT2560_BBPCSR, val); 1990 1991 for (ntries = 0; ntries < 100; ntries++) { 1992 val = RAL_READ(sc, RT2560_BBPCSR); 1993 if (!(val & RT2560_BBP_BUSY)) 1994 return val & 0xff; 1995 DELAY(1); 1996 } 1997 1998 device_printf(sc->sc_dev, "could not read from BBP\n"); 1999 return 0; 2000 } 2001 2002 static void 2003 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2004 { 2005 uint32_t tmp; 2006 int ntries; 2007 2008 for (ntries = 0; ntries < 100; ntries++) { 2009 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2010 break; 2011 DELAY(1); 2012 } 2013 if (ntries == 100) { 2014 device_printf(sc->sc_dev, "could not write to RF\n"); 2015 return; 2016 } 2017 2018 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2019 (reg & 0x3); 2020 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2021 2022 /* remember last written value in sc */ 2023 sc->rf_regs[reg] = val; 2024 2025 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff); 2026 } 2027 2028 static void 2029 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2030 { 2031 struct ieee80211com *ic = &sc->sc_ic; 2032 uint8_t power, tmp; 2033 u_int i, chan; 2034 2035 chan = ieee80211_chan2ieee(ic, c); 2036 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 2037 2038 if (IEEE80211_IS_CHAN_2GHZ(c)) 2039 power = min(sc->txpow[chan - 1], 31); 2040 else 2041 power = 31; 2042 2043 /* adjust txpower using ifconfig settings */ 2044 power -= (100 - ic->ic_txpowlimit) / 8; 2045 2046 DPRINTFN(sc, 2, "setting channel to %u, txpower to %u\n", chan, power); 2047 2048 switch (sc->rf_rev) { 2049 case RT2560_RF_2522: 2050 rt2560_rf_write(sc, RAL_RF1, 0x00814); 2051 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2522_r2[chan - 1]); 2052 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 2053 break; 2054 2055 case RT2560_RF_2523: 2056 rt2560_rf_write(sc, RAL_RF1, 0x08804); 2057 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2523_r2[chan - 1]); 2058 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 2059 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2060 break; 2061 2062 case RT2560_RF_2524: 2063 rt2560_rf_write(sc, RAL_RF1, 0x0c808); 2064 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2524_r2[chan - 1]); 2065 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 2066 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2067 break; 2068 2069 case RT2560_RF_2525: 2070 rt2560_rf_write(sc, RAL_RF1, 0x08808); 2071 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2072 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2073 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2074 2075 rt2560_rf_write(sc, RAL_RF1, 0x08808); 2076 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_r2[chan - 1]); 2077 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2078 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2079 break; 2080 2081 case RT2560_RF_2525E: 2082 rt2560_rf_write(sc, RAL_RF1, 0x08808); 2083 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525e_r2[chan - 1]); 2084 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2085 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 2086 break; 2087 2088 case RT2560_RF_2526: 2089 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2090 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 2091 rt2560_rf_write(sc, RAL_RF1, 0x08804); 2092 2093 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_r2[chan - 1]); 2094 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2095 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 2096 break; 2097 2098 /* dual-band RF */ 2099 case RT2560_RF_5222: 2100 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2101 2102 rt2560_rf_write(sc, RAL_RF1, rt2560_rf5222[i].r1); 2103 rt2560_rf_write(sc, RAL_RF2, rt2560_rf5222[i].r2); 2104 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 2105 rt2560_rf_write(sc, RAL_RF4, rt2560_rf5222[i].r4); 2106 break; 2107 default: 2108 printf("unknown ral rev=%d\n", sc->rf_rev); 2109 } 2110 2111 /* XXX */ 2112 if ((ic->ic_flags & IEEE80211_F_SCAN) == 0) { 2113 /* set Japan filter bit for channel 14 */ 2114 tmp = rt2560_bbp_read(sc, 70); 2115 2116 tmp &= ~RT2560_JAPAN_FILTER; 2117 if (chan == 14) 2118 tmp |= RT2560_JAPAN_FILTER; 2119 2120 rt2560_bbp_write(sc, 70, tmp); 2121 2122 /* clear CRC errors */ 2123 RAL_READ(sc, RT2560_CNT0); 2124 } 2125 } 2126 2127 static void 2128 rt2560_getradiocaps(struct ieee80211com *ic, 2129 int maxchans, int *nchans, struct ieee80211_channel chans[]) 2130 { 2131 struct rt2560_softc *sc = ic->ic_softc; 2132 uint8_t bands[IEEE80211_MODE_BYTES]; 2133 2134 memset(bands, 0, sizeof(bands)); 2135 setbit(bands, IEEE80211_MODE_11B); 2136 setbit(bands, IEEE80211_MODE_11G); 2137 ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0); 2138 2139 if (sc->rf_rev == RT2560_RF_5222) { 2140 setbit(bands, IEEE80211_MODE_11A); 2141 ieee80211_add_channel_list_5ghz(chans, maxchans, nchans, 2142 rt2560_chan_5ghz, nitems(rt2560_chan_5ghz), bands, 0); 2143 } 2144 } 2145 2146 static void 2147 rt2560_set_channel(struct ieee80211com *ic) 2148 { 2149 struct rt2560_softc *sc = ic->ic_softc; 2150 2151 RAL_LOCK(sc); 2152 rt2560_set_chan(sc, ic->ic_curchan); 2153 RAL_UNLOCK(sc); 2154 2155 } 2156 2157 #if 0 2158 /* 2159 * Disable RF auto-tuning. 2160 */ 2161 static void 2162 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2163 { 2164 uint32_t tmp; 2165 2166 if (sc->rf_rev != RT2560_RF_2523) { 2167 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 2168 rt2560_rf_write(sc, RAL_RF1, tmp); 2169 } 2170 2171 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 2172 rt2560_rf_write(sc, RAL_RF3, tmp); 2173 2174 DPRINTFN(sc, 2, "%s", "disabling RF autotune\n"); 2175 } 2176 #endif 2177 2178 /* 2179 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2180 * synchronization. 2181 */ 2182 static void 2183 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2184 { 2185 struct ieee80211com *ic = &sc->sc_ic; 2186 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2187 uint16_t logcwmin, preload; 2188 uint32_t tmp; 2189 2190 /* first, disable TSF synchronization */ 2191 RAL_WRITE(sc, RT2560_CSR14, 0); 2192 2193 tmp = 16 * vap->iv_bss->ni_intval; 2194 RAL_WRITE(sc, RT2560_CSR12, tmp); 2195 2196 RAL_WRITE(sc, RT2560_CSR13, 0); 2197 2198 logcwmin = 5; 2199 preload = (vap->iv_opmode == IEEE80211_M_STA) ? 384 : 1024; 2200 tmp = logcwmin << 16 | preload; 2201 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2202 2203 /* finally, enable TSF synchronization */ 2204 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2205 if (ic->ic_opmode == IEEE80211_M_STA) 2206 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2207 else 2208 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2209 RT2560_ENABLE_BEACON_GENERATOR; 2210 RAL_WRITE(sc, RT2560_CSR14, tmp); 2211 2212 DPRINTF(sc, "%s", "enabling TSF synchronization\n"); 2213 } 2214 2215 static void 2216 rt2560_enable_tsf(struct rt2560_softc *sc) 2217 { 2218 RAL_WRITE(sc, RT2560_CSR14, 0); 2219 RAL_WRITE(sc, RT2560_CSR14, 2220 RT2560_ENABLE_TSF_SYNC(2) | RT2560_ENABLE_TSF); 2221 } 2222 2223 static void 2224 rt2560_update_plcp(struct rt2560_softc *sc) 2225 { 2226 struct ieee80211com *ic = &sc->sc_ic; 2227 2228 /* no short preamble for 1Mbps */ 2229 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2230 2231 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2232 /* values taken from the reference driver */ 2233 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2234 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2235 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2236 } else { 2237 /* same values as above or'ed 0x8 */ 2238 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2239 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2240 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2241 } 2242 2243 DPRINTF(sc, "updating PLCP for %s preamble\n", 2244 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"); 2245 } 2246 2247 /* 2248 * This function can be called by ieee80211_set_shortslottime(). Refer to 2249 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2250 */ 2251 static void 2252 rt2560_update_slot(struct ieee80211com *ic) 2253 { 2254 struct rt2560_softc *sc = ic->ic_softc; 2255 uint8_t slottime; 2256 uint16_t tx_sifs, tx_pifs, tx_difs, eifs; 2257 uint32_t tmp; 2258 2259 #ifndef FORCE_SLOTTIME 2260 slottime = IEEE80211_GET_SLOTTIME(ic); 2261 #else 2262 /* 2263 * Setting slot time according to "short slot time" capability 2264 * in beacon/probe_resp seems to cause problem to acknowledge 2265 * certain AP's data frames transimitted at CCK/DS rates: the 2266 * problematic AP keeps retransmitting data frames, probably 2267 * because MAC level acks are not received by hardware. 2268 * So we cheat a little bit here by claiming we are capable of 2269 * "short slot time" but setting hardware slot time to the normal 2270 * slot time. ral(4) does not seem to have trouble to receive 2271 * frames transmitted using short slot time even if hardware 2272 * slot time is set to normal slot time. If we didn't use this 2273 * trick, we would have to claim that short slot time is not 2274 * supported; this would give relative poor RX performance 2275 * (-1Mb~-2Mb lower) and the _whole_ BSS would stop using short 2276 * slot time. 2277 */ 2278 slottime = IEEE80211_DUR_SLOT; 2279 #endif 2280 2281 /* update the MAC slot boundaries */ 2282 tx_sifs = RAL_SIFS - RT2560_TXRX_TURNAROUND; 2283 tx_pifs = tx_sifs + slottime; 2284 tx_difs = IEEE80211_DUR_DIFS(tx_sifs, slottime); 2285 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2286 2287 tmp = RAL_READ(sc, RT2560_CSR11); 2288 tmp = (tmp & ~0x1f00) | slottime << 8; 2289 RAL_WRITE(sc, RT2560_CSR11, tmp); 2290 2291 tmp = tx_pifs << 16 | tx_sifs; 2292 RAL_WRITE(sc, RT2560_CSR18, tmp); 2293 2294 tmp = eifs << 16 | tx_difs; 2295 RAL_WRITE(sc, RT2560_CSR19, tmp); 2296 2297 DPRINTF(sc, "setting slottime to %uus\n", slottime); 2298 } 2299 2300 static void 2301 rt2560_set_basicrates(struct rt2560_softc *sc, 2302 const struct ieee80211_rateset *rs) 2303 { 2304 struct ieee80211com *ic = &sc->sc_ic; 2305 uint32_t mask = 0; 2306 uint8_t rate; 2307 int i; 2308 2309 for (i = 0; i < rs->rs_nrates; i++) { 2310 rate = rs->rs_rates[i]; 2311 2312 if (!(rate & IEEE80211_RATE_BASIC)) 2313 continue; 2314 2315 mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt, 2316 IEEE80211_RV(rate)); 2317 } 2318 2319 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, mask); 2320 2321 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 2322 } 2323 2324 static void 2325 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2326 { 2327 uint32_t tmp; 2328 2329 /* set ON period to 70ms and OFF period to 30ms */ 2330 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2331 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2332 } 2333 2334 static void 2335 rt2560_set_bssid(struct rt2560_softc *sc, const uint8_t *bssid) 2336 { 2337 uint32_t tmp; 2338 2339 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2340 RAL_WRITE(sc, RT2560_CSR5, tmp); 2341 2342 tmp = bssid[4] | bssid[5] << 8; 2343 RAL_WRITE(sc, RT2560_CSR6, tmp); 2344 2345 DPRINTF(sc, "setting BSSID to %6D\n", bssid, ":"); 2346 } 2347 2348 static void 2349 rt2560_set_macaddr(struct rt2560_softc *sc, const uint8_t *addr) 2350 { 2351 uint32_t tmp; 2352 2353 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2354 RAL_WRITE(sc, RT2560_CSR3, tmp); 2355 2356 tmp = addr[4] | addr[5] << 8; 2357 RAL_WRITE(sc, RT2560_CSR4, tmp); 2358 2359 DPRINTF(sc, "setting MAC address to %6D\n", addr, ":"); 2360 } 2361 2362 static void 2363 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2364 { 2365 uint32_t tmp; 2366 2367 tmp = RAL_READ(sc, RT2560_CSR3); 2368 addr[0] = tmp & 0xff; 2369 addr[1] = (tmp >> 8) & 0xff; 2370 addr[2] = (tmp >> 16) & 0xff; 2371 addr[3] = (tmp >> 24); 2372 2373 tmp = RAL_READ(sc, RT2560_CSR4); 2374 addr[4] = tmp & 0xff; 2375 addr[5] = (tmp >> 8) & 0xff; 2376 } 2377 2378 static void 2379 rt2560_update_promisc(struct ieee80211com *ic) 2380 { 2381 struct rt2560_softc *sc = ic->ic_softc; 2382 uint32_t tmp; 2383 2384 tmp = RAL_READ(sc, RT2560_RXCSR0); 2385 2386 tmp &= ~RT2560_DROP_NOT_TO_ME; 2387 if (ic->ic_promisc == 0) 2388 tmp |= RT2560_DROP_NOT_TO_ME; 2389 2390 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2391 2392 DPRINTF(sc, "%s promiscuous mode\n", 2393 (ic->ic_promisc > 0) ? "entering" : "leaving"); 2394 } 2395 2396 static const char * 2397 rt2560_get_rf(int rev) 2398 { 2399 switch (rev) { 2400 case RT2560_RF_2522: return "RT2522"; 2401 case RT2560_RF_2523: return "RT2523"; 2402 case RT2560_RF_2524: return "RT2524"; 2403 case RT2560_RF_2525: return "RT2525"; 2404 case RT2560_RF_2525E: return "RT2525e"; 2405 case RT2560_RF_2526: return "RT2526"; 2406 case RT2560_RF_5222: return "RT5222"; 2407 default: return "unknown"; 2408 } 2409 } 2410 2411 static void 2412 rt2560_read_config(struct rt2560_softc *sc) 2413 { 2414 uint16_t val; 2415 int i; 2416 2417 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2418 sc->rf_rev = (val >> 11) & 0x7; 2419 sc->hw_radio = (val >> 10) & 0x1; 2420 sc->led_mode = (val >> 6) & 0x7; 2421 sc->rx_ant = (val >> 4) & 0x3; 2422 sc->tx_ant = (val >> 2) & 0x3; 2423 sc->nb_ant = val & 0x3; 2424 2425 /* read default values for BBP registers */ 2426 for (i = 0; i < 16; i++) { 2427 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2428 if (val == 0 || val == 0xffff) 2429 continue; 2430 2431 sc->bbp_prom[i].reg = val >> 8; 2432 sc->bbp_prom[i].val = val & 0xff; 2433 } 2434 2435 /* read Tx power for all b/g channels */ 2436 for (i = 0; i < 14 / 2; i++) { 2437 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2438 sc->txpow[i * 2] = val & 0xff; 2439 sc->txpow[i * 2 + 1] = val >> 8; 2440 } 2441 for (i = 0; i < 14; ++i) { 2442 if (sc->txpow[i] > 31) 2443 sc->txpow[i] = 24; 2444 } 2445 2446 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CALIBRATE); 2447 if ((val & 0xff) == 0xff) 2448 sc->rssi_corr = RT2560_DEFAULT_RSSI_CORR; 2449 else 2450 sc->rssi_corr = val & 0xff; 2451 DPRINTF(sc, "rssi correction %d, calibrate 0x%02x\n", 2452 sc->rssi_corr, val); 2453 } 2454 2455 2456 static void 2457 rt2560_scan_start(struct ieee80211com *ic) 2458 { 2459 struct rt2560_softc *sc = ic->ic_softc; 2460 2461 /* abort TSF synchronization */ 2462 RAL_WRITE(sc, RT2560_CSR14, 0); 2463 rt2560_set_bssid(sc, ieee80211broadcastaddr); 2464 } 2465 2466 static void 2467 rt2560_scan_end(struct ieee80211com *ic) 2468 { 2469 struct rt2560_softc *sc = ic->ic_softc; 2470 struct ieee80211vap *vap = ic->ic_scan->ss_vap; 2471 2472 rt2560_enable_tsf_sync(sc); 2473 /* XXX keep local copy */ 2474 rt2560_set_bssid(sc, vap->iv_bss->ni_bssid); 2475 } 2476 2477 static int 2478 rt2560_bbp_init(struct rt2560_softc *sc) 2479 { 2480 int i, ntries; 2481 2482 /* wait for BBP to be ready */ 2483 for (ntries = 0; ntries < 100; ntries++) { 2484 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2485 break; 2486 DELAY(1); 2487 } 2488 if (ntries == 100) { 2489 device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2490 return EIO; 2491 } 2492 2493 /* initialize BBP registers to default values */ 2494 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2495 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2496 rt2560_def_bbp[i].val); 2497 } 2498 2499 /* initialize BBP registers to values stored in EEPROM */ 2500 for (i = 0; i < 16; i++) { 2501 if (sc->bbp_prom[i].reg == 0 && sc->bbp_prom[i].val == 0) 2502 break; 2503 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2504 } 2505 rt2560_bbp_write(sc, 17, 0x48); /* XXX restore bbp17 */ 2506 2507 return 0; 2508 } 2509 2510 static void 2511 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2512 { 2513 uint32_t tmp; 2514 uint8_t tx; 2515 2516 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2517 if (antenna == 1) 2518 tx |= RT2560_BBP_ANTA; 2519 else if (antenna == 2) 2520 tx |= RT2560_BBP_ANTB; 2521 else 2522 tx |= RT2560_BBP_DIVERSITY; 2523 2524 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2525 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2526 sc->rf_rev == RT2560_RF_5222) 2527 tx |= RT2560_BBP_FLIPIQ; 2528 2529 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2530 2531 /* update values for CCK and OFDM in BBPCSR1 */ 2532 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2533 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2534 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2535 } 2536 2537 static void 2538 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2539 { 2540 uint8_t rx; 2541 2542 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2543 if (antenna == 1) 2544 rx |= RT2560_BBP_ANTA; 2545 else if (antenna == 2) 2546 rx |= RT2560_BBP_ANTB; 2547 else 2548 rx |= RT2560_BBP_DIVERSITY; 2549 2550 /* need to force no I/Q flip for RF 2525e and 2526 */ 2551 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2552 rx &= ~RT2560_BBP_FLIPIQ; 2553 2554 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2555 } 2556 2557 static void 2558 rt2560_init_locked(struct rt2560_softc *sc) 2559 { 2560 struct ieee80211com *ic = &sc->sc_ic; 2561 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2562 uint32_t tmp; 2563 int i; 2564 2565 RAL_LOCK_ASSERT(sc); 2566 2567 rt2560_stop_locked(sc); 2568 2569 /* setup tx rings */ 2570 tmp = RT2560_PRIO_RING_COUNT << 24 | 2571 RT2560_ATIM_RING_COUNT << 16 | 2572 RT2560_TX_RING_COUNT << 8 | 2573 RT2560_TX_DESC_SIZE; 2574 2575 /* rings must be initialized in this exact order */ 2576 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2577 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2578 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2579 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2580 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2581 2582 /* setup rx ring */ 2583 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2584 2585 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2586 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2587 2588 /* initialize MAC registers to default values */ 2589 for (i = 0; i < nitems(rt2560_def_mac); i++) 2590 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2591 2592 rt2560_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr); 2593 2594 /* set basic rate set (will be updated later) */ 2595 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2596 2597 rt2560_update_slot(ic); 2598 rt2560_update_plcp(sc); 2599 rt2560_update_led(sc, 0, 0); 2600 2601 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2602 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2603 2604 if (rt2560_bbp_init(sc) != 0) { 2605 rt2560_stop_locked(sc); 2606 return; 2607 } 2608 2609 rt2560_set_txantenna(sc, sc->tx_ant); 2610 rt2560_set_rxantenna(sc, sc->rx_ant); 2611 2612 /* set default BSS channel */ 2613 rt2560_set_chan(sc, ic->ic_curchan); 2614 2615 /* kick Rx */ 2616 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2617 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2618 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2619 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2620 ic->ic_opmode != IEEE80211_M_MBSS) 2621 tmp |= RT2560_DROP_TODS; 2622 if (ic->ic_promisc == 0) 2623 tmp |= RT2560_DROP_NOT_TO_ME; 2624 } 2625 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2626 2627 /* clear old FCS and Rx FIFO errors */ 2628 RAL_READ(sc, RT2560_CNT0); 2629 RAL_READ(sc, RT2560_CNT4); 2630 2631 /* clear any pending interrupts */ 2632 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2633 2634 /* enable interrupts */ 2635 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2636 2637 sc->sc_flags |= RT2560_F_RUNNING; 2638 2639 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc); 2640 } 2641 2642 static void 2643 rt2560_init(void *priv) 2644 { 2645 struct rt2560_softc *sc = priv; 2646 struct ieee80211com *ic = &sc->sc_ic; 2647 2648 RAL_LOCK(sc); 2649 rt2560_init_locked(sc); 2650 RAL_UNLOCK(sc); 2651 2652 if (sc->sc_flags & RT2560_F_RUNNING) 2653 ieee80211_start_all(ic); /* start all vap's */ 2654 } 2655 2656 static void 2657 rt2560_stop_locked(struct rt2560_softc *sc) 2658 { 2659 volatile int *flags = &sc->sc_flags; 2660 2661 RAL_LOCK_ASSERT(sc); 2662 2663 while (*flags & RT2560_F_INPUT_RUNNING) 2664 msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2665 2666 callout_stop(&sc->watchdog_ch); 2667 sc->sc_tx_timer = 0; 2668 2669 if (sc->sc_flags & RT2560_F_RUNNING) { 2670 sc->sc_flags &= ~RT2560_F_RUNNING; 2671 2672 /* abort Tx */ 2673 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2674 2675 /* disable Rx */ 2676 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2677 2678 /* reset ASIC (imply reset BBP) */ 2679 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2680 RAL_WRITE(sc, RT2560_CSR1, 0); 2681 2682 /* disable interrupts */ 2683 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2684 2685 /* reset Tx and Rx rings */ 2686 rt2560_reset_tx_ring(sc, &sc->txq); 2687 rt2560_reset_tx_ring(sc, &sc->atimq); 2688 rt2560_reset_tx_ring(sc, &sc->prioq); 2689 rt2560_reset_tx_ring(sc, &sc->bcnq); 2690 rt2560_reset_rx_ring(sc, &sc->rxq); 2691 } 2692 } 2693 2694 void 2695 rt2560_stop(void *arg) 2696 { 2697 struct rt2560_softc *sc = arg; 2698 2699 RAL_LOCK(sc); 2700 rt2560_stop_locked(sc); 2701 RAL_UNLOCK(sc); 2702 } 2703 2704 static int 2705 rt2560_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2706 const struct ieee80211_bpf_params *params) 2707 { 2708 struct ieee80211com *ic = ni->ni_ic; 2709 struct rt2560_softc *sc = ic->ic_softc; 2710 2711 RAL_LOCK(sc); 2712 2713 /* prevent management frames from being sent if we're not ready */ 2714 if (!(sc->sc_flags & RT2560_F_RUNNING)) { 2715 RAL_UNLOCK(sc); 2716 m_freem(m); 2717 return ENETDOWN; 2718 } 2719 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2720 RAL_UNLOCK(sc); 2721 m_freem(m); 2722 return ENOBUFS; /* XXX */ 2723 } 2724 2725 if (params == NULL) { 2726 /* 2727 * Legacy path; interpret frame contents to decide 2728 * precisely how to send the frame. 2729 */ 2730 if (rt2560_tx_mgt(sc, m, ni) != 0) 2731 goto bad; 2732 } else { 2733 /* 2734 * Caller supplied explicit parameters to use in 2735 * sending the frame. 2736 */ 2737 if (rt2560_tx_raw(sc, m, ni, params)) 2738 goto bad; 2739 } 2740 sc->sc_tx_timer = 5; 2741 2742 RAL_UNLOCK(sc); 2743 2744 return 0; 2745 bad: 2746 RAL_UNLOCK(sc); 2747 return EIO; /* XXX */ 2748 }
Cache object: 37e8ba0e8bd58560e762319da639d996
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