The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/dev/rtwn/rtl8188e/pci/r88ee_init.c

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * Copyright (c) 2017 Farhan Khan <khanzf@gmail.com>
    3  *
    4  * Permission to use, copy, modify, and distribute this software for any
    5  * purpose with or without fee is hereby granted, provided that the above
    6  * copyright notice and this permission notice appear in all copies.
    7  *
    8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
    9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   15  */
   16 
   17 #include <sys/cdefs.h>
   18 __FBSDID("$FreeBSD$");
   19 
   20 #include "opt_wlan.h"
   21 
   22 #include <sys/param.h>
   23 #include <sys/lock.h>
   24 #include <sys/mutex.h>
   25 #include <sys/mbuf.h>
   26 #include <sys/kernel.h>
   27 #include <sys/socket.h>
   28 #include <sys/systm.h>
   29 #include <sys/malloc.h>
   30 #include <sys/queue.h>
   31 #include <sys/taskqueue.h>
   32 #include <sys/bus.h>
   33 #include <sys/endian.h>
   34 #include <sys/linker.h>
   35 
   36 #include <machine/bus.h>
   37 #include <machine/resource.h>
   38 #include <sys/rman.h>
   39 
   40 #include <net/if.h>
   41 #include <net/ethernet.h>
   42 #include <net/if_media.h>
   43 
   44 #include <net80211/ieee80211_var.h>
   45 #include <net80211/ieee80211_radiotap.h>
   46 
   47 #include <dev/rtwn/if_rtwnvar.h>
   48 
   49 #include <dev/rtwn/pci/rtwn_pci_var.h>
   50 
   51 #include <dev/rtwn/rtl8192c/r92c.h>
   52 
   53 #include <dev/rtwn/rtl8188e/pci/r88ee.h>
   54 #include <dev/rtwn/rtl8188e/pci/r88ee_reg.h>
   55 
   56 void
   57 r88ee_init_bb(struct rtwn_softc *sc)
   58 {
   59 
   60         /* Enable BB and RF. */
   61         rtwn_setbits_2(sc, R92C_SYS_FUNC_EN, 0,
   62             R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST |
   63             R92C_SYS_FUNC_EN_DIO_RF);
   64 
   65         rtwn_write_1(sc, R92C_RF_CTRL,
   66             R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB);
   67         rtwn_write_1(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_PPLL |
   68             R92C_SYS_FUNC_EN_PCIEA | R92C_SYS_FUNC_EN_DIO_PCIE |
   69             R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB);
   70 
   71         r88e_init_bb_common(sc);
   72 }
   73 
   74 void
   75 r88ee_init_intr(struct rtwn_softc *sc)
   76 {
   77         /* Disable interrupts. */
   78         rtwn_write_4(sc, R88E_HIMR, 0x00000000);
   79         rtwn_write_4(sc, R88E_HIMRE, 0x00000000);
   80 }
   81 
   82 int
   83 r88ee_power_on(struct rtwn_softc *sc)
   84 {
   85         int ntries;
   86 
   87         /* Disable XTAL output for power saving. */
   88         rtwn_setbits_1(sc, R88E_XCK_OUT_CTRL, R88E_XCK_OUT_CTRL_EN, 0);
   89 
   90         /* Unlock ISO/CLK/Power control register. */
   91         rtwn_setbits_2(sc, R92C_APS_FSMCO, R92C_APS_FSMCO_APDM_HPDN, 0);
   92         rtwn_write_1(sc, R92C_RSV_CTRL, 0);
   93 
   94         /* Wait for power ready bit */
   95         for(ntries = 0; ntries < 5000; ntries++) {
   96                 if (rtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
   97                         break;
   98                 rtwn_delay(sc, 10);
   99         }
  100         if (ntries == 5000) {
  101                 device_printf(sc->sc_dev,
  102                     "timeout waiting for chip power up\n");
  103                 return (ETIMEDOUT);
  104         }
  105 
  106         /* Reset BB. */
  107         rtwn_setbits_1(sc, R92C_SYS_FUNC_EN,
  108             R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST, 0);
  109 
  110         /* schmit trigger */
  111         rtwn_setbits_1(sc, R92C_AFE_XTAL_CTRL + 2, 0, 0x80);
  112 
  113         /* Disable HWPDN. */
  114         rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
  115             R92C_APS_FSMCO_APDM_HPDN, 0, 1);
  116 
  117         /* Disable WL suspend. */
  118         rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
  119             R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE, 0, 1);
  120 
  121         /* Auto-enable WLAN */
  122         rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
  123             0, R92C_APS_FSMCO_APFM_ONMAC, 1);
  124         for (ntries = 0; ntries < 5000; ntries++) {
  125                 if (!(rtwn_read_2(sc, R92C_APS_FSMCO) &
  126                     R92C_APS_FSMCO_APFM_ONMAC))
  127                         break;
  128                 rtwn_delay(sc, 10);
  129         }
  130         if (ntries == 5000)
  131                 return (ETIMEDOUT);
  132 
  133         rtwn_setbits_1(sc, R92C_PCIE_CTRL_REG + 2, 0, 0x04);
  134 
  135         /* Enable LDO normal mode. */
  136         rtwn_setbits_1(sc, R92C_LPLDO_CTRL, R92C_LPLDO_CTRL_SLEEP, 0);
  137 
  138         rtwn_setbits_1(sc, R92C_APS_FSMCO, 0, R92C_APS_FSMCO_PDN_EN);
  139         rtwn_setbits_1(sc, R92C_PCIE_CTRL_REG + 2, 0, 0x04);
  140         rtwn_setbits_1(sc, R92C_AFE_XTAL_CTRL_EXT + 1, 0, 0x02);
  141         rtwn_setbits_1(sc, R92C_SYS_CLKR, 0, 0x08);
  142         rtwn_setbits_2(sc, R92C_GPIO_MUXCFG, R92C_GPIO_MUXCFG_ENSIC, 0);
  143 
  144         /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */
  145         rtwn_write_2(sc, R92C_CR, 0);
  146         rtwn_setbits_2(sc, R92C_CR, 0,
  147             R92C_CR_HCI_TXDMA_EN | R92C_CR_TXDMA_EN |
  148             R92C_CR_HCI_RXDMA_EN | R92C_CR_RXDMA_EN |
  149             R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN |
  150             ((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0) |
  151             R92C_CR_CALTMR_EN);
  152 
  153         rtwn_write_4(sc, R92C_INT_MIG, 0);
  154         rtwn_write_4(sc, R92C_MCUTST_1, 0);
  155 
  156         return (0);
  157 }
  158 
  159 void
  160 r88ee_power_off(struct rtwn_softc *sc)
  161 {
  162         uint8_t reg;
  163         int ntries;
  164 
  165         /* Disable any kind of TX reports. */
  166         rtwn_setbits_1(sc, R88E_TX_RPT_CTRL,
  167             R88E_TX_RPT1_ENA | R88E_TX_RPT2_ENA, 0);
  168 
  169         rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 1, 0xFF);
  170 
  171         /* Move card to Low Power State. */
  172         /* Block all Tx queues. */
  173         rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
  174 
  175         for (ntries = 0; ntries < 10; ntries++) {
  176                 /* Should be zero if no packet is transmitting. */
  177                 if (rtwn_read_4(sc, R88E_SCH_TXCMD) == 0)
  178                         break;
  179 
  180                 rtwn_delay(sc, 5000);
  181         }
  182         if (ntries == 10) {
  183                 device_printf(sc->sc_dev, "%s: failed to block Tx queues\n",
  184                     __func__);
  185                 return;
  186         }
  187 
  188         /* CCK and OFDM are disabled, and clock are gated. */
  189         rtwn_setbits_1(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_BBRSTB, 0);
  190 
  191         rtwn_delay(sc, 1);
  192 
  193         /* Reset MAC TRX */
  194         rtwn_write_1(sc, R92C_CR,
  195             R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN |
  196             R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN |
  197             R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN);
  198 
  199         /* Disable h/w encryption. */
  200         rtwn_setbits_1_shift(sc, R92C_CR, R92C_CR_ENSEC, 0, 1);
  201 
  202         /* Respond TxOK to scheduler */
  203         rtwn_setbits_1(sc, R92C_DUAL_TSF_RST, 0, 0x20);
  204 
  205         /* If firmware in ram code, do reset. */
  206 #ifndef RTWN_WITHOUT_UCODE
  207         if (rtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY)
  208                 r88e_fw_reset(sc, RTWN_FW_RESET_SHUTDOWN);
  209 #endif
  210 
  211         /* Reset MCU ready status. */
  212         rtwn_write_1(sc, R92C_MCUFWDL, 0);
  213 
  214         /* Disable 32k. */
  215         rtwn_setbits_1(sc, R88E_32K_CTRL, 0x01, 0);
  216 
  217         /* Move card to Disabled state. */
  218         /* Turn off RF. */
  219         rtwn_write_1(sc, R92C_RF_CTRL, 0);
  220 
  221         /* LDO Sleep mode. */
  222         rtwn_setbits_1(sc, R92C_LPLDO_CTRL, 0, R92C_LPLDO_CTRL_SLEEP);
  223 
  224         /* Turn off MAC by HW state machine */
  225         rtwn_setbits_1_shift(sc, R92C_APS_FSMCO, 0,
  226             R92C_APS_FSMCO_APFM_OFF, 1);
  227 
  228         for (ntries = 0; ntries < 10; ntries++) {
  229                 /* Wait until it will be disabled. */
  230                 if ((rtwn_read_2(sc, R92C_APS_FSMCO) &
  231                     R92C_APS_FSMCO_APFM_OFF) == 0)
  232                         break;
  233 
  234                 rtwn_delay(sc, 5000);
  235         }
  236         if (ntries == 10) {
  237                 device_printf(sc->sc_dev, "%s: could not turn off MAC\n",
  238                     __func__);
  239                 return;
  240         }
  241 
  242         /* schmit trigger */
  243         rtwn_setbits_1(sc, R92C_AFE_XTAL_CTRL + 2, 0, 0x80);
  244 
  245         /* Reset MCU IO Wrapper. */
  246         reg = rtwn_read_1(sc, R92C_RSV_CTRL + 1);
  247         rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08);
  248         rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08);
  249 
  250         /* marked as 'For Power Consumption' code. */
  251         rtwn_write_1(sc, R92C_GPIO_OUT, rtwn_read_1(sc, R92C_GPIO_IN));
  252         rtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff);
  253 
  254         rtwn_write_1(sc, R92C_GPIO_IO_SEL,
  255             rtwn_read_1(sc, R92C_GPIO_IO_SEL) << 4);
  256         rtwn_setbits_1(sc, R92C_GPIO_MOD, 0, 0x0f);
  257 
  258         /* Set LNA, TRSW, EX_PA Pin to output mode. */
  259         rtwn_write_4(sc, R88E_BB_PAD_CTRL, 0x00080808);
  260 }
  261 
  262 void
  263 r88ee_post_init(struct rtwn_softc *sc)
  264 {
  265 
  266         /* Enable per-packet TX report. */
  267         rtwn_setbits_1(sc, R88E_TX_RPT_CTRL, 0, R88E_TX_RPT1_ENA);
  268 
  269         /* Disable Tx if MACID is not associated. */
  270         rtwn_write_4(sc, R88E_MACID_NO_LINK, 0xffffffff);
  271         rtwn_write_4(sc, R88E_MACID_NO_LINK + 4, 0xffffffff);
  272         r88e_macid_enable_link(sc, RTWN_MACID_BC, 1);
  273 
  274         /* Perform LO and IQ calibrations. */
  275         r88e_iq_calib(sc);
  276         /* Perform LC calibration. */
  277         r92c_lc_calib(sc);
  278 
  279         /* Enable Rx DMA */
  280         rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 1, 0);
  281 
  282         if (sc->sc_ratectl_sysctl == RTWN_RATECTL_FW) {
  283                 /* No support (yet?) for f/w rate adaptation. */
  284                 sc->sc_ratectl = RTWN_RATECTL_NET80211;
  285         } else
  286                 sc->sc_ratectl = sc->sc_ratectl_sysctl;
  287 }

Cache object: f86d5932fe5ce466b93f31aed7ebbdef


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.