1 /*-
2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29
30 #include "opt_wlan.h"
31
32 #include <sys/param.h>
33 #include <sys/lock.h>
34 #include <sys/mutex.h>
35 #include <sys/mbuf.h>
36 #include <sys/kernel.h>
37 #include <sys/socket.h>
38 #include <sys/systm.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/taskqueue.h>
42 #include <sys/bus.h>
43 #include <sys/endian.h>
44 #include <sys/linker.h>
45
46 #include <net/if.h>
47 #include <net/ethernet.h>
48 #include <net/if_media.h>
49
50 #include <net80211/ieee80211_var.h>
51 #include <net80211/ieee80211_radiotap.h>
52
53 #include <dev/rtwn/if_rtwnvar.h>
54
55 #include <dev/rtwn/if_rtwn_ridx.h>
56 #include <dev/rtwn/if_rtwn_rx.h>
57
58 #include <dev/rtwn/rtl8812a/r12a_var.h>
59
60 #include <dev/rtwn/rtl8821a/r21a.h>
61 #include <dev/rtwn/rtl8821a/r21a_reg.h>
62
63 static void
64 r21a_bypass_ext_lna_2ghz(struct rtwn_softc *sc)
65 {
66 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00100000, 0);
67 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00400000, 0);
68 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x07);
69 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x0700);
70 }
71
72 void
73 r21a_set_band_2ghz(struct rtwn_softc *sc, uint32_t basicrates)
74 {
75 struct r12a_softc *rs = sc->sc_priv;
76
77 /* Enable CCK / OFDM. */
78 rtwn_bb_setbits(sc, R12A_OFDMCCK_EN,
79 0, R12A_OFDMCCK_EN_CCK | R12A_OFDMCCK_EN_OFDM);
80
81 /* Turn off RF PA and LNA. */
82 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0),
83 R12A_RFE_PINMUX_LNA_MASK, 0x7000);
84 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0),
85 R12A_RFE_PINMUX_PA_A_MASK, 0x70);
86
87 if (rs->ext_lna_2g) {
88 /* Turn on 2.4 GHz external LNA. */
89 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0, 0x00100000);
90 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00400000, 0);
91 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0x05, 0x02);
92 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0x0500, 0x0200);
93 } else {
94 /* Bypass 2.4 GHz external LNA. */
95 r21a_bypass_ext_lna_2ghz(sc);
96 }
97
98 /* Select AGC table. */
99 rtwn_bb_setbits(sc, R12A_TX_SCALE(0), 0x0f00, 0);
100
101 rtwn_bb_setbits(sc, R12A_TX_PATH, 0xf0, 0x10);
102 rtwn_bb_setbits(sc, R12A_CCK_RX_PATH, 0x0f000000, 0x01000000);
103
104 /* Write basic rates. */
105 rtwn_set_basicrates(sc, basicrates);
106
107 rtwn_write_1(sc, R12A_CCK_CHECK, 0);
108 }
109
110 void
111 r21a_set_band_5ghz(struct rtwn_softc *sc, uint32_t basicrates)
112 {
113 struct r12a_softc *rs = sc->sc_priv;
114 int ntries;
115
116 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0),
117 R12A_RFE_PINMUX_LNA_MASK, 0x5000);
118 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0),
119 R12A_RFE_PINMUX_PA_A_MASK, 0x40);
120
121 if (rs->ext_lna_2g) {
122 /* Bypass 2.4 GHz external LNA. */
123 r21a_bypass_ext_lna_2ghz(sc);
124 }
125
126 rtwn_write_1(sc, R12A_CCK_CHECK, R12A_CCK_CHECK_5GHZ);
127
128 for (ntries = 0; ntries < 100; ntries++) {
129 if ((rtwn_read_2(sc, R12A_TXPKT_EMPTY) & 0x30) == 0x30)
130 break;
131
132 rtwn_delay(sc, 25);
133 }
134 if (ntries == 100) {
135 device_printf(sc->sc_dev,
136 "%s: TXPKT_EMPTY check failed (%04X)\n",
137 __func__, rtwn_read_2(sc, R12A_TXPKT_EMPTY));
138 }
139
140 /* Enable OFDM. */
141 rtwn_bb_setbits(sc, R12A_OFDMCCK_EN, R12A_OFDMCCK_EN_CCK,
142 R12A_OFDMCCK_EN_OFDM);
143
144 /* Select AGC table. */
145 rtwn_bb_setbits(sc, R12A_TX_SCALE(0), 0x0f00, 0x0100);
146
147 rtwn_bb_setbits(sc, R12A_TX_PATH, 0xf0, 0);
148 rtwn_bb_setbits(sc, R12A_CCK_RX_PATH, 0, 0x0f000000);
149
150 /* Write basic rates. */
151 rtwn_set_basicrates(sc, basicrates);
152 }
Cache object: 2baa9e9bcc1241d05c80b23866896b4b
|