1 /* $NetBSD: atapi_wdc.c,v 1.69.2.2 2004/08/11 19:43:52 jmc Exp $ */
2
3 /*
4 * Copyright (c) 1998, 2001 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Manuel Bouyer.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.69.2.2 2004/08/11 19:43:52 jmc Exp $");
34
35 #ifndef WDCDEBUG
36 #define WDCDEBUG
37 #endif /* WDCDEBUG */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/file.h>
43 #include <sys/stat.h>
44 #include <sys/buf.h>
45 #include <sys/malloc.h>
46 #include <sys/device.h>
47 #include <sys/syslog.h>
48 #include <sys/proc.h>
49 #include <sys/dvdio.h>
50
51 #include <machine/intr.h>
52 #include <machine/bus.h>
53
54 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
55 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
56 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
57 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
58 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
59 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
60
61 #include <dev/ata/atareg.h>
62 #include <dev/ata/atavar.h>
63 #include <dev/ic/wdcreg.h>
64 #include <dev/ic/wdcvar.h>
65
66 #include <dev/scsipi/scsi_all.h> /* for SCSI status */
67
68 #define DEBUG_INTR 0x01
69 #define DEBUG_XFERS 0x02
70 #define DEBUG_STATUS 0x04
71 #define DEBUG_FUNCS 0x08
72 #define DEBUG_PROBE 0x10
73 #ifdef WDCDEBUG
74 int wdcdebug_atapi_mask = 0;
75 #define WDCDEBUG_PRINT(args, level) \
76 if (wdcdebug_atapi_mask & (level)) \
77 printf args
78 #else
79 #define WDCDEBUG_PRINT(args, level)
80 #endif
81
82 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */
83 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */
84
85 static int wdc_atapi_get_params(struct scsipi_channel *, int,
86 struct ataparams *);
87 static void wdc_atapi_probe_device(struct atapibus_softc *, int);
88 static void wdc_atapi_minphys (struct buf *bp);
89 static void wdc_atapi_start(struct wdc_channel *,struct ata_xfer *);
90 static int wdc_atapi_intr(struct wdc_channel *, struct ata_xfer *, int);
91 static void wdc_atapi_kill_xfer(struct wdc_channel *,
92 struct ata_xfer *, int);
93 static void wdc_atapi_phase_complete(struct ata_xfer *);
94 static void wdc_atapi_done(struct wdc_channel *, struct ata_xfer *);
95 static void wdc_atapi_reset(struct wdc_channel *, struct ata_xfer *);
96 static void wdc_atapi_scsipi_request(struct scsipi_channel *,
97 scsipi_adapter_req_t, void *);
98 static void wdc_atapi_kill_pending(struct scsipi_periph *);
99 static void wdc_atapi_polldsc(void *arg);
100
101 #define MAX_SIZE MAXPHYS
102
103 static const struct scsipi_bustype wdc_atapi_bustype = {
104 SCSIPI_BUSTYPE_ATAPI,
105 atapi_scsipi_cmd,
106 atapi_interpret_sense,
107 atapi_print_addr,
108 wdc_atapi_kill_pending,
109 };
110
111 void
112 wdc_atapibus_attach(struct atabus_softc *ata_sc)
113 {
114 struct wdc_channel *chp = ata_sc->sc_chan;
115 struct wdc_softc *wdc = chp->ch_wdc;
116 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
117 struct scsipi_channel *chan = &chp->ch_atapi_channel;
118
119 /*
120 * Fill in the scsipi_adapter.
121 */
122 adapt->adapt_dev = &wdc->sc_dev;
123 adapt->adapt_nchannels = wdc->nchannels;
124 adapt->adapt_request = wdc_atapi_scsipi_request;
125 adapt->adapt_minphys = wdc_atapi_minphys;
126 if (wdc->cap & WDC_CAPABILITY_NOIRQ)
127 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY;
128 wdc->sc_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device;
129
130 /*
131 * Fill in the scsipi_channel.
132 */
133 memset(chan, 0, sizeof(*chan));
134 chan->chan_adapter = adapt;
135 chan->chan_bustype = &wdc_atapi_bustype;
136 chan->chan_channel = chp->ch_channel;
137 chan->chan_flags = SCSIPI_CHAN_OPENINGS;
138 chan->chan_openings = 1;
139 chan->chan_max_periph = 1;
140 chan->chan_ntargets = 2;
141 chan->chan_nluns = 1;
142
143 chp->atapibus = config_found(&ata_sc->sc_dev, chan, atapiprint);
144 }
145
146 static void
147 wdc_atapi_minphys(struct buf *bp)
148 {
149
150 if (bp->b_bcount > MAX_SIZE)
151 bp->b_bcount = MAX_SIZE;
152 minphys(bp);
153 }
154
155 /*
156 * Kill off all pending xfers for a periph.
157 *
158 * Must be called at splbio().
159 */
160 static void
161 wdc_atapi_kill_pending(struct scsipi_periph *periph)
162 {
163 struct wdc_softc *wdc =
164 (void *)periph->periph_channel->chan_adapter->adapt_dev;
165 struct wdc_channel *chp =
166 wdc->channels[periph->periph_channel->chan_channel];
167
168 wdc_kill_pending(chp);
169 }
170
171 static void
172 wdc_atapi_kill_xfer(struct wdc_channel *chp, struct ata_xfer *xfer, int reason)
173 {
174 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
175
176 callout_stop(&chp->ch_callout);
177 /* remove this command from xfer queue */
178 wdc_free_xfer(chp, xfer);
179 switch (reason) {
180 case KILL_GONE:
181 sc_xfer->error = XS_DRIVER_STUFFUP;
182 scsipi_done(sc_xfer);
183 break;
184 case KILL_RESET:
185 sc_xfer->error = XS_RESET;
186 wdc_atapi_reset(chp, xfer);
187 break;
188 default:
189 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n",
190 reason);
191 panic("wdc_ata_bio_kill_xfer");
192 }
193 }
194
195 static int
196 wdc_atapi_get_params(struct scsipi_channel *chan, int drive,
197 struct ataparams *id)
198 {
199 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev;
200 struct wdc_channel *chp = wdc->channels[chan->chan_channel];
201 struct wdc_command wdc_c;
202
203 /* if no ATAPI device detected at wdc attach time, skip */
204 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) {
205 WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n",
206 drive), DEBUG_PROBE);
207 return -1;
208 }
209
210 memset(&wdc_c, 0, sizeof(struct wdc_command));
211 wdc_c.r_command = ATAPI_SOFT_RESET;
212 wdc_c.r_st_bmask = 0;
213 wdc_c.r_st_pmask = 0;
214 wdc_c.flags = AT_POLL;
215 wdc_c.timeout = WDC_RESET_WAIT;
216 if (wdc_exec_command(&chp->ch_drive[drive], &wdc_c) != WDC_COMPLETE) {
217 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for"
218 " drive %s:%d:%d: driver failed\n",
219 wdc->sc_dev.dv_xname, chp->ch_channel, drive);
220 panic("wdc_atapi_get_params");
221 }
222 if (wdc_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
223 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET "
224 "failed for drive %s:%d:%d: error 0x%x\n",
225 wdc->sc_dev.dv_xname, chp->ch_channel, drive,
226 wdc_c.r_error), DEBUG_PROBE);
227 return -1;
228 }
229 chp->ch_drive[drive].state = 0;
230
231 bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_status], 0);
232
233 /* Some ATAPI devices need a bit more time after software reset. */
234 delay(5000);
235 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) {
236 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE "
237 "failed for drive %s:%d:%d: error 0x%x\n",
238 wdc->sc_dev.dv_xname, chp->ch_channel, drive,
239 wdc_c.r_error), DEBUG_PROBE);
240 return -1;
241 }
242 return 0;
243 }
244
245 static void
246 wdc_atapi_probe_device(struct atapibus_softc *sc, int target)
247 {
248 struct scsipi_channel *chan = sc->sc_channel;
249 struct scsipi_periph *periph;
250 struct ataparams ids;
251 struct ataparams *id = &ids;
252 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev;
253 struct wdc_channel *chp = wdc->channels[chan->chan_channel];
254 struct ata_drive_datas *drvp = &chp->ch_drive[target];
255 struct scsipibus_attach_args sa;
256 char serial_number[21], model[41], firmware_revision[9];
257
258 /* skip if already attached */
259 if (scsipi_lookup_periph(chan, target, 0) != NULL)
260 return;
261
262 if (wdc_atapi_get_params(chan, target, id) == 0) {
263 #ifdef ATAPI_DEBUG_PROBE
264 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n",
265 sc->sc_dev.dv_xname, target,
266 id->atap_config & ATAPI_CFG_CMD_MASK,
267 id->atap_config & ATAPI_CFG_DRQ_MASK);
268 #endif
269 periph = scsipi_alloc_periph(M_NOWAIT);
270 if (periph == NULL) {
271 printf("%s: unable to allocate periph for drive %d\n",
272 sc->sc_dev.dv_xname, target);
273 return;
274 }
275 periph->periph_dev = NULL;
276 periph->periph_channel = chan;
277 periph->periph_switch = &atapi_probe_periphsw;
278 periph->periph_target = target;
279 periph->periph_lun = 0;
280 periph->periph_quirks = PQUIRK_ONLYBIG;
281
282 #ifdef SCSIPI_DEBUG
283 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI &&
284 SCSIPI_DEBUG_TARGET == target)
285 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS;
286 #endif
287 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config);
288 if (id->atap_config & ATAPI_CFG_REMOV)
289 periph->periph_flags |= PERIPH_REMOVABLE;
290 if (periph->periph_type == T_SEQUENTIAL)
291 drvp->drive_flags |= DRIVE_ATAPIST;
292
293 sa.sa_periph = periph;
294 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config);
295 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ?
296 T_REMOV : T_FIXED;
297 scsipi_strvis(model, 40, id->atap_model, 40);
298 scsipi_strvis(serial_number, 20, id->atap_serial, 20);
299 scsipi_strvis(firmware_revision, 8, id->atap_revision, 8);
300 sa.sa_inqbuf.vendor = model;
301 sa.sa_inqbuf.product = serial_number;
302 sa.sa_inqbuf.revision = firmware_revision;
303
304 /*
305 * Determine the operating mode capabilities of the device.
306 */
307 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16)
308 periph->periph_cap |= PERIPH_CAP_CMD16;
309 /* XXX This is gross. */
310 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK);
311
312 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa);
313
314 if (drvp->drv_softc)
315 wdc_probe_caps(drvp);
316 else
317 drvp->drive_flags &= ~DRIVE_ATAPI;
318 } else {
319 drvp->drive_flags &= ~DRIVE_ATAPI;
320 }
321 }
322
323 static void
324 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
325 void *arg)
326 {
327 struct scsipi_adapter *adapt = chan->chan_adapter;
328 struct scsipi_periph *periph;
329 struct scsipi_xfer *sc_xfer;
330 struct wdc_softc *wdc = (void *)adapt->adapt_dev;
331 struct ata_xfer *xfer;
332 int channel = chan->chan_channel;
333 int drive, s;
334
335 switch (req) {
336 case ADAPTER_REQ_RUN_XFER:
337 sc_xfer = arg;
338 periph = sc_xfer->xs_periph;
339 drive = periph->periph_target;
340
341 WDCDEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n",
342 wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS);
343 if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
344 sc_xfer->error = XS_DRIVER_STUFFUP;
345 scsipi_done(sc_xfer);
346 return;
347 }
348
349 xfer = wdc_get_xfer(WDC_NOSLEEP);
350 if (xfer == NULL) {
351 sc_xfer->error = XS_RESOURCE_SHORTAGE;
352 scsipi_done(sc_xfer);
353 return;
354 }
355
356 if (sc_xfer->xs_control & XS_CTL_POLL)
357 xfer->c_flags |= C_POLL;
358 if ((wdc->channels[channel]->ch_drive[drive].drive_flags &
359 (DRIVE_DMA | DRIVE_UDMA)) && sc_xfer->datalen > 0)
360 xfer->c_flags |= C_DMA;
361 xfer->c_drive = drive;
362 xfer->c_flags |= C_ATAPI;
363 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY ||
364 sc_xfer->cmd->opcode == GPCMD_SEND_KEY ||
365 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) {
366 /*
367 * DVD authentication commands must always be done in
368 * PIO mode.
369 */
370 xfer->c_flags &= ~C_DMA;
371 }
372 /*
373 * DMA can't deal with transfers which are not a multiple of
374 * 2 bytes. It's a bug to request such transfers for ATAPI
375 * but as the request can come from userland, we have to
376 * protect against it.
377 * Also some devices seems to not handle DMA xfers of less than
378 * 4 bytes.
379 */
380 if (sc_xfer->datalen < 4 || (sc_xfer->datalen & 0x01))
381 xfer->c_flags &= ~C_DMA;
382
383 xfer->c_cmd = sc_xfer;
384 xfer->c_databuf = sc_xfer->data;
385 xfer->c_bcount = sc_xfer->datalen;
386 xfer->c_start = wdc_atapi_start;
387 xfer->c_intr = wdc_atapi_intr;
388 xfer->c_kill_xfer = wdc_atapi_kill_xfer;
389 xfer->c_dscpoll = 0;
390 s = splbio();
391 wdc_exec_xfer(wdc->channels[channel], xfer);
392 #ifdef DIAGNOSTIC
393 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 &&
394 (sc_xfer->xs_status & XS_STS_DONE) == 0)
395 panic("wdc_atapi_scsipi_request: polled command "
396 "not done");
397 #endif
398 splx(s);
399 return;
400
401 default:
402 /* Not supported, nothing to do. */
403 ;
404 }
405 }
406
407 static void
408 wdc_atapi_start(struct wdc_channel *chp, struct ata_xfer *xfer)
409 {
410 struct wdc_softc *wdc = chp->ch_wdc;
411 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
412 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
413 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0;
414 char *errstring;
415
416 WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n",
417 wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive,
418 sc_xfer->xs_control), DEBUG_XFERS);
419 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER))
420 drvp->n_xfers++;
421 /* Do control operations specially. */
422 if (__predict_false(drvp->state < READY)) {
423 /* If it's not a polled command, we need the kenrel thread */
424 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 &&
425 (chp->ch_flags & WDCF_TH_RUN) == 0) {
426 chp->ch_queue->queue_freeze++;
427 wakeup(&chp->ch_thread);
428 return;
429 }
430 /*
431 * disable interrupts, all commands here should be quick
432 * enouth to be able to poll, and we don't go here that often
433 */
434 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
435 WDCTL_4BIT | WDCTL_IDS);
436 if (wdc->cap & WDC_CAPABILITY_SELECT)
437 wdc->select(chp, xfer->c_drive);
438 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
439 WDSD_IBM | (xfer->c_drive << 4));
440 /* Don't try to set mode if controller can't be adjusted */
441 if ((wdc->cap & WDC_CAPABILITY_MODE) == 0)
442 goto ready;
443 /* Also don't try if the drive didn't report its mode */
444 if ((drvp->drive_flags & DRIVE_MODE) == 0)
445 goto ready;
446 errstring = "unbusy";
447 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags))
448 goto timeout;
449 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
450 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
451 errstring = "piomode";
452 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags))
453 goto timeout;
454 if (chp->ch_status & WDCS_ERR) {
455 if (chp->ch_error == WDCE_ABRT) {
456 /*
457 * some ATAPI drives rejects pio settings.
458 * all we can do here is fall back to PIO 0
459 */
460 drvp->drive_flags &= ~DRIVE_MODE;
461 drvp->drive_flags &= ~(DRIVE_DMA|DRIVE_UDMA);
462 drvp->PIO_mode = 0;
463 drvp->DMA_mode = 0;
464 printf("%s:%d:%d: pio setting rejected, "
465 "falling back to PIO mode 0\n",
466 wdc->sc_dev.dv_xname,
467 chp->ch_channel, xfer->c_drive);
468 wdc->set_modes(chp);
469 goto ready;
470 }
471 goto error;
472 }
473 if (drvp->drive_flags & DRIVE_UDMA) {
474 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
475 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
476 } else if (drvp->drive_flags & DRIVE_DMA) {
477 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
478 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
479 } else {
480 goto ready;
481 }
482 errstring = "dmamode";
483 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags))
484 goto timeout;
485 if (chp->ch_status & WDCS_ERR)
486 goto error;
487 ready:
488 drvp->state = READY;
489 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
490 WDCTL_4BIT);
491 delay(10); /* some drives need a little delay here */
492 }
493 /* start timeout machinery */
494 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0)
495 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout),
496 wdctimeout, chp);
497
498 if (wdc->cap & WDC_CAPABILITY_SELECT)
499 wdc->select(chp, xfer->c_drive);
500 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
501 WDSD_IBM | (xfer->c_drive << 4));
502 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags) < 0) {
503 case WDCWAIT_OK:
504 break;
505 case WDCWAIT_TOUT:
506 printf("wdc_atapi_start: not ready, st = %02x\n",
507 chp->ch_status);
508 sc_xfer->error = XS_TIMEOUT;
509 wdc_atapi_reset(chp, xfer);
510 return;
511 case WDCWAIT_THR:
512 return;
513 }
514
515 /*
516 * Even with WDCS_ERR, the device should accept a command packet
517 * Limit length to what can be stuffed into the cylinder register
518 * (16 bits). Some CD-ROMs seem to interpret '' as 65536,
519 * but not all devices do that and it's not obvious from the
520 * ATAPI spec that that behaviour should be expected. If more
521 * data is necessary, multiple data transfer phases will be done.
522 */
523
524 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD,
525 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff,
526 0, 0, 0,
527 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0);
528
529 /*
530 * If there is no interrupt for CMD input, busy-wait for it (done in
531 * the interrupt routine. If it is a polled command, call the interrupt
532 * routine until command is done.
533 */
534 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) !=
535 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) {
536 /* Wait for at last 400ns for status bit to be valid */
537 DELAY(1);
538 if (chp->ch_flags & WDCF_DMA_WAIT) {
539 wdc_dmawait(chp, xfer, sc_xfer->timeout);
540 chp->ch_flags &= ~WDCF_DMA_WAIT;
541 }
542 wdc_atapi_intr(chp, xfer, 0);
543 } else {
544 chp->ch_flags |= WDCF_IRQ_WAIT;
545 }
546 if (sc_xfer->xs_control & XS_CTL_POLL) {
547 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) {
548 /* Wait for at last 400ns for status bit to be valid */
549 DELAY(1);
550 wdc_atapi_intr(chp, xfer, 0);
551 }
552 }
553 return;
554 timeout:
555 printf("%s:%d:%d: %s timed out\n",
556 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
557 errstring);
558 sc_xfer->error = XS_TIMEOUT;
559 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
560 delay(10); /* some drives need a little delay here */
561 wdc_atapi_reset(chp, xfer);
562 return;
563 error:
564 printf("%s:%d:%d: %s ",
565 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
566 errstring);
567 printf("error (0x%x)\n", chp->ch_error);
568 sc_xfer->error = XS_SHORTSENSE;
569 sc_xfer->sense.atapi_sense = chp->ch_error;
570 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
571 delay(10); /* some drives need a little delay here */
572 wdc_atapi_reset(chp, xfer);
573 return;
574 }
575
576 static int
577 wdc_atapi_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq)
578 {
579 struct wdc_softc *wdc = chp->ch_wdc;
580 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
581 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
582 int len, phase, i, retries=0;
583 int ire;
584 int dma_flags = 0;
585 void *cmd;
586
587 WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n",
588 wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive),
589 DEBUG_INTR);
590
591 /* Is it not a transfer, but a control operation? */
592 if (drvp->state < READY) {
593 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n",
594 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
595 drvp->state);
596 panic("wdc_atapi_intr: bad state");
597 }
598 /*
599 * If we missed an interrupt in a PIO transfer, reset and restart.
600 * Don't try to continue transfer, we may have missed cycles.
601 */
602 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
603 sc_xfer->error = XS_TIMEOUT;
604 wdc_atapi_reset(chp, xfer);
605 return 1;
606 }
607
608 /* Ack interrupt done in wdc_wait_for_unbusy */
609 if (wdc->cap & WDC_CAPABILITY_SELECT)
610 wdc->select(chp, xfer->c_drive);
611 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
612 WDSD_IBM | (xfer->c_drive << 4));
613 if (wdc_wait_for_unbusy(chp,
614 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) {
615 if (irq && (xfer->c_flags & C_TIMEOU) == 0)
616 return 0; /* IRQ was not for us */
617 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n",
618 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
619 xfer->c_bcount, xfer->c_skip);
620 if (xfer->c_flags & C_DMA) {
621 ata_dmaerr(drvp,
622 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
623 }
624 sc_xfer->error = XS_TIMEOUT;
625 wdc_atapi_reset(chp, xfer);
626 return 1;
627 }
628 if (wdc->cap & WDC_CAPABILITY_IRQACK)
629 wdc->irqack(chp);
630
631 /*
632 * If we missed an IRQ and were using DMA, flag it as a DMA error
633 * and reset device.
634 */
635 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) {
636 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0);
637 sc_xfer->error = XS_RESET;
638 wdc_atapi_reset(chp, xfer);
639 return (1);
640 }
641 /*
642 * if the request sense command was aborted, report the short sense
643 * previously recorded, else continue normal processing
644 */
645
646 if (xfer->c_flags & C_DMA)
647 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN)
648 ? WDC_DMA_READ : 0;
649 again:
650 len = bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_lo], 0) +
651 256 * bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_hi], 0);
652 ire = bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_ireason], 0);
653 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ);
654 WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x "
655 "ire 0x%x :", xfer->c_bcount,
656 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR);
657
658 switch (phase) {
659 case PHASE_CMDOUT:
660 cmd = sc_xfer->cmd;
661 WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR);
662 /* Init the DMA channel if necessary */
663 if (xfer->c_flags & C_DMA) {
664 if ((*wdc->dma_init)(wdc->dma_arg,
665 chp->ch_channel, xfer->c_drive,
666 xfer->c_databuf, xfer->c_bcount, dma_flags) != 0) {
667 sc_xfer->error = XS_DRIVER_STUFFUP;
668 break;
669 }
670 }
671 /* send packet command */
672 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */
673 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
674 if (drvp->drive_flags & DRIVE_CAP32)
675 bus_space_write_multi_4(chp->data32iot,
676 chp->data32ioh, 0, (u_int32_t *)cmd,
677 sc_xfer->cmdlen >> 2);
678 else
679 bus_space_write_multi_2(chp->cmd_iot,
680 chp->cmd_iohs[wd_data], 0, (u_int16_t *)cmd,
681 sc_xfer->cmdlen >> 1);
682 } else {
683 if (drvp->drive_flags & DRIVE_CAP32)
684 bus_space_write_multi_stream_4(chp->data32iot,
685 chp->data32ioh, 0, (u_int32_t *)cmd,
686 sc_xfer->cmdlen >> 2);
687 else
688 bus_space_write_multi_stream_2(chp->cmd_iot,
689 chp->cmd_iohs[wd_data], 0, (u_int16_t *)cmd,
690 sc_xfer->cmdlen >> 1);
691 }
692 /* Start the DMA channel if necessary */
693 if (xfer->c_flags & C_DMA) {
694 (*wdc->dma_start)(wdc->dma_arg,
695 chp->ch_channel, xfer->c_drive);
696 chp->ch_flags |= WDCF_DMA_WAIT;
697 }
698
699 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
700 chp->ch_flags |= WDCF_IRQ_WAIT;
701 }
702 return 1;
703
704 case PHASE_DATAOUT:
705 /* write data */
706 WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR);
707 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 ||
708 (xfer->c_flags & C_DMA) != 0) {
709 printf("wdc_atapi_intr: bad data phase DATAOUT\n");
710 if (xfer->c_flags & C_DMA) {
711 ata_dmaerr(drvp,
712 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
713 }
714 sc_xfer->error = XS_TIMEOUT;
715 wdc_atapi_reset(chp, xfer);
716 return 1;
717 }
718 if (xfer->c_bcount < len) {
719 printf("wdc_atapi_intr: warning: write only "
720 "%d of %d requested bytes\n", xfer->c_bcount, len);
721 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
722 bus_space_write_multi_2(chp->cmd_iot,
723 chp->cmd_iohs[wd_data], 0,
724 (u_int16_t *)((char *)xfer->c_databuf +
725 xfer->c_skip),
726 xfer->c_bcount >> 1);
727 } else {
728 bus_space_write_multi_stream_2(chp->cmd_iot,
729 chp->cmd_iohs[wd_data], 0,
730 (u_int16_t *)((char *)xfer->c_databuf +
731 xfer->c_skip),
732 xfer->c_bcount >> 1);
733 }
734 for (i = xfer->c_bcount; i < len; i += 2)
735 bus_space_write_2(chp->cmd_iot,
736 chp->cmd_iohs[wd_data], 0, 0);
737 xfer->c_skip += xfer->c_bcount;
738 xfer->c_bcount = 0;
739 } else {
740 if (drvp->drive_flags & DRIVE_CAP32) {
741 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
742 bus_space_write_multi_4(chp->data32iot,
743 chp->data32ioh, 0,
744 (u_int32_t *)((char *)xfer->c_databuf +
745 xfer->c_skip),
746 len >> 2);
747 else
748 bus_space_write_multi_stream_4(chp->data32iot,
749 chp->data32ioh, wd_data,
750 (u_int32_t *)((char *)xfer->c_databuf +
751 xfer->c_skip),
752 len >> 2);
753
754 xfer->c_skip += len & 0xfffffffc;
755 xfer->c_bcount -= len & 0xfffffffc;
756 len = len & 0x03;
757 }
758 if (len > 0) {
759 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
760 bus_space_write_multi_2(chp->cmd_iot,
761 chp->cmd_iohs[wd_data], 0,
762 (u_int16_t *)((char *)xfer->c_databuf +
763 xfer->c_skip),
764 len >> 1);
765 else
766 bus_space_write_multi_stream_2(chp->cmd_iot,
767 chp->cmd_iohs[wd_data], 0,
768 (u_int16_t *)((char *)xfer->c_databuf +
769 xfer->c_skip),
770 len >> 1);
771 xfer->c_skip += len;
772 xfer->c_bcount -= len;
773 }
774 }
775 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
776 chp->ch_flags |= WDCF_IRQ_WAIT;
777 }
778 return 1;
779
780 case PHASE_DATAIN:
781 /* Read data */
782 WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR);
783 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 ||
784 (xfer->c_flags & C_DMA) != 0) {
785 printf("wdc_atapi_intr: bad data phase DATAIN\n");
786 if (xfer->c_flags & C_DMA) {
787 ata_dmaerr(drvp,
788 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
789 }
790 sc_xfer->error = XS_TIMEOUT;
791 wdc_atapi_reset(chp, xfer);
792 return 1;
793 }
794 if (xfer->c_bcount < len) {
795 printf("wdc_atapi_intr: warning: reading only "
796 "%d of %d bytes\n", xfer->c_bcount, len);
797 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
798 bus_space_read_multi_2(chp->cmd_iot,
799 chp->cmd_iohs[wd_data], 0,
800 (u_int16_t *)((char *)xfer->c_databuf +
801 xfer->c_skip),
802 xfer->c_bcount >> 1);
803 } else {
804 bus_space_read_multi_stream_2(chp->cmd_iot,
805 chp->cmd_iohs[wd_data], 0,
806 (u_int16_t *)((char *)xfer->c_databuf +
807 xfer->c_skip),
808 xfer->c_bcount >> 1);
809 }
810 wdcbit_bucket(chp, len - xfer->c_bcount);
811 xfer->c_skip += xfer->c_bcount;
812 xfer->c_bcount = 0;
813 } else {
814 if (drvp->drive_flags & DRIVE_CAP32) {
815 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
816 bus_space_read_multi_4(chp->data32iot,
817 chp->data32ioh, 0,
818 (u_int32_t *)((char *)xfer->c_databuf +
819 xfer->c_skip),
820 len >> 2);
821 else
822 bus_space_read_multi_stream_4(chp->data32iot,
823 chp->data32ioh, wd_data,
824 (u_int32_t *)((char *)xfer->c_databuf +
825 xfer->c_skip),
826 len >> 2);
827
828 xfer->c_skip += len & 0xfffffffc;
829 xfer->c_bcount -= len & 0xfffffffc;
830 len = len & 0x03;
831 }
832 if (len > 0) {
833 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
834 bus_space_read_multi_2(chp->cmd_iot,
835 chp->cmd_iohs[wd_data], 0,
836 (u_int16_t *)((char *)xfer->c_databuf +
837 xfer->c_skip),
838 len >> 1);
839 else
840 bus_space_read_multi_stream_2(chp->cmd_iot,
841 chp->cmd_iohs[wd_data], 0,
842 (u_int16_t *)((char *)xfer->c_databuf +
843 xfer->c_skip),
844 len >> 1);
845 xfer->c_skip += len;
846 xfer->c_bcount -=len;
847 }
848 }
849 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
850 chp->ch_flags |= WDCF_IRQ_WAIT;
851 }
852 return 1;
853
854 case PHASE_ABORTED:
855 case PHASE_COMPLETED:
856 WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR);
857 if (xfer->c_flags & C_DMA) {
858 xfer->c_bcount -= sc_xfer->datalen;
859 }
860 sc_xfer->resid = xfer->c_bcount;
861 wdc_atapi_phase_complete(xfer);
862 return(1);
863
864 default:
865 if (++retries<500) {
866 DELAY(100);
867 chp->ch_status = bus_space_read_1(chp->cmd_iot,
868 chp->cmd_iohs[wd_status], 0);
869 chp->ch_error = bus_space_read_1(chp->cmd_iot,
870 chp->cmd_iohs[wd_error], 0);
871 goto again;
872 }
873 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase);
874 if (chp->ch_status & WDCS_ERR) {
875 sc_xfer->error = XS_SHORTSENSE;
876 sc_xfer->sense.atapi_sense = chp->ch_error;
877 } else {
878 if (xfer->c_flags & C_DMA) {
879 ata_dmaerr(drvp,
880 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
881 }
882 sc_xfer->error = XS_RESET;
883 wdc_atapi_reset(chp, xfer);
884 return (1);
885 }
886 }
887 WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x "
888 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense),
889 DEBUG_INTR);
890 wdc_atapi_done(chp, xfer);
891 return (1);
892 }
893
894 static void
895 wdc_atapi_phase_complete(struct ata_xfer *xfer)
896 {
897 struct wdc_channel *chp = xfer->c_chp;
898 struct wdc_softc *wdc = chp->ch_wdc;
899 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
900 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
901
902 /* wait for DSC if needed */
903 if (drvp->drive_flags & DRIVE_ATAPIST) {
904 WDCDEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) "
905 "polldsc %d\n", wdc->sc_dev.dv_xname, chp->ch_channel,
906 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS);
907 #if 1
908 if (cold)
909 panic("wdc_atapi_phase_complete: cold");
910 #endif
911 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10,
912 AT_POLL) == WDCWAIT_TOUT) {
913 /* 10ms not enough, try again in 1 tick */
914 if (xfer->c_dscpoll++ >
915 mstohz(sc_xfer->timeout)) {
916 printf("%s:%d:%d: wait_for_dsc "
917 "failed\n",
918 wdc->sc_dev.dv_xname,
919 chp->ch_channel, xfer->c_drive);
920 sc_xfer->error = XS_TIMEOUT;
921 wdc_atapi_reset(chp, xfer);
922 return;
923 } else
924 callout_reset(&chp->ch_callout, 1,
925 wdc_atapi_polldsc, xfer);
926 return;
927 }
928 }
929
930 /*
931 * Some drive occasionally set WDCS_ERR with
932 * "ATA illegal length indication" in the error
933 * register. If we read some data the sense is valid
934 * anyway, so don't report the error.
935 */
936 if (chp->ch_status & WDCS_ERR &&
937 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 ||
938 sc_xfer->resid == sc_xfer->datalen)) {
939 /* save the short sense */
940 sc_xfer->error = XS_SHORTSENSE;
941 sc_xfer->sense.atapi_sense = chp->ch_error;
942 if ((sc_xfer->xs_periph->periph_quirks &
943 PQUIRK_NOSENSE) == 0) {
944 /* ask scsipi to send a REQUEST_SENSE */
945 sc_xfer->error = XS_BUSY;
946 sc_xfer->status = SCSI_CHECK;
947 } else if (wdc->dma_status &
948 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) {
949 ata_dmaerr(drvp,
950 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
951 sc_xfer->error = XS_RESET;
952 wdc_atapi_reset(chp, xfer);
953 return;
954 }
955 }
956 if (xfer->c_bcount != 0) {
957 WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is "
958 "%d after io\n", xfer->c_bcount), DEBUG_XFERS);
959 }
960 #ifdef DIAGNOSTIC
961 if (xfer->c_bcount < 0) {
962 printf("wdc_atapi_intr warning: bcount value "
963 "is %d after io\n", xfer->c_bcount);
964 }
965 #endif
966 WDCDEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), "
967 "error 0x%x sense 0x%x\n", sc_xfer->error,
968 sc_xfer->sense.atapi_sense), DEBUG_INTR);
969 wdc_atapi_done(chp, xfer);
970 }
971
972 static void
973 wdc_atapi_done(struct wdc_channel *chp, struct ata_xfer *xfer)
974 {
975 struct wdc_softc *wdc = chp->ch_wdc;
976 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
977
978 WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n",
979 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
980 (u_int)xfer->c_flags), DEBUG_XFERS);
981 callout_stop(&chp->ch_callout);
982 /* remove this command from xfer queue */
983 wdc_free_xfer(chp, xfer);
984
985 WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS);
986 scsipi_done(sc_xfer);
987 WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n",
988 chp->ch_flags), DEBUG_XFERS);
989 wdcstart(chp);
990 }
991
992 static void
993 wdc_atapi_reset(struct wdc_channel *chp, struct ata_xfer *xfer)
994 {
995 struct wdc_softc *wdc = chp->ch_wdc;
996 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
997 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
998
999 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET);
1000 drvp->state = 0;
1001 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) {
1002 printf("%s:%d:%d: reset failed\n",
1003 wdc->sc_dev.dv_xname, chp->ch_channel,
1004 xfer->c_drive);
1005 sc_xfer->error = XS_SELTIMEOUT;
1006 }
1007 wdc_atapi_done(chp, xfer);
1008 return;
1009 }
1010
1011 static void
1012 wdc_atapi_polldsc(void *arg)
1013 {
1014
1015 wdc_atapi_phase_complete(arg);
1016 }
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