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sys/dev/scsipi/atapi_wdc.c
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1 /* $NetBSD: atapi_wdc.c,v 1.92.2.1 2005/07/06 22:02:54 tron Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.92.2.1 2005/07/06 22:02:54 tron Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/file.h> 43 #include <sys/stat.h> 44 #include <sys/buf.h> 45 #include <sys/malloc.h> 46 #include <sys/device.h> 47 #include <sys/syslog.h> 48 #include <sys/proc.h> 49 #include <sys/dvdio.h> 50 51 #include <machine/intr.h> 52 #include <machine/bus.h> 53 54 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 55 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 56 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 57 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 58 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 59 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 60 61 #include <dev/ata/atareg.h> 62 #include <dev/ata/atavar.h> 63 #include <dev/ic/wdcreg.h> 64 #include <dev/ic/wdcvar.h> 65 66 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 67 68 #define DEBUG_INTR 0x01 69 #define DEBUG_XFERS 0x02 70 #define DEBUG_STATUS 0x04 71 #define DEBUG_FUNCS 0x08 72 #define DEBUG_PROBE 0x10 73 #ifdef ATADEBUG 74 int wdcdebug_atapi_mask = 0; 75 #define ATADEBUG_PRINT(args, level) \ 76 if (wdcdebug_atapi_mask & (level)) \ 77 printf args 78 #else 79 #define ATADEBUG_PRINT(args, level) 80 #endif 81 82 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 83 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */ 84 85 static int wdc_atapi_get_params(struct scsipi_channel *, int, 86 struct ataparams *); 87 static void wdc_atapi_probe_device(struct atapibus_softc *, int); 88 static void wdc_atapi_minphys (struct buf *bp); 89 static void wdc_atapi_start(struct ata_channel *,struct ata_xfer *); 90 static int wdc_atapi_intr(struct ata_channel *, struct ata_xfer *, int); 91 static void wdc_atapi_kill_xfer(struct ata_channel *, 92 struct ata_xfer *, int); 93 static void wdc_atapi_phase_complete(struct ata_xfer *); 94 static void wdc_atapi_done(struct ata_channel *, struct ata_xfer *); 95 static void wdc_atapi_reset(struct ata_channel *, struct ata_xfer *); 96 static void wdc_atapi_scsipi_request(struct scsipi_channel *, 97 scsipi_adapter_req_t, void *); 98 static void wdc_atapi_kill_pending(struct scsipi_periph *); 99 static void wdc_atapi_polldsc(void *arg); 100 101 #define MAX_SIZE MAXPHYS 102 103 static const struct scsipi_bustype wdc_atapi_bustype = { 104 SCSIPI_BUSTYPE_ATAPI, 105 atapi_scsipi_cmd, 106 atapi_interpret_sense, 107 atapi_print_addr, 108 wdc_atapi_kill_pending, 109 }; 110 111 void 112 wdc_atapibus_attach(struct atabus_softc *ata_sc) 113 { 114 struct ata_channel *chp = ata_sc->sc_chan; 115 struct atac_softc *atac = chp->ch_atac; 116 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 117 struct scsipi_channel *chan = &chp->ch_atapi_channel; 118 119 /* 120 * Fill in the scsipi_adapter. 121 */ 122 adapt->adapt_dev = &atac->atac_dev; 123 adapt->adapt_nchannels = atac->atac_nchannels; 124 adapt->adapt_request = wdc_atapi_scsipi_request; 125 adapt->adapt_minphys = wdc_atapi_minphys; 126 if (atac->atac_cap & ATAC_CAP_NOIRQ) 127 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 128 atac->atac_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 129 130 /* 131 * Fill in the scsipi_channel. 132 */ 133 memset(chan, 0, sizeof(*chan)); 134 chan->chan_adapter = adapt; 135 chan->chan_bustype = &wdc_atapi_bustype; 136 chan->chan_channel = chp->ch_channel; 137 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 138 chan->chan_openings = 1; 139 chan->chan_max_periph = 1; 140 chan->chan_ntargets = 2; 141 chan->chan_nluns = 1; 142 143 chp->atapibus = config_found(&ata_sc->sc_dev, chan, atapiprint); 144 } 145 146 static void 147 wdc_atapi_minphys(struct buf *bp) 148 { 149 150 if (bp->b_bcount > MAX_SIZE) 151 bp->b_bcount = MAX_SIZE; 152 minphys(bp); 153 } 154 155 /* 156 * Kill off all pending xfers for a periph. 157 * 158 * Must be called at splbio(). 159 */ 160 static void 161 wdc_atapi_kill_pending(struct scsipi_periph *periph) 162 { 163 struct atac_softc *atac = 164 (void *)periph->periph_channel->chan_adapter->adapt_dev; 165 struct ata_channel *chp = 166 atac->atac_channels[periph->periph_channel->chan_channel]; 167 168 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 169 } 170 171 static void 172 wdc_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, int reason) 173 { 174 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 175 176 /* remove this command from xfer queue */ 177 switch (reason) { 178 case KILL_GONE: 179 sc_xfer->error = XS_DRIVER_STUFFUP; 180 break; 181 case KILL_RESET: 182 sc_xfer->error = XS_RESET; 183 break; 184 default: 185 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 186 reason); 187 panic("wdc_ata_bio_kill_xfer"); 188 } 189 ata_free_xfer(chp, xfer); 190 scsipi_done(sc_xfer); 191 } 192 193 static int 194 wdc_atapi_get_params(struct scsipi_channel *chan, int drive, 195 struct ataparams *id) 196 { 197 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 198 struct atac_softc *atac = &wdc->sc_atac; 199 struct wdc_regs *wdr = &wdc->regs[chan->chan_channel]; 200 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 201 struct ata_command ata_c; 202 203 /* if no ATAPI device detected at wdc attach time, skip */ 204 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 205 ATADEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 206 drive), DEBUG_PROBE); 207 return -1; 208 } 209 210 memset(&ata_c, 0, sizeof(struct ata_command)); 211 ata_c.r_command = ATAPI_SOFT_RESET; 212 ata_c.r_st_bmask = 0; 213 ata_c.r_st_pmask = 0; 214 ata_c.flags = AT_WAIT | AT_POLL; 215 ata_c.timeout = WDC_RESET_WAIT; 216 if (wdc_exec_command(&chp->ch_drive[drive], &ata_c) != ATACMD_COMPLETE) { 217 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 218 " drive %s:%d:%d: driver failed\n", 219 atac->atac_dev.dv_xname, chp->ch_channel, drive); 220 panic("wdc_atapi_get_params"); 221 } 222 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 223 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 224 "failed for drive %s:%d:%d: error 0x%x\n", 225 atac->atac_dev.dv_xname, chp->ch_channel, drive, 226 ata_c.r_error), DEBUG_PROBE); 227 return -1; 228 } 229 chp->ch_drive[drive].state = 0; 230 231 bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_status], 0); 232 233 /* Some ATAPI devices need a bit more time after software reset. */ 234 delay(5000); 235 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) { 236 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 237 "failed for drive %s:%d:%d: error 0x%x\n", 238 atac->atac_dev.dv_xname, chp->ch_channel, drive, 239 ata_c.r_error), DEBUG_PROBE); 240 return -1; 241 } 242 return 0; 243 } 244 245 static void 246 wdc_atapi_probe_device(struct atapibus_softc *sc, int target) 247 { 248 struct scsipi_channel *chan = sc->sc_channel; 249 struct scsipi_periph *periph; 250 struct ataparams ids; 251 struct ataparams *id = &ids; 252 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 253 struct atac_softc *atac = &wdc->sc_atac; 254 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 255 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 256 struct scsipibus_attach_args sa; 257 char serial_number[21], model[41], firmware_revision[9]; 258 int s; 259 260 /* skip if already attached */ 261 if (scsipi_lookup_periph(chan, target, 0) != NULL) 262 return; 263 264 if (wdc_atapi_get_params(chan, target, id) == 0) { 265 #ifdef ATAPI_DEBUG_PROBE 266 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 267 sc->sc_dev.dv_xname, target, 268 id->atap_config & ATAPI_CFG_CMD_MASK, 269 id->atap_config & ATAPI_CFG_DRQ_MASK); 270 #endif 271 periph = scsipi_alloc_periph(M_NOWAIT); 272 if (periph == NULL) { 273 printf("%s: unable to allocate periph for drive %d\n", 274 sc->sc_dev.dv_xname, target); 275 return; 276 } 277 periph->periph_dev = NULL; 278 periph->periph_channel = chan; 279 periph->periph_switch = &atapi_probe_periphsw; 280 periph->periph_target = target; 281 periph->periph_lun = 0; 282 periph->periph_quirks = PQUIRK_ONLYBIG; 283 284 #ifdef SCSIPI_DEBUG 285 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 286 SCSIPI_DEBUG_TARGET == target) 287 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 288 #endif 289 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 290 if (id->atap_config & ATAPI_CFG_REMOV) 291 periph->periph_flags |= PERIPH_REMOVABLE; 292 if (periph->periph_type == T_SEQUENTIAL) { 293 s = splbio(); 294 drvp->drive_flags |= DRIVE_ATAPIST; 295 splx(s); 296 } 297 298 sa.sa_periph = periph; 299 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 300 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 301 T_REMOV : T_FIXED; 302 scsipi_strvis(model, 40, id->atap_model, 40); 303 scsipi_strvis(serial_number, 20, id->atap_serial, 20); 304 scsipi_strvis(firmware_revision, 8, id->atap_revision, 8); 305 sa.sa_inqbuf.vendor = model; 306 sa.sa_inqbuf.product = serial_number; 307 sa.sa_inqbuf.revision = firmware_revision; 308 309 /* 310 * Determine the operating mode capabilities of the device. 311 */ 312 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 313 periph->periph_cap |= PERIPH_CAP_CMD16; 314 /* XXX This is gross. */ 315 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 316 317 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 318 319 if (drvp->drv_softc) 320 ata_probe_caps(drvp); 321 else { 322 s = splbio(); 323 drvp->drive_flags &= ~DRIVE_ATAPI; 324 splx(s); 325 } 326 } else { 327 s = splbio(); 328 drvp->drive_flags &= ~DRIVE_ATAPI; 329 splx(s); 330 } 331 } 332 333 static void 334 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 335 void *arg) 336 { 337 struct scsipi_adapter *adapt = chan->chan_adapter; 338 struct scsipi_periph *periph; 339 struct scsipi_xfer *sc_xfer; 340 struct wdc_softc *wdc = (void *)adapt->adapt_dev; 341 struct atac_softc *atac = &wdc->sc_atac; 342 struct ata_xfer *xfer; 343 int channel = chan->chan_channel; 344 int drive, s; 345 346 switch (req) { 347 case ADAPTER_REQ_RUN_XFER: 348 sc_xfer = arg; 349 periph = sc_xfer->xs_periph; 350 drive = periph->periph_target; 351 352 ATADEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 353 atac->atac_dev.dv_xname, channel, drive), DEBUG_XFERS); 354 if ((atac->atac_dev.dv_flags & DVF_ACTIVE) == 0) { 355 sc_xfer->error = XS_DRIVER_STUFFUP; 356 scsipi_done(sc_xfer); 357 return; 358 } 359 360 xfer = ata_get_xfer(ATAXF_NOSLEEP); 361 if (xfer == NULL) { 362 sc_xfer->error = XS_RESOURCE_SHORTAGE; 363 scsipi_done(sc_xfer); 364 return; 365 } 366 367 if (sc_xfer->xs_control & XS_CTL_POLL) 368 xfer->c_flags |= C_POLL; 369 if ((atac->atac_channels[channel]->ch_drive[drive].drive_flags & 370 (DRIVE_DMA | DRIVE_UDMA)) && sc_xfer->datalen > 0) 371 xfer->c_flags |= C_DMA; 372 xfer->c_drive = drive; 373 xfer->c_flags |= C_ATAPI; 374 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 375 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 376 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 377 /* 378 * DVD authentication commands must always be done in 379 * PIO mode. 380 */ 381 xfer->c_flags &= ~C_DMA; 382 } 383 /* 384 * DMA can't deal with transfers which are not a multiple of 385 * 2 bytes. It's a bug to request such transfers for ATAPI 386 * but as the request can come from userland, we have to 387 * protect against it. 388 * Also some devices seems to not handle DMA xfers of less than 389 * 4 bytes. 390 */ 391 if (sc_xfer->datalen < 4 || (sc_xfer->datalen & 0x01)) 392 xfer->c_flags &= ~C_DMA; 393 394 xfer->c_cmd = sc_xfer; 395 xfer->c_databuf = sc_xfer->data; 396 xfer->c_bcount = sc_xfer->datalen; 397 xfer->c_start = wdc_atapi_start; 398 xfer->c_intr = wdc_atapi_intr; 399 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 400 xfer->c_dscpoll = 0; 401 s = splbio(); 402 ata_exec_xfer(atac->atac_channels[channel], xfer); 403 #ifdef DIAGNOSTIC 404 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 405 (sc_xfer->xs_status & XS_STS_DONE) == 0) 406 panic("wdc_atapi_scsipi_request: polled command " 407 "not done"); 408 #endif 409 splx(s); 410 return; 411 412 default: 413 /* Not supported, nothing to do. */ 414 ; 415 } 416 } 417 418 static void 419 wdc_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 420 { 421 struct atac_softc *atac = chp->ch_atac; 422 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 423 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 424 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 425 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 426 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0; 427 char *errstring; 428 429 ATADEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 430 atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive, 431 sc_xfer->xs_control), DEBUG_XFERS); 432 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER)) 433 drvp->n_xfers++; 434 /* Do control operations specially. */ 435 if (__predict_false(drvp->state < READY)) { 436 /* If it's not a polled command, we need the kenrel thread */ 437 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 && 438 (chp->ch_flags & ATACH_TH_RUN) == 0) { 439 chp->ch_queue->queue_freeze++; 440 wakeup(&chp->ch_thread); 441 return; 442 } 443 /* 444 * disable interrupts, all commands here should be quick 445 * enouth to be able to poll, and we don't go here that often 446 */ 447 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 448 WDCTL_4BIT | WDCTL_IDS); 449 if (wdc->select) 450 wdc->select(chp, xfer->c_drive); 451 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 452 WDSD_IBM | (xfer->c_drive << 4)); 453 /* Don't try to set mode if controller can't be adjusted */ 454 if (atac->atac_set_modes == NULL) 455 goto ready; 456 /* Also don't try if the drive didn't report its mode */ 457 if ((drvp->drive_flags & DRIVE_MODE) == 0) 458 goto ready; 459 errstring = "unbusy"; 460 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) 461 goto timeout; 462 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 463 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 464 errstring = "piomode"; 465 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 466 goto timeout; 467 if (chp->ch_status & WDCS_ERR) { 468 if (chp->ch_error == WDCE_ABRT) { 469 /* 470 * Some ATAPI drives reject PIO settings. 471 * Fall back to PIO mode 3 since that's the 472 * minimum for ATAPI. 473 */ 474 printf("%s:%d:%d: PIO mode %d rejected, " 475 "falling back to PIO mode 3\n", 476 atac->atac_dev.dv_xname, 477 chp->ch_channel, xfer->c_drive, 478 drvp->PIO_mode); 479 if (drvp->PIO_mode > 3) 480 drvp->PIO_mode = 3; 481 } else 482 goto error; 483 } 484 if (drvp->drive_flags & DRIVE_UDMA) { 485 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 486 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 487 } else if (drvp->drive_flags & DRIVE_DMA) { 488 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 489 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 490 } else { 491 goto ready; 492 } 493 errstring = "dmamode"; 494 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 495 goto timeout; 496 if (chp->ch_status & WDCS_ERR) { 497 if (chp->ch_error == WDCE_ABRT) { 498 if (drvp->drive_flags & DRIVE_UDMA) 499 goto error; 500 else { 501 /* 502 * The drive rejected our DMA setting. 503 * Fall back to mode 1. 504 */ 505 printf("%s:%d:%d: DMA mode %d rejected, " 506 "falling back to DMA mode 0\n", 507 atac->atac_dev.dv_xname, 508 chp->ch_channel, xfer->c_drive, 509 drvp->DMA_mode); 510 if (drvp->DMA_mode > 0) 511 drvp->DMA_mode = 0; 512 } 513 } else 514 goto error; 515 } 516 ready: 517 drvp->state = READY; 518 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 519 WDCTL_4BIT); 520 delay(10); /* some drives need a little delay here */ 521 } 522 /* start timeout machinery */ 523 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 524 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 525 wdctimeout, chp); 526 527 if (wdc->select) 528 wdc->select(chp, xfer->c_drive); 529 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 530 WDSD_IBM | (xfer->c_drive << 4)); 531 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags) < 0) { 532 case WDCWAIT_OK: 533 break; 534 case WDCWAIT_TOUT: 535 printf("wdc_atapi_start: not ready, st = %02x\n", 536 chp->ch_status); 537 sc_xfer->error = XS_TIMEOUT; 538 wdc_atapi_reset(chp, xfer); 539 return; 540 case WDCWAIT_THR: 541 return; 542 } 543 544 /* 545 * Even with WDCS_ERR, the device should accept a command packet 546 * Limit length to what can be stuffed into the cylinder register 547 * (16 bits). Some CD-ROMs seem to interpret '' as 65536, 548 * but not all devices do that and it's not obvious from the 549 * ATAPI spec that that behaviour should be expected. If more 550 * data is necessary, multiple data transfer phases will be done. 551 */ 552 553 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD, 554 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 555 0, 0, 0, 556 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0); 557 558 /* 559 * If there is no interrupt for CMD input, busy-wait for it (done in 560 * the interrupt routine. If it is a polled command, call the interrupt 561 * routine until command is done. 562 */ 563 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 564 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 565 /* Wait for at last 400ns for status bit to be valid */ 566 DELAY(1); 567 wdc_atapi_intr(chp, xfer, 0); 568 } else { 569 chp->ch_flags |= ATACH_IRQ_WAIT; 570 } 571 if (sc_xfer->xs_control & XS_CTL_POLL) { 572 if (chp->ch_flags & ATACH_DMA_WAIT) { 573 wdc_dmawait(chp, xfer, sc_xfer->timeout); 574 chp->ch_flags &= ~ATACH_DMA_WAIT; 575 } 576 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 577 /* Wait for at last 400ns for status bit to be valid */ 578 DELAY(1); 579 wdc_atapi_intr(chp, xfer, 0); 580 } 581 } 582 return; 583 timeout: 584 printf("%s:%d:%d: %s timed out\n", 585 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 586 errstring); 587 sc_xfer->error = XS_TIMEOUT; 588 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 589 delay(10); /* some drives need a little delay here */ 590 wdc_atapi_reset(chp, xfer); 591 return; 592 error: 593 printf("%s:%d:%d: %s ", 594 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 595 errstring); 596 printf("error (0x%x)\n", chp->ch_error); 597 sc_xfer->error = XS_SHORTSENSE; 598 sc_xfer->sense.atapi_sense = chp->ch_error; 599 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 600 delay(10); /* some drives need a little delay here */ 601 wdc_atapi_reset(chp, xfer); 602 return; 603 } 604 605 static int 606 wdc_atapi_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 607 { 608 struct atac_softc *atac = chp->ch_atac; 609 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 610 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 611 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 612 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 613 int len, phase, i, retries=0; 614 int ire, error; 615 int dma_flags = 0; 616 void *cmd; 617 618 ATADEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 619 atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive), 620 DEBUG_INTR); 621 622 /* Is it not a transfer, but a control operation? */ 623 if (drvp->state < READY) { 624 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 625 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 626 drvp->state); 627 panic("wdc_atapi_intr: bad state"); 628 } 629 /* 630 * If we missed an interrupt in a PIO transfer, reset and restart. 631 * Don't try to continue transfer, we may have missed cycles. 632 */ 633 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 634 sc_xfer->error = XS_TIMEOUT; 635 wdc_atapi_reset(chp, xfer); 636 return 1; 637 } 638 639 /* Ack interrupt done in wdc_wait_for_unbusy */ 640 if (wdc->select) 641 wdc->select(chp, xfer->c_drive); 642 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 643 WDSD_IBM | (xfer->c_drive << 4)); 644 if (wdc_wait_for_unbusy(chp, 645 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) { 646 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 647 return 0; /* IRQ was not for us */ 648 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 649 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 650 xfer->c_bcount, xfer->c_skip); 651 if (xfer->c_flags & C_DMA) { 652 ata_dmaerr(drvp, 653 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 654 } 655 sc_xfer->error = XS_TIMEOUT; 656 wdc_atapi_reset(chp, xfer); 657 return 1; 658 } 659 if (wdc->irqack) 660 wdc->irqack(chp); 661 662 /* 663 * If we missed an IRQ and were using DMA, flag it as a DMA error 664 * and reset device. 665 */ 666 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 667 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 668 sc_xfer->error = XS_RESET; 669 wdc_atapi_reset(chp, xfer); 670 return (1); 671 } 672 /* 673 * if the request sense command was aborted, report the short sense 674 * previously recorded, else continue normal processing 675 */ 676 677 if (xfer->c_flags & C_DMA) 678 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 679 ? WDC_DMA_READ : 0; 680 again: 681 len = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_lo], 0) + 682 256 * bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_hi], 0); 683 ire = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_ireason], 0); 684 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 685 ATADEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 686 "ire 0x%x :", xfer->c_bcount, 687 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 688 689 switch (phase) { 690 case PHASE_CMDOUT: 691 cmd = sc_xfer->cmd; 692 ATADEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 693 /* Init the DMA channel if necessary */ 694 if (xfer->c_flags & C_DMA) { 695 error = (*wdc->dma_init)(wdc->dma_arg, 696 chp->ch_channel, xfer->c_drive, 697 xfer->c_databuf, xfer->c_bcount, dma_flags); 698 if (error) { 699 if (error == EINVAL) { 700 /* 701 * We can't do DMA on this transfer 702 * for some reason. Fall back to 703 * PIO. 704 */ 705 xfer->c_flags &= ~C_DMA; 706 error = 0; 707 } else { 708 sc_xfer->error = XS_DRIVER_STUFFUP; 709 break; 710 } 711 } 712 } 713 714 /* send packet command */ 715 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 716 wdc->dataout_pio(chp, drvp->drive_flags, cmd, sc_xfer->cmdlen); 717 718 /* Start the DMA channel if necessary */ 719 if (xfer->c_flags & C_DMA) { 720 (*wdc->dma_start)(wdc->dma_arg, 721 chp->ch_channel, xfer->c_drive); 722 chp->ch_flags |= ATACH_DMA_WAIT; 723 } 724 725 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 726 chp->ch_flags |= ATACH_IRQ_WAIT; 727 } 728 return 1; 729 730 case PHASE_DATAOUT: 731 /* write data */ 732 ATADEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 733 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 734 (xfer->c_flags & C_DMA) != 0) { 735 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 736 if (xfer->c_flags & C_DMA) { 737 ata_dmaerr(drvp, 738 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 739 } 740 sc_xfer->error = XS_TIMEOUT; 741 wdc_atapi_reset(chp, xfer); 742 return 1; 743 } 744 if (xfer->c_bcount < len) { 745 printf("wdc_atapi_intr: warning: write only " 746 "%d of %d requested bytes\n", xfer->c_bcount, len); 747 wdc->dataout_pio(chp, drvp->drive_flags, 748 (char *)xfer->c_databuf + xfer->c_skip, 749 xfer->c_bcount); 750 for (i = xfer->c_bcount; i < len; i += 2) 751 bus_space_write_2(wdr->cmd_iot, 752 wdr->cmd_iohs[wd_data], 0, 0); 753 xfer->c_skip += xfer->c_bcount; 754 xfer->c_bcount = 0; 755 } else { 756 wdc->dataout_pio(chp, drvp->drive_flags, 757 (char *)xfer->c_databuf + xfer->c_skip, len); 758 xfer->c_skip += len; 759 xfer->c_bcount -= len; 760 } 761 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 762 chp->ch_flags |= ATACH_IRQ_WAIT; 763 } 764 return 1; 765 766 case PHASE_DATAIN: 767 /* Read data */ 768 ATADEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 769 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 770 (xfer->c_flags & C_DMA) != 0) { 771 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 772 if (xfer->c_flags & C_DMA) { 773 ata_dmaerr(drvp, 774 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 775 } 776 sc_xfer->error = XS_TIMEOUT; 777 wdc_atapi_reset(chp, xfer); 778 return 1; 779 } 780 if (xfer->c_bcount < len) { 781 printf("wdc_atapi_intr: warning: reading only " 782 "%d of %d bytes\n", xfer->c_bcount, len); 783 wdc->datain_pio(chp, drvp->drive_flags, 784 (char *)xfer->c_databuf + xfer->c_skip, 785 xfer->c_bcount); 786 wdcbit_bucket(chp, len - xfer->c_bcount); 787 xfer->c_skip += xfer->c_bcount; 788 xfer->c_bcount = 0; 789 } else { 790 wdc->datain_pio(chp, drvp->drive_flags, 791 (char *)xfer->c_databuf + xfer->c_skip, len); 792 xfer->c_skip += len; 793 xfer->c_bcount -=len; 794 } 795 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 796 chp->ch_flags |= ATACH_IRQ_WAIT; 797 } 798 return 1; 799 800 case PHASE_ABORTED: 801 case PHASE_COMPLETED: 802 ATADEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 803 if (xfer->c_flags & C_DMA) { 804 xfer->c_bcount -= sc_xfer->datalen; 805 } 806 sc_xfer->resid = xfer->c_bcount; 807 wdc_atapi_phase_complete(xfer); 808 return(1); 809 810 default: 811 if (++retries<500) { 812 DELAY(100); 813 chp->ch_status = bus_space_read_1(wdr->cmd_iot, 814 wdr->cmd_iohs[wd_status], 0); 815 chp->ch_error = bus_space_read_1(wdr->cmd_iot, 816 wdr->cmd_iohs[wd_error], 0); 817 goto again; 818 } 819 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 820 if (chp->ch_status & WDCS_ERR) { 821 sc_xfer->error = XS_SHORTSENSE; 822 sc_xfer->sense.atapi_sense = chp->ch_error; 823 } else { 824 if (xfer->c_flags & C_DMA) { 825 ata_dmaerr(drvp, 826 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 827 } 828 sc_xfer->error = XS_RESET; 829 wdc_atapi_reset(chp, xfer); 830 return (1); 831 } 832 } 833 ATADEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 834 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 835 DEBUG_INTR); 836 wdc_atapi_done(chp, xfer); 837 return (1); 838 } 839 840 static void 841 wdc_atapi_phase_complete(struct ata_xfer *xfer) 842 { 843 struct ata_channel *chp = xfer->c_chp; 844 struct atac_softc *atac = chp->ch_atac; 845 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 846 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 847 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 848 849 /* wait for DSC if needed */ 850 if (drvp->drive_flags & DRIVE_ATAPIST) { 851 ATADEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 852 "polldsc %d\n", atac->atac_dev.dv_xname, chp->ch_channel, 853 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS); 854 #if 1 855 if (cold) 856 panic("wdc_atapi_phase_complete: cold"); 857 #endif 858 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10, 859 AT_POLL) == WDCWAIT_TOUT) { 860 /* 10ms not enough, try again in 1 tick */ 861 if (xfer->c_dscpoll++ > 862 mstohz(sc_xfer->timeout)) { 863 printf("%s:%d:%d: wait_for_dsc " 864 "failed\n", 865 atac->atac_dev.dv_xname, 866 chp->ch_channel, xfer->c_drive); 867 sc_xfer->error = XS_TIMEOUT; 868 wdc_atapi_reset(chp, xfer); 869 return; 870 } else 871 callout_reset(&chp->ch_callout, 1, 872 wdc_atapi_polldsc, xfer); 873 return; 874 } 875 } 876 877 /* 878 * Some drive occasionally set WDCS_ERR with 879 * "ATA illegal length indication" in the error 880 * register. If we read some data the sense is valid 881 * anyway, so don't report the error. 882 */ 883 if (chp->ch_status & WDCS_ERR && 884 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 885 sc_xfer->resid == sc_xfer->datalen)) { 886 /* save the short sense */ 887 sc_xfer->error = XS_SHORTSENSE; 888 sc_xfer->sense.atapi_sense = chp->ch_error; 889 if ((sc_xfer->xs_periph->periph_quirks & 890 PQUIRK_NOSENSE) == 0) { 891 /* ask scsipi to send a REQUEST_SENSE */ 892 sc_xfer->error = XS_BUSY; 893 sc_xfer->status = SCSI_CHECK; 894 } else if (wdc->dma_status & 895 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 896 ata_dmaerr(drvp, 897 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 898 sc_xfer->error = XS_RESET; 899 wdc_atapi_reset(chp, xfer); 900 return; 901 } 902 } 903 if (xfer->c_bcount != 0) { 904 ATADEBUG_PRINT(("wdc_atapi_intr: bcount value is " 905 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 906 } 907 #ifdef DIAGNOSTIC 908 if (xfer->c_bcount < 0) { 909 printf("wdc_atapi_intr warning: bcount value " 910 "is %d after io\n", xfer->c_bcount); 911 } 912 #endif 913 ATADEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 914 "error 0x%x sense 0x%x\n", sc_xfer->error, 915 sc_xfer->sense.atapi_sense), DEBUG_INTR); 916 wdc_atapi_done(chp, xfer); 917 } 918 919 static void 920 wdc_atapi_done(struct ata_channel *chp, struct ata_xfer *xfer) 921 { 922 struct atac_softc *atac = chp->ch_atac; 923 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 924 int drive = xfer->c_drive; 925 926 ATADEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 927 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 928 (u_int)xfer->c_flags), DEBUG_XFERS); 929 callout_stop(&chp->ch_callout); 930 /* mark controller inactive and free the command */ 931 chp->ch_queue->active_xfer = NULL; 932 ata_free_xfer(chp, xfer); 933 934 if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) { 935 sc_xfer->error = XS_DRIVER_STUFFUP; 936 chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN; 937 wakeup(&chp->ch_queue->active_xfer); 938 } 939 940 ATADEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 941 scsipi_done(sc_xfer); 942 ATADEBUG_PRINT(("atastart from wdc_atapi_done, flags 0x%x\n", 943 chp->ch_flags), DEBUG_XFERS); 944 atastart(chp); 945 } 946 947 static void 948 wdc_atapi_reset(struct ata_channel *chp, struct ata_xfer *xfer) 949 { 950 struct atac_softc *atac = chp->ch_atac; 951 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 952 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 953 954 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET); 955 drvp->state = 0; 956 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) { 957 printf("%s:%d:%d: reset failed\n", 958 atac->atac_dev.dv_xname, chp->ch_channel, 959 xfer->c_drive); 960 sc_xfer->error = XS_SELTIMEOUT; 961 } 962 wdc_atapi_done(chp, xfer); 963 return; 964 } 965 966 static void 967 wdc_atapi_polldsc(void *arg) 968 { 969 970 wdc_atapi_phase_complete(arg); 971 }
Cache object: 8aeefef7e4e059231fe8f34d29de0066
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