The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/sfxge/sfxge.h

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    1 /*-
    2  * Copyright (c) 2010-2011 Solarflare Communications, Inc.
    3  * All rights reserved.
    4  *
    5  * This software was developed in part by Philip Paeps under contract for
    6  * Solarflare Communications, Inc.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  * $FreeBSD: releng/9.2/sys/dev/sfxge/sfxge.h 228100 2011-11-28 20:28:23Z philip $
   30  */
   31 
   32 #ifndef _SFXGE_H
   33 #define _SFXGE_H
   34 
   35 #include <sys/param.h>
   36 #include <sys/kernel.h>
   37 #include <sys/condvar.h>
   38 #include <sys/socket.h>
   39 #include <sys/sysctl.h>
   40 #include <sys/sx.h>
   41 #include <vm/uma.h>
   42 
   43 #include <net/ethernet.h>
   44 #include <net/if.h>
   45 #include <net/if_media.h>
   46 #include <net/if_types.h>
   47 
   48 /*
   49  * Backward-compatibility
   50  */
   51 #ifndef CACHE_LINE_SIZE
   52 /* This should be right on most machines the driver will be used on, and
   53  * we needn't care too much about wasting a few KB per interface.
   54  */
   55 #define CACHE_LINE_SIZE 128
   56 #endif
   57 #ifndef IFCAP_LINKSTATE
   58 #define IFCAP_LINKSTATE 0
   59 #endif
   60 #ifndef IFCAP_VLAN_HWTSO
   61 #define IFCAP_VLAN_HWTSO 0
   62 #endif
   63 #ifndef IFM_10G_T
   64 #define IFM_10G_T IFM_UNKNOWN
   65 #endif
   66 #ifndef IFM_10G_KX4
   67 #define IFM_10G_KX4 IFM_10G_CX4
   68 #endif
   69 #if __FreeBSD_version >= 800054
   70 /* Networking core is multiqueue aware. We can manage our own TX
   71  * queues and use m_pkthdr.flowid.
   72  */
   73 #define SFXGE_HAVE_MQ
   74 #endif
   75 #if (__FreeBSD_version >= 800501 && __FreeBSD_version < 900000) || \
   76         __FreeBSD_version >= 900003
   77 #define SFXGE_HAVE_DESCRIBE_INTR
   78 #endif
   79 #ifdef IFM_ETH_RXPAUSE
   80 #define SFXGE_HAVE_PAUSE_MEDIAOPTS
   81 #endif
   82 #ifndef CTLTYPE_U64
   83 #define CTLTYPE_U64 CTLTYPE_QUAD
   84 #endif
   85 
   86 #include "sfxge_rx.h"
   87 #include "sfxge_tx.h"
   88 
   89 #define SFXGE_IP_ALIGN 2
   90 
   91 #define SFXGE_ETHERTYPE_LOOPBACK        0x9000  /* Xerox loopback */
   92 
   93 enum sfxge_evq_state {
   94         SFXGE_EVQ_UNINITIALIZED = 0,
   95         SFXGE_EVQ_INITIALIZED,
   96         SFXGE_EVQ_STARTING,
   97         SFXGE_EVQ_STARTED
   98 };
   99 
  100 #define SFXGE_EV_BATCH  16384
  101 
  102 struct sfxge_evq {
  103         struct sfxge_softc      *sc  __aligned(CACHE_LINE_SIZE);
  104         struct mtx              lock __aligned(CACHE_LINE_SIZE);
  105 
  106         enum sfxge_evq_state    init_state;
  107         unsigned int            index;
  108         efsys_mem_t             mem;
  109         unsigned int            buf_base_id;
  110 
  111         boolean_t               exception;
  112 
  113         efx_evq_t               *common;
  114         unsigned int            read_ptr;
  115         unsigned int            rx_done;
  116         unsigned int            tx_done;
  117 
  118         /* Linked list of TX queues with completions to process */
  119         struct sfxge_txq        *txq;
  120         struct sfxge_txq        **txqs;
  121 };
  122 
  123 #define SFXGE_NEVS      4096
  124 #define SFXGE_NDESCS    1024
  125 #define SFXGE_MODERATION        30
  126 
  127 enum sfxge_intr_state {
  128         SFXGE_INTR_UNINITIALIZED = 0,
  129         SFXGE_INTR_INITIALIZED,
  130         SFXGE_INTR_TESTING,
  131         SFXGE_INTR_STARTED
  132 };
  133 
  134 struct sfxge_intr_hdl {
  135         int                eih_rid;
  136         void               *eih_tag;
  137         struct resource    *eih_res;
  138 };
  139 
  140 struct sfxge_intr {
  141         enum sfxge_intr_state   state;
  142         struct resource         *msix_res;
  143         struct sfxge_intr_hdl   *table;
  144         int                     n_alloc;
  145         int                     type;
  146         efsys_mem_t             status;
  147         uint32_t                zero_count;
  148 };
  149 
  150 enum sfxge_mcdi_state {
  151         SFXGE_MCDI_UNINITIALIZED = 0,
  152         SFXGE_MCDI_INITIALIZED,
  153         SFXGE_MCDI_BUSY,
  154         SFXGE_MCDI_COMPLETED
  155 };
  156 
  157 struct sfxge_mcdi {
  158         struct mtx              lock;
  159         struct cv               cv;
  160         enum sfxge_mcdi_state   state;
  161         efx_mcdi_transport_t    transport;
  162 };
  163 
  164 struct sfxge_hw_stats {
  165         clock_t                 update_time;
  166         efsys_mem_t             dma_buf;
  167         void                    *decode_buf;
  168 };
  169 
  170 enum sfxge_port_state {
  171         SFXGE_PORT_UNINITIALIZED = 0,
  172         SFXGE_PORT_INITIALIZED,
  173         SFXGE_PORT_STARTED
  174 };
  175 
  176 struct sfxge_port {
  177         struct sfxge_softc      *sc;
  178         struct mtx              lock;
  179         enum sfxge_port_state   init_state;
  180 #ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS
  181         unsigned int            wanted_fc;
  182 #endif
  183         struct sfxge_hw_stats   phy_stats;
  184         struct sfxge_hw_stats   mac_stats;
  185         efx_link_mode_t         link_mode;
  186 };
  187 
  188 enum sfxge_softc_state {
  189         SFXGE_UNINITIALIZED = 0,
  190         SFXGE_INITIALIZED,
  191         SFXGE_REGISTERED,
  192         SFXGE_STARTED
  193 };
  194 
  195 struct sfxge_softc {
  196         device_t                        dev;
  197         struct sx                       softc_lock;
  198         enum sfxge_softc_state          init_state;
  199         struct ifnet                    *ifnet;
  200         unsigned int                    if_flags;
  201         struct sysctl_oid               *stats_node;
  202 
  203         struct task                     task_reset;
  204 
  205         efx_family_t                    family;
  206         caddr_t                         vpd_data;
  207         size_t                          vpd_size;
  208         efx_nic_t                       *enp;
  209         struct mtx                      enp_lock;
  210 
  211         bus_dma_tag_t                   parent_dma_tag;
  212         efsys_bar_t                     bar;
  213 
  214         struct sfxge_intr               intr;
  215         struct sfxge_mcdi               mcdi;
  216         struct sfxge_port               port;
  217         uint32_t                        buffer_table_next;
  218 
  219         struct sfxge_evq                *evq[SFXGE_RX_SCALE_MAX];
  220         unsigned int                    ev_moderation;
  221         clock_t                         ev_stats_update_time;
  222         uint64_t                        ev_stats[EV_NQSTATS];
  223 
  224         uma_zone_t                      rxq_cache;
  225         struct sfxge_rxq                *rxq[SFXGE_RX_SCALE_MAX];
  226         unsigned int                    rx_indir_table[SFXGE_RX_SCALE_MAX];
  227 
  228 #ifdef SFXGE_HAVE_MQ
  229         struct sfxge_txq                *txq[SFXGE_TXQ_NTYPES + SFXGE_RX_SCALE_MAX];
  230 #else
  231         struct sfxge_txq                *txq[SFXGE_TXQ_NTYPES];
  232 #endif
  233 
  234         struct ifmedia                  media;
  235 
  236         size_t                          rx_prefix_size;
  237         size_t                          rx_buffer_size;
  238         uma_zone_t                      rx_buffer_zone;
  239 
  240 #ifndef SFXGE_HAVE_MQ
  241         struct mtx                      tx_lock __aligned(CACHE_LINE_SIZE);
  242 #endif
  243 };
  244 
  245 #define SFXGE_LINK_UP(sc) ((sc)->port.link_mode != EFX_LINK_DOWN)
  246 #define SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING)
  247 
  248 /*
  249  * From sfxge.c.
  250  */
  251 extern void sfxge_schedule_reset(struct sfxge_softc *sc);
  252 extern void sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n,
  253                                      uint32_t *idp);
  254 
  255 /*
  256  * From sfxge_dma.c.
  257  */
  258 extern int sfxge_dma_init(struct sfxge_softc *sc);
  259 extern void sfxge_dma_fini(struct sfxge_softc *sc);
  260 extern int sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len,
  261     efsys_mem_t *esmp);
  262 extern void sfxge_dma_free(efsys_mem_t *esmp);
  263 extern int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map,
  264     struct mbuf **mp, bus_dma_segment_t *segs, int *nsegs, int maxsegs);
  265 
  266 /*
  267  * From sfxge_ev.c.
  268  */
  269 extern int sfxge_ev_init(struct sfxge_softc *sc);
  270 extern void sfxge_ev_fini(struct sfxge_softc *sc);
  271 extern int sfxge_ev_start(struct sfxge_softc *sc);
  272 extern void sfxge_ev_stop(struct sfxge_softc *sc);
  273 extern int sfxge_ev_qpoll(struct sfxge_softc *sc, unsigned int index);
  274 
  275 /*
  276  * From sfxge_intr.c.
  277  */
  278 extern int sfxge_intr_init(struct sfxge_softc *sc);
  279 extern void sfxge_intr_fini(struct sfxge_softc *sc);
  280 extern int sfxge_intr_start(struct sfxge_softc *sc);
  281 extern void sfxge_intr_stop(struct sfxge_softc *sc);
  282 
  283 /*
  284  * From sfxge_mcdi.c.
  285  */
  286 extern int sfxge_mcdi_init(struct sfxge_softc *sc);
  287 extern void sfxge_mcdi_fini(struct sfxge_softc *sc);
  288 
  289 /*
  290  * From sfxge_port.c.
  291  */
  292 extern int sfxge_port_init(struct sfxge_softc *sc);
  293 extern void sfxge_port_fini(struct sfxge_softc *sc);
  294 extern int sfxge_port_start(struct sfxge_softc *sc);
  295 extern void sfxge_port_stop(struct sfxge_softc *sc);
  296 extern void sfxge_mac_link_update(struct sfxge_softc *sc,
  297     efx_link_mode_t mode);
  298 extern int sfxge_mac_filter_set(struct sfxge_softc *sc);
  299 extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc);
  300 
  301 #define SFXGE_MAX_MTU (9 * 1024)
  302 
  303 #endif /* _SFXGE_H */

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