sfxge_nvram.c

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    1 /*-
    2  * Copyright (c) 2010-2016 Solarflare Communications, Inc.
    3  * All rights reserved.
    4  *
    5  * This software was developed in part by OKTET Labs Ltd. under contract for
    6  * Solarflare Communications, Inc.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD$");
   32 
   33 #include <sys/types.h>
   34 #include <sys/malloc.h>
   35 
   36 #include "common/efx.h"
   37 #include "sfxge.h"
   38 
   39 /* These data make no real sense, they are here just to make sfupdate happy.
   40  * Any code that would rely on it is broken.
   41  */
   42 static const uint8_t fake_dynamic_cfg_nvram[] = {
   43         0x7a, 0xda, 0x10, 0xef, 0x0c, 0x00, 0x00, 0x00,
   44         0x00, 0x05, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
   45         0x48, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x10,
   46         0x08, 0x00, 0x00, 0x00, 0x90, 0x04, 0x00, 0x52,
   47         0x56, 0x01, 0xc3, 0x78, 0x01, 0x00, 0x03, 0x10,
   48         0x08, 0x00, 0x00, 0x00, 0x90, 0x04, 0x00, 0x52,
   49         0x56, 0x01, 0xc3, 0x78, 0x57, 0x1a, 0x10, 0xef,
   50         0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
   51         0x02, 0x0b, 0x64, 0x7d, 0xee, 0xee, 0xee, 0xee
   52 };
   53 
   54 static int
   55 sfxge_nvram_rw(struct sfxge_softc *sc, sfxge_ioc_t *ip, efx_nvram_type_t type,
   56                boolean_t write)
   57 {
   58         efx_nic_t *enp = sc->enp;
   59         size_t total_size = ip->u.nvram.size;
   60         size_t chunk_size;
   61         off_t off;
   62         int rc = 0;
   63         uint8_t *buf;
   64 
   65         if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA) {
   66                 if (write)
   67                         return (0);
   68                 rc = copyout(fake_dynamic_cfg_nvram, ip->u.nvram.data,
   69                              MIN(total_size, sizeof(fake_dynamic_cfg_nvram)));
   70                 return (rc);
   71         }
   72 
   73         if ((rc = efx_nvram_rw_start(enp, type, &chunk_size)) != 0)
   74                 goto fail1;
   75 
   76         buf = malloc(chunk_size, M_TEMP, M_WAITOK);
   77 
   78         off = 0;
   79         while (total_size) {
   80                 size_t len = MIN(chunk_size, total_size);
   81 
   82                 if (write) {
   83                         rc = copyin(ip->u.nvram.data + off, buf, len);
   84                         if (rc != 0)
   85                                 goto fail3;
   86                         rc = efx_nvram_write_chunk(enp, type,
   87                                                    ip->u.nvram.offset + off, buf, len);
   88                         if (rc != 0)
   89                                 goto fail3;
   90                 } else {
   91                         rc = efx_nvram_read_chunk(enp, type,
   92                                                   ip->u.nvram.offset + off, buf, len);
   93                         if (rc != 0)
   94                                 goto fail3;
   95                         rc = copyout(buf, ip->u.nvram.data + off, len);
   96                         if (rc != 0)
   97                                 goto fail3;
   98                 }
   99 
  100                 total_size -= len;
  101                 off += len;
  102         }
  103 
  104 fail3:
  105         free(buf, M_TEMP);
  106         efx_nvram_rw_finish(enp, type, NULL);
  107 fail1:
  108         return (rc);
  109 }
  110 
  111 static int
  112 sfxge_nvram_erase(struct sfxge_softc *sc, efx_nvram_type_t type)
  113 {
  114         efx_nic_t *enp = sc->enp;
  115         size_t chunk_size;
  116         int rc = 0;
  117 
  118         if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA)
  119                 return (0);
  120 
  121         if ((rc = efx_nvram_rw_start(enp, type, &chunk_size)) != 0)
  122                 return (rc);
  123 
  124         rc = efx_nvram_erase(enp, type);
  125 
  126         efx_nvram_rw_finish(enp, type, NULL);
  127         return (rc);
  128 }
  129 
  130 int
  131 sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip)
  132 {
  133         static const efx_nvram_type_t nvram_types[] = {
  134                 [SFXGE_NVRAM_TYPE_BOOTROM]  = EFX_NVRAM_BOOTROM,
  135                 [SFXGE_NVRAM_TYPE_BOOTROM_CFG]  = EFX_NVRAM_BOOTROM_CFG,
  136                 [SFXGE_NVRAM_TYPE_MC]  = EFX_NVRAM_MC_FIRMWARE,
  137                 [SFXGE_NVRAM_TYPE_MC_GOLDEN]  = EFX_NVRAM_MC_GOLDEN,
  138                 [SFXGE_NVRAM_TYPE_PHY]  = EFX_NVRAM_PHY,
  139                 [SFXGE_NVRAM_TYPE_NULL_PHY]  = EFX_NVRAM_NULLPHY,
  140                 [SFXGE_NVRAM_TYPE_FPGA]  = EFX_NVRAM_FPGA,
  141                 [SFXGE_NVRAM_TYPE_FCFW]  = EFX_NVRAM_FCFW,
  142                 [SFXGE_NVRAM_TYPE_CPLD]  = EFX_NVRAM_CPLD,
  143                 [SFXGE_NVRAM_TYPE_FPGA_BACKUP]  = EFX_NVRAM_FPGA_BACKUP,
  144                 [SFXGE_NVRAM_TYPE_DYNAMIC_CFG]  = EFX_NVRAM_DYNAMIC_CFG,
  145         };
  146 
  147         efx_nic_t *enp = sc->enp;
  148         efx_nvram_type_t type;
  149         int rc = 0;
  150 
  151         if (ip->u.nvram.type > SFXGE_NVRAM_TYPE_DYNAMIC_CFG)
  152                 return (EINVAL);
  153         type = nvram_types[ip->u.nvram.type];
  154         if (type == EFX_NVRAM_MC_GOLDEN &&
  155             (ip->u.nvram.op == SFXGE_NVRAM_OP_WRITE ||
  156              ip->u.nvram.op == SFXGE_NVRAM_OP_ERASE ||
  157              ip->u.nvram.op == SFXGE_NVRAM_OP_SET_VER))
  158                 return (EOPNOTSUPP);
  159 
  160         switch (ip->u.nvram.op) {
  161         case SFXGE_NVRAM_OP_SIZE:
  162         {
  163                 size_t size;
  164 
  165                 if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA) {
  166                         ip->u.nvram.size = sizeof(fake_dynamic_cfg_nvram);
  167                 } else {
  168                         if ((rc = efx_nvram_size(enp, type, &size)) != 0)
  169                                 return (rc);
  170                         ip->u.nvram.size = size;
  171                 }
  172                 break;
  173         }
  174         case SFXGE_NVRAM_OP_READ:
  175                 rc = sfxge_nvram_rw(sc, ip, type, B_FALSE);
  176                 break;
  177         case SFXGE_NVRAM_OP_WRITE:
  178                 rc = sfxge_nvram_rw(sc, ip, type, B_TRUE);
  179                 break;
  180         case SFXGE_NVRAM_OP_ERASE:
  181                 rc = sfxge_nvram_erase(sc, type);
  182                 break;
  183         case SFXGE_NVRAM_OP_GET_VER:
  184                 rc = efx_nvram_get_version(enp, type, &ip->u.nvram.subtype,
  185                                            &ip->u.nvram.version[0]);
  186                 break;
  187         case SFXGE_NVRAM_OP_SET_VER:
  188                 rc = efx_nvram_set_version(enp, type, &ip->u.nvram.version[0]);
  189                 break;
  190         default:
  191                 rc = EOPNOTSUPP;
  192                 break;
  193         }
  194 
  195         return (rc);
  196 }

Cache object: 5581aec37b7facfb715e450d252c4693

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FreeBSD/Linux Kernel Cross Reference sys/dev/sfxge/sfxge_nvram.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/sfxge/sfxge_nvram.c