FreeBSD/Linux Kernel Cross Reference
sys/dev/sio/sio.c
1 /*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 4. Neither the name of the University nor the names of its contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * from: @(#)com.c 7.5 (Berkeley) 5/16/91
30 * from: i386/isa sio.c,v 1.234
31 */
32
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD: releng/8.4/sys/dev/sio/sio.c 235121 2012-05-07 07:04:41Z marius $");
35
36 #include "opt_compat.h"
37 #include "opt_gdb.h"
38 #include "opt_kdb.h"
39 #include "opt_sio.h"
40
41 /*
42 * Serial driver, based on 386BSD-0.1 com driver.
43 * Mostly rewritten to use pseudo-DMA.
44 * Works for National Semiconductor NS8250-NS16550AF UARTs.
45 * COM driver, based on HP dca driver.
46 *
47 * Changes for PC Card integration:
48 * - Added PC Card driver table and handlers
49 */
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/bus.h>
53 #include <sys/conf.h>
54 #include <sys/fcntl.h>
55 #include <sys/interrupt.h>
56 #include <sys/kdb.h>
57 #include <sys/kernel.h>
58 #include <sys/limits.h>
59 #include <sys/lock.h>
60 #include <sys/malloc.h>
61 #include <sys/module.h>
62 #include <sys/mutex.h>
63 #include <sys/proc.h>
64 #include <sys/reboot.h>
65 #include <sys/serial.h>
66 #include <sys/sysctl.h>
67 #include <sys/syslog.h>
68 #include <sys/tty.h>
69 #include <machine/bus.h>
70 #include <sys/rman.h>
71 #include <sys/timepps.h>
72 #include <sys/uio.h>
73 #include <sys/cons.h>
74
75 #include <isa/isavar.h>
76
77 #include <machine/resource.h>
78
79 #include <dev/sio/sioreg.h>
80 #include <dev/sio/siovar.h>
81
82 #ifdef COM_ESP
83 #include <dev/ic/esp.h>
84 #endif
85 #include <dev/ic/ns16550.h>
86
87 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
88
89 #ifdef COM_MULTIPORT
90 /* checks in flags for multiport and which is multiport "master chip"
91 * for a given card
92 */
93 #define COM_ISMULTIPORT(flags) ((flags) & 0x01)
94 #define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff)
95 #define COM_NOTAST4(flags) ((flags) & 0x04)
96 #else
97 #define COM_ISMULTIPORT(flags) (0)
98 #endif /* COM_MULTIPORT */
99
100 #define COM_C_IIR_TXRDYBUG 0x80000
101 #define COM_CONSOLE(flags) ((flags) & 0x10)
102 #define COM_DEBUGGER(flags) ((flags) & 0x80)
103 #define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24)
104 #define COM_FORCECONSOLE(flags) ((flags) & 0x20)
105 #define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG)
106 #define COM_LLCONSOLE(flags) ((flags) & 0x40)
107 #define COM_LOSESOUTINTS(flags) ((flags) & 0x08)
108 #define COM_NOFIFO(flags) ((flags) & 0x02)
109 #define COM_NOPROBE(flags) ((flags) & 0x40000)
110 #define COM_NOSCR(flags) ((flags) & 0x100000)
111 #define COM_PPSCTS(flags) ((flags) & 0x10000)
112 #define COM_ST16650A(flags) ((flags) & 0x20000)
113 #define COM_TI16754(flags) ((flags) & 0x200000)
114
115 #define sio_getreg(com, off) \
116 (bus_space_read_1((com)->bst, (com)->bsh, (off)))
117 #define sio_setreg(com, off, value) \
118 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
119
120 /*
121 * com state bits.
122 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
123 * than the other bits so that they can be tested as a group without masking
124 * off the low bits.
125 *
126 * The following com and tty flags correspond closely:
127 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
128 * comstop())
129 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
130 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
131 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
132 * TS_FLUSH is not used.
133 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
134 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
135 */
136 #define CS_BUSY 0x80 /* output in progress */
137 #define CS_TTGO 0x40 /* output not stopped by XOFF */
138 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
139 #define CS_CHECKMSR 1 /* check of MSR scheduled */
140 #define CS_CTS_OFLOW 2 /* use CTS output flow control */
141 #define CS_ODONE 4 /* output completed */
142 #define CS_RTS_IFLOW 8 /* use RTS input flow control */
143 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */
144
145 static char const * const error_desc[] = {
146 #define CE_OVERRUN 0
147 "silo overflow",
148 #define CE_INTERRUPT_BUF_OVERFLOW 1
149 "interrupt-level buffer overflow",
150 #define CE_TTY_BUF_OVERFLOW 2
151 "tty-level buffer overflow",
152 };
153
154 #define CE_NTYPES 3
155 #define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum])
156
157 /* types. XXX - should be elsewhere */
158 typedef u_int Port_t; /* hardware port */
159 typedef u_char bool_t; /* boolean */
160
161 /* queue of linear buffers */
162 struct lbq {
163 u_char *l_head; /* next char to process */
164 u_char *l_tail; /* one past the last char to process */
165 struct lbq *l_next; /* next in queue */
166 bool_t l_queued; /* nonzero if queued */
167 };
168
169 /* com device structure */
170 struct com_s {
171 u_char state; /* miscellaneous flag bits */
172 u_char cfcr_image; /* copy of value written to CFCR */
173 #ifdef COM_ESP
174 bool_t esp; /* is this unit a hayes esp board? */
175 #endif
176 u_char extra_state; /* more flag bits, separate for order trick */
177 u_char fifo_image; /* copy of value written to FIFO */
178 bool_t hasfifo; /* nonzero for 16550 UARTs */
179 bool_t loses_outints; /* nonzero if device loses output interrupts */
180 u_char mcr_image; /* copy of value written to MCR */
181 #ifdef COM_MULTIPORT
182 bool_t multiport; /* is this unit part of a multiport device? */
183 #endif /* COM_MULTIPORT */
184 bool_t no_irq; /* nonzero if irq is not attached */
185 bool_t gone; /* hardware disappeared */
186 bool_t poll; /* nonzero if polling is required */
187 bool_t poll_output; /* nonzero if polling for output is required */
188 bool_t st16650a; /* nonzero if Startech 16650A compatible */
189 int unit; /* unit number */
190 u_int flags; /* copy of device flags */
191 u_int tx_fifo_size;
192
193 /*
194 * The high level of the driver never reads status registers directly
195 * because there would be too many side effects to handle conveniently.
196 * Instead, it reads copies of the registers stored here by the
197 * interrupt handler.
198 */
199 u_char last_modem_status; /* last MSR read by intr handler */
200 u_char prev_modem_status; /* last MSR handled by high level */
201
202 u_char *ibuf; /* start of input buffer */
203 u_char *ibufend; /* end of input buffer */
204 u_char *ibufold; /* old input buffer, to be freed */
205 u_char *ihighwater; /* threshold in input buffer */
206 u_char *iptr; /* next free spot in input buffer */
207 int ibufsize; /* size of ibuf (not include error bytes) */
208 int ierroff; /* offset of error bytes in ibuf */
209
210 struct lbq obufq; /* head of queue of output buffers */
211 struct lbq obufs[2]; /* output buffers */
212
213 bus_space_tag_t bst;
214 bus_space_handle_t bsh;
215
216 Port_t data_port; /* i/o ports */
217 #ifdef COM_ESP
218 Port_t esp_port;
219 #endif
220 Port_t int_ctl_port;
221 Port_t int_id_port;
222 Port_t modem_ctl_port;
223 Port_t line_status_port;
224 Port_t modem_status_port;
225
226 struct tty *tp; /* cross reference */
227
228 struct pps_state pps;
229 int pps_bit;
230 #ifdef KDB
231 int alt_brk_state;
232 #endif
233
234 u_long bytes_in; /* statistics */
235 u_long bytes_out;
236 u_int delta_error_counts[CE_NTYPES];
237 u_long error_counts[CE_NTYPES];
238
239 u_long rclk;
240
241 struct resource *irqres;
242 struct resource *ioportres;
243 int ioportrid;
244 void *cookie;
245
246 /*
247 * Data area for output buffers. Someday we should build the output
248 * buffer queue without copying data.
249 */
250 u_char obuf1[256];
251 u_char obuf2[256];
252 };
253
254 #ifdef COM_ESP
255 static int espattach(struct com_s *com, Port_t esp_port);
256 #endif
257
258 static void combreak(struct tty *tp, int sig);
259 static timeout_t siobusycheck;
260 static u_int siodivisor(u_long rclk, speed_t speed);
261 static void comclose(struct tty *tp);
262 static int comopen(struct tty *tp, struct cdev *dev);
263 static void sioinput(struct com_s *com);
264 static void siointr1(struct com_s *com);
265 static int siointr(void *arg);
266 static int commodem(struct tty *tp, int sigon, int sigoff);
267 static int comparam(struct tty *tp, struct termios *t);
268 static void siopoll(void *);
269 static void siosettimeout(void);
270 static int siosetwater(struct com_s *com, speed_t speed);
271 static void comstart(struct tty *tp);
272 static void comstop(struct tty *tp, int rw);
273 static timeout_t comwakeup;
274
275 char sio_driver_name[] = "sio";
276 static struct mtx sio_lock;
277 static int sio_inited;
278
279 /* table and macro for fast conversion from a unit number to its com struct */
280 devclass_t sio_devclass;
281 #define com_addr(unit) ((struct com_s *) \
282 devclass_get_softc(sio_devclass, unit)) /* XXX */
283
284 int comconsole = -1;
285 static volatile speed_t comdefaultrate = CONSPEED;
286 static u_long comdefaultrclk = DEFAULT_RCLK;
287 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, "");
288 static speed_t gdbdefaultrate = GDBSPEED;
289 SYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW,
290 &gdbdefaultrate, GDBSPEED, "");
291 static u_int com_events; /* input chars + weighted output completions */
292 static Port_t siocniobase;
293 static int siocnunit = -1;
294 static void *sio_slow_ih;
295 static void *sio_fast_ih;
296 static int sio_timeout;
297 static int sio_timeouts_until_log;
298 static struct callout_handle sio_timeout_handle
299 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
300 static int sio_numunits;
301
302 #ifdef GDB
303 static Port_t siogdbiobase = 0;
304 #endif
305
306 #ifdef COM_ESP
307 /* XXX configure this properly. */
308 /* XXX quite broken for new-bus. */
309 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
310 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
311 #endif
312
313 /*
314 * handle sysctl read/write requests for console speed
315 *
316 * In addition to setting comdefaultrate for I/O through /dev/console,
317 * also set the initial and lock values for the /dev/ttyXX device
318 * if there is one associated with the console. Finally, if the /dev/tty
319 * device has already been open, change the speed on the open running port
320 * itself.
321 */
322
323 static int
324 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
325 {
326 int error, s;
327 speed_t newspeed;
328 struct com_s *com;
329 struct tty *tp;
330
331 newspeed = comdefaultrate;
332
333 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
334 if (error || !req->newptr)
335 return (error);
336
337 comdefaultrate = newspeed;
338
339 if (comconsole < 0) /* serial console not selected? */
340 return (0);
341
342 com = com_addr(comconsole);
343 if (com == NULL)
344 return (ENXIO);
345
346 tp = com->tp;
347 if (tp == NULL)
348 return (ENXIO);
349
350 /*
351 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
352 * (note, the lock rates really are boolean -- if non-zero, disallow
353 * speed changes)
354 */
355 tp->t_init_in.c_ispeed = tp->t_init_in.c_ospeed =
356 tp->t_lock_in.c_ispeed = tp->t_lock_in.c_ospeed =
357 tp->t_init_out.c_ispeed = tp->t_init_out.c_ospeed =
358 tp->t_lock_out.c_ispeed = tp->t_lock_out.c_ospeed = comdefaultrate;
359
360 if (tp->t_state & TS_ISOPEN) {
361 tp->t_termios.c_ispeed =
362 tp->t_termios.c_ospeed = comdefaultrate;
363 s = spltty();
364 error = comparam(tp, &tp->t_termios);
365 splx(s);
366 }
367 return error;
368 }
369
370 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
371 0, 0, sysctl_machdep_comdefaultrate, "I", "");
372 TUNABLE_INT("machdep.conspeed", __DEVOLATILE(int *, &comdefaultrate));
373
374 #define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit))
375 #define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit))
376
377 /*
378 * Unload the driver and clear the table.
379 * XXX this is mostly wrong.
380 * XXX TODO:
381 * This is usually called when the card is ejected, but
382 * can be caused by a kldunload of a controller driver.
383 * The idea is to reset the driver's view of the device
384 * and ensure that any driver entry points such as
385 * read and write do not hang.
386 */
387 int
388 siodetach(device_t dev)
389 {
390 struct com_s *com;
391
392 com = (struct com_s *) device_get_softc(dev);
393 if (com == NULL) {
394 device_printf(dev, "NULL com in siounload\n");
395 return (0);
396 }
397 com->gone = TRUE;
398 if (com->tp)
399 ttyfree(com->tp);
400 if (com->irqres) {
401 bus_teardown_intr(dev, com->irqres, com->cookie);
402 bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres);
403 }
404 if (com->ioportres)
405 bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid,
406 com->ioportres);
407 if (com->ibuf != NULL)
408 free(com->ibuf, M_DEVBUF);
409
410 device_set_softc(dev, NULL);
411 free(com, M_DEVBUF);
412 return (0);
413 }
414
415 int
416 sioprobe(dev, xrid, rclk, noprobe)
417 device_t dev;
418 int xrid;
419 u_long rclk;
420 int noprobe;
421 {
422 #if 0
423 static bool_t already_init;
424 device_t xdev;
425 #endif
426 struct com_s *com;
427 u_int divisor;
428 bool_t failures[10];
429 int fn;
430 device_t idev;
431 Port_t iobase;
432 intrmask_t irqmap[4];
433 intrmask_t irqs;
434 u_char mcr_image;
435 int result;
436 u_long xirq;
437 u_int flags = device_get_flags(dev);
438 int rid;
439 struct resource *port;
440
441 rid = xrid;
442 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
443 0, ~0, IO_COMSIZE, RF_ACTIVE);
444 if (!port)
445 return (ENXIO);
446
447 com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO);
448 if (com == NULL) {
449 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
450 return (ENOMEM);
451 }
452 device_set_softc(dev, com);
453 com->bst = rman_get_bustag(port);
454 com->bsh = rman_get_bushandle(port);
455 if (rclk == 0)
456 rclk = DEFAULT_RCLK;
457 com->rclk = rclk;
458
459 while (sio_inited != 2)
460 if (atomic_cmpset_int(&sio_inited, 0, 1)) {
461 mtx_init(&sio_lock, sio_driver_name, NULL,
462 (comconsole != -1) ?
463 MTX_SPIN | MTX_QUIET : MTX_SPIN);
464 atomic_store_rel_int(&sio_inited, 2);
465 }
466
467 #if 0
468 /*
469 * XXX this is broken - when we are first called, there are no
470 * previously configured IO ports. We could hard code
471 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
472 * This code has been doing nothing since the conversion since
473 * "count" is zero the first time around.
474 */
475 if (!already_init) {
476 /*
477 * Turn off MCR_IENABLE for all likely serial ports. An unused
478 * port with its MCR_IENABLE gate open will inhibit interrupts
479 * from any used port that shares the interrupt vector.
480 * XXX the gate enable is elsewhere for some multiports.
481 */
482 device_t *devs;
483 int count, i, xioport;
484
485 devclass_get_devices(sio_devclass, &devs, &count);
486 for (i = 0; i < count; i++) {
487 xdev = devs[i];
488 if (device_is_enabled(xdev) &&
489 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
490 NULL) == 0)
491 outb(xioport + com_mcr, 0);
492 }
493 free(devs, M_TEMP);
494 already_init = TRUE;
495 }
496 #endif
497
498 if (COM_LLCONSOLE(flags)) {
499 printf("sio%d: reserved for low-level i/o\n",
500 device_get_unit(dev));
501 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
502 device_set_softc(dev, NULL);
503 free(com, M_DEVBUF);
504 return (ENXIO);
505 }
506
507 /*
508 * If the device is on a multiport card and has an AST/4
509 * compatible interrupt control register, initialize this
510 * register and prepare to leave MCR_IENABLE clear in the mcr.
511 * Otherwise, prepare to set MCR_IENABLE in the mcr.
512 * Point idev to the device struct giving the correct id_irq.
513 * This is the struct for the master device if there is one.
514 */
515 idev = dev;
516 mcr_image = MCR_IENABLE;
517 #ifdef COM_MULTIPORT
518 if (COM_ISMULTIPORT(flags)) {
519 Port_t xiobase;
520 u_long io;
521
522 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
523 if (idev == NULL) {
524 printf("sio%d: master device %d not configured\n",
525 device_get_unit(dev), COM_MPMASTER(flags));
526 idev = dev;
527 }
528 if (!COM_NOTAST4(flags)) {
529 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
530 NULL) == 0) {
531 xiobase = io;
532 if (bus_get_resource(idev, SYS_RES_IRQ, 0,
533 NULL, NULL) == 0)
534 outb(xiobase + com_scr, 0x80);
535 else
536 outb(xiobase + com_scr, 0);
537 }
538 mcr_image = 0;
539 }
540 }
541 #endif /* COM_MULTIPORT */
542 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
543 mcr_image = 0;
544
545 bzero(failures, sizeof failures);
546 iobase = rman_get_start(port);
547
548 /*
549 * We don't want to get actual interrupts, just masked ones.
550 * Interrupts from this line should already be masked in the ICU,
551 * but mask them in the processor as well in case there are some
552 * (misconfigured) shared interrupts.
553 */
554 mtx_lock_spin(&sio_lock);
555 /* EXTRA DELAY? */
556
557 /*
558 * For the TI16754 chips, set prescaler to 1 (4 is often the
559 * default after-reset value) as otherwise it's impossible to
560 * get highest baudrates.
561 */
562 if (COM_TI16754(flags)) {
563 u_char cfcr, efr;
564
565 cfcr = sio_getreg(com, com_cfcr);
566 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
567 efr = sio_getreg(com, com_efr);
568 /* Unlock extended features to turn off prescaler. */
569 sio_setreg(com, com_efr, efr | EFR_EFE);
570 /* Disable EFR. */
571 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0);
572 /* Turn off prescaler. */
573 sio_setreg(com, com_mcr,
574 sio_getreg(com, com_mcr) & ~MCR_PRESCALE);
575 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
576 sio_setreg(com, com_efr, efr);
577 sio_setreg(com, com_cfcr, cfcr);
578 }
579
580 /*
581 * Initialize the speed and the word size and wait long enough to
582 * drain the maximum of 16 bytes of junk in device output queues.
583 * The speed is undefined after a master reset and must be set
584 * before relying on anything related to output. There may be
585 * junk after a (very fast) soft reboot and (apparently) after
586 * master reset.
587 * XXX what about the UART bug avoided by waiting in comparam()?
588 * We don't want to to wait long enough to drain at 2 bps.
589 */
590 if (iobase == siocniobase)
591 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
592 else {
593 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
594 divisor = siodivisor(rclk, SIO_TEST_SPEED);
595 sio_setreg(com, com_dlbl, divisor & 0xff);
596 sio_setreg(com, com_dlbh, divisor >> 8);
597 sio_setreg(com, com_cfcr, CFCR_8BITS);
598 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
599 }
600
601 /*
602 * Enable the interrupt gate and disable device interrupts. This
603 * should leave the device driving the interrupt line low and
604 * guarantee an edge trigger if an interrupt can be generated.
605 */
606 /* EXTRA DELAY? */
607 sio_setreg(com, com_mcr, mcr_image);
608 sio_setreg(com, com_ier, 0);
609 DELAY(1000); /* XXX */
610 irqmap[0] = isa_irq_pending();
611
612 /*
613 * Attempt to set loopback mode so that we can send a null byte
614 * without annoying any external device.
615 */
616 /* EXTRA DELAY? */
617 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
618
619 /*
620 * Attempt to generate an output interrupt. On 8250's, setting
621 * IER_ETXRDY generates an interrupt independent of the current
622 * setting and independent of whether the THR is empty. On 16450's,
623 * setting IER_ETXRDY generates an interrupt independent of the
624 * current setting. On 16550A's, setting IER_ETXRDY only
625 * generates an interrupt when IER_ETXRDY is not already set.
626 */
627 sio_setreg(com, com_ier, IER_ETXRDY);
628
629 /*
630 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
631 * an interrupt. They'd better generate one for actually doing
632 * output. Loopback may be broken on the same incompatibles but
633 * it's unlikely to do more than allow the null byte out.
634 */
635 sio_setreg(com, com_data, 0);
636 if (iobase == siocniobase)
637 DELAY((1 + 2) * 1000000 / (comdefaultrate / 10));
638 else
639 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
640
641 /*
642 * Turn off loopback mode so that the interrupt gate works again
643 * (MCR_IENABLE was hidden). This should leave the device driving
644 * an interrupt line high. It doesn't matter if the interrupt
645 * line oscillates while we are not looking at it, since interrupts
646 * are disabled.
647 */
648 /* EXTRA DELAY? */
649 sio_setreg(com, com_mcr, mcr_image);
650
651 /*
652 * It seems my Xircom CBEM56G Cardbus modem wants to be reset
653 * to 8 bits *again*, or else probe test 0 will fail.
654 * gwk@sgi.com, 4/19/2001
655 */
656 sio_setreg(com, com_cfcr, CFCR_8BITS);
657
658 /*
659 * Some PCMCIA cards (Palido 321s, DC-1S, ...) have the "TXRDY bug",
660 * so we probe for a buggy IIR_TXRDY implementation even in the
661 * noprobe case. We don't probe for it in the !noprobe case because
662 * noprobe is always set for PCMCIA cards and the problem is not
663 * known to affect any other cards.
664 */
665 if (noprobe) {
666 /* Read IIR a few times. */
667 for (fn = 0; fn < 2; fn ++) {
668 DELAY(10000);
669 failures[6] = sio_getreg(com, com_iir);
670 }
671
672 /* IIR_TXRDY should be clear. Is it? */
673 result = 0;
674 if (failures[6] & IIR_TXRDY) {
675 /*
676 * No. We seem to have the bug. Does our fix for
677 * it work?
678 */
679 sio_setreg(com, com_ier, 0);
680 if (sio_getreg(com, com_iir) & IIR_NOPEND) {
681 /* Yes. We discovered the TXRDY bug! */
682 SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
683 } else {
684 /* No. Just fail. XXX */
685 result = ENXIO;
686 sio_setreg(com, com_mcr, 0);
687 }
688 } else {
689 /* Yes. No bug. */
690 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
691 }
692 sio_setreg(com, com_ier, 0);
693 sio_setreg(com, com_cfcr, CFCR_8BITS);
694 mtx_unlock_spin(&sio_lock);
695 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
696 if (iobase == siocniobase)
697 result = 0;
698 /*
699 * XXX: Since we don't return 0, we shouldn't be relying on
700 * the softc that we set to persist to the call to attach
701 * since other probe routines may be called, and the malloc
702 * here causes subr_bus to not allocate anything for the
703 * other probes. Instead, this softc is preserved and other
704 * probe routines can corrupt it.
705 */
706 if (result != 0) {
707 device_set_softc(dev, NULL);
708 free(com, M_DEVBUF);
709 }
710 return (result == 0 ? BUS_PROBE_DEFAULT + 1 : result);
711 }
712
713 /*
714 * Check that
715 * o the CFCR, IER and MCR in UART hold the values written to them
716 * (the values happen to be all distinct - this is good for
717 * avoiding false positive tests from bus echoes).
718 * o an output interrupt is generated and its vector is correct.
719 * o the interrupt goes away when the IIR in the UART is read.
720 */
721 /* EXTRA DELAY? */
722 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
723 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
724 failures[2] = sio_getreg(com, com_mcr) - mcr_image;
725 DELAY(10000); /* Some internal modems need this time */
726 irqmap[1] = isa_irq_pending();
727 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
728 DELAY(1000); /* XXX */
729 irqmap[2] = isa_irq_pending();
730 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
731
732 /*
733 * Turn off all device interrupts and check that they go off properly.
734 * Leave MCR_IENABLE alone. For ports without a master port, it gates
735 * the OUT2 output of the UART to
736 * the ICU input. Closing the gate would give a floating ICU input
737 * (unless there is another device driving it) and spurious interrupts.
738 * (On the system that this was first tested on, the input floats high
739 * and gives a (masked) interrupt as soon as the gate is closed.)
740 */
741 sio_setreg(com, com_ier, 0);
742 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */
743 failures[7] = sio_getreg(com, com_ier);
744 DELAY(1000); /* XXX */
745 irqmap[3] = isa_irq_pending();
746 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
747
748 mtx_unlock_spin(&sio_lock);
749
750 irqs = irqmap[1] & ~irqmap[0];
751 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
752 ((1 << xirq) & irqs) == 0) {
753 printf(
754 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
755 device_get_unit(dev), xirq, irqs);
756 printf(
757 "sio%d: port may not be enabled\n",
758 device_get_unit(dev));
759 }
760 if (bootverbose)
761 printf("sio%d: irq maps: %#x %#x %#x %#x\n",
762 device_get_unit(dev),
763 irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
764
765 result = 0;
766 for (fn = 0; fn < sizeof failures; ++fn)
767 if (failures[fn]) {
768 sio_setreg(com, com_mcr, 0);
769 result = ENXIO;
770 if (bootverbose) {
771 printf("sio%d: probe failed test(s):",
772 device_get_unit(dev));
773 for (fn = 0; fn < sizeof failures; ++fn)
774 if (failures[fn])
775 printf(" %d", fn);
776 printf("\n");
777 }
778 break;
779 }
780 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
781 if (iobase == siocniobase)
782 result = 0;
783 /*
784 * XXX: Since we don't return 0, we shouldn't be relying on the softc
785 * that we set to persist to the call to attach since other probe
786 * routines may be called, and the malloc here causes subr_bus to not
787 * allocate anything for the other probes. Instead, this softc is
788 * preserved and other probe routines can corrupt it.
789 */
790 if (result != 0) {
791 device_set_softc(dev, NULL);
792 free(com, M_DEVBUF);
793 }
794 return (result == 0 ? BUS_PROBE_DEFAULT + 1 : result);
795 }
796
797 #ifdef COM_ESP
798 static int
799 espattach(com, esp_port)
800 struct com_s *com;
801 Port_t esp_port;
802 {
803 u_char dips;
804 u_char val;
805
806 /*
807 * Check the ESP-specific I/O port to see if we're an ESP
808 * card. If not, return failure immediately.
809 */
810 if ((inb(esp_port) & 0xf3) == 0) {
811 printf(" port 0x%x is not an ESP board?\n", esp_port);
812 return (0);
813 }
814
815 /*
816 * We've got something that claims to be a Hayes ESP card.
817 * Let's hope so.
818 */
819
820 /* Get the dip-switch configuration */
821 outb(esp_port + ESP_CMD1, ESP_GETDIPS);
822 dips = inb(esp_port + ESP_STATUS1);
823
824 /*
825 * Bits 0,1 of dips say which COM port we are.
826 */
827 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
828 printf(" : ESP");
829 else {
830 printf(" esp_port has com %d\n", dips & 0x03);
831 return (0);
832 }
833
834 /*
835 * Check for ESP version 2.0 or later: bits 4,5,6 = 010.
836 */
837 outb(esp_port + ESP_CMD1, ESP_GETTEST);
838 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */
839 val = inb(esp_port + ESP_STATUS2);
840 if ((val & 0x70) < 0x20) {
841 printf("-old (%o)", val & 0x70);
842 return (0);
843 }
844
845 /*
846 * Check for ability to emulate 16550: bit 7 == 1
847 */
848 if ((dips & 0x80) == 0) {
849 printf(" slave");
850 return (0);
851 }
852
853 /*
854 * Okay, we seem to be a Hayes ESP card. Whee.
855 */
856 com->esp = TRUE;
857 com->esp_port = esp_port;
858 return (1);
859 }
860 #endif /* COM_ESP */
861
862 int
863 sioattach(dev, xrid, rclk)
864 device_t dev;
865 int xrid;
866 u_long rclk;
867 {
868 struct com_s *com;
869 #ifdef COM_ESP
870 Port_t *espp;
871 #endif
872 Port_t iobase;
873 int unit;
874 u_int flags;
875 int rid;
876 struct resource *port;
877 int ret;
878 int error;
879 struct tty *tp;
880
881 rid = xrid;
882 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
883 0, ~0, IO_COMSIZE, RF_ACTIVE);
884 if (!port)
885 return (ENXIO);
886
887 iobase = rman_get_start(port);
888 unit = device_get_unit(dev);
889 com = device_get_softc(dev);
890 flags = device_get_flags(dev);
891
892 if (unit >= sio_numunits)
893 sio_numunits = unit + 1;
894 /*
895 * sioprobe() has initialized the device registers as follows:
896 * o cfcr = CFCR_8BITS.
897 * It is most important that CFCR_DLAB is off, so that the
898 * data port is not hidden when we enable interrupts.
899 * o ier = 0.
900 * Interrupts are only enabled when the line is open.
901 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
902 * interrupt control register or the config specifies no irq.
903 * Keeping MCR_DTR and MCR_RTS off might stop the external
904 * device from sending before we are ready.
905 */
906 bzero(com, sizeof *com);
907 com->unit = unit;
908 com->ioportres = port;
909 com->ioportrid = rid;
910 com->bst = rman_get_bustag(port);
911 com->bsh = rman_get_bushandle(port);
912 com->cfcr_image = CFCR_8BITS;
913 com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
914 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
915 com->tx_fifo_size = 1;
916 com->obufs[0].l_head = com->obuf1;
917 com->obufs[1].l_head = com->obuf2;
918
919 com->data_port = iobase + com_data;
920 com->int_ctl_port = iobase + com_ier;
921 com->int_id_port = iobase + com_iir;
922 com->modem_ctl_port = iobase + com_mcr;
923 com->mcr_image = inb(com->modem_ctl_port);
924 com->line_status_port = iobase + com_lsr;
925 com->modem_status_port = iobase + com_msr;
926
927 tp = com->tp = ttyalloc();
928 tp->t_oproc = comstart;
929 tp->t_param = comparam;
930 tp->t_stop = comstop;
931 tp->t_modem = commodem;
932 tp->t_break = combreak;
933 tp->t_close = comclose;
934 tp->t_open = comopen;
935 tp->t_sc = com;
936
937 if (rclk == 0)
938 rclk = DEFAULT_RCLK;
939 com->rclk = rclk;
940
941 if (unit == comconsole)
942 ttyconsolemode(tp, comdefaultrate);
943 error = siosetwater(com, tp->t_init_in.c_ispeed);
944 mtx_unlock_spin(&sio_lock);
945 if (error) {
946 /*
947 * Leave i/o resources allocated if this is a `cn'-level
948 * console, so that other devices can't snarf them.
949 */
950 if (iobase != siocniobase)
951 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
952 return (ENOMEM);
953 }
954
955 /* attempt to determine UART type */
956 printf("sio%d: type", unit);
957
958 if (!COM_ISMULTIPORT(flags) &&
959 !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) {
960 u_char scr;
961 u_char scr1;
962 u_char scr2;
963
964 scr = sio_getreg(com, com_scr);
965 sio_setreg(com, com_scr, 0xa5);
966 scr1 = sio_getreg(com, com_scr);
967 sio_setreg(com, com_scr, 0x5a);
968 scr2 = sio_getreg(com, com_scr);
969 sio_setreg(com, com_scr, scr);
970 if (scr1 != 0xa5 || scr2 != 0x5a) {
971 printf(" 8250 or not responding");
972 goto determined_type;
973 }
974 }
975 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
976 DELAY(100);
977 switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
978 case FIFO_RX_LOW:
979 printf(" 16450");
980 break;
981 case FIFO_RX_MEDL:
982 printf(" 16450?");
983 break;
984 case FIFO_RX_MEDH:
985 printf(" 16550?");
986 break;
987 case FIFO_RX_HIGH:
988 if (COM_NOFIFO(flags)) {
989 printf(" 16550A fifo disabled");
990 break;
991 }
992 com->hasfifo = TRUE;
993 if (COM_ST16650A(flags)) {
994 printf(" ST16650A");
995 com->st16650a = TRUE;
996 com->tx_fifo_size = 32;
997 break;
998 }
999 if (COM_TI16754(flags)) {
1000 printf(" TI16754");
1001 com->tx_fifo_size = 64;
1002 break;
1003 }
1004 printf(" 16550A");
1005 #ifdef COM_ESP
1006 for (espp = likely_esp_ports; *espp != 0; espp++)
1007 if (espattach(com, *espp)) {
1008 com->tx_fifo_size = 1024;
1009 break;
1010 }
1011 if (com->esp)
1012 break;
1013 #endif
1014 com->tx_fifo_size = COM_FIFOSIZE(flags);
1015 if (com->tx_fifo_size == 0)
1016 com->tx_fifo_size = 16;
1017 else
1018 printf(" lookalike with %u bytes FIFO",
1019 com->tx_fifo_size);
1020 break;
1021 }
1022 #ifdef COM_ESP
1023 if (com->esp) {
1024 /*
1025 * Set 16550 compatibility mode.
1026 * We don't use the ESP_MODE_SCALE bit to increase the
1027 * fifo trigger levels because we can't handle large
1028 * bursts of input.
1029 * XXX flow control should be set in comparam(), not here.
1030 */
1031 outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1032 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1033
1034 /* Set RTS/CTS flow control. */
1035 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1036 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1037 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1038
1039 /* Set flow-control levels. */
1040 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1041 outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1042 outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1043 outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1044 outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1045 }
1046 #endif /* COM_ESP */
1047 sio_setreg(com, com_fifo, 0);
1048 determined_type: ;
1049
1050 #ifdef COM_MULTIPORT
1051 if (COM_ISMULTIPORT(flags)) {
1052 device_t masterdev;
1053
1054 com->multiport = TRUE;
1055 printf(" (multiport");
1056 if (unit == COM_MPMASTER(flags))
1057 printf(" master");
1058 printf(")");
1059 masterdev = devclass_get_device(sio_devclass,
1060 COM_MPMASTER(flags));
1061 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1062 SYS_RES_IRQ, 0, NULL, NULL) != 0);
1063 }
1064 #endif /* COM_MULTIPORT */
1065 if (unit == comconsole)
1066 printf(", console");
1067 if (COM_IIR_TXRDYBUG(flags))
1068 printf(" with a buggy IIR_TXRDY implementation");
1069 printf("\n");
1070
1071 if (sio_fast_ih == NULL) {
1072 swi_add(&tty_intr_event, "sio", siopoll, NULL, SWI_TTY, 0,
1073 &sio_fast_ih);
1074 swi_add(&clk_intr_event, "sio", siopoll, NULL, SWI_CLOCK, 0,
1075 &sio_slow_ih);
1076 }
1077
1078 com->flags = flags;
1079 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1080 tp->t_pps = &com->pps;
1081
1082 if (COM_PPSCTS(flags))
1083 com->pps_bit = MSR_CTS;
1084 else
1085 com->pps_bit = MSR_DCD;
1086 pps_init(&com->pps);
1087
1088 rid = 0;
1089 com->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
1090 if (com->irqres) {
1091 ret = bus_setup_intr(dev, com->irqres,
1092 INTR_TYPE_TTY,
1093 siointr, NULL, com,
1094 &com->cookie);
1095 if (ret) {
1096 ret = bus_setup_intr(dev,
1097 com->irqres, INTR_TYPE_TTY,
1098 NULL, (driver_intr_t *)siointr, com, &com->cookie);
1099 if (ret == 0)
1100 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n");
1101 }
1102 if (ret)
1103 device_printf(dev, "could not activate interrupt\n");
1104 #if defined(KDB)
1105 /*
1106 * Enable interrupts for early break-to-debugger support
1107 * on the console.
1108 */
1109 if (ret == 0 && unit == comconsole)
1110 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1111 IER_EMSC);
1112 #endif
1113 }
1114
1115 /* We're ready, open the doors... */
1116 ttycreate(tp, TS_CALLOUT, "d%r", unit);
1117
1118 return (0);
1119 }
1120
1121 static int
1122 comopen(struct tty *tp, struct cdev *dev)
1123 {
1124 struct com_s *com;
1125 int i;
1126
1127 com = tp->t_sc;
1128 com->poll = com->no_irq;
1129 com->poll_output = com->loses_outints;
1130 if (com->hasfifo) {
1131 /*
1132 * (Re)enable and drain fifos.
1133 *
1134 * Certain SMC chips cause problems if the fifos
1135 * are enabled while input is ready. Turn off the
1136 * fifo if necessary to clear the input. We test
1137 * the input ready bit after enabling the fifos
1138 * since we've already enabled them in comparam()
1139 * and to handle races between enabling and fresh
1140 * input.
1141 */
1142 for (i = 0; i < 500; i++) {
1143 sio_setreg(com, com_fifo,
1144 FIFO_RCV_RST | FIFO_XMT_RST
1145 | com->fifo_image);
1146 /*
1147 * XXX the delays are for superstitious
1148 * historical reasons. It must be less than
1149 * the character time at the maximum
1150 * supported speed (87 usec at 115200 bps
1151 * 8N1). Otherwise we might loop endlessly
1152 * if data is streaming in. We used to use
1153 * delays of 100. That usually worked
1154 * because DELAY(100) used to usually delay
1155 * for about 85 usec instead of 100.
1156 */
1157 DELAY(50);
1158 if (!(inb(com->line_status_port) & LSR_RXRDY))
1159 break;
1160 sio_setreg(com, com_fifo, 0);
1161 DELAY(50);
1162 (void) inb(com->data_port);
1163 }
1164 if (i == 500)
1165 return (EIO);
1166 }
1167
1168 mtx_lock_spin(&sio_lock);
1169 (void) inb(com->line_status_port);
1170 (void) inb(com->data_port);
1171 com->prev_modem_status = com->last_modem_status
1172 = inb(com->modem_status_port);
1173 outb(com->int_ctl_port,
1174 IER_ERXRDY | IER_ERLS | IER_EMSC
1175 | (COM_IIR_TXRDYBUG(com->flags) ? 0 : IER_ETXRDY));
1176 mtx_unlock_spin(&sio_lock);
1177 siosettimeout();
1178 /* XXX: should be generic ? */
1179 if (com->prev_modem_status & MSR_DCD || ISCALLOUT(dev))
1180 ttyld_modem(tp, 1);
1181 return (0);
1182 }
1183
1184 static void
1185 comclose(tp)
1186 struct tty *tp;
1187 {
1188 int s;
1189 struct com_s *com;
1190
1191 s = spltty();
1192 com = tp->t_sc;
1193 com->poll = FALSE;
1194 com->poll_output = FALSE;
1195 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1196
1197 #if defined(KDB)
1198 /*
1199 * Leave interrupts enabled and don't clear DTR if this is the
1200 * console. This allows us to detect break-to-debugger events
1201 * while the console device is closed.
1202 */
1203 if (com->unit != comconsole)
1204 #endif
1205 {
1206 sio_setreg(com, com_ier, 0);
1207 if (tp->t_cflag & HUPCL
1208 /*
1209 * XXX we will miss any carrier drop between here and the
1210 * next open. Perhaps we should watch DCD even when the
1211 * port is closed; it is not sufficient to check it at
1212 * the next open because it might go up and down while
1213 * we're not watching.
1214 */
1215 || (!tp->t_actout
1216 && !(com->prev_modem_status & MSR_DCD)
1217 && !(tp->t_init_in.c_cflag & CLOCAL))
1218 || !(tp->t_state & TS_ISOPEN)) {
1219 (void)commodem(tp, 0, SER_DTR);
1220 ttydtrwaitstart(tp);
1221 }
1222 }
1223 if (com->hasfifo) {
1224 /*
1225 * Disable fifos so that they are off after controlled
1226 * reboots. Some BIOSes fail to detect 16550s when the
1227 * fifos are enabled.
1228 */
1229 sio_setreg(com, com_fifo, 0);
1230 }
1231 tp->t_actout = FALSE;
1232 wakeup(&tp->t_actout);
1233 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
1234 siosettimeout();
1235 splx(s);
1236 }
1237
1238 static void
1239 siobusycheck(chan)
1240 void *chan;
1241 {
1242 struct com_s *com;
1243 int s;
1244
1245 com = (struct com_s *)chan;
1246
1247 /*
1248 * Clear TS_BUSY if low-level output is complete.
1249 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1250 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1251 * called again. Reading the line status port outside of siointr1()
1252 * is safe because CS_BUSY is clear so there are no output interrupts
1253 * to lose.
1254 */
1255 s = spltty();
1256 if (com->state & CS_BUSY)
1257 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */
1258 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1259 == (LSR_TSRE | LSR_TXRDY)) {
1260 com->tp->t_state &= ~TS_BUSY;
1261 ttwwakeup(com->tp);
1262 com->extra_state &= ~CSE_BUSYCHECK;
1263 } else
1264 timeout(siobusycheck, com, hz / 100);
1265 splx(s);
1266 }
1267
1268 static u_int
1269 siodivisor(rclk, speed)
1270 u_long rclk;
1271 speed_t speed;
1272 {
1273 long actual_speed;
1274 u_int divisor;
1275 int error;
1276
1277 if (speed == 0)
1278 return (0);
1279 #if UINT_MAX > (ULONG_MAX - 1) / 8
1280 if (speed > (ULONG_MAX - 1) / 8)
1281 return (0);
1282 #endif
1283 divisor = (rclk / (8UL * speed) + 1) / 2;
1284 if (divisor == 0 || divisor >= 65536)
1285 return (0);
1286 actual_speed = rclk / (16UL * divisor);
1287
1288 /* 10 times error in percent: */
1289 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2;
1290
1291 /* 3.0% maximum error tolerance: */
1292 if (error < -30 || error > 30)
1293 return (0);
1294
1295 return (divisor);
1296 }
1297
1298 /*
1299 * Call this function with the sio_lock mutex held. It will return with the
1300 * lock still held.
1301 */
1302 static void
1303 sioinput(com)
1304 struct com_s *com;
1305 {
1306 u_char *buf;
1307 int incc;
1308 u_char line_status;
1309 int recv_data;
1310 struct tty *tp;
1311
1312 buf = com->ibuf;
1313 tp = com->tp;
1314 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1315 com_events -= (com->iptr - com->ibuf);
1316 com->iptr = com->ibuf;
1317 return;
1318 }
1319 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1320 /*
1321 * Avoid the grotesquely inefficient lineswitch routine
1322 * (ttyinput) in "raw" mode. It usually takes about 450
1323 * instructions (that's without canonical processing or echo!).
1324 * slinput is reasonably fast (usually 40 instructions plus
1325 * call overhead).
1326 */
1327 do {
1328 /*
1329 * This may look odd, but it is using save-and-enable
1330 * semantics instead of the save-and-disable semantics
1331 * that are used everywhere else.
1332 */
1333 mtx_unlock_spin(&sio_lock);
1334 incc = com->iptr - buf;
1335 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1336 && (com->state & CS_RTS_IFLOW
1337 || tp->t_iflag & IXOFF)
1338 && !(tp->t_state & TS_TBLOCK))
1339 ttyblock(tp);
1340 com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1341 += b_to_q((char *)buf, incc, &tp->t_rawq);
1342 buf += incc;
1343 tk_nin += incc;
1344 tk_rawcc += incc;
1345 tp->t_rawcc += incc;
1346 ttwakeup(tp);
1347 if (tp->t_state & TS_TTSTOP
1348 && (tp->t_iflag & IXANY
1349 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1350 tp->t_state &= ~TS_TTSTOP;
1351 tp->t_lflag &= ~FLUSHO;
1352 comstart(tp);
1353 }
1354 mtx_lock_spin(&sio_lock);
1355 } while (buf < com->iptr);
1356 } else {
1357 do {
1358 /*
1359 * This may look odd, but it is using save-and-enable
1360 * semantics instead of the save-and-disable semantics
1361 * that are used everywhere else.
1362 */
1363 mtx_unlock_spin(&sio_lock);
1364 line_status = buf[com->ierroff];
1365 recv_data = *buf++;
1366 if (line_status
1367 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1368 if (line_status & LSR_BI)
1369 recv_data |= TTY_BI;
1370 if (line_status & LSR_FE)
1371 recv_data |= TTY_FE;
1372 if (line_status & LSR_OE)
1373 recv_data |= TTY_OE;
1374 if (line_status & LSR_PE)
1375 recv_data |= TTY_PE;
1376 }
1377 ttyld_rint(tp, recv_data);
1378 mtx_lock_spin(&sio_lock);
1379 } while (buf < com->iptr);
1380 }
1381 com_events -= (com->iptr - com->ibuf);
1382 com->iptr = com->ibuf;
1383
1384 /*
1385 * There is now room for another low-level buffer full of input,
1386 * so enable RTS if it is now disabled and there is room in the
1387 * high-level buffer.
1388 */
1389 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1390 !(tp->t_state & TS_TBLOCK))
1391 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1392 }
1393
1394 static int
1395 siointr(arg)
1396 void *arg;
1397 {
1398 struct com_s *com;
1399
1400 #ifndef COM_MULTIPORT
1401 com = (struct com_s *)arg;
1402
1403 mtx_lock_spin(&sio_lock);
1404 siointr1(com);
1405 mtx_unlock_spin(&sio_lock);
1406 #else /* COM_MULTIPORT */
1407 bool_t possibly_more_intrs;
1408 int unit;
1409
1410 /*
1411 * Loop until there is no activity on any port. This is necessary
1412 * to get an interrupt edge more than to avoid another interrupt.
1413 * If the IRQ signal is just an OR of the IRQ signals from several
1414 * devices, then the edge from one may be lost because another is
1415 * on.
1416 */
1417 mtx_lock_spin(&sio_lock);
1418 do {
1419 possibly_more_intrs = FALSE;
1420 for (unit = 0; unit < sio_numunits; ++unit) {
1421 com = com_addr(unit);
1422 /*
1423 * XXX COM_LOCK();
1424 * would it work here, or be counter-productive?
1425 */
1426 if (com != NULL
1427 && !com->gone
1428 && (inb(com->int_id_port) & IIR_IMASK)
1429 != IIR_NOPEND) {
1430 siointr1(com);
1431 possibly_more_intrs = TRUE;
1432 }
1433 /* XXX COM_UNLOCK(); */
1434 }
1435 } while (possibly_more_intrs);
1436 mtx_unlock_spin(&sio_lock);
1437 #endif /* COM_MULTIPORT */
1438 return(FILTER_HANDLED);
1439 }
1440
1441 static struct timespec siots[8];
1442 static int siotso;
1443 static int volatile siotsunit = -1;
1444
1445 static int
1446 sysctl_siots(SYSCTL_HANDLER_ARGS)
1447 {
1448 char buf[128];
1449 long long delta;
1450 size_t len;
1451 int error, i, tso;
1452
1453 for (i = 1, tso = siotso; i < tso; i++) {
1454 delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) *
1455 1000000000 +
1456 (siots[i].tv_nsec - siots[i - 1].tv_nsec);
1457 len = sprintf(buf, "%lld\n", delta);
1458 if (delta >= 110000)
1459 len += sprintf(buf + len - 1, ": *** %ld.%09ld\n",
1460 (long)siots[i].tv_sec, siots[i].tv_nsec) - 1;
1461 if (i == tso - 1)
1462 buf[len - 1] = '\0';
1463 error = SYSCTL_OUT(req, buf, len);
1464 if (error != 0)
1465 return (error);
1466 uio_yield();
1467 }
1468 return (0);
1469 }
1470
1471 SYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD,
1472 0, 0, sysctl_siots, "A", "sio timestamps");
1473
1474 static void
1475 siointr1(com)
1476 struct com_s *com;
1477 {
1478 u_char int_ctl;
1479 u_char int_ctl_new;
1480 u_char line_status;
1481 u_char modem_status;
1482 u_char *ioptr;
1483 u_char recv_data;
1484
1485 #ifdef KDB
1486 again:
1487 #endif
1488
1489 if (COM_IIR_TXRDYBUG(com->flags)) {
1490 int_ctl = inb(com->int_ctl_port);
1491 int_ctl_new = int_ctl;
1492 } else {
1493 int_ctl = 0;
1494 int_ctl_new = 0;
1495 }
1496
1497 while (!com->gone) {
1498 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1499 modem_status = inb(com->modem_status_port);
1500 if ((modem_status ^ com->last_modem_status) &
1501 com->pps_bit) {
1502 pps_capture(&com->pps);
1503 pps_event(&com->pps,
1504 (modem_status & com->pps_bit) ?
1505 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1506 }
1507 }
1508 line_status = inb(com->line_status_port);
1509
1510 /* input event? (check first to help avoid overruns) */
1511 while (line_status & LSR_RCV_MASK) {
1512 /* break/unnattached error bits or real input? */
1513 if (!(line_status & LSR_RXRDY))
1514 recv_data = 0;
1515 else
1516 recv_data = inb(com->data_port);
1517 #ifdef KDB
1518 if (com->unit == comconsole &&
1519 kdb_alt_break(recv_data, &com->alt_brk_state) != 0)
1520 goto again;
1521 #endif /* KDB */
1522 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1523 /*
1524 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1525 * Otherwise, push the work to a higher level
1526 * (to handle PARMRK) if we're bypassing.
1527 * Otherwise, convert BI/FE and PE+INPCK to 0.
1528 *
1529 * This makes bypassing work right in the
1530 * usual "raw" case (IGNBRK set, and IGNPAR
1531 * and INPCK clear).
1532 *
1533 * Note: BI together with FE/PE means just BI.
1534 */
1535 if (line_status & LSR_BI) {
1536 #if defined(KDB)
1537 if (com->unit == comconsole) {
1538 kdb_break();
1539 goto cont;
1540 }
1541 #endif
1542 if (com->tp == NULL
1543 || com->tp->t_iflag & IGNBRK)
1544 goto cont;
1545 } else {
1546 if (com->tp == NULL
1547 || com->tp->t_iflag & IGNPAR)
1548 goto cont;
1549 }
1550 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1551 && (line_status & (LSR_BI | LSR_FE)
1552 || com->tp->t_iflag & INPCK))
1553 recv_data = 0;
1554 }
1555 ++com->bytes_in;
1556 if (com->tp != NULL &&
1557 com->tp->t_hotchar != 0 && recv_data == com->tp->t_hotchar)
1558 swi_sched(sio_fast_ih, 0);
1559 ioptr = com->iptr;
1560 if (ioptr >= com->ibufend)
1561 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1562 else {
1563 if (com->tp != NULL && com->tp->t_do_timestamp)
1564 microtime(&com->tp->t_timestamp);
1565 ++com_events;
1566 swi_sched(sio_slow_ih, SWI_DELAY);
1567 #if 0 /* for testing input latency vs efficiency */
1568 if (com->iptr - com->ibuf == 8)
1569 swi_sched(sio_fast_ih, 0);
1570 #endif
1571 ioptr[0] = recv_data;
1572 ioptr[com->ierroff] = line_status;
1573 com->iptr = ++ioptr;
1574 if (ioptr == com->ihighwater
1575 && com->state & CS_RTS_IFLOW)
1576 outb(com->modem_ctl_port,
1577 com->mcr_image &= ~MCR_RTS);
1578 if (line_status & LSR_OE)
1579 CE_RECORD(com, CE_OVERRUN);
1580 }
1581 cont:
1582 if (line_status & LSR_TXRDY
1583 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY))
1584 goto txrdy;
1585
1586 /*
1587 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1588 * jump from the top of the loop to here
1589 */
1590 line_status = inb(com->line_status_port) & 0x7F;
1591 }
1592
1593 /* modem status change? (always check before doing output) */
1594 modem_status = inb(com->modem_status_port);
1595 if (modem_status != com->last_modem_status) {
1596 /*
1597 * Schedule high level to handle DCD changes. Note
1598 * that we don't use the delta bits anywhere. Some
1599 * UARTs mess them up, and it's easy to remember the
1600 * previous bits and calculate the delta.
1601 */
1602 com->last_modem_status = modem_status;
1603 if (!(com->state & CS_CHECKMSR)) {
1604 com_events += LOTS_OF_EVENTS;
1605 com->state |= CS_CHECKMSR;
1606 swi_sched(sio_fast_ih, 0);
1607 }
1608
1609 /* handle CTS change immediately for crisp flow ctl */
1610 if (com->state & CS_CTS_OFLOW) {
1611 if (modem_status & MSR_CTS)
1612 com->state |= CS_ODEVREADY;
1613 else
1614 com->state &= ~CS_ODEVREADY;
1615 }
1616 }
1617
1618 txrdy:
1619 /* output queued and everything ready? */
1620 if (line_status & LSR_TXRDY
1621 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1622 ioptr = com->obufq.l_head;
1623 if (com->tx_fifo_size > 1 && com->unit != siotsunit) {
1624 u_int ocount;
1625
1626 ocount = com->obufq.l_tail - ioptr;
1627 if (ocount > com->tx_fifo_size)
1628 ocount = com->tx_fifo_size;
1629 com->bytes_out += ocount;
1630 do
1631 outb(com->data_port, *ioptr++);
1632 while (--ocount != 0);
1633 } else {
1634 outb(com->data_port, *ioptr++);
1635 ++com->bytes_out;
1636 if (com->unit == siotsunit
1637 && siotso < sizeof siots / sizeof siots[0])
1638 nanouptime(&siots[siotso++]);
1639 }
1640 com->obufq.l_head = ioptr;
1641 if (COM_IIR_TXRDYBUG(com->flags))
1642 int_ctl_new = int_ctl | IER_ETXRDY;
1643 if (ioptr >= com->obufq.l_tail) {
1644 struct lbq *qp;
1645
1646 qp = com->obufq.l_next;
1647 qp->l_queued = FALSE;
1648 qp = qp->l_next;
1649 if (qp != NULL) {
1650 com->obufq.l_head = qp->l_head;
1651 com->obufq.l_tail = qp->l_tail;
1652 com->obufq.l_next = qp;
1653 } else {
1654 /* output just completed */
1655 if (COM_IIR_TXRDYBUG(com->flags))
1656 int_ctl_new = int_ctl
1657 & ~IER_ETXRDY;
1658 com->state &= ~CS_BUSY;
1659 }
1660 if (!(com->state & CS_ODONE)) {
1661 com_events += LOTS_OF_EVENTS;
1662 com->state |= CS_ODONE;
1663 /* handle at high level ASAP */
1664 swi_sched(sio_fast_ih, 0);
1665 }
1666 }
1667 if (COM_IIR_TXRDYBUG(com->flags)
1668 && int_ctl != int_ctl_new)
1669 outb(com->int_ctl_port, int_ctl_new);
1670 }
1671
1672 /* finished? */
1673 #ifndef COM_MULTIPORT
1674 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
1675 #endif /* COM_MULTIPORT */
1676 return;
1677 }
1678 }
1679
1680 /* software interrupt handler for SWI_TTY */
1681 static void
1682 siopoll(void *dummy)
1683 {
1684 int unit;
1685
1686 if (com_events == 0)
1687 return;
1688 repeat:
1689 for (unit = 0; unit < sio_numunits; ++unit) {
1690 struct com_s *com;
1691 int incc;
1692 struct tty *tp;
1693
1694 com = com_addr(unit);
1695 if (com == NULL)
1696 continue;
1697 tp = com->tp;
1698 if (tp == NULL || com->gone) {
1699 /*
1700 * Discard any events related to never-opened or
1701 * going-away devices.
1702 */
1703 mtx_lock_spin(&sio_lock);
1704 incc = com->iptr - com->ibuf;
1705 com->iptr = com->ibuf;
1706 if (com->state & CS_CHECKMSR) {
1707 incc += LOTS_OF_EVENTS;
1708 com->state &= ~CS_CHECKMSR;
1709 }
1710 com_events -= incc;
1711 mtx_unlock_spin(&sio_lock);
1712 continue;
1713 }
1714 if (com->iptr != com->ibuf) {
1715 mtx_lock_spin(&sio_lock);
1716 sioinput(com);
1717 mtx_unlock_spin(&sio_lock);
1718 }
1719 if (com->state & CS_CHECKMSR) {
1720 u_char delta_modem_status;
1721
1722 mtx_lock_spin(&sio_lock);
1723 delta_modem_status = com->last_modem_status
1724 ^ com->prev_modem_status;
1725 com->prev_modem_status = com->last_modem_status;
1726 com_events -= LOTS_OF_EVENTS;
1727 com->state &= ~CS_CHECKMSR;
1728 mtx_unlock_spin(&sio_lock);
1729 if (delta_modem_status & MSR_DCD)
1730 ttyld_modem(tp,
1731 com->prev_modem_status & MSR_DCD);
1732 }
1733 if (com->state & CS_ODONE) {
1734 mtx_lock_spin(&sio_lock);
1735 com_events -= LOTS_OF_EVENTS;
1736 com->state &= ~CS_ODONE;
1737 mtx_unlock_spin(&sio_lock);
1738 if (!(com->state & CS_BUSY)
1739 && !(com->extra_state & CSE_BUSYCHECK)) {
1740 timeout(siobusycheck, com, hz / 100);
1741 com->extra_state |= CSE_BUSYCHECK;
1742 }
1743 ttyld_start(tp);
1744 }
1745 if (com_events == 0)
1746 break;
1747 }
1748 if (com_events >= LOTS_OF_EVENTS)
1749 goto repeat;
1750 }
1751
1752 static void
1753 combreak(tp, sig)
1754 struct tty *tp;
1755 int sig;
1756 {
1757 struct com_s *com;
1758
1759 com = tp->t_sc;
1760
1761 if (sig)
1762 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
1763 else
1764 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1765 }
1766
1767 static int
1768 comparam(tp, t)
1769 struct tty *tp;
1770 struct termios *t;
1771 {
1772 u_int cfcr;
1773 int cflag;
1774 struct com_s *com;
1775 u_int divisor;
1776 u_char dlbh;
1777 u_char dlbl;
1778 u_char efr_flowbits;
1779 int s;
1780
1781 com = tp->t_sc;
1782 if (com == NULL)
1783 return (ENODEV);
1784
1785 /* check requested parameters */
1786 if (t->c_ispeed != (t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed))
1787 return (EINVAL);
1788 divisor = siodivisor(com->rclk, t->c_ispeed);
1789 if (divisor == 0)
1790 return (EINVAL);
1791
1792 /* parameters are OK, convert them to the com struct and the device */
1793 s = spltty();
1794 if (t->c_ospeed == 0)
1795 (void)commodem(tp, 0, SER_DTR); /* hang up line */
1796 else
1797 (void)commodem(tp, SER_DTR, 0);
1798 cflag = t->c_cflag;
1799 switch (cflag & CSIZE) {
1800 case CS5:
1801 cfcr = CFCR_5BITS;
1802 break;
1803 case CS6:
1804 cfcr = CFCR_6BITS;
1805 break;
1806 case CS7:
1807 cfcr = CFCR_7BITS;
1808 break;
1809 default:
1810 cfcr = CFCR_8BITS;
1811 break;
1812 }
1813 if (cflag & PARENB) {
1814 cfcr |= CFCR_PENAB;
1815 if (!(cflag & PARODD))
1816 cfcr |= CFCR_PEVEN;
1817 }
1818 if (cflag & CSTOPB)
1819 cfcr |= CFCR_STOPB;
1820
1821 if (com->hasfifo) {
1822 /*
1823 * Use a fifo trigger level low enough so that the input
1824 * latency from the fifo is less than about 16 msec and
1825 * the total latency is less than about 30 msec. These
1826 * latencies are reasonable for humans. Serial comms
1827 * protocols shouldn't expect anything better since modem
1828 * latencies are larger.
1829 *
1830 * The fifo trigger level cannot be set at RX_HIGH for high
1831 * speed connections without further work on reducing
1832 * interrupt disablement times in other parts of the system,
1833 * without producing silo overflow errors.
1834 */
1835 com->fifo_image = com->unit == siotsunit ? 0
1836 : t->c_ispeed <= 4800
1837 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH;
1838 #ifdef COM_ESP
1839 /*
1840 * The Hayes ESP card needs the fifo DMA mode bit set
1841 * in compatibility mode. If not, it will interrupt
1842 * for each character received.
1843 */
1844 if (com->esp)
1845 com->fifo_image |= FIFO_DMA_MODE;
1846 #endif
1847 sio_setreg(com, com_fifo, com->fifo_image);
1848 }
1849
1850 /*
1851 * This returns with interrupts disabled so that we can complete
1852 * the speed change atomically. Keeping interrupts disabled is
1853 * especially important while com_data is hidden.
1854 */
1855 (void) siosetwater(com, t->c_ispeed);
1856
1857 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
1858 /*
1859 * Only set the divisor registers if they would change, since on
1860 * some 16550 incompatibles (UMC8669F), setting them while input
1861 * is arriving loses sync until data stops arriving.
1862 */
1863 dlbl = divisor & 0xFF;
1864 if (sio_getreg(com, com_dlbl) != dlbl)
1865 sio_setreg(com, com_dlbl, dlbl);
1866 dlbh = divisor >> 8;
1867 if (sio_getreg(com, com_dlbh) != dlbh)
1868 sio_setreg(com, com_dlbh, dlbh);
1869
1870 efr_flowbits = 0;
1871
1872 if (cflag & CRTS_IFLOW) {
1873 com->state |= CS_RTS_IFLOW;
1874 efr_flowbits |= EFR_AUTORTS;
1875 /*
1876 * If CS_RTS_IFLOW just changed from off to on, the change
1877 * needs to be propagated to MCR_RTS. This isn't urgent,
1878 * so do it later by calling comstart() instead of repeating
1879 * a lot of code from comstart() here.
1880 */
1881 } else if (com->state & CS_RTS_IFLOW) {
1882 com->state &= ~CS_RTS_IFLOW;
1883 /*
1884 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
1885 * on here, since comstart() won't do it later.
1886 */
1887 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1888 }
1889
1890 /*
1891 * Set up state to handle output flow control.
1892 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
1893 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
1894 */
1895 com->state |= CS_ODEVREADY;
1896 com->state &= ~CS_CTS_OFLOW;
1897 if (cflag & CCTS_OFLOW) {
1898 com->state |= CS_CTS_OFLOW;
1899 efr_flowbits |= EFR_AUTOCTS;
1900 if (!(com->last_modem_status & MSR_CTS))
1901 com->state &= ~CS_ODEVREADY;
1902 }
1903
1904 if (com->st16650a) {
1905 sio_setreg(com, com_lcr, LCR_EFR_ENABLE);
1906 sio_setreg(com, com_efr,
1907 (sio_getreg(com, com_efr)
1908 & ~(EFR_AUTOCTS | EFR_AUTORTS)) | efr_flowbits);
1909 }
1910 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
1911
1912 /* XXX shouldn't call functions while intrs are disabled. */
1913 ttyldoptim(tp);
1914
1915 mtx_unlock_spin(&sio_lock);
1916 splx(s);
1917 comstart(tp);
1918 if (com->ibufold != NULL) {
1919 free(com->ibufold, M_DEVBUF);
1920 com->ibufold = NULL;
1921 }
1922 return (0);
1923 }
1924
1925 /*
1926 * This function must be called with the sio_lock mutex released and will
1927 * return with it obtained.
1928 */
1929 static int
1930 siosetwater(com, speed)
1931 struct com_s *com;
1932 speed_t speed;
1933 {
1934 int cp4ticks;
1935 u_char *ibuf;
1936 int ibufsize;
1937 struct tty *tp;
1938
1939 /*
1940 * Make the buffer size large enough to handle a softtty interrupt
1941 * latency of about 2 ticks without loss of throughput or data
1942 * (about 3 ticks if input flow control is not used or not honoured,
1943 * but a bit less for CS5-CS7 modes).
1944 */
1945 cp4ticks = speed / 10 / hz * 4;
1946 for (ibufsize = 128; ibufsize < cp4ticks;)
1947 ibufsize <<= 1;
1948 if (ibufsize == com->ibufsize) {
1949 mtx_lock_spin(&sio_lock);
1950 return (0);
1951 }
1952
1953 /*
1954 * Allocate input buffer. The extra factor of 2 in the size is
1955 * to allow for an error byte for each input byte.
1956 */
1957 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
1958 if (ibuf == NULL) {
1959 mtx_lock_spin(&sio_lock);
1960 return (ENOMEM);
1961 }
1962
1963 /* Initialize non-critical variables. */
1964 com->ibufold = com->ibuf;
1965 com->ibufsize = ibufsize;
1966 tp = com->tp;
1967 if (tp != NULL) {
1968 tp->t_ififosize = 2 * ibufsize;
1969 tp->t_ispeedwat = (speed_t)-1;
1970 tp->t_ospeedwat = (speed_t)-1;
1971 }
1972
1973 /*
1974 * Read current input buffer, if any. Continue with interrupts
1975 * disabled.
1976 */
1977 mtx_lock_spin(&sio_lock);
1978 if (com->iptr != com->ibuf)
1979 sioinput(com);
1980
1981 /*-
1982 * Initialize critical variables, including input buffer watermarks.
1983 * The external device is asked to stop sending when the buffer
1984 * exactly reaches high water, or when the high level requests it.
1985 * The high level is notified immediately (rather than at a later
1986 * clock tick) when this watermark is reached.
1987 * The buffer size is chosen so the watermark should almost never
1988 * be reached.
1989 * The low watermark is invisibly 0 since the buffer is always
1990 * emptied all at once.
1991 */
1992 com->iptr = com->ibuf = ibuf;
1993 com->ibufend = ibuf + ibufsize;
1994 com->ierroff = ibufsize;
1995 com->ihighwater = ibuf + 3 * ibufsize / 4;
1996 return (0);
1997 }
1998
1999 static void
2000 comstart(tp)
2001 struct tty *tp;
2002 {
2003 struct com_s *com;
2004 int s;
2005
2006 com = tp->t_sc;
2007 if (com == NULL)
2008 return;
2009 s = spltty();
2010 mtx_lock_spin(&sio_lock);
2011 if (tp->t_state & TS_TTSTOP)
2012 com->state &= ~CS_TTGO;
2013 else
2014 com->state |= CS_TTGO;
2015 if (tp->t_state & TS_TBLOCK) {
2016 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2017 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2018 } else {
2019 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2020 && com->state & CS_RTS_IFLOW)
2021 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2022 }
2023 mtx_unlock_spin(&sio_lock);
2024 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2025 ttwwakeup(tp);
2026 splx(s);
2027 return;
2028 }
2029 if (tp->t_outq.c_cc != 0) {
2030 struct lbq *qp;
2031 struct lbq *next;
2032
2033 if (!com->obufs[0].l_queued) {
2034 com->obufs[0].l_tail
2035 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2036 sizeof com->obuf1);
2037 com->obufs[0].l_next = NULL;
2038 com->obufs[0].l_queued = TRUE;
2039 mtx_lock_spin(&sio_lock);
2040 if (com->state & CS_BUSY) {
2041 qp = com->obufq.l_next;
2042 while ((next = qp->l_next) != NULL)
2043 qp = next;
2044 qp->l_next = &com->obufs[0];
2045 } else {
2046 com->obufq.l_head = com->obufs[0].l_head;
2047 com->obufq.l_tail = com->obufs[0].l_tail;
2048 com->obufq.l_next = &com->obufs[0];
2049 com->state |= CS_BUSY;
2050 }
2051 mtx_unlock_spin(&sio_lock);
2052 }
2053 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2054 com->obufs[1].l_tail
2055 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2056 sizeof com->obuf2);
2057 com->obufs[1].l_next = NULL;
2058 com->obufs[1].l_queued = TRUE;
2059 mtx_lock_spin(&sio_lock);
2060 if (com->state & CS_BUSY) {
2061 qp = com->obufq.l_next;
2062 while ((next = qp->l_next) != NULL)
2063 qp = next;
2064 qp->l_next = &com->obufs[1];
2065 } else {
2066 com->obufq.l_head = com->obufs[1].l_head;
2067 com->obufq.l_tail = com->obufs[1].l_tail;
2068 com->obufq.l_next = &com->obufs[1];
2069 com->state |= CS_BUSY;
2070 }
2071 mtx_unlock_spin(&sio_lock);
2072 }
2073 tp->t_state |= TS_BUSY;
2074 }
2075 mtx_lock_spin(&sio_lock);
2076 if (com->state >= (CS_BUSY | CS_TTGO))
2077 siointr1(com); /* fake interrupt to start output */
2078 mtx_unlock_spin(&sio_lock);
2079 ttwwakeup(tp);
2080 splx(s);
2081 }
2082
2083 static void
2084 comstop(tp, rw)
2085 struct tty *tp;
2086 int rw;
2087 {
2088 struct com_s *com;
2089
2090 com = tp->t_sc;
2091 if (com == NULL || com->gone)
2092 return;
2093 mtx_lock_spin(&sio_lock);
2094 if (rw & FWRITE) {
2095 if (com->hasfifo)
2096 #ifdef COM_ESP
2097 /* XXX avoid h/w bug. */
2098 if (!com->esp)
2099 #endif
2100 sio_setreg(com, com_fifo,
2101 FIFO_XMT_RST | com->fifo_image);
2102 com->obufs[0].l_queued = FALSE;
2103 com->obufs[1].l_queued = FALSE;
2104 if (com->state & CS_ODONE)
2105 com_events -= LOTS_OF_EVENTS;
2106 com->state &= ~(CS_ODONE | CS_BUSY);
2107 com->tp->t_state &= ~TS_BUSY;
2108 }
2109 if (rw & FREAD) {
2110 if (com->hasfifo)
2111 #ifdef COM_ESP
2112 /* XXX avoid h/w bug. */
2113 if (!com->esp)
2114 #endif
2115 sio_setreg(com, com_fifo,
2116 FIFO_RCV_RST | com->fifo_image);
2117 com_events -= (com->iptr - com->ibuf);
2118 com->iptr = com->ibuf;
2119 }
2120 mtx_unlock_spin(&sio_lock);
2121 comstart(tp);
2122 }
2123
2124 static int
2125 commodem(struct tty *tp, int sigon, int sigoff)
2126 {
2127 struct com_s *com;
2128 int bitand, bitor, msr;
2129
2130 com = tp->t_sc;
2131 if (com->gone)
2132 return(0);
2133 if (sigon != 0 || sigoff != 0) {
2134 bitand = bitor = 0;
2135 if (sigoff & SER_DTR)
2136 bitand |= MCR_DTR;
2137 if (sigoff & SER_RTS)
2138 bitand |= MCR_RTS;
2139 if (sigon & SER_DTR)
2140 bitor |= MCR_DTR;
2141 if (sigon & SER_RTS)
2142 bitor |= MCR_RTS;
2143 bitand = ~bitand;
2144 mtx_lock_spin(&sio_lock);
2145 com->mcr_image &= bitand;
2146 com->mcr_image |= bitor;
2147 outb(com->modem_ctl_port, com->mcr_image);
2148 mtx_unlock_spin(&sio_lock);
2149 return (0);
2150 } else {
2151 bitor = 0;
2152 if (com->mcr_image & MCR_DTR)
2153 bitor |= SER_DTR;
2154 if (com->mcr_image & MCR_RTS)
2155 bitor |= SER_RTS;
2156 msr = com->prev_modem_status;
2157 if (msr & MSR_CTS)
2158 bitor |= SER_CTS;
2159 if (msr & MSR_DCD)
2160 bitor |= SER_DCD;
2161 if (msr & MSR_DSR)
2162 bitor |= SER_DSR;
2163 if (msr & MSR_DSR)
2164 bitor |= SER_DSR;
2165 if (msr & (MSR_RI | MSR_TERI))
2166 bitor |= SER_RI;
2167 return (bitor);
2168 }
2169 }
2170
2171 static void
2172 siosettimeout()
2173 {
2174 struct com_s *com;
2175 bool_t someopen;
2176 int unit;
2177
2178 /*
2179 * Set our timeout period to 1 second if no polled devices are open.
2180 * Otherwise set it to max(1/200, 1/hz).
2181 * Enable timeouts iff some device is open.
2182 */
2183 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2184 sio_timeout = hz;
2185 someopen = FALSE;
2186 for (unit = 0; unit < sio_numunits; ++unit) {
2187 com = com_addr(unit);
2188 if (com != NULL && com->tp != NULL
2189 && com->tp->t_state & TS_ISOPEN && !com->gone) {
2190 someopen = TRUE;
2191 if (com->poll || com->poll_output) {
2192 sio_timeout = hz > 200 ? hz / 200 : 1;
2193 break;
2194 }
2195 }
2196 }
2197 if (someopen) {
2198 sio_timeouts_until_log = hz / sio_timeout;
2199 sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2200 sio_timeout);
2201 } else {
2202 /* Flush error messages, if any. */
2203 sio_timeouts_until_log = 1;
2204 comwakeup((void *)NULL);
2205 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2206 }
2207 }
2208
2209 static void
2210 comwakeup(chan)
2211 void *chan;
2212 {
2213 struct com_s *com;
2214 int unit;
2215
2216 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2217
2218 /*
2219 * Recover from lost output interrupts.
2220 * Poll any lines that don't use interrupts.
2221 */
2222 for (unit = 0; unit < sio_numunits; ++unit) {
2223 com = com_addr(unit);
2224 if (com != NULL && !com->gone
2225 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2226 mtx_lock_spin(&sio_lock);
2227 siointr1(com);
2228 mtx_unlock_spin(&sio_lock);
2229 }
2230 }
2231
2232 /*
2233 * Check for and log errors, but not too often.
2234 */
2235 if (--sio_timeouts_until_log > 0)
2236 return;
2237 sio_timeouts_until_log = hz / sio_timeout;
2238 for (unit = 0; unit < sio_numunits; ++unit) {
2239 int errnum;
2240
2241 com = com_addr(unit);
2242 if (com == NULL)
2243 continue;
2244 if (com->gone)
2245 continue;
2246 for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2247 u_int delta;
2248 u_long total;
2249
2250 mtx_lock_spin(&sio_lock);
2251 delta = com->delta_error_counts[errnum];
2252 com->delta_error_counts[errnum] = 0;
2253 mtx_unlock_spin(&sio_lock);
2254 if (delta == 0)
2255 continue;
2256 total = com->error_counts[errnum] += delta;
2257 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2258 unit, delta, error_desc[errnum],
2259 delta == 1 ? "" : "s", total);
2260 }
2261 }
2262 }
2263
2264 /*
2265 * Following are all routines needed for SIO to act as console
2266 */
2267 struct siocnstate {
2268 u_char dlbl;
2269 u_char dlbh;
2270 u_char ier;
2271 u_char cfcr;
2272 u_char mcr;
2273 };
2274
2275 /*
2276 * This is a function in order to not replicate "ttyd%d" more
2277 * places than absolutely necessary.
2278 */
2279 static void
2280 siocnset(struct consdev *cd, int unit)
2281 {
2282
2283 cd->cn_unit = unit;
2284 sprintf(cd->cn_name, "ttyd%d", unit);
2285 }
2286
2287 static speed_t siocngetspeed(Port_t, u_long rclk);
2288 static void siocnclose(struct siocnstate *sp, Port_t iobase);
2289 static void siocnopen(struct siocnstate *sp, Port_t iobase, int speed);
2290 static void siocntxwait(Port_t iobase);
2291
2292 static cn_probe_t sio_cnprobe;
2293 static cn_init_t sio_cninit;
2294 static cn_term_t sio_cnterm;
2295 static cn_getc_t sio_cngetc;
2296 static cn_putc_t sio_cnputc;
2297
2298 CONSOLE_DRIVER(sio);
2299
2300 static void
2301 siocntxwait(iobase)
2302 Port_t iobase;
2303 {
2304 int timo;
2305
2306 /*
2307 * Wait for any pending transmission to finish. Required to avoid
2308 * the UART lockup bug when the speed is changed, and for normal
2309 * transmits.
2310 */
2311 timo = 100000;
2312 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2313 != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2314 ;
2315 }
2316
2317 /*
2318 * Read the serial port specified and try to figure out what speed
2319 * it's currently running at. We're assuming the serial port has
2320 * been initialized and is basicly idle. This routine is only intended
2321 * to be run at system startup.
2322 *
2323 * If the value read from the serial port doesn't make sense, return 0.
2324 */
2325
2326 static speed_t
2327 siocngetspeed(iobase, rclk)
2328 Port_t iobase;
2329 u_long rclk;
2330 {
2331 u_int divisor;
2332 u_char dlbh;
2333 u_char dlbl;
2334 u_char cfcr;
2335
2336 cfcr = inb(iobase + com_cfcr);
2337 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2338
2339 dlbl = inb(iobase + com_dlbl);
2340 dlbh = inb(iobase + com_dlbh);
2341
2342 outb(iobase + com_cfcr, cfcr);
2343
2344 divisor = dlbh << 8 | dlbl;
2345
2346 /* XXX there should be more sanity checking. */
2347 if (divisor == 0)
2348 return (CONSPEED);
2349 return (rclk / (16UL * divisor));
2350 }
2351
2352 static void
2353 siocnopen(sp, iobase, speed)
2354 struct siocnstate *sp;
2355 Port_t iobase;
2356 int speed;
2357 {
2358 u_int divisor;
2359 u_char dlbh;
2360 u_char dlbl;
2361
2362 /*
2363 * Save all the device control registers except the fifo register
2364 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2365 * We can't save the fifo register since it is read-only.
2366 */
2367 sp->ier = inb(iobase + com_ier);
2368 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */
2369 siocntxwait(iobase);
2370 sp->cfcr = inb(iobase + com_cfcr);
2371 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2372 sp->dlbl = inb(iobase + com_dlbl);
2373 sp->dlbh = inb(iobase + com_dlbh);
2374 /*
2375 * Only set the divisor registers if they would change, since on
2376 * some 16550 incompatibles (Startech), setting them clears the
2377 * data input register. This also reduces the effects of the
2378 * UMC8669F bug.
2379 */
2380 divisor = siodivisor(comdefaultrclk, speed);
2381 dlbl = divisor & 0xFF;
2382 if (sp->dlbl != dlbl)
2383 outb(iobase + com_dlbl, dlbl);
2384 dlbh = divisor >> 8;
2385 if (sp->dlbh != dlbh)
2386 outb(iobase + com_dlbh, dlbh);
2387 outb(iobase + com_cfcr, CFCR_8BITS);
2388 sp->mcr = inb(iobase + com_mcr);
2389 /*
2390 * We don't want interrupts, but must be careful not to "disable"
2391 * them by clearing the MCR_IENABLE bit, since that might cause
2392 * an interrupt by floating the IRQ line.
2393 */
2394 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2395 }
2396
2397 static void
2398 siocnclose(sp, iobase)
2399 struct siocnstate *sp;
2400 Port_t iobase;
2401 {
2402 /*
2403 * Restore the device control registers.
2404 */
2405 siocntxwait(iobase);
2406 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2407 if (sp->dlbl != inb(iobase + com_dlbl))
2408 outb(iobase + com_dlbl, sp->dlbl);
2409 if (sp->dlbh != inb(iobase + com_dlbh))
2410 outb(iobase + com_dlbh, sp->dlbh);
2411 outb(iobase + com_cfcr, sp->cfcr);
2412 /*
2413 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2414 */
2415 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2416 outb(iobase + com_ier, sp->ier);
2417 }
2418
2419 static void
2420 sio_cnprobe(cp)
2421 struct consdev *cp;
2422 {
2423 speed_t boot_speed;
2424 u_char cfcr;
2425 u_int divisor;
2426 int s, unit;
2427 struct siocnstate sp;
2428
2429 /*
2430 * Find our first enabled console, if any. If it is a high-level
2431 * console device, then initialize it and return successfully.
2432 * If it is a low-level console device, then initialize it and
2433 * return unsuccessfully. It must be initialized in both cases
2434 * for early use by console drivers and debuggers. Initializing
2435 * the hardware is not necessary in all cases, since the i/o
2436 * routines initialize it on the fly, but it is necessary if
2437 * input might arrive while the hardware is switched back to an
2438 * uninitialized state. We can't handle multiple console devices
2439 * yet because our low-level routines don't take a device arg.
2440 * We trust the user to set the console flags properly so that we
2441 * don't need to probe.
2442 */
2443 cp->cn_pri = CN_DEAD;
2444
2445 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2446 int flags;
2447
2448 if (resource_disabled("sio", unit))
2449 continue;
2450 if (resource_int_value("sio", unit, "flags", &flags))
2451 continue;
2452 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2453 int port;
2454 Port_t iobase;
2455
2456 if (resource_int_value("sio", unit, "port", &port))
2457 continue;
2458 iobase = port;
2459 s = spltty();
2460 if ((boothowto & RB_SERIAL) && COM_CONSOLE(flags)) {
2461 boot_speed =
2462 siocngetspeed(iobase, comdefaultrclk);
2463 if (boot_speed)
2464 comdefaultrate = boot_speed;
2465 }
2466
2467 /*
2468 * Initialize the divisor latch. We can't rely on
2469 * siocnopen() to do this the first time, since it
2470 * avoids writing to the latch if the latch appears
2471 * to have the correct value. Also, if we didn't
2472 * just read the speed from the hardware, then we
2473 * need to set the speed in hardware so that
2474 * switching it later is null.
2475 */
2476 cfcr = inb(iobase + com_cfcr);
2477 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2478 divisor = siodivisor(comdefaultrclk, comdefaultrate);
2479 outb(iobase + com_dlbl, divisor & 0xff);
2480 outb(iobase + com_dlbh, divisor >> 8);
2481 outb(iobase + com_cfcr, cfcr);
2482
2483 siocnopen(&sp, iobase, comdefaultrate);
2484
2485 splx(s);
2486 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
2487 siocnset(cp, unit);
2488 cp->cn_pri = COM_FORCECONSOLE(flags)
2489 || boothowto & RB_SERIAL
2490 ? CN_REMOTE : CN_NORMAL;
2491 siocniobase = iobase;
2492 siocnunit = unit;
2493 }
2494 #ifdef GDB
2495 if (COM_DEBUGGER(flags))
2496 siogdbiobase = iobase;
2497 #endif
2498 }
2499 }
2500 }
2501
2502 static void
2503 sio_cninit(cp)
2504 struct consdev *cp;
2505 {
2506 comconsole = cp->cn_unit;
2507 }
2508
2509 static void
2510 sio_cnterm(cp)
2511 struct consdev *cp;
2512 {
2513 comconsole = -1;
2514 }
2515
2516 static int
2517 sio_cngetc(struct consdev *cd)
2518 {
2519 int c;
2520 Port_t iobase;
2521 int s;
2522 struct siocnstate sp;
2523 speed_t speed;
2524
2525 if (cd != NULL && cd->cn_unit == siocnunit) {
2526 iobase = siocniobase;
2527 speed = comdefaultrate;
2528 } else {
2529 #ifdef GDB
2530 iobase = siogdbiobase;
2531 speed = gdbdefaultrate;
2532 #else
2533 return (-1);
2534 #endif
2535 }
2536 s = spltty();
2537 siocnopen(&sp, iobase, speed);
2538 if (inb(iobase + com_lsr) & LSR_RXRDY)
2539 c = inb(iobase + com_data);
2540 else
2541 c = -1;
2542 siocnclose(&sp, iobase);
2543 splx(s);
2544 return (c);
2545 }
2546
2547 static void
2548 sio_cnputc(struct consdev *cd, int c)
2549 {
2550 int need_unlock;
2551 int s;
2552 struct siocnstate sp;
2553 Port_t iobase;
2554 speed_t speed;
2555
2556 if (cd != NULL && cd->cn_unit == siocnunit) {
2557 iobase = siocniobase;
2558 speed = comdefaultrate;
2559 } else {
2560 #ifdef GDB
2561 iobase = siogdbiobase;
2562 speed = gdbdefaultrate;
2563 #else
2564 return;
2565 #endif
2566 }
2567 s = spltty();
2568 need_unlock = 0;
2569 if (!kdb_active && sio_inited == 2 && !mtx_owned(&sio_lock)) {
2570 mtx_lock_spin(&sio_lock);
2571 need_unlock = 1;
2572 }
2573 siocnopen(&sp, iobase, speed);
2574 siocntxwait(iobase);
2575 outb(iobase + com_data, c);
2576 siocnclose(&sp, iobase);
2577 if (need_unlock)
2578 mtx_unlock_spin(&sio_lock);
2579 splx(s);
2580 }
2581
2582 /*
2583 * Remote gdb(1) support.
2584 */
2585
2586 #if defined(GDB)
2587
2588 #include <gdb/gdb.h>
2589
2590 static gdb_probe_f siogdbprobe;
2591 static gdb_init_f siogdbinit;
2592 static gdb_term_f siogdbterm;
2593 static gdb_getc_f siogdbgetc;
2594 static gdb_putc_f siogdbputc;
2595
2596 GDB_DBGPORT(sio, siogdbprobe, siogdbinit, siogdbterm, siogdbgetc, siogdbputc);
2597
2598 static int
2599 siogdbprobe(void)
2600 {
2601 return ((siogdbiobase != 0) ? 0 : -1);
2602 }
2603
2604 static void
2605 siogdbinit(void)
2606 {
2607 }
2608
2609 static void
2610 siogdbterm(void)
2611 {
2612 }
2613
2614 static void
2615 siogdbputc(int c)
2616 {
2617 sio_cnputc(NULL, c);
2618 }
2619
2620 static int
2621 siogdbgetc(void)
2622 {
2623 return (sio_cngetc(NULL));
2624 }
2625
2626 #endif
Cache object: fdc25a11988f869056ef3509ff819f49
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