The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/snc/dp83932var.h

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    1 /*      $FreeBSD: releng/5.0/sys/dev/snc/dp83932var.h 92739 2002-03-20 02:08:01Z alfred $       */
    2 /*      $NecBSD: dp83932var.h,v 1.3 1999/01/24 01:39:51 kmatsuda Exp $  */
    3 /*      $NetBSD: if_snvar.h,v 1.12 1998/05/01 03:42:47 scottr Exp $     */
    4 
    5 /*
    6  * [NetBSD for NEC PC-98 series]
    7  *  Copyright (c) 1997, 1998, 1999
    8  *      Kouichi Matsuda.  All rights reserved.
    9  */
   10 /*
   11  * Copyright (c) 1991   Algorithmics Ltd (http://www.algor.co.uk)
   12  * You may use, copy, and modify this program so long as you retain the
   13  * copyright line.
   14  */
   15 
   16 /*
   17  * if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/mac68k vars
   18  */
   19 /*
   20  * Modified for NetBSD/pc98 1.2.1 from NetBSD/mac68k 1.2D by Kouichi Matsuda.
   21  * Make adapted for NEC PC-9801-83, 84, PC-9801-103, 104, PC-9801N-25 and
   22  * PC-9801N-J02, J02R, which uses National Semiconductor DP83934AVQB as
   23  * Ethernet Controller and National Semiconductor NS46C46 as
   24  * (64 * 16 bits) Microwire Serial EEPROM.
   25  */
   26 
   27 /* borrow from arch/mac68k/dev/if_mcvar.h for debug. */
   28 #ifdef DDB
   29 #define integrate
   30 #define hide
   31 #else
   32 #define integrate       static __inline
   33 #define hide            static
   34 #endif
   35 
   36 /* NetBSD Emulation */
   37 #ifdef __FreeBSD__
   38 #ifndef NBPG
   39 #define NBPG PAGE_SIZE
   40 #endif
   41 #ifndef PGOFSET
   42 #define PGOFSET PAGE_MASK
   43 #endif
   44 typedef unsigned long ulong;
   45 #define delay(x) DELAY(x)
   46 #endif
   47 
   48 /*
   49  * Vendor types
   50  */
   51 
   52 /*
   53  * SONIC buffers need to be aligned 16 or 32 bit aligned.
   54  * These macros calculate and verify alignment.
   55  */
   56 #define ROUNDUP(p, N)   (((int) p + N - 1) & ~(N - 1))
   57 
   58 #define SOALIGN(m, array)       (m ? (ROUNDUP(array, 4)) : (ROUNDUP(array, 2)))
   59 
   60 #define LOWER(x) ((unsigned)(x) & 0xffff)
   61 #define UPPER(x) ((unsigned)(x) >> 16)
   62 
   63 /*
   64  * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0)
   65  * and 32 bit mode (everything else) using a single GENERIC kernel
   66  * binary, all structures have to be accessed using macros which can
   67  * adjust the offsets appropriately.
   68  */
   69 /* m is not sc->bitmode, we treat m as sc. */
   70 #define SWO(m, a, o, x) (*(m)->sc_writetodesc)((m), (a), (o), (x))
   71 #define SRO(m, a, o)    (*(m)->sc_readfromdesc)((m), (a), (o))
   72 
   73 /*
   74  * Register access macros. We use bus_space_* to talk to the Sonic
   75  * registers. A mapping table is used in case a particular configuration
   76  * hooked the regs up at non-word offsets.
   77  */
   78 #define NIC_GET(sc, reg)        (*(sc)->sc_nic_get)(sc, reg)
   79 #define NIC_PUT(sc, reg, val)   (*(sc)->sc_nic_put)(sc, reg, val)
   80 
   81 #define SONIC_GETDMA(p) (p)
   82 
   83 /* pc98 does not have any write buffers to flush... */
   84 #define wbflush()
   85 
   86 /*
   87  * buffer sizes in 32 bit mode
   88  * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes
   89  *
   90  * 1 RxPkt is 7 words == 28 bytes
   91  * 1 Rda   is 4 words == 16 bytes
   92  *
   93  * The CDA is 17 words == 68 bytes
   94  *
   95  * total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68
   96  */
   97 
   98 #define NRBA    16              /* # receive buffers < NRRA */
   99 #define RBAMASK (NRBA-1)
  100 #define NTDA    16              /* # transmit descriptors */
  101 #define NRRA    64              /* # receive resource descriptors */
  102 #define RRAMASK (NRRA-1)        /* the reason why NRRA must be power of two */
  103 
  104 #define FCSSIZE 4               /* size of FCS appended to packets */
  105 
  106 /*
  107  * maximum receive packet size plus 2 byte pad to make each
  108  * one aligned. 4 byte slop (required for eobc)
  109  */
  110 #define RBASIZE(sc)     (sizeof(struct ether_header) + ETHERMTU + FCSSIZE + \
  111                          ((sc)->bitmode ? 6 : 2))
  112 
  113 /*
  114  * transmit buffer area
  115  */
  116 #define TXBSIZE 1536    /* 6*2^8 -- the same size as the 8390 TXBUF */
  117 
  118 #define SN_NPAGES       2 + NRBA + (NTDA/2)
  119 
  120 typedef struct mtd {
  121         u_int32_t       mtd_vtxp;
  122         u_int32_t       mtd_vbuf;
  123         struct mbuf     *mtd_mbuf;
  124 } mtd_t;
  125 
  126 /*
  127  * The snc_softc for PC-98 if_snc.
  128  */
  129 typedef struct snc_softc {
  130         struct arpcom   sc_ethercom;
  131 #define sc_if           sc_ethercom.ac_if       /* network visible interface */
  132 
  133         device_t        sc_dev;
  134 
  135         struct resource *       ioport;
  136         int                     ioport_rid;
  137         struct resource *       iomem;
  138         int                     iomem_rid;
  139         struct resource *       irq;
  140         int                     irq_rid;
  141         void *                  irq_handle;
  142 
  143         bus_space_tag_t         sc_iot;         /* bus identifier for io */
  144         bus_space_tag_t         sc_memt;        /* bus identifier for mem */
  145         bus_space_handle_t      sc_ioh;         /* io handle */
  146         bus_space_handle_t      sc_memh;        /* bus memory handle */
  147 
  148         int             bitmode;        /* 32 bit mode == 1, 16 == 0 */
  149 
  150         u_int16_t       sncr_dcr;       /* DCR for this instance */
  151         u_int16_t       sncr_dcr2;      /* DCR2 for this instance */
  152 
  153         int             sc_rramark;     /* index into v_rra of wp */
  154         u_int32_t       v_rra[NRRA];    /* DMA addresses of v_rra */
  155         u_int32_t       v_rea;          /* ptr to the end of the rra space */
  156 
  157         int             sc_rxmark;      /* current hw pos in rda ring */
  158         int             sc_rdamark;     /* current sw pos in rda ring */
  159         int             sc_nrda;        /* total number of RDAs */
  160         u_int32_t       v_rda;
  161 
  162         u_int32_t       rbuf[NRBA];
  163 
  164         struct mtd      mtda[NTDA];
  165         int             mtd_hw;         /* idx of first mtd given to hw */
  166         int             mtd_prev;       /* idx of last mtd given to hardware */
  167         int             mtd_free;       /* next free mtd to use */
  168         int             mtd_tlinko;     /*
  169                                          * offset of tlink of last txp given
  170                                          * to SONIC. Need to clear EOL on
  171                                          * this word to add a desc.
  172                                          */
  173         int             mtd_pint;       /* Counter to set TXP_PINT */
  174 
  175         u_int32_t       v_cda;
  176 
  177         u_int8_t        curbank;        /* current window bank */
  178 
  179         struct  ifmedia sc_media;       /* supported media information */
  180 
  181         /*
  182          * NIC register access functions:
  183          */
  184         u_int16_t       (*sc_nic_get)
  185                 (struct snc_softc *, u_int8_t);
  186         void            (*sc_nic_put)
  187                 (struct snc_softc *, u_int8_t, u_int16_t);
  188 
  189         /*
  190          * Memory functions:
  191          *
  192          *      copy to/from descriptor
  193          *      copy to/from buffer
  194          *      zero bytes in buffer
  195          */
  196         void            (*sc_writetodesc)
  197                 (struct snc_softc *, u_int32_t, u_int32_t, u_int16_t);
  198         u_int16_t       (*sc_readfromdesc)
  199                 (struct snc_softc *, u_int32_t, u_int32_t);
  200         void            (*sc_copytobuf)
  201                 (struct snc_softc *, void *, u_int32_t, size_t);
  202         void            (*sc_copyfrombuf)
  203                 (struct snc_softc *, void *, u_int32_t, size_t);
  204         void            (*sc_zerobuf)
  205                 (struct snc_softc *, u_int32_t, size_t);
  206 
  207         /*
  208          * Machine-dependent functions:
  209          *
  210          *      hardware reset hook - may be NULL
  211          *      hardware init hook - may be NULL
  212          *      media change hook - may be NULL
  213          */
  214         void    (*sc_hwreset)(struct snc_softc *);
  215         void    (*sc_hwinit)(struct snc_softc *);
  216         int     (*sc_mediachange)(struct snc_softc *);
  217         void    (*sc_mediastatus)(struct snc_softc *, struct ifmediareq *);
  218 
  219         int     sc_enabled;     /* boolean; power enabled on interface */
  220 
  221         int     (*sc_enable)(struct snc_softc *);
  222         void    (*sc_disable)(struct snc_softc *);
  223 
  224         void    *sc_sh;         /* shutdownhook cookie */
  225         int     gone;
  226 
  227 #if NRND > 0
  228         rndsource_element_t     rnd_source;
  229 #endif
  230 } snc_softc_t;
  231 
  232 /*
  233  * Accessing SONIC data structures and registers as 32 bit values
  234  * makes code endianess independent.  The SONIC is however always in
  235  * bigendian mode so it is necessary to ensure that data structures shared
  236  * between the CPU and the SONIC are always in bigendian order.
  237  */
  238 
  239 /*
  240  * Receive Resource Descriptor
  241  * This structure describes the buffers into which packets
  242  * will be received.  Note that more than one packet may be
  243  * packed into a single buffer if constraints permit.
  244  */
  245 #define RXRSRC_PTRLO    0       /* buffer address LO */
  246 #define RXRSRC_PTRHI    1       /* buffer address HI */
  247 #define RXRSRC_WCLO     2       /* buffer size (16bit words) LO */
  248 #define RXRSRC_WCHI     3       /* buffer size (16bit words) HI */
  249 
  250 #define RXRSRC_SIZE(sc) (sc->bitmode ? (4 * 4) : (4 * 2))
  251 
  252 /*
  253  * Receive Descriptor
  254  * This structure holds information about packets received.
  255  */
  256 #define RXPKT_STATUS    0
  257 #define RXPKT_BYTEC     1
  258 #define RXPKT_PTRLO     2
  259 #define RXPKT_PTRHI     3
  260 #define RXPKT_SEQNO     4
  261 #define RXPKT_RLINK     5
  262 #define RXPKT_INUSE     6
  263 #define RXPKT_SIZE(sc)  (sc->bitmode ? (7 * 4) : (7 * 2))
  264 
  265 #define RBASEQ(x) (((x)>>8)&0xff)
  266 #define PSNSEQ(x) ((x) & 0xff)
  267 
  268 /*
  269  * Transmit Descriptor
  270  * This structure holds information about packets to be transmitted.
  271  */
  272 #define FRAGMAX 8               /* maximum number of fragments in a packet */
  273 
  274 #define TXP_STATUS      0       /* + transmitted packet status */
  275 #define TXP_CONFIG      1       /* transmission configuration */
  276 #define TXP_PKTSIZE     2       /* entire packet size in bytes */
  277 #define TXP_FRAGCNT     3       /* # fragments in packet */
  278 
  279 #define TXP_FRAGOFF     4       /* offset to first fragment */
  280 #define TXP_FRAGSIZE    3       /* size of each fragment desc */
  281 #define TXP_FPTRLO      0       /* ptr to packet fragment LO */
  282 #define TXP_FPTRHI      1       /* ptr to packet fragment HI */
  283 #define TXP_FSIZE       2       /* fragment size */
  284 
  285 #define TXP_WORDS       (TXP_FRAGOFF + (FRAGMAX*TXP_FRAGSIZE) + 1)      /* 1 for tlink */
  286 #define TXP_SIZE(sc)    ((sc->bitmode) ? (TXP_WORDS*4) : (TXP_WORDS*2))
  287 
  288 #define EOL     0x0001          /* end of list marker for link fields */
  289 
  290 /*
  291  * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to
  292  * match incoming addresses against. It is programmed via DMA
  293  * from a memory region.
  294  */
  295 #define MAXCAM  16      /* number of user entries in CAM */
  296 #define CDA_CAMDESC     4       /* # words i na descriptor */
  297 #define CDA_CAMEP       0       /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
  298 #define CDA_CAMAP0      1       /* CAM Address Port 1 xx-xx-YY-YY-xx-xx */
  299 #define CDA_CAMAP1      2       /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
  300 #define CDA_CAMAP2      3
  301 #define CDA_ENABLE      64      /* mask enabling CAM entries */
  302 #define CDA_SIZE(sc)    ((4*16 + 1) * ((sc->bitmode) ? 4 : 2))
  303 
  304 void    sncconfig(struct snc_softc *, int *, int, int, u_int8_t *);
  305 void    sncintr(void *);
  306 void    sncshutdown(void *);

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