1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2001 Orion Hodson <O.Hodson@cs.ucl.ac.uk>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 #define ALS_PCI_ID0 0x40004005
32 #define ALS_PCI_POWERREG 0xe0
33
34 #define ALS_CONFIG_SPACE_BYTES 128
35
36 #define ALS_GCR_DATA 0x08
37 #define ALS_GCR_INDEX 0x0c
38 # define ALS_GCR_MISC 0x8c
39 # define ALS_GCR_TEST 0x90
40 # define ALS_GCR_DMA0_START 0x91
41 # define ALS_GCR_DMA0_MODE 0x92
42 # define ALS_GCR_DMA1_START 0x93
43 # define ALS_GCR_DMA1_MODE 0x94
44 # define ALS_GCR_DMA3_START 0x95
45 # define ALS_GCR_DMA3_MODE 0x96
46 # define ALS_GCR_DMA_EMULATION 0x99
47 # define ALS_GCR_FIFO0_CURRENT 0xa0
48 # define ALS_GCR_FIFO0_STATUS 0xa1
49 # define ALS_GCR_FIFO1_START 0xa2
50 # define ALS_GCR_FIFO1_COUNT 0xa3
51 # define ALS_GCR_FIFO1_CURRENT 0xa4
52 # define ALS_GCR_FIFO1_STATUS 0xa5
53 # define ALS_GCR_POWER 0xa6
54 # define ALS_GCR_PIC_ACCESS 0xa7
55
56 #define ALS_SB_MPU_IRQ 0x0e
57
58 #define ALS_MIXER_DATA 0x15
59 #define ALS_MIXER_INDEX 0x14
60 # define ALS_SB16_RESET 0x00
61 # define ALS_SB16_DMA_SETUP 0x81
62 # define ALS_CONTROL 0xc0
63 # define ALS_SB16_CONFIG ALS_CONTROL + 0x00
64 # define ALS_MISC_CONTROL ALS_CONTROL + 0x02
65 # define ALS_FIFO1_LENGTH_LO ALS_CONTROL + 0x1c
66 # define ALS_FIFO1_LENGTH_HI ALS_CONTROL + 0x1d
67 # define ALS_FIFO1_CONTROL ALS_CONTROL + 0x1e
68 # define ALS_FIFO1_STOP 0x00
69 # define ALS_FIFO1_RUN 0x80
70 # define ALS_FIFO1_PAUSE 0x40
71 # define ALS_FIFO1_STEREO 0x20
72 # define ALS_FIFO1_SIGNED 0x10
73 # define ALS_FIFO1_8BIT 0x04
74
75 #define ALS_ESP_RST 0x16
76 #define ALS_CR1E_ACK_PORT 0x16
77
78 #define ALS_ESP_RD_DATA 0x1a
79 #define ALS_ESP_WR_DATA 0x1c
80 #define ALS_ESP_WR_STATUS 0x1c
81 #define ALS_ESP_RD_STATUS8 0x1e
82 #define ALS_ESP_RD_STATUS16 0x1f
83 # define ALS_ESP_SAMPLE_RATE 0x41
84
85 #define ALS_MIDI_DATA 0x30
86 #define ALS_MIDI_STATUS 0x31
87
88 /* Interrupt masks */
89 #define ALS_IRQ_STATUS8 0x01
90 #define ALS_IRQ_STATUS16 0x02
91 #define ALS_IRQ_MPUIN 0x04
92 #define ALS_IRQ_CR1E 0x20
93
94 /* Sample Rate Locks */
95 #define ALS_RATE_LOCK_PLAYBACK 0x01
96 #define ALS_RATE_LOCK_CAPTURE 0x02
97 #define ALS_RATE_LOCK 0x03
Cache object: 869e1c48b3347412ece2c74d742ca42d
|