1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-NetBSD
3 *
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Takuya SHIOZAKI <AoiMoe@imou.to> .
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * $FreeBSD$
32 */
33
34 /* C-Media CMI8x38 Audio Chip Support */
35
36 #ifndef _DEV_PCI_CMPCIREG_H_
37 #define _DEV_PCI_CMPCIREG_H_ (1)
38
39 /*
40 * PCI Configuration Registers
41 */
42
43 #define CMPCI_PCI_IOBASEREG (PCI_MAPREG_START)
44
45 /*
46 * I/O Space
47 */
48
49 #define CMPCI_REG_FUNC_0 0x00
50 # define CMPCI_REG_CH0_DIR 0x00000001
51 # define CMPCI_REG_CH1_DIR 0x00000002
52 # define CMPCI_REG_CH0_PAUSE 0x00000004
53 # define CMPCI_REG_CH1_PAUSE 0x00000008
54 # define CMPCI_REG_CH0_ENABLE 0x00010000
55 # define CMPCI_REG_CH1_ENABLE 0x00020000
56 # define CMPCI_REG_CH0_RESET 0x00040000
57 # define CMPCI_REG_CH1_RESET 0x00080000
58
59 #define CMPCI_REG_FUNC_1 0x04
60 # define CMPCI_REG_JOY_ENABLE 0x00000002
61 # define CMPCI_REG_UART_ENABLE 0x00000004
62 # define CMPCI_REG_LEGACY_ENABLE 0x00000008
63 # define CMPCI_REG_BREQ 0x00000010
64 # define CMPCI_REG_MCBINTR_ENABLE 0x00000020
65 # define CMPCI_REG_SPDIFOUT_DAC 0x00000040
66 # define CMPCI_REG_SPDIF_LOOP 0x00000080
67 # define CMPCI_REG_SPDIF0_ENABLE 0x00000100
68 # define CMPCI_REG_SPDIF1_ENABLE 0x00000200
69 # define CMPCI_REG_DAC_FS_SHIFT 10
70 # define CMPCI_REG_DAC_FS_MASK 0x00000007
71 # define CMPCI_REG_ADC_FS_SHIFT 13
72 # define CMPCI_REG_ADC_FS_MASK 0x00000007
73
74 #define CMPCI_REG_CHANNEL_FORMAT 0x08
75 # define CMPCI_REG_CH0_FORMAT_SHIFT 0
76 # define CMPCI_REG_CH0_FORMAT_MASK 0x00000003
77 # define CMPCI_REG_CH1_FORMAT_SHIFT 2
78 # define CMPCI_REG_CH1_FORMAT_MASK 0x00000003
79 # define CMPCI_REG_FORMAT_MONO 0x00000000
80 # define CMPCI_REG_FORMAT_STEREO 0x00000001
81 # define CMPCI_REG_FORMAT_8BIT 0x00000000
82 # define CMPCI_REG_FORMAT_16BIT 0x00000002
83
84 #define CMPCI_REG_INTR_CTRL 0x0c
85 # define CMPCI_REG_CH0_INTR_ENABLE 0x00010000
86 # define CMPCI_REG_CH1_INTR_ENABLE 0x00020000
87 # define CMPCI_REG_TDMA_INTR_ENABLE 0x00040000
88
89 #define CMPCI_REG_INTR_STATUS 0x10
90 # define CMPCI_REG_CH0_INTR 0x00000001
91 # define CMPCI_REG_CH1_INTR 0x00000002
92 # define CMPCI_REG_CH0_BUSY 0x00000004
93 # define CMPCI_REG_CH1_BUSY 0x00000008
94 # define CMPCI_REG_LEGACY_STEREO 0x00000010
95 # define CMPCI_REG_LEGACY_HDMA 0x00000020
96 # define CMPCI_REG_DMASTAT 0x00000040
97 # define CMPCI_REG_XDO46 0x00000080
98 # define CMPCI_REG_HTDMA_INTR 0x00004000
99 # define CMPCI_REG_LTDMA_INTR 0x00008000
100 # define CMPCI_REG_UART_INTR 0x00010000
101 # define CMPCI_REG_MCB_INTR 0x04000000
102 # define CMPCI_REG_VCO 0x08000000
103 # define CMPCI_REG_ANY_INTR 0x80000000
104
105 #define CMPCI_REG_LEGACY_CTRL 0x14
106 # define CMPCI_REG_LEGACY_SPDIF_ENABLE 0x00200000
107 # define CMPCI_REG_SPDIF_COPYRIGHT 0x00400000
108 # define CMPCI_REG_XSPDIF_ENABLE 0x00800000
109 # define CMPCI_REG_FMSEL_SHIFT 24
110 # define CMPCI_REG_FMSEL_MASK 0x00000003
111 # define CMPCI_REG_VSBSEL_SHIFT 26
112 # define CMPCI_REG_VSBSEL_MASK 0x00000003
113 # define CMPCI_REG_VMPUSEL_SHIFT 29
114 # define CMPCI_REG_VMPUSEL_MASK 0x00000003
115
116 #define CMPCI_REG_MISC 0x18
117 # define CMPCI_REG_POWER_DOWN 0x80000000
118 # define CMPCI_REG_BUS_AND_DSP_RESET 0x40000000
119 # define CMPCI_REG_N4SPK3D 0x04000000
120 # define CMPCI_REG_W_SPDIF_48L 0x01000000
121 # define CMPCI_REG_XCHGDAC 0x00400000
122 # define CMPCI_REG_FM_ENABLE 0x00080000
123 # define CMPCI_REG_SPDIF_48K 0x00008000
124
125 #define CMPCI_REG_SBDATA 0x22
126 #define CMPCI_REG_SBADDR 0x23
127 # define CMPCI_SB16_MIXER_RESET 0x00
128 # define CMPCI_SB16_MIXER_MASTER_L 0x30
129 # define CMPCI_SB16_MIXER_MASTER_R 0x31
130 # define CMPCI_SB16_MIXER_VOICE_L 0x32
131 # define CMPCI_SB16_MIXER_VOICE_R 0x33
132 # define CMPCI_SB16_MIXER_FM_L 0x34
133 # define CMPCI_SB16_MIXER_FM_R 0x35
134 # define CMPCI_SB16_MIXER_CDDA_L 0x36
135 # define CMPCI_SB16_MIXER_CDDA_R 0x37
136 # define CMPCI_SB16_MIXER_LINE_L 0x38
137 # define CMPCI_SB16_MIXER_LINE_R 0x39
138 # define CMPCI_SB16_MIXER_MIC 0x3A
139 # define CMPCI_SB16_MIXER_SPEAKER 0x3B
140 # define CMPCI_SB16_MIXER_OUTMIX 0x3C
141 # define CMPCI_SB16_SW_MIC 0x01
142 # define CMPCI_SB16_SW_CD_R 0x02
143 # define CMPCI_SB16_SW_CD_L 0x04
144 # define CMPCI_SB16_SW_CD (CMPCI_SB16_SW_CD_L|CMPCI_SB16_SW_CD_R)
145 # define CMPCI_SB16_SW_LINE_R 0x08
146 # define CMPCI_SB16_SW_LINE_L 0x10
147 # define CMPCI_SB16_SW_LINE (CMPCI_SB16_SW_LINE_L|CMPCI_SB16_SW_LINE_R)
148 # define CMPCI_SB16_SW_FM_R 0x20
149 # define CMPCI_SB16_SW_FM_L 0x40
150 # define CMPCI_SB16_SW_FM (CMPCI_SB16_SW_FM_L|CMPCI_SB16_SW_FM_R)
151 # define CMPCI_SB16_MIXER_ADCMIX_L 0x3D
152 # define CMPCI_SB16_MIXER_ADCMIX_R 0x3E
153 # define CMPCI_SB16_MIXER_FM_SRC_R 0x20
154 # define CMPCI_SB16_MIXER_LINE_SRC_R 0x08
155 # define CMPCI_SB16_MIXER_CD_SRC_R 0x02
156 # define CMPCI_SB16_MIXER_MIC_SRC 0x01
157 # define CMPCI_SB16_MIXER_SRC_R_TO_L(v) ((v) << 1)
158
159 # define CMPCI_SB16_MIXER_INGAIN_L 0x3F
160 # define CMPCI_SB16_MIXER_INGAIN_R 0x40
161 # define CMPCI_SB16_MIXER_OUTGAIN_L 0x41
162 # define CMPCI_SB16_MIXER_OUTGAIN_R 0x42
163 # define CMPCI_SB16_MIXER_AGC 0x43
164 # define CMPCI_SB16_MIXER_TREBLE_L 0x44
165 # define CMPCI_SB16_MIXER_TREBLE_R 0x45
166 # define CMPCI_SB16_MIXER_BASS_L 0x46
167 # define CMPCI_SB16_MIXER_BASS_R 0x47
168 # define CMPCI_SB16_MIXER_L_TO_R(addr) ((addr)+1)
169
170 # define CMPCI_ADJUST_MIC_GAIN(sc, x) cmpci_adjust((x), 0xf8)
171 # define CMPCI_ADJUST_GAIN(sc, x) cmpci_adjust((x), 0xf8)
172 # define CMPCI_ADJUST_2_GAIN(sc, x) cmpci_adjust((x), 0xc0)
173
174 #define CMPCI_REG_MIXER1 0x24
175 # define CMPCI_SPK4 0x20
176 # define CMPCI_REAR2FRONT 0x10
177 # define CMPCI_X3DEN 0x02
178
179 #define CMPCI_REG_MPU_BASE 0x40
180 #define CMPCI_REG_MPU_SIZE 0x10
181 #define CMPCI_REG_FM_BASE 0x50
182 #define CMPCI_REG_FM_SIZE 0x10
183
184 #define CMPCI_REG_AUX_MIC 0x25
185 # define CMPCI_AUX_SELECT_R 0x80
186 # define CMPCI_AUX_SELECT_L 0x40
187 # define CMPCI_AUX_MUTE_R 0x20
188 # define CMPCI_AUX_MUTE_L 0x10
189 # define CMPCI_VAD_MIC 0x0e
190 # define CMPCI_MIC_QUIET 0x01
191
192 #define CMPCI_REG_DMA0_BASE 0x80
193 #define CMPCI_REG_DMA0_BYTES 0x84
194 #define CMPCI_REG_DMA0_SAMPLES 0x86
195 #define CMPCI_REG_DMA1_BASE 0x88
196 #define CMPCI_REG_DMA1_BYTES 0x8C
197 #define CMPCI_REG_DMA1_SAMPLES 0x8E
198
199 /* sample rate */
200 #define CMPCI_REG_RATE_5512 0
201 #define CMPCI_REG_RATE_11025 1
202 #define CMPCI_REG_RATE_22050 2
203 #define CMPCI_REG_RATE_44100 3
204 #define CMPCI_REG_RATE_8000 4
205 #define CMPCI_REG_RATE_16000 5
206 #define CMPCI_REG_RATE_32000 6
207 #define CMPCI_REG_RATE_48000 7
208 #define CMPCI_REG_NUMRATE 8
209
210 #endif /* _DEV_PCI_CMPCIREG_H_ */
211
212 /* end of file */
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