The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/sound/pci/emu10k1.c

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    1 /*-
    2  * Copyright (c) 2004 David O'Brien <obrien@FreeBSD.org>
    3  * Copyright (c) 2003 Orlando Bassotto <orlando.bassotto@ieo-research.it>
    4  * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 #include <dev/sound/pcm/sound.h>
   30 #include <dev/sound/pcm/ac97.h>
   31 #include <gnu/dev/sound/pci/emu10k1.h>
   32 #include "emu10k1-alsa%diked.h"
   33 
   34 #include <dev/pci/pcireg.h>
   35 #include <dev/pci/pcivar.h>
   36 #include <sys/queue.h>
   37 
   38 SND_DECLARE_FILE("$FreeBSD$");
   39 
   40 /* -------------------------------------------------------------------- */
   41 
   42 #define NUM_G           64      /* use all channels */
   43 #define WAVEOUT_MAXBUFSIZE 32768
   44 #define EMUPAGESIZE     4096    /* don't change */
   45 #define EMUMAXPAGES     (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE)
   46 #define EMU10K1_PCI_ID  0x00021102      /* 1102 => Creative Labs Vendor ID */
   47 #define EMU10K2_PCI_ID  0x00041102      
   48 #define EMU_DEFAULT_BUFSZ       4096
   49 #define EMU_MAX_CHANS   8
   50 #define EMU_CHANS       4
   51 
   52 #define MAXREQVOICES    8
   53 #define RESERVED        0
   54 #define NUM_MIDI        16
   55 #define NUM_FXSENDS     4
   56 
   57 #define TMEMSIZE        256*1024
   58 #define TMEMSIZEREG     4
   59 
   60 #define ENABLE          0xffffffff
   61 #define DISABLE         0x00000000
   62 #define ENV_ON          DCYSUSV_CHANNELENABLE_MASK
   63 #define ENV_OFF         0x00    /* XXX: should this be 1? */
   64 
   65 #define A_IOCFG_GPOUT_A 0x40    /* Analog Output */
   66 #define A_IOCFG_GPOUT_D 0x04    /* Digital Output */
   67 #define A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D)  /* A_IOCFG_GPOUT0 */
   68 
   69 struct emu_memblk {
   70         SLIST_ENTRY(emu_memblk) link;
   71         void *buf;
   72         bus_addr_t buf_addr;
   73         u_int32_t pte_start, pte_size;
   74 };
   75 
   76 struct emu_mem {
   77         u_int8_t bmap[EMUMAXPAGES / 8];
   78         u_int32_t *ptb_pages;
   79         void *silent_page;
   80         bus_addr_t silent_page_addr;
   81         bus_addr_t ptb_pages_addr;
   82         SLIST_HEAD(, emu_memblk) blocks;
   83 };
   84 
   85 struct emu_voice {
   86         int vnum;
   87         int b16:1, stereo:1, busy:1, running:1, ismaster:1;
   88         int speed;
   89         int start, end, vol;
   90         int fxrt1;      /* FX routing */
   91         int fxrt2;      /* FX routing (only for audigy) */
   92         u_int32_t buf;
   93         struct emu_voice *slave;
   94         struct pcm_channel *channel;
   95 };
   96 
   97 struct sc_info;
   98 
   99 /* channel registers */
  100 struct sc_pchinfo {
  101         int spd, fmt, blksz, run;
  102         struct emu_voice *master, *slave;
  103         struct snd_dbuf *buffer;
  104         struct pcm_channel *channel;
  105         struct sc_info *parent;
  106 };
  107 
  108 struct sc_rchinfo {
  109         int spd, fmt, run, blksz, num;
  110         u_int32_t idxreg, basereg, sizereg, setupreg, irqmask;
  111         struct snd_dbuf *buffer;
  112         struct pcm_channel *channel;
  113         struct sc_info *parent;
  114 };
  115 
  116 /* device private data */
  117 struct sc_info {
  118         device_t        dev;
  119         u_int32_t       type, rev;
  120         u_int32_t       tos_link:1, APS:1, audigy:1, audigy2:1;
  121         u_int32_t       addrmask;       /* wider if audigy */
  122 
  123         bus_space_tag_t st;
  124         bus_space_handle_t sh;
  125         bus_dma_tag_t parent_dmat;
  126 
  127         struct resource *reg, *irq;
  128         void            *ih;
  129         struct mtx      *lock;
  130 
  131         unsigned int bufsz;
  132         int timer, timerinterval;
  133         int pnum, rnum;
  134         int nchans;
  135         struct emu_mem mem;
  136         struct emu_voice voice[64];
  137         struct sc_pchinfo pch[EMU_MAX_CHANS];
  138         struct sc_rchinfo rch[3];
  139 };
  140 
  141 /* -------------------------------------------------------------------- */
  142 
  143 /*
  144  * prototypes
  145  */
  146 
  147 /* stuff */
  148 static int emu_init(struct sc_info *);
  149 static void emu_intr(void *);
  150 static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
  151 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
  152 static int emu_memfree(struct sc_info *sc, void *buf);
  153 static int emu_memstart(struct sc_info *sc, void *buf);
  154 #ifdef EMUDEBUG
  155 static void emu_vdump(struct sc_info *sc, struct emu_voice *v);
  156 #endif
  157 
  158 /* talk to the card */
  159 static u_int32_t emu_rd(struct sc_info *, int, int);
  160 static void emu_wr(struct sc_info *, int, u_int32_t, int);
  161 
  162 /* -------------------------------------------------------------------- */
  163 
  164 static u_int32_t emu_rfmt_ac97[] = {
  165         AFMT_S16_LE,
  166         AFMT_STEREO | AFMT_S16_LE,
  167         0
  168 };
  169 
  170 static u_int32_t emu_rfmt_mic[] = {
  171         AFMT_U8,
  172         0
  173 };
  174 
  175 static u_int32_t emu_rfmt_efx[] = {
  176         AFMT_STEREO | AFMT_S16_LE,
  177         0
  178 };
  179 
  180 static struct pcmchan_caps emu_reccaps[3] = {
  181         {8000, 48000, emu_rfmt_ac97, 0},
  182         {8000, 8000, emu_rfmt_mic, 0},
  183         {48000, 48000, emu_rfmt_efx, 0},
  184 };
  185 
  186 static u_int32_t emu_pfmt[] = {
  187         AFMT_U8,
  188         AFMT_STEREO | AFMT_U8,
  189         AFMT_S16_LE,
  190         AFMT_STEREO | AFMT_S16_LE,
  191         0
  192 };
  193 
  194 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0};
  195 
  196 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000};
  197 /* audigy supports 12kHz. */
  198 static int audigy_adcspeed[9] = {
  199         48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000
  200 };
  201 
  202 /* -------------------------------------------------------------------- */
  203 /* Hardware */
  204 static u_int32_t
  205 emu_rd(struct sc_info *sc, int regno, int size)
  206 {
  207         switch (size) {
  208         case 1:
  209                 return bus_space_read_1(sc->st, sc->sh, regno);
  210         case 2:
  211                 return bus_space_read_2(sc->st, sc->sh, regno);
  212         case 4:
  213                 return bus_space_read_4(sc->st, sc->sh, regno);
  214         default:
  215                 return 0xffffffff;
  216         }
  217 }
  218 
  219 static void
  220 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size)
  221 {
  222         switch (size) {
  223         case 1:
  224                 bus_space_write_1(sc->st, sc->sh, regno, data);
  225                 break;
  226         case 2:
  227                 bus_space_write_2(sc->st, sc->sh, regno, data);
  228                 break;
  229         case 4:
  230                 bus_space_write_4(sc->st, sc->sh, regno, data);
  231                 break;
  232         }
  233 }
  234 
  235 static u_int32_t
  236 emu_rdptr(struct sc_info *sc, int chn, int reg)
  237 {
  238         u_int32_t ptr, val, mask, size, offset;
  239 
  240         ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
  241         emu_wr(sc, PTR, ptr, 4);
  242         val = emu_rd(sc, DATA, 4);
  243         if (reg & 0xff000000) {
  244                 size = (reg >> 24) & 0x3f;
  245                 offset = (reg >> 16) & 0x1f;
  246                 mask = ((1 << size) - 1) << offset;
  247                 val &= mask;
  248                 val >>= offset;
  249         }
  250         return val;
  251 }
  252 
  253 static void
  254 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data)
  255 {
  256         u_int32_t ptr, mask, size, offset;
  257 
  258         ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
  259         emu_wr(sc, PTR, ptr, 4);
  260         if (reg & 0xff000000) {
  261                 size = (reg >> 24) & 0x3f;
  262                 offset = (reg >> 16) & 0x1f;
  263                 mask = ((1 << size) - 1) << offset;
  264                 data <<= offset;
  265                 data &= mask;
  266                 data |= emu_rd(sc, DATA, 4) & ~mask;
  267         }
  268         emu_wr(sc, DATA, data, 4);
  269 }
  270 
  271 static void
  272 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data)
  273 {
  274         pc += sc->audigy ? AUDIGY_CODEBASE : MICROCODEBASE;
  275         emu_wrptr(sc, 0, pc, data);
  276 }
  277 
  278 /* -------------------------------------------------------------------- */
  279 /* ac97 codec */
  280 /* no locking needed */
  281 
  282 static int
  283 emu_rdcd(kobj_t obj, void *devinfo, int regno)
  284 {
  285         struct sc_info *sc = (struct sc_info *)devinfo;
  286 
  287         emu_wr(sc, AC97ADDRESS, regno, 1);
  288         return emu_rd(sc, AC97DATA, 2);
  289 }
  290 
  291 static int
  292 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data)
  293 {
  294         struct sc_info *sc = (struct sc_info *)devinfo;
  295 
  296         emu_wr(sc, AC97ADDRESS, regno, 1);
  297         emu_wr(sc, AC97DATA, data, 2);
  298         return 0;
  299 }
  300 
  301 static kobj_method_t emu_ac97_methods[] = {
  302         KOBJMETHOD(ac97_read,           emu_rdcd),
  303         KOBJMETHOD(ac97_write,          emu_wrcd),
  304         { 0, 0 }
  305 };
  306 AC97_DECLARE(emu_ac97);
  307 
  308 /* -------------------------------------------------------------------- */
  309 /* stuff */
  310 static int
  311 emu_settimer(struct sc_info *sc)
  312 {
  313         struct sc_pchinfo *pch;
  314         struct sc_rchinfo *rch;
  315         int i, tmp, rate;
  316 
  317         rate = 0;
  318         for (i = 0; i < sc->nchans; i++) {
  319                 pch = &sc->pch[i];
  320                 if (pch->buffer) {
  321                         tmp = (pch->spd * sndbuf_getbps(pch->buffer))
  322                             / pch->blksz;
  323                         if (tmp > rate)
  324                                 rate = tmp;
  325                 }
  326         }
  327 
  328         for (i = 0; i < 3; i++) {
  329                 rch = &sc->rch[i];
  330                 if (rch->buffer) {
  331                         tmp = (rch->spd * sndbuf_getbps(rch->buffer))
  332                             / rch->blksz;
  333                         if (tmp > rate)
  334                                 rate = tmp;
  335                 }
  336         }
  337         RANGE(rate, 48, 9600);
  338         sc->timerinterval = 48000 / rate;
  339         emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
  340 
  341         return sc->timerinterval;
  342 }
  343 
  344 static int
  345 emu_enatimer(struct sc_info *sc, int go)
  346 {
  347         u_int32_t x;
  348         if (go) {
  349                 if (sc->timer++ == 0) {
  350                         x = emu_rd(sc, INTE, 4);
  351                         x |= INTE_INTERVALTIMERENB;
  352                         emu_wr(sc, INTE, x, 4);
  353                 }
  354         } else {
  355                 sc->timer = 0;
  356                 x = emu_rd(sc, INTE, 4);
  357                 x &= ~INTE_INTERVALTIMERENB;
  358                 emu_wr(sc, INTE, x, 4);
  359         }
  360         return 0;
  361 }
  362 
  363 static void
  364 emu_enastop(struct sc_info *sc, char channel, int enable)
  365 {
  366         int reg = (channel & 0x20) ? SOLEH : SOLEL;
  367         channel &= 0x1f;
  368         reg |= 1 << 24;
  369         reg |= channel << 16;
  370         emu_wrptr(sc, 0, reg, enable);
  371 }
  372 
  373 static int
  374 emu_recval(int speed) {
  375         int val;
  376 
  377         val = 0;
  378         while (val < 7 && speed < adcspeed[val])
  379                 val++;
  380         return val;
  381 }
  382 
  383 static int
  384 audigy_recval(int speed) {
  385         int val;
  386 
  387         val = 0;
  388         while (val < 8 && speed < audigy_adcspeed[val])
  389                 val++;
  390         return val;
  391 }
  392 
  393 static u_int32_t
  394 emu_rate_to_pitch(u_int32_t rate)
  395 {
  396         static u_int32_t logMagTable[128] = {
  397                 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
  398                 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
  399                 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
  400                 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
  401                 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
  402                 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
  403                 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
  404                 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
  405                 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
  406                 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
  407                 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
  408                 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
  409                 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
  410                 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
  411                 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
  412                 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
  413         };
  414         static char logSlopeTable[128] = {
  415                 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
  416                 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
  417                 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
  418                 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
  419                 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
  420                 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
  421                 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
  422                 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
  423                 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
  424                 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
  425                 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
  426                 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
  427                 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
  428                 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
  429                 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
  430                 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
  431         };
  432         int i;
  433 
  434         if (rate == 0)
  435                 return 0;       /* Bail out if no leading "1" */
  436         rate *= 11185;  /* Scale 48000 to 0x20002380 */
  437         for (i = 31; i > 0; i--) {
  438                 if (rate & 0x80000000) {        /* Detect leading "1" */
  439                         return (((u_int32_t) (i - 15) << 20) +
  440                             logMagTable[0x7f & (rate >> 24)] +
  441                             (0x7f & (rate >> 17)) *
  442                             logSlopeTable[0x7f & (rate >> 24)]);
  443                 }
  444                 rate <<= 1;
  445         }
  446 
  447         return 0;               /* Should never reach this point */
  448 }
  449 
  450 static u_int32_t
  451 emu_rate_to_linearpitch(u_int32_t rate)
  452 {
  453         rate = (rate << 8) / 375;
  454         return (rate >> 1) + (rate & 1);
  455 }
  456 
  457 static struct emu_voice *
  458 emu_valloc(struct sc_info *sc)
  459 {
  460         struct emu_voice *v;
  461         int i;
  462 
  463         v = NULL;
  464         for (i = 0; i < 64 && sc->voice[i].busy; i++);
  465         if (i < 64) {
  466                 v = &sc->voice[i];
  467                 v->busy = 1;
  468         }
  469         return v;
  470 }
  471 
  472 static int
  473 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s,
  474           u_int32_t sz, struct snd_dbuf *b)
  475 {
  476         void *buf;
  477         bus_addr_t tmp_addr;
  478 
  479         buf = emu_memalloc(sc, sz, &tmp_addr);
  480         if (buf == NULL)
  481                 return -1;
  482         if (b != NULL)
  483                 sndbuf_setup(b, buf, sz);
  484         m->start = emu_memstart(sc, buf) * EMUPAGESIZE;
  485         m->end = m->start + sz;
  486         m->channel = NULL;
  487         m->speed = 0;
  488         m->b16 = 0;
  489         m->stereo = 0;
  490         m->running = 0;
  491         m->ismaster = 1;
  492         m->vol = 0xff;
  493         m->buf = tmp_addr;
  494         m->slave = s;
  495         if (sc->audigy) {
  496                 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_LEFT << 8 |
  497                     FXBUS_PCM_RIGHT << 16 | FXBUS_MIDI_REVERB << 24;
  498                 m->fxrt2 = 0x3f3f3f3f;  /* No effects on second route */
  499         } else {
  500                 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_LEFT << 4 |
  501                     FXBUS_PCM_RIGHT << 8 | FXBUS_MIDI_REVERB << 12;
  502                 m->fxrt2 = 0;
  503         }
  504 
  505         if (s != NULL) {
  506                 s->start = m->start;
  507                 s->end = m->end;
  508                 s->channel = NULL;
  509                 s->speed = 0;
  510                 s->b16 = 0;
  511                 s->stereo = 0;
  512                 s->running = 0;
  513                 s->ismaster = 0;
  514                 s->vol = m->vol;
  515                 s->buf = m->buf;
  516                 s->fxrt1 = m->fxrt1;
  517                 s->fxrt2 = m->fxrt2;
  518                 s->slave = NULL;
  519         }
  520         return 0;
  521 }
  522 
  523 static void
  524 emu_vsetup(struct sc_pchinfo *ch)
  525 {
  526         struct emu_voice *v = ch->master;
  527 
  528         if (ch->fmt) {
  529                 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0;
  530                 v->stereo = (ch->fmt & AFMT_STEREO) ? 1 : 0;
  531                 if (v->slave != NULL) {
  532                         v->slave->b16 = v->b16;
  533                         v->slave->stereo = v->stereo;
  534                 }
  535         }
  536         if (ch->spd) {
  537                 v->speed = ch->spd;
  538                 if (v->slave != NULL)
  539                         v->slave->speed = v->speed;
  540         }
  541 }
  542 
  543 static void
  544 emu_vwrite(struct sc_info *sc, struct emu_voice *v)
  545 {
  546         int s;
  547         int l, r, x, y;
  548         u_int32_t sa, ea, start, val, silent_page;
  549 
  550         s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
  551 
  552         sa = v->start >> s;
  553         ea = v->end >> s;
  554 
  555         l = r = x = y = v->vol;
  556         if (v->stereo) {
  557                 l = v->ismaster ? l : 0;
  558                 r = v->ismaster ? 0 : r;
  559         }
  560 
  561         emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0);
  562         val = v->stereo ? 28 : 30;
  563         val *= v->b16 ? 1 : 2;
  564         start = sa + val;
  565 
  566         if (sc->audigy) {
  567                 emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1);
  568                 emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2);
  569                 emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0);
  570         }
  571         else
  572                 emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16);
  573 
  574         emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r);
  575         emu_wrptr(sc, v->vnum, DSL, ea | (y << 24));
  576         emu_wrptr(sc, v->vnum, PSST, sa | (l << 24));
  577         emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
  578 
  579         emu_wrptr(sc, v->vnum, Z1, 0);
  580         emu_wrptr(sc, v->vnum, Z2, 0);
  581 
  582         silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1)
  583             | MAP_PTI_MASK;
  584         emu_wrptr(sc, v->vnum, MAPA, silent_page);
  585         emu_wrptr(sc, v->vnum, MAPB, silent_page);
  586 
  587         emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
  588         emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
  589         emu_wrptr(sc, v->vnum, ATKHLDM, 0);
  590         emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
  591         emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
  592         emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
  593         emu_wrptr(sc, v->vnum, FMMOD, 0);
  594         emu_wrptr(sc, v->vnum, TREMFRQ, 0);
  595         emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
  596         emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
  597 
  598         emu_wrptr(sc, v->vnum, ATKHLDV,
  599             ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
  600         emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
  601 
  602         emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
  603         emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
  604 
  605         if (v->slave != NULL)
  606                 emu_vwrite(sc, v->slave);
  607 }
  608 
  609 static void
  610 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go)
  611 {
  612         u_int32_t pitch_target, initial_pitch;
  613         u_int32_t cra, cs, ccis;
  614         u_int32_t sample, i;
  615 
  616         if (go) {
  617                 cra = 64;
  618                 cs = v->stereo ? 4 : 2;
  619                 ccis = v->stereo ? 28 : 30;
  620                 ccis *= v->b16 ? 1 : 2;
  621                 sample = v->b16 ? 0x00000000 : 0x80808080;
  622 
  623                 for (i = 0; i < cs; i++)
  624                         emu_wrptr(sc, v->vnum, CD0 + i, sample);
  625                 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
  626                 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
  627                 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
  628 
  629                 emu_wrptr(sc, v->vnum, IFATN, 0xff00);
  630                 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
  631                 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
  632                 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
  633                 emu_enastop(sc, v->vnum, 0);
  634 
  635                 pitch_target = emu_rate_to_linearpitch(v->speed);
  636                 initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
  637                 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
  638                 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
  639                 emu_wrptr(sc, v->vnum, IP, initial_pitch);
  640         } else {
  641                 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
  642                 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
  643                 emu_wrptr(sc, v->vnum, IFATN, 0xffff);
  644                 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
  645                 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
  646                 emu_wrptr(sc, v->vnum, IP, 0);
  647                 emu_enastop(sc, v->vnum, 1);
  648         }
  649         if (v->slave != NULL)
  650                 emu_vtrigger(sc, v->slave, go);
  651 }
  652 
  653 static int
  654 emu_vpos(struct sc_info *sc, struct emu_voice *v)
  655 {
  656         int s, ptr;
  657 
  658         s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
  659         ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
  660         return ptr & ~0x0000001f;
  661 }
  662 
  663 #ifdef EMUDEBUG
  664 static void
  665 emu_vdump(struct sc_info *sc, struct emu_voice *v)
  666 {
  667         char *regname[] = {
  668                 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl",
  669                 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL,
  670                 "envvol", "atkhldv", "dcysusv", "lfoval1",
  671                 "envval", "atkhldm", "dcysusm", "lfoval2",
  672                 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2",
  673                 "tempenv"
  674         };
  675         char *regname2[] = {
  676                 "mudata1", "mustat1", "mudata2", "mustat2",
  677                 "fxwc1", "fxwc2", "spdrate", NULL, NULL,
  678                 NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1",
  679                 NULL, NULL
  680         };
  681         int i, x;
  682 
  683         printf("voice number %d\n", v->vnum);
  684         for (i = 0, x = 0; i <= 0x1e; i++) {
  685                 if (regname[i] == NULL)
  686                         continue;
  687                 printf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i));
  688                 printf("%s", (x == 2) ? "\n" : "\t");
  689                 x++;
  690                 if (x > 2)
  691                         x = 0;
  692         }
  693 
  694         /* Print out audigy extra registers */
  695         if (sc->audigy) {
  696                 for (i = 0; i <= 0xe; i++) {
  697                         if (regname2[i] == NULL)
  698                                 continue;
  699                         printf("%s\t[%08x]", regname2[i],
  700                             emu_rdptr(sc, v->vnum, i + 0x70));
  701                         printf("%s", (x == 2)? "\n" : "\t");
  702                         x++;
  703                         if (x > 2)
  704                                 x = 0;
  705                 }
  706         }
  707         printf("\n\n");
  708 }
  709 #endif
  710 
  711 /* channel interface */
  712 static void *
  713 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
  714     struct pcm_channel *c, int dir)
  715 {
  716         struct sc_info *sc = devinfo;
  717         struct sc_pchinfo *ch;
  718         void *r;
  719 
  720         KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction"));
  721         ch = &sc->pch[sc->pnum++];
  722         ch->buffer = b;
  723         ch->parent = sc;
  724         ch->channel = c;
  725         ch->blksz = sc->bufsz / 2;
  726         ch->fmt = AFMT_U8;
  727         ch->spd = 8000;
  728         snd_mtxlock(sc->lock);
  729         ch->master = emu_valloc(sc);
  730         ch->slave = emu_valloc(sc);
  731         snd_mtxunlock(sc->lock);
  732         r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer))
  733             ? NULL : ch;
  734 
  735         return r;
  736 }
  737 
  738 static int
  739 emupchan_free(kobj_t obj, void *data)
  740 {
  741         struct sc_pchinfo *ch = data;
  742         struct sc_info *sc = ch->parent;
  743         int r;
  744 
  745         snd_mtxlock(sc->lock);
  746         r = emu_memfree(sc, sndbuf_getbuf(ch->buffer));
  747         snd_mtxunlock(sc->lock);
  748 
  749         return r;
  750 }
  751 
  752 static int
  753 emupchan_setformat(kobj_t obj, void *data, u_int32_t format)
  754 {
  755         struct sc_pchinfo *ch = data;
  756 
  757         ch->fmt = format;
  758         return 0;
  759 }
  760 
  761 static int
  762 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
  763 {
  764         struct sc_pchinfo *ch = data;
  765 
  766         ch->spd = speed;
  767         return ch->spd;
  768 }
  769 
  770 static int
  771 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
  772 {
  773         struct sc_pchinfo *ch = data;
  774         struct sc_info *sc = ch->parent;
  775         int irqrate, blksz;
  776 
  777         ch->blksz = blocksize;
  778         snd_mtxlock(sc->lock);
  779         emu_settimer(sc);
  780         irqrate = 48000 / sc->timerinterval;
  781         snd_mtxunlock(sc->lock);
  782         blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
  783         return blocksize;
  784 }
  785 
  786 static int
  787 emupchan_trigger(kobj_t obj, void *data, int go)
  788 {
  789         struct sc_pchinfo *ch = data;
  790         struct sc_info *sc = ch->parent;
  791 
  792         if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
  793                 return 0;
  794 
  795         snd_mtxlock(sc->lock);
  796         if (go == PCMTRIG_START) {
  797                 emu_vsetup(ch);
  798                 emu_vwrite(sc, ch->master);
  799                 emu_settimer(sc);
  800                 emu_enatimer(sc, 1);
  801 #ifdef EMUDEBUG
  802                 printf("start [%d bit, %s, %d hz]\n",
  803                         ch->master->b16 ? 16 : 8,
  804                         ch->master->stereo ? "stereo" : "mono",
  805                         ch->master->speed);
  806                 emu_vdump(sc, ch->master);
  807                 emu_vdump(sc, ch->slave);
  808 #endif
  809         }
  810         ch->run = (go == PCMTRIG_START) ? 1 : 0;
  811         emu_vtrigger(sc, ch->master, ch->run);
  812         snd_mtxunlock(sc->lock);
  813         return 0;
  814 }
  815 
  816 static int
  817 emupchan_getptr(kobj_t obj, void *data)
  818 {
  819         struct sc_pchinfo *ch = data;
  820         struct sc_info *sc = ch->parent;
  821         int r;
  822 
  823         snd_mtxlock(sc->lock);
  824         r = emu_vpos(sc, ch->master);
  825         snd_mtxunlock(sc->lock);
  826 
  827         return r;
  828 }
  829 
  830 static struct pcmchan_caps *
  831 emupchan_getcaps(kobj_t obj, void *data)
  832 {
  833         return &emu_playcaps;
  834 }
  835 
  836 static kobj_method_t emupchan_methods[] = {
  837         KOBJMETHOD(channel_init,                emupchan_init),
  838         KOBJMETHOD(channel_free,                emupchan_free),
  839         KOBJMETHOD(channel_setformat,           emupchan_setformat),
  840         KOBJMETHOD(channel_setspeed,            emupchan_setspeed),
  841         KOBJMETHOD(channel_setblocksize,        emupchan_setblocksize),
  842         KOBJMETHOD(channel_trigger,             emupchan_trigger),
  843         KOBJMETHOD(channel_getptr,              emupchan_getptr),
  844         KOBJMETHOD(channel_getcaps,             emupchan_getcaps),
  845         { 0, 0 }
  846 };
  847 CHANNEL_DECLARE(emupchan);
  848 
  849 /* channel interface */
  850 static void *
  851 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
  852     struct pcm_channel *c, int dir)
  853 {
  854         struct sc_info *sc = devinfo;
  855         struct sc_rchinfo *ch;
  856 
  857         KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction"));
  858         ch = &sc->rch[sc->rnum];
  859         ch->buffer = b;
  860         ch->parent = sc;
  861         ch->channel = c;
  862         ch->blksz = sc->bufsz / 2;
  863         ch->fmt = AFMT_U8;
  864         ch->spd = 8000;
  865         ch->num = sc->rnum;
  866         switch(sc->rnum) {
  867         case 0:
  868                 ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX;
  869                 ch->basereg = ADCBA;
  870                 ch->sizereg = ADCBS;
  871                 ch->setupreg = ADCCR;
  872                 ch->irqmask = INTE_ADCBUFENABLE;
  873                 break;
  874 
  875         case 1:
  876                 ch->idxreg = FXIDX;
  877                 ch->basereg = FXBA;
  878                 ch->sizereg = FXBS;
  879                 ch->setupreg = FXWC;
  880                 ch->irqmask = INTE_EFXBUFENABLE;
  881                 break;
  882 
  883         case 2:
  884                 ch->idxreg = MICIDX;
  885                 ch->basereg = MICBA;
  886                 ch->sizereg = MICBS;
  887                 ch->setupreg = 0;
  888                 ch->irqmask = INTE_MICBUFENABLE;
  889                 break;
  890         }
  891         sc->rnum++;
  892         if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) != 0)
  893                 return NULL;
  894         else {
  895                 snd_mtxlock(sc->lock);
  896                 emu_wrptr(sc, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer));
  897                 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */
  898                 snd_mtxunlock(sc->lock);
  899                 return ch;
  900         }
  901 }
  902 
  903 static int
  904 emurchan_setformat(kobj_t obj, void *data, u_int32_t format)
  905 {
  906         struct sc_rchinfo *ch = data;
  907 
  908         ch->fmt = format;
  909         return 0;
  910 }
  911 
  912 static int
  913 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
  914 {
  915         struct sc_rchinfo *ch = data;
  916 
  917         if (ch->num == 0) {
  918                 if (ch->parent->audigy)
  919                         speed = audigy_adcspeed[audigy_recval(speed)];
  920                 else
  921                         speed = adcspeed[emu_recval(speed)];
  922         }
  923         if (ch->num == 1)
  924                 speed = 48000;
  925         if (ch->num == 2)
  926                 speed = 8000;
  927         ch->spd = speed;
  928         return ch->spd;
  929 }
  930 
  931 static int
  932 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
  933 {
  934         struct sc_rchinfo *ch = data;
  935         struct sc_info *sc = ch->parent;
  936         int irqrate, blksz;
  937 
  938         ch->blksz = blocksize;
  939         snd_mtxlock(sc->lock);
  940         emu_settimer(sc);
  941         irqrate = 48000 / sc->timerinterval;
  942         snd_mtxunlock(sc->lock);
  943         blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
  944         return blocksize;
  945 }
  946 
  947 /* semantic note: must start at beginning of buffer */
  948 static int
  949 emurchan_trigger(kobj_t obj, void *data, int go)
  950 {
  951         struct sc_rchinfo *ch = data;
  952         struct sc_info *sc = ch->parent;
  953         u_int32_t val, sz;
  954 
  955         switch(sc->bufsz) {
  956         case 4096:
  957                 sz = ADCBS_BUFSIZE_4096;
  958                 break;
  959 
  960         case 8192:
  961                 sz = ADCBS_BUFSIZE_8192;
  962                 break;
  963 
  964         case 16384:
  965                 sz = ADCBS_BUFSIZE_16384;
  966                 break;
  967 
  968         case 32768:
  969                 sz = ADCBS_BUFSIZE_32768;
  970                 break;
  971 
  972         case 65536:
  973                 sz = ADCBS_BUFSIZE_65536;
  974                 break;
  975 
  976         default:
  977                 sz = ADCBS_BUFSIZE_4096;
  978         }
  979 
  980         snd_mtxlock(sc->lock);
  981         switch(go) {
  982         case PCMTRIG_START:
  983                 ch->run = 1;
  984                 emu_wrptr(sc, 0, ch->sizereg, sz);
  985                 if (ch->num == 0) {
  986                         if (sc->audigy) {
  987                                 val = A_ADCCR_LCHANENABLE;
  988                                 if (ch->fmt & AFMT_STEREO)
  989                                         val |= A_ADCCR_RCHANENABLE;
  990                                 val |= audigy_recval(ch->spd);
  991                         } else {
  992                                 val = ADCCR_LCHANENABLE;
  993                                 if (ch->fmt & AFMT_STEREO)
  994                                         val |= ADCCR_RCHANENABLE;
  995                                 val |= emu_recval(ch->spd);
  996                         }
  997 
  998                         emu_wrptr(sc, 0, ch->setupreg, 0);
  999                         emu_wrptr(sc, 0, ch->setupreg, val);
 1000                 }
 1001                 val = emu_rd(sc, INTE, 4);
 1002                 val |= ch->irqmask;
 1003                 emu_wr(sc, INTE, val, 4);
 1004                 break;
 1005 
 1006         case PCMTRIG_STOP:
 1007         case PCMTRIG_ABORT:
 1008                 ch->run = 0;
 1009                 emu_wrptr(sc, 0, ch->sizereg, 0);
 1010                 if (ch->setupreg)
 1011                         emu_wrptr(sc, 0, ch->setupreg, 0);
 1012                 val = emu_rd(sc, INTE, 4);
 1013                 val &= ~ch->irqmask;
 1014                 emu_wr(sc, INTE, val, 4);
 1015                 break;
 1016 
 1017         case PCMTRIG_EMLDMAWR:
 1018         case PCMTRIG_EMLDMARD:
 1019         default:
 1020                 break;
 1021         }
 1022         snd_mtxunlock(sc->lock);
 1023 
 1024         return 0;
 1025 }
 1026 
 1027 static int
 1028 emurchan_getptr(kobj_t obj, void *data)
 1029 {
 1030         struct sc_rchinfo *ch = data;
 1031         struct sc_info *sc = ch->parent;
 1032         int r;
 1033 
 1034         snd_mtxlock(sc->lock);
 1035         r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff;
 1036         snd_mtxunlock(sc->lock);
 1037 
 1038         return r;
 1039 }
 1040 
 1041 static struct pcmchan_caps *
 1042 emurchan_getcaps(kobj_t obj, void *data)
 1043 {
 1044         struct sc_rchinfo *ch = data;
 1045 
 1046         return &emu_reccaps[ch->num];
 1047 }
 1048 
 1049 static kobj_method_t emurchan_methods[] = {
 1050         KOBJMETHOD(channel_init,                emurchan_init),
 1051         KOBJMETHOD(channel_setformat,           emurchan_setformat),
 1052         KOBJMETHOD(channel_setspeed,            emurchan_setspeed),
 1053         KOBJMETHOD(channel_setblocksize,        emurchan_setblocksize),
 1054         KOBJMETHOD(channel_trigger,             emurchan_trigger),
 1055         KOBJMETHOD(channel_getptr,              emurchan_getptr),
 1056         KOBJMETHOD(channel_getcaps,             emurchan_getcaps),
 1057         { 0, 0 }
 1058 };
 1059 CHANNEL_DECLARE(emurchan);
 1060 
 1061 /* -------------------------------------------------------------------- */
 1062 /* The interrupt handler */
 1063 static void
 1064 emu_intr(void *data)
 1065 {
 1066         struct sc_info *sc = data;
 1067         u_int32_t stat, ack, i, x;
 1068 
 1069         snd_mtxlock(sc->lock);
 1070         while (1) {
 1071                 stat = emu_rd(sc, IPR, 4);
 1072                 if (stat == 0)
 1073                         break;
 1074                 ack = 0;
 1075 
 1076                 /* process irq */
 1077                 if (stat & IPR_INTERVALTIMER)
 1078                         ack |= IPR_INTERVALTIMER;
 1079 
 1080                 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL))
 1081                         ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
 1082 
 1083                 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL))
 1084                         ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
 1085 
 1086                 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL))
 1087                         ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
 1088 
 1089                 if (stat & IPR_PCIERROR) {
 1090                         ack |= IPR_PCIERROR;
 1091                         device_printf(sc->dev, "pci error\n");
 1092                         /* we still get an nmi with ecc ram even if we ack this */
 1093                 }
 1094                 if (stat & IPR_SAMPLERATETRACKER) {
 1095                         ack |= IPR_SAMPLERATETRACKER;
 1096 #ifdef EMUDEBUG
 1097                         device_printf(sc->dev,
 1098                             "sample rate tracker lock status change\n");
 1099 #endif
 1100                 }
 1101 
 1102                 if (stat & ~ack)
 1103                         device_printf(sc->dev, "dodgy irq: %x (harmless)\n",
 1104                             stat & ~ack);
 1105 
 1106                 emu_wr(sc, IPR, stat, 4);
 1107 
 1108                 if (ack) {
 1109                         snd_mtxunlock(sc->lock);
 1110 
 1111                         if (ack & IPR_INTERVALTIMER) {
 1112                                 x = 0;
 1113                                 for (i = 0; i < sc->nchans; i++) {
 1114                                         if (sc->pch[i].run) {
 1115                                                 x = 1;
 1116                                                 chn_intr(sc->pch[i].channel);
 1117                                         }
 1118                                 }
 1119                                 if (x == 0)
 1120                                         emu_enatimer(sc, 0);
 1121                         }
 1122 
 1123 
 1124                         if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
 1125                                 if (sc->rch[0].channel)
 1126                                         chn_intr(sc->rch[0].channel);
 1127                         }
 1128                         if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
 1129                                 if (sc->rch[1].channel)
 1130                                         chn_intr(sc->rch[1].channel);
 1131                         }
 1132                         if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
 1133                                 if (sc->rch[2].channel)
 1134                                         chn_intr(sc->rch[2].channel);
 1135                         }
 1136 
 1137                         snd_mtxlock(sc->lock);
 1138                 }
 1139         }
 1140         snd_mtxunlock(sc->lock);
 1141 }
 1142 
 1143 /* -------------------------------------------------------------------- */
 1144 
 1145 static void
 1146 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
 1147 {
 1148         bus_addr_t *phys = arg;
 1149 
 1150         *phys = error ? 0 : (bus_addr_t)segs->ds_addr;
 1151 
 1152         if (bootverbose) {
 1153                 printf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n",
 1154                     (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
 1155                     nseg, error);
 1156         }
 1157 }
 1158 
 1159 static void *
 1160 emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
 1161 {
 1162         void *buf;
 1163         bus_dmamap_t map;
 1164 
 1165         *addr = 0;
 1166         if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map))
 1167                 return NULL;
 1168         if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, addr, 0)
 1169             || !*addr)
 1170                 return NULL;
 1171         return buf;
 1172 }
 1173 
 1174 static void
 1175 emu_free(struct sc_info *sc, void *buf)
 1176 {
 1177         bus_dmamem_free(sc->parent_dmat, buf, NULL);
 1178 }
 1179 
 1180 static void *
 1181 emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
 1182 {
 1183         u_int32_t blksz, start, idx, ofs, tmp, found;
 1184         struct emu_mem *mem = &sc->mem;
 1185         struct emu_memblk *blk;
 1186         void *buf;
 1187 
 1188         blksz = sz / EMUPAGESIZE;
 1189         if (sz > (blksz * EMUPAGESIZE))
 1190                 blksz++;
 1191         /* find a free block in the bitmap */
 1192         found = 0;
 1193         start = 1;
 1194         while (!found && start + blksz < EMUMAXPAGES) {
 1195                 found = 1;
 1196                 for (idx = start; idx < start + blksz; idx++)
 1197                         if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
 1198                                 found = 0;
 1199                 if (!found)
 1200                         start++;
 1201         }
 1202         if (!found)
 1203                 return NULL;
 1204         blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT);
 1205         if (blk == NULL)
 1206                 return NULL;
 1207         buf = emu_malloc(sc, sz, &blk->buf_addr);
 1208         *addr = blk->buf_addr;
 1209         if (buf == NULL) {
 1210                 free(blk, M_DEVBUF);
 1211                 return NULL;
 1212         }
 1213         blk->buf = buf;
 1214         blk->pte_start = start;
 1215         blk->pte_size = blksz;
 1216 #ifdef EMUDEBUG
 1217         printf("buf %p, pte_start %d, pte_size %d\n", blk->buf,
 1218             blk->pte_start, blk->pte_size);
 1219 #endif
 1220         ofs = 0;
 1221         for (idx = start; idx < start + blksz; idx++) {
 1222                 mem->bmap[idx >> 3] |= 1 << (idx & 7);
 1223                 tmp = (u_int32_t)(u_long)((u_int8_t *)blk->buf_addr + ofs);
 1224 #ifdef EMUDEBUG
 1225                 printf("pte[%d] -> %x phys, %x virt\n", idx, tmp,
 1226                     ((u_int32_t)buf) + ofs);
 1227 #endif
 1228                 mem->ptb_pages[idx] = (tmp << 1) | idx;
 1229                 ofs += EMUPAGESIZE;
 1230         }
 1231         SLIST_INSERT_HEAD(&mem->blocks, blk, link);
 1232         return buf;
 1233 }
 1234 
 1235 static int
 1236 emu_memfree(struct sc_info *sc, void *buf)
 1237 {
 1238         u_int32_t idx, tmp;
 1239         struct emu_mem *mem = &sc->mem;
 1240         struct emu_memblk *blk, *i;
 1241 
 1242         blk = NULL;
 1243         SLIST_FOREACH(i, &mem->blocks, link) {
 1244                 if (i->buf == buf)
 1245                         blk = i;
 1246         }
 1247         if (blk == NULL)
 1248                 return EINVAL;
 1249         SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
 1250         emu_free(sc, buf);
 1251         tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
 1252         for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
 1253                 mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
 1254                 mem->ptb_pages[idx] = tmp | idx;
 1255         }
 1256         free(blk, M_DEVBUF);
 1257         return 0;
 1258 }
 1259 
 1260 static int
 1261 emu_memstart(struct sc_info *sc, void *buf)
 1262 {
 1263         struct emu_mem *mem = &sc->mem;
 1264         struct emu_memblk *blk, *i;
 1265 
 1266         blk = NULL;
 1267         SLIST_FOREACH(i, &mem->blocks, link) {
 1268                 if (i->buf == buf)
 1269                         blk = i;
 1270         }
 1271         if (blk == NULL)
 1272                 return -EINVAL;
 1273         return blk->pte_start;
 1274 }
 1275 
 1276 static void
 1277 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
 1278     u_int32_t *pc)
 1279 {
 1280         emu_wrefx(sc, (*pc) * 2, (x << 10) | y);
 1281         emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w);
 1282         (*pc)++;
 1283 }
 1284 
 1285 static void
 1286 audigy_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
 1287     u_int32_t *pc)
 1288 {
 1289         emu_wrefx(sc, (*pc) * 2, (x << 12) | y);
 1290         emu_wrefx(sc, (*pc) * 2 + 1, (op << 24) | (z << 12) | w);
 1291         (*pc)++;
 1292 }
 1293 
 1294 static void
 1295 audigy_initefx(struct sc_info *sc)
 1296 {
 1297         int i;
 1298         u_int32_t pc = 0;
 1299 
 1300         /* skip 0, 0, -1, 0 - NOPs */
 1301         for (i = 0; i < 512; i++)
 1302                 audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc);
 1303 
 1304         for (i = 0; i < 512; i++)
 1305                 emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0);
 1306 
 1307         pc = 16;
 1308 
 1309         /* stop fx processor */
 1310         emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 1311 
 1312         /* Audigy 2 (EMU10K2) DSP Registers:
 1313            FX Bus
 1314                 0x000-0x00f : 16 registers (???)
 1315            Input
 1316                 0x040/0x041 : AC97 Codec (l/r)
 1317                 0x042/0x043 : ADC, S/PDIF (l/r)
 1318                 0x044/0x045 : Optical S/PDIF in (l/r)
 1319                 0x046/0x047 : ???
 1320                 0x048/0x049 : Line/Mic 2 (l/r)
 1321                 0x04a/0x04b : RCA S/PDIF (l/r)
 1322                 0x04c/0x04d : Aux 2 (l/r)
 1323            Output
 1324                 0x060/0x061 : Digital Front (l/r)
 1325                 0x062/0x063 : Digital Center/LFE
 1326                 0x064/0x065 : AudigyDrive Heaphone (l/r)
 1327                 0x066/0x067 : Digital Rear (l/r)
 1328                 0x068/0x069 : Analog Front (l/r)
 1329                 0x06a/0x06b : Analog Center/LFE
 1330                 0x06c/0x06d : ???
 1331                 0x06e/0x06f : Analog Rear (l/r)
 1332                 0x070/0x071 : AC97 Output (l/r)
 1333                 0x072/0x073 : ???
 1334                 0x074/0x075 : ???
 1335                 0x076/0x077 : ADC Recording Buffer (l/r)
 1336            Constants
 1337                 0x0c0 - 0x0c4 = 0 - 4
 1338                 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20
 1339                 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000
 1340                 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000
 1341                 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff
 1342                 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc
 1343                 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (???)
 1344            Temporary Values
 1345                 0x0d6 : Accumulator (???)
 1346                 0x0d7 : Condition Register
 1347                 0x0d8 : Noise source
 1348                 0x0d9 : Noise source
 1349            Tank Memory Data Registers
 1350                 0x200 - 0x2ff
 1351            Tank Memory Address Registers
 1352                 0x300 - 0x3ff
 1353            General Purpose Registers
 1354                 0x400 - 0x5ff
 1355          */
 1356 
 1357         /* AC97Output[l/r] = FXBus PCM[l/r] */
 1358         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000,
 1359                         A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc);
 1360         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000,
 1361                         A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc);
 1362 
 1363         /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */
 1364         audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000,
 1365                         A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc);
 1366         audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000,
 1367                         A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc);
 1368 
 1369         /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
 1370         audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1),
 1371                         A_C_40000000, A_GPR(0), &pc);
 1372 
 1373         /* Headphones[l/r] = GPR[0/1] */
 1374         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L),
 1375                         A_C_00000000, A_C_00000000, A_GPR(0), &pc);
 1376         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R),
 1377                         A_C_00000000, A_C_00000000, A_GPR(1), &pc);
 1378 
 1379         /* Analog Front[l/r] = GPR[0/1] */
 1380         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000,
 1381                         A_C_00000000, A_GPR(0), &pc);
 1382         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000,
 1383                         A_C_00000000, A_GPR(1), &pc);
 1384 
 1385         /* Digital Front[l/r] = GPR[0/1] */
 1386         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000,
 1387                         A_C_00000000, A_GPR(0), &pc);
 1388         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000,
 1389                         A_C_00000000, A_GPR(1), &pc);
 1390 
 1391         /* Center and Subwoofer configuration */
 1392         /* Analog Center = GPR[0] + GPR[2] */
 1393         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000,
 1394                         A_GPR(0), A_GPR(2), &pc);
 1395         /* Analog Sub = GPR[1] + GPR[2] */
 1396         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000,
 1397                         A_GPR(1), A_GPR(2), &pc);
 1398 
 1399         /* Digital Center = GPR[0] + GPR[2] */
 1400         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000,
 1401                         A_GPR(0), A_GPR(2), &pc);
 1402         /* Digital Sub = GPR[1] + GPR[2] */
 1403         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000,
 1404                         A_GPR(1), A_GPR(2), &pc);
 1405 
 1406 #if 0
 1407         /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
 1408         /*   RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
 1409         audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
 1410                         A_GPR(16), A_GPR(0), &pc);
 1411         audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
 1412                         A_GPR(17), A_GPR(1), &pc);
 1413 
 1414         /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
 1415         /*   RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
 1416         audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
 1417                         A_GPR(16), A_GPR(0), &pc);
 1418         audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
 1419                         A_GPR(17), A_GPR(1), &pc);
 1420 #else
 1421         /* XXX This is just a copy to the channel, since we do not have
 1422          *     a patch manager, it is useful for have another output enabled.
 1423          */
 1424 
 1425         /* Analog Rear[l/r] = GPR[0/1] */
 1426         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
 1427                         A_C_00000000, A_GPR(0), &pc);
 1428         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
 1429                         A_C_00000000, A_GPR(1), &pc);
 1430 
 1431         /* Digital Rear[l/r] = GPR[0/1] */
 1432         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
 1433                         A_C_00000000, A_GPR(0), &pc);
 1434         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
 1435                         A_C_00000000, A_GPR(1), &pc);
 1436 #endif
 1437 
 1438         /* ADC Recording buffer[l/r] = AC97Input[l/r] */
 1439         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000,
 1440                         A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc);
 1441         audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000,
 1442                         A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc);
 1443 
 1444         /* resume normal operations */
 1445         emu_wrptr(sc, 0, A_DBG, 0);
 1446 }
 1447 
 1448 static void
 1449 emu_initefx(struct sc_info *sc)
 1450 {
 1451         int i;
 1452         u_int32_t pc = 16;
 1453 
 1454         /* acc3 0,0,0,0 - NOPs */
 1455         for (i = 0; i < 512; i++) {
 1456                 emu_wrefx(sc, i * 2, 0x10040);
 1457                 emu_wrefx(sc, i * 2 + 1, 0x610040);
 1458         }
 1459 
 1460         for (i = 0; i < 256; i++)
 1461                 emu_wrptr(sc, 0, FXGPREGBASE + i, 0);
 1462 
 1463         /* FX-8010 DSP Registers:
 1464            FX Bus
 1465              0x000-0x00f : 16 registers
 1466            Input
 1467              0x010/0x011 : AC97 Codec (l/r)
 1468              0x012/0x013 : ADC, S/PDIF (l/r)
 1469              0x014/0x015 : Mic(left), Zoom (l/r)
 1470              0x016/0x017 : TOS link in (l/r)
 1471              0x018/0x019 : Line/Mic 1 (l/r)
 1472              0x01a/0x01b : COAX S/PDIF (l/r)
 1473              0x01c/0x01d : Line/Mic 2 (l/r)
 1474            Output
 1475              0x020/0x021 : AC97 Output (l/r)
 1476              0x022/0x023 : TOS link out (l/r)
 1477              0x024/0x025 : Center/LFE
 1478              0x026/0x027 : LiveDrive Headphone (l/r)
 1479              0x028/0x029 : Rear Channel (l/r)
 1480              0x02a/0x02b : ADC Recording Buffer (l/r)
 1481              0x02c       : Mic Recording Buffer
 1482              0x031/0x032 : Analog Center/LFE
 1483            Constants
 1484              0x040 - 0x044 = 0 - 4
 1485              0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20
 1486              0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000
 1487              0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000
 1488              0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff
 1489              0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc
 1490              0x054 = 0x5a7ef9db, 0x055 = 0x00100000
 1491            Temporary Values
 1492              0x056 : Accumulator
 1493              0x057 : Condition Register
 1494              0x058 : Noise source
 1495              0x059 : Noise source
 1496              0x05a : IRQ Register
 1497              0x05b : TRAM Delay Base Address Count
 1498            General Purpose Registers
 1499              0x100 - 0x1ff
 1500            Tank Memory Data Registers
 1501              0x200 - 0x2ff
 1502            Tank Memory Address Registers
 1503              0x300 - 0x3ff
 1504              */
 1505 
 1506         /* Routing - this will be configurable in later version */
 1507 
 1508         /* GPR[0/1] = FX * 4 + SPDIF-in */
 1509         emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L),
 1510                         FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc);
 1511         emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R),
 1512                         FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc);
 1513 
 1514         /* GPR[0/1] += APS-input */
 1515         emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000,
 1516                         sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc);
 1517         emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000,
 1518                         sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc);
 1519 
 1520         /* FrontOut (AC97) = GPR[0/1] */
 1521         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000,
 1522                         C_00000000, GPR(0), &pc);
 1523         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000,
 1524                         C_00000001, GPR(1), &pc);
 1525 
 1526         /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
 1527         emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc);
 1528 
 1529 #if 0
 1530         /* RearOut = (GPR[0/1] * RearVolume) >> 31 */
 1531         /*   RearVolume = GPR[0x10/0x11] */
 1532         emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_L), C_00000000,
 1533                         GPR(16), GPR(0), &pc);
 1534         emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_R), C_00000000,
 1535                         GPR(17), GPR(1), &pc);
 1536 #else
 1537         /* XXX This is just a copy to the channel, since we do not have
 1538          *     a patch manager, it is useful for have another output enabled.
 1539          */
 1540 
 1541         /* Rear[l/r] = GPR[0/1] */
 1542         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000,
 1543                         C_00000000, GPR(0), &pc);
 1544         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000,
 1545                         C_00000000, GPR(1), &pc);
 1546 #endif
 1547 
 1548         /* TOS out[l/r] = GPR[0/1] */
 1549         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000,
 1550                         C_00000000, GPR(0), &pc);
 1551         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000,
 1552                         C_00000000, GPR(1), &pc);
 1553 
 1554         /* Center and Subwoofer configuration */
 1555         /* Analog Center = GPR[0] + GPR[2] */
 1556         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000,
 1557                         GPR(0), GPR(2), &pc);
 1558         /* Analog Sub = GPR[1] + GPR[2] */
 1559         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000,
 1560                         GPR(1), GPR(2), &pc);
 1561         /* Digital Center = GPR[0] + GPR[2] */
 1562         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_CENTER), C_00000000,
 1563                         GPR(0), GPR(2), &pc);
 1564         /* Digital Sub = GPR[1] + GPR[2] */
 1565         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_LFE), C_00000000,
 1566                         GPR(1), GPR(2), &pc);
 1567 
 1568         /* Headphones[l/r] = GPR[0/1] */
 1569         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000,
 1570                         C_00000000, GPR(0), &pc);
 1571         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000,
 1572                         C_00000000, GPR(1), &pc);
 1573 
 1574         /* ADC Recording buffer[l/r] = AC97Input[l/r] */
 1575         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000,
 1576                         C_00000000, EXTIN(EXTIN_AC97_L), &pc);
 1577         emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000,
 1578                         C_00000000, EXTIN(EXTIN_AC97_R), &pc);
 1579 
 1580         /* resume normal operations */
 1581         emu_wrptr(sc, 0, DBG, 0);
 1582 }
 1583 
 1584 /* Probe and attach the card */
 1585 static int
 1586 emu_init(struct sc_info *sc)
 1587 {
 1588         u_int32_t spcs, ch, tmp, i;
 1589 
 1590         if (sc->audigy) {
 1591                 /* enable additional AC97 slots */
 1592                 emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE);
 1593         }
 1594 
 1595         /* disable audio and lock cache */
 1596         emu_wr(sc, HCFG,
 1597             HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 1598             4);
 1599 
 1600         /* reset recording buffers */
 1601         emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 1602         emu_wrptr(sc, 0, MICBA, 0);
 1603         emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 1604         emu_wrptr(sc, 0, FXBA, 0);
 1605         emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 1606         emu_wrptr(sc, 0, ADCBA, 0);
 1607 
 1608         /* disable channel interrupt */
 1609         emu_wr(sc, INTE,
 1610             INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE,
 1611             4);
 1612         emu_wrptr(sc, 0, CLIEL, 0);
 1613         emu_wrptr(sc, 0, CLIEH, 0);
 1614         emu_wrptr(sc, 0, SOLEL, 0);
 1615         emu_wrptr(sc, 0, SOLEH, 0);
 1616 
 1617         /* wonder what these do... */
 1618         if (sc->audigy) {
 1619                 emu_wrptr(sc, 0, SPBYPASS, 0xf00);
 1620                 emu_wrptr(sc, 0, AC97SLOT, 0x3);
 1621         }
 1622 
 1623         /* init envelope engine */
 1624         for (ch = 0; ch < NUM_G; ch++) {
 1625                 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
 1626                 emu_wrptr(sc, ch, IP, 0);
 1627                 emu_wrptr(sc, ch, VTFT, 0xffff);
 1628                 emu_wrptr(sc, ch, CVCF, 0xffff);
 1629                 emu_wrptr(sc, ch, PTRX, 0);
 1630                 emu_wrptr(sc, ch, CPF, 0);
 1631                 emu_wrptr(sc, ch, CCR, 0);
 1632 
 1633                 emu_wrptr(sc, ch, PSST, 0);
 1634                 emu_wrptr(sc, ch, DSL, 0x10);
 1635                 emu_wrptr(sc, ch, CCCA, 0);
 1636                 emu_wrptr(sc, ch, Z1, 0);
 1637                 emu_wrptr(sc, ch, Z2, 0);
 1638                 emu_wrptr(sc, ch, FXRT, 0xd01c0000);
 1639 
 1640                 emu_wrptr(sc, ch, ATKHLDM, 0);
 1641                 emu_wrptr(sc, ch, DCYSUSM, 0);
 1642                 emu_wrptr(sc, ch, IFATN, 0xffff);
 1643                 emu_wrptr(sc, ch, PEFE, 0);
 1644                 emu_wrptr(sc, ch, FMMOD, 0);
 1645                 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */
 1646                 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */
 1647                 emu_wrptr(sc, ch, TEMPENV, 0);
 1648 
 1649                 /*** these are last so OFF prevents writing ***/
 1650                 emu_wrptr(sc, ch, LFOVAL2, 0);
 1651                 emu_wrptr(sc, ch, LFOVAL1, 0);
 1652                 emu_wrptr(sc, ch, ATKHLDV, 0);
 1653                 emu_wrptr(sc, ch, ENVVOL, 0);
 1654                 emu_wrptr(sc, ch, ENVVAL, 0);
 1655 
 1656                 if (sc->audigy) {
 1657                         /* audigy cards need this to initialize correctly */
 1658                         emu_wrptr(sc, ch, 0x4c, 0);
 1659                         emu_wrptr(sc, ch, 0x4d, 0);
 1660                         emu_wrptr(sc, ch, 0x4e, 0);
 1661                         emu_wrptr(sc, ch, 0x4f, 0);
 1662                         /* set default routing */
 1663                         emu_wrptr(sc, ch, A_FXRT1, 0x03020100);
 1664                         emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
 1665                         emu_wrptr(sc, ch, A_SENDAMOUNTS, 0);
 1666                 }
 1667 
 1668                 sc->voice[ch].vnum = ch;
 1669                 sc->voice[ch].slave = NULL;
 1670                 sc->voice[ch].busy = 0;
 1671                 sc->voice[ch].ismaster = 0;
 1672                 sc->voice[ch].running = 0;
 1673                 sc->voice[ch].b16 = 0;
 1674                 sc->voice[ch].stereo = 0;
 1675                 sc->voice[ch].speed = 0;
 1676                 sc->voice[ch].start = 0;
 1677                 sc->voice[ch].end = 0;
 1678                 sc->voice[ch].channel = NULL;
 1679         }
 1680         sc->pnum = sc->rnum = 0;
 1681 
 1682         /*
 1683          *  Init to 0x02109204 :
 1684          *  Clock accuracy    = 0     (1000ppm)
 1685          *  Sample Rate       = 2     (48kHz)
 1686          *  Audio Channel     = 1     (Left of 2)
 1687          *  Source Number     = 0     (Unspecified)
 1688          *  Generation Status = 1     (Original for Cat Code 12)
 1689          *  Cat Code          = 12    (Digital Signal Mixer)
 1690          *  Mode              = 0     (Mode 0)
 1691          *  Emphasis          = 0     (None)
 1692          *  CP                = 1     (Copyright unasserted)
 1693          *  AN                = 0     (Audio data)
 1694          *  P                 = 0     (Consumer)
 1695          */
 1696         spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
 1697             SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
 1698             SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 1699             SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
 1700         emu_wrptr(sc, 0, SPCS0, spcs);
 1701         emu_wrptr(sc, 0, SPCS1, spcs);
 1702         emu_wrptr(sc, 0, SPCS2, spcs);
 1703 
 1704         if (!sc->audigy)
 1705                 emu_initefx(sc);
 1706         else if (sc->audigy2) { /* Audigy 2 */
 1707                 /* from ALSA initialization code: */
 1708 
 1709                 /* Hack for Alice3 to work independent of haP16V driver */
 1710                 u_int32_t tmp;
 1711 
 1712                 /* Setup SRCMulti_I2S SamplingRate */
 1713                 tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff;
 1714                 emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400);
 1715 
 1716                 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
 1717                 emu_wr(sc, 0x20, 0x00600000, 4);
 1718                 emu_wr(sc, 0x24, 0x00000014, 4);
 1719 
 1720                 /* Setup SRCMulti Input Audio Enable */
 1721                 emu_wr(sc, 0x20, 0x006e0000, 4);
 1722                 emu_wr(sc, 0x24, 0xff00ff00, 4);
 1723         }
 1724 
 1725         SLIST_INIT(&sc->mem.blocks);
 1726         sc->mem.ptb_pages = emu_malloc(sc, EMUMAXPAGES * sizeof(u_int32_t),
 1727             &sc->mem.ptb_pages_addr);
 1728         if (sc->mem.ptb_pages == NULL)
 1729                 return -1;
 1730 
 1731         sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE,
 1732             &sc->mem.silent_page_addr);
 1733         if (sc->mem.silent_page == NULL) {
 1734                 emu_free(sc, sc->mem.ptb_pages);
 1735                 return -1;
 1736         }
 1737         /* Clear page with silence & setup all pointers to this page */
 1738         bzero(sc->mem.silent_page, EMUPAGESIZE);
 1739         tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
 1740         for (i = 0; i < EMUMAXPAGES; i++)
 1741                 sc->mem.ptb_pages[i] = tmp | i;
 1742 
 1743         emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
 1744         emu_wrptr(sc, 0, TCB, 0);       /* taken from original driver */
 1745         emu_wrptr(sc, 0, TCBS, 0);      /* taken from original driver */
 1746 
 1747         for (ch = 0; ch < NUM_G; ch++) {
 1748                 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
 1749                 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
 1750         }
 1751 
 1752         /* emu_memalloc(sc, EMUPAGESIZE); */
 1753         /*
 1754          *  Hokay, now enable the AUD bit
 1755          *
 1756          *  Audigy
 1757          *   Enable Audio = 0 (enabled after fx processor initialization)
 1758          *   Mute Disable Audio = 0
 1759          *   Joystick = 1
 1760          *
 1761          *  Audigy 2
 1762          *   Enable Audio = 1
 1763          *   Mute Disable Audio = 0
 1764          *   Joystick = 1
 1765          *   GP S/PDIF AC3 Enable = 1
 1766          *   CD S/PDIF AC3 Enable = 1
 1767          *
 1768          *  EMU10K1
 1769          *   Enable Audio = 1
 1770          *   Mute Disable Audio = 0
 1771          *   Lock Tank Memory = 1
 1772          *   Lock Sound Memory = 0
 1773          *   Auto Mute = 1
 1774          */
 1775 
 1776         if (sc->audigy) {
 1777                 tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE;
 1778                 if (sc->audigy2)        /* Audigy 2 */
 1779                         tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF |
 1780                             HCFG_AC3ENABLE_GPSPDIF;
 1781                 emu_wr(sc, HCFG, tmp, 4);
 1782 
 1783                 audigy_initefx(sc);
 1784 
 1785                 /* from ALSA initialization code: */
 1786 
 1787                 /* enable audio and disable both audio/digital outputs */
 1788                 emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4);
 1789                 emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD,
 1790                     4);
 1791                 if (sc->audigy2) {      /* Audigy 2 */
 1792                         /* Unmute Analog.
 1793                          * Set GPO6 to 1 for Apollo. This has to be done after
 1794                          * init Alice3 I2SOut beyond 48kHz.
 1795                          * So, sequence is important.
 1796                          */
 1797                         emu_wr(sc, A_IOCFG,
 1798                             emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4);
 1799                 }
 1800         } else {
 1801                 /* EMU10K1 initialization code */
 1802                 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK 
 1803                     | HCFG_AUTOMUTE;
 1804                 if (sc->rev >= 6)
 1805                         tmp |= HCFG_JOYENABLE;
 1806 
 1807                 emu_wr(sc, HCFG, tmp, 4);
 1808 
 1809                 /* TOSLink detection */
 1810                 sc->tos_link = 0;
 1811                 tmp = emu_rd(sc, HCFG, 4);
 1812                 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 1813                         emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4);
 1814                         DELAY(50);
 1815                         if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) {
 1816                                 sc->tos_link = 1;
 1817                                 emu_wr(sc, HCFG, tmp, 4);
 1818                         }
 1819                 }
 1820         }
 1821 
 1822         return 0;
 1823 }
 1824 
 1825 static int
 1826 emu_uninit(struct sc_info *sc)
 1827 {
 1828         u_int32_t ch;
 1829 
 1830         emu_wr(sc, INTE, 0, 4);
 1831         for (ch = 0; ch < NUM_G; ch++)
 1832                 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
 1833         for (ch = 0; ch < NUM_G; ch++) {
 1834                 emu_wrptr(sc, ch, VTFT, 0);
 1835                 emu_wrptr(sc, ch, CVCF, 0);
 1836                 emu_wrptr(sc, ch, PTRX, 0);
 1837                 emu_wrptr(sc, ch, CPF, 0);
 1838         }
 1839 
 1840         if (sc->audigy) {       /* stop fx processor */
 1841                 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 1842         }
 1843 
 1844         /* disable audio and lock cache */
 1845         emu_wr(sc, HCFG,
 1846             HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 1847             4);
 1848 
 1849         emu_wrptr(sc, 0, PTB, 0);
 1850         /* reset recording buffers */
 1851         emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 1852         emu_wrptr(sc, 0, MICBA, 0);
 1853         emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 1854         emu_wrptr(sc, 0, FXBA, 0);
 1855         emu_wrptr(sc, 0, FXWC, 0);
 1856         emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 1857         emu_wrptr(sc, 0, ADCBA, 0);
 1858         emu_wrptr(sc, 0, TCB, 0);
 1859         emu_wrptr(sc, 0, TCBS, 0);
 1860 
 1861         /* disable channel interrupt */
 1862         emu_wrptr(sc, 0, CLIEL, 0);
 1863         emu_wrptr(sc, 0, CLIEH, 0);
 1864         emu_wrptr(sc, 0, SOLEL, 0);
 1865         emu_wrptr(sc, 0, SOLEH, 0);
 1866 
 1867         /* init envelope engine */
 1868         if (!SLIST_EMPTY(&sc->mem.blocks))
 1869                 device_printf(sc->dev, "warning: memblock list not empty\n");
 1870         emu_free(sc, sc->mem.ptb_pages);
 1871         emu_free(sc, sc->mem.silent_page);
 1872 
 1873         return 0;
 1874 }
 1875 
 1876 static int
 1877 emu_pci_probe(device_t dev)
 1878 {
 1879         char *s = NULL;
 1880 
 1881         switch (pci_get_devid(dev)) {
 1882         case EMU10K1_PCI_ID:
 1883                 s = "Creative EMU10K1";
 1884                 break;
 1885 
 1886         case EMU10K2_PCI_ID:
 1887                 if (pci_get_revid(dev) == 0x04)
 1888                         s = "Creative Audigy 2 (EMU10K2)";
 1889                 else
 1890                         s = "Creative Audigy (EMU10K2)";
 1891                 break;
 1892 
 1893         default:
 1894                 return ENXIO;
 1895         }
 1896 
 1897         device_set_desc(dev, s);
 1898         return 0;
 1899 }
 1900 
 1901 static int
 1902 emu_pci_attach(device_t dev)
 1903 {
 1904         struct ac97_info *codec = NULL;
 1905         struct sc_info *sc;
 1906         u_int32_t data;
 1907         int i, gotmic;
 1908         char status[SND_STATUSLEN];
 1909 
 1910         if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) {
 1911                 device_printf(dev, "cannot allocate softc\n");
 1912                 return ENXIO;
 1913         }
 1914 
 1915         sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc");
 1916         sc->dev = dev;
 1917         sc->type = pci_get_devid(dev);
 1918         sc->rev = pci_get_revid(dev);
 1919         sc->audigy = (sc->type == EMU10K2_PCI_ID);
 1920         sc->audigy2 = (sc->audigy && sc->rev == 0x04);
 1921         sc->nchans = sc->audigy ? 8 : 4;
 1922         sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
 1923 
 1924         data = pci_read_config(dev, PCIR_COMMAND, 2);
 1925         data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
 1926         pci_write_config(dev, PCIR_COMMAND, data, 2);
 1927         data = pci_read_config(dev, PCIR_COMMAND, 2);
 1928 
 1929         i = PCIR_BAR(0);
 1930         sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
 1931         if (sc->reg == NULL) {
 1932                 device_printf(dev, "unable to map register space\n");
 1933                 goto bad;
 1934         }
 1935         sc->st = rman_get_bustag(sc->reg);
 1936         sc->sh = rman_get_bushandle(sc->reg);
 1937 
 1938         sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536);
 1939 
 1940         if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
 1941                 /*lowaddr*/1 << 31, /* can only access 0-2gb */
 1942                 /*highaddr*/BUS_SPACE_MAXADDR,
 1943                 /*filter*/NULL, /*filterarg*/NULL,
 1944                 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
 1945                 /*flags*/0, /*lockfunc*/busdma_lock_mutex,
 1946                 /*lockarg*/&Giant, &sc->parent_dmat) != 0) {
 1947                 device_printf(dev, "unable to create dma tag\n");
 1948                 goto bad;
 1949         }
 1950 
 1951         if (emu_init(sc) == -1) {
 1952                 device_printf(dev, "unable to initialize the card\n");
 1953                 goto bad;
 1954         }
 1955 
 1956         codec = AC97_CREATE(dev, sc, emu_ac97);
 1957         if (codec == NULL) goto bad;
 1958         gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0;
 1959         if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad;
 1960 
 1961         i = 0;
 1962         sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
 1963             RF_ACTIVE | RF_SHAREABLE);
 1964         if (!sc->irq ||
 1965             snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) {
 1966                 device_printf(dev, "unable to map interrupt\n");
 1967                 goto bad;
 1968         }
 1969 
 1970         snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s",
 1971             rman_get_start(sc->reg), rman_get_start(sc->irq),
 1972             PCM_KLDSTRING(snd_emu10k1));
 1973 
 1974         if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad;
 1975         for (i = 0; i < sc->nchans; i++)
 1976                 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc);
 1977         for (i = 0; i < (gotmic ? 3 : 2); i++)
 1978                 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc);
 1979 
 1980         pcm_setstatus(dev, status);
 1981 
 1982         return 0;
 1983 
 1984 bad:
 1985         if (codec) ac97_destroy(codec);
 1986         if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
 1987         if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih);
 1988         if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
 1989         if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat);
 1990         if (sc->lock) snd_mtxfree(sc->lock);
 1991         free(sc, M_DEVBUF);
 1992         return ENXIO;
 1993 }
 1994 
 1995 static int
 1996 emu_pci_detach(device_t dev)
 1997 {
 1998         int r;
 1999         struct sc_info *sc;
 2000 
 2001         r = pcm_unregister(dev);
 2002         if (r)
 2003                 return r;
 2004 
 2005         sc = pcm_getdevinfo(dev);
 2006         /* shutdown chip */
 2007         emu_uninit(sc);
 2008 
 2009         bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
 2010         bus_teardown_intr(dev, sc->irq, sc->ih);
 2011         bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
 2012         bus_dma_tag_destroy(sc->parent_dmat);
 2013         snd_mtxfree(sc->lock);
 2014         free(sc, M_DEVBUF);
 2015 
 2016         return 0;
 2017 }
 2018 
 2019 /* add suspend, resume */
 2020 static device_method_t emu_methods[] = {
 2021         /* Device interface */
 2022         DEVMETHOD(device_probe,         emu_pci_probe),
 2023         DEVMETHOD(device_attach,        emu_pci_attach),
 2024         DEVMETHOD(device_detach,        emu_pci_detach),
 2025 
 2026         { 0, 0 }
 2027 };
 2028 
 2029 static driver_t emu_driver = {
 2030         "pcm",
 2031         emu_methods,
 2032         PCM_SOFTC_SIZE,
 2033 };
 2034 
 2035 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0);
 2036 MODULE_DEPEND(snd_emu10k1, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
 2037 MODULE_VERSION(snd_emu10k1, 1);
 2038 
 2039 /* dummy driver to silence the joystick device */
 2040 static int
 2041 emujoy_pci_probe(device_t dev)
 2042 {
 2043         char *s = NULL;
 2044 
 2045         switch (pci_get_devid(dev)) {
 2046         case 0x70021102:
 2047                 s = "Creative EMU10K1 Joystick";
 2048                 device_quiet(dev);
 2049                 break;
 2050         case 0x70031102:
 2051                 s = "Creative EMU10K2 Joystick";
 2052                 device_quiet(dev);
 2053                 break;
 2054         }
 2055 
 2056         if (s) device_set_desc(dev, s);
 2057         return s ? -1000 : ENXIO;
 2058 }
 2059 
 2060 static int
 2061 emujoy_pci_attach(device_t dev)
 2062 {
 2063         return 0;
 2064 }
 2065 
 2066 static int
 2067 emujoy_pci_detach(device_t dev)
 2068 {
 2069         return 0;
 2070 }
 2071 
 2072 static device_method_t emujoy_methods[] = {
 2073         DEVMETHOD(device_probe,         emujoy_pci_probe),
 2074         DEVMETHOD(device_attach,        emujoy_pci_attach),
 2075         DEVMETHOD(device_detach,        emujoy_pci_detach),
 2076 
 2077         { 0, 0 }
 2078 };
 2079 
 2080 static driver_t emujoy_driver = {
 2081         "emujoy",
 2082         emujoy_methods,
 2083         8,
 2084 };
 2085 
 2086 static devclass_t emujoy_devclass;
 2087 
 2088 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0);
 2089 

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