Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/sound/pci/emu10kx.c
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1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 5 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32 #include <sys/param.h> 33 #include <sys/types.h> 34 #include <sys/bus.h> 35 #include <machine/bus.h> 36 #include <sys/rman.h> 37 #include <sys/systm.h> 38 #include <sys/sbuf.h> 39 #include <sys/queue.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/sysctl.h> 43 #include <sys/kdb.h> 44 45 #include <dev/pci/pcireg.h> 46 #include <dev/pci/pcivar.h> 47 48 #include <machine/clock.h> /* for DELAY */ 49 50 #ifdef HAVE_KERNEL_OPTION_HEADERS 51 #include "opt_snd.h" 52 #endif 53 54 #include <dev/sound/chip.h> 55 #include <dev/sound/pcm/sound.h> 56 #include <dev/sound/pcm/ac97.h> 57 58 #include <dev/sound/pci/emuxkireg.h> 59 #include <dev/sound/pci/emu10kx.h> 60 61 /* hw flags */ 62 #define HAS_51 0x0001 63 #define HAS_71 0x0002 64 #define HAS_AC97 0x0004 65 66 #define IS_EMU10K1 0x0008 67 #define IS_EMU10K2 0x0010 68 #define IS_CA0102 0x0020 69 #define IS_CA0108 0x0040 70 #define IS_UNKNOWN 0x0080 71 72 #define BROKEN_DIGITAL 0x0100 73 #define DIGITAL_ONLY 0x0200 74 75 #define IS_CARDBUS 0x0400 76 77 #define MODE_ANALOG 1 78 #define MODE_DIGITAL 2 79 #define SPDIF_MODE_PCM 1 80 #define SPDIF_MODE_AC3 2 81 82 #define MACS 0x0 83 #define MACS1 0x1 84 #define MACW 0x2 85 #define MACW1 0x3 86 #define MACINTS 0x4 87 #define MACINTW 0x5 88 #define ACC3 0x6 89 #define MACMV 0x7 90 #define ANDXOR 0x8 91 #define TSTNEG 0x9 92 #define LIMIT 0xA 93 #define LIMIT1 0xB 94 #define LOG 0xC 95 #define EXP 0xD 96 #define INTERP 0xE 97 #define SKIP 0xF 98 99 #define GPR(i) (sc->gpr_base+(i)) 100 #define INP(i) (sc->input_base+(i)) 101 #define OUTP(i) (sc->output_base+(i)) 102 #define FX(i) (i) 103 #define FX2(i) (sc->efxc_base+(i)) 104 #define DSP_CONST(i) (sc->dsp_zero+(i)) 105 106 #define COND_NORMALIZED DSP_CONST(0x1) 107 #define COND_BORROW DSP_CONST(0x2) 108 #define COND_MINUS DSP_CONST(0x3) 109 #define COND_LESS_ZERO DSP_CONST(0x4) 110 #define COND_EQ_ZERO DSP_CONST(0x5) 111 #define COND_SATURATION DSP_CONST(0x6) 112 #define COND_NEQ_ZERO DSP_CONST(0x8) 113 114 #define DSP_ACCUM DSP_CONST(0x16) 115 #define DSP_CCR DSP_CONST(0x17) 116 117 /* Live! Inputs */ 118 #define IN_AC97_L 0x00 119 #define IN_AC97_R 0x01 120 #define IN_AC97 IN_AC97_L 121 #define IN_SPDIF_CD_L 0x02 122 #define IN_SPDIF_CD_R 0x03 123 #define IN_SPDIF_CD IN_SPDIF_CD_L 124 #define IN_ZOOM_L 0x04 125 #define IN_ZOOM_R 0x05 126 #define IN_ZOOM IN_ZOOM_L 127 #define IN_TOSLINK_L 0x06 128 #define IN_TOSLINK_R 0x07 129 #define IN_TOSLINK IN_TOSLINK_L 130 #define IN_LINE1_L 0x08 131 #define IN_LINE1_R 0x09 132 #define IN_LINE1 IN_LINE1_L 133 #define IN_COAX_SPDIF_L 0x0a 134 #define IN_COAX_SPDIF_R 0x0b 135 #define IN_COAX_SPDIF IN_COAX_SPDIF_L 136 #define IN_LINE2_L 0x0c 137 #define IN_LINE2_R 0x0d 138 #define IN_LINE2 IN_LINE2_L 139 #define IN_0E 0x0e 140 #define IN_0F 0x0f 141 142 /* Outputs */ 143 #define OUT_AC97_L 0x00 144 #define OUT_AC97_R 0x01 145 #define OUT_AC97 OUT_AC97_L 146 #define OUT_A_FRONT OUT_AC97 147 #define OUT_TOSLINK_L 0x02 148 #define OUT_TOSLINK_R 0x03 149 #define OUT_TOSLINK OUT_TOSLINK_L 150 #define OUT_D_CENTER 0x04 151 #define OUT_D_SUB 0x05 152 #define OUT_HEADPHONE_L 0x06 153 #define OUT_HEADPHONE_R 0x07 154 #define OUT_HEADPHONE OUT_HEADPHONE_L 155 #define OUT_REAR_L 0x08 156 #define OUT_REAR_R 0x09 157 #define OUT_REAR OUT_REAR_L 158 #define OUT_ADC_REC_L 0x0a 159 #define OUT_ADC_REC_R 0x0b 160 #define OUT_ADC_REC OUT_ADC_REC_L 161 #define OUT_MIC_CAP 0x0c 162 163 /* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */ 164 #define OUT_A_CENTER 0x11 165 #define OUT_A_SUB 0x12 166 167 /* Audigy Inputs */ 168 #define A_IN_AC97_L 0x00 169 #define A_IN_AC97_R 0x01 170 #define A_IN_AC97 A_IN_AC97_L 171 #define A_IN_SPDIF_CD_L 0x02 172 #define A_IN_SPDIF_CD_R 0x03 173 #define A_IN_SPDIF_CD A_IN_SPDIF_CD_L 174 #define A_IN_O_SPDIF_L 0x04 175 #define A_IN_O_SPDIF_R 0x05 176 #define A_IN_O_SPDIF A_IN_O_SPDIF_L 177 #define A_IN_LINE2_L 0x08 178 #define A_IN_LINE2_R 0x09 179 #define A_IN_LINE2 A_IN_LINE2_L 180 #define A_IN_R_SPDIF_L 0x0a 181 #define A_IN_R_SPDIF_R 0x0b 182 #define A_IN_R_SPDIF A_IN_R_SPDIF_L 183 #define A_IN_AUX2_L 0x0c 184 #define A_IN_AUX2_R 0x0d 185 #define A_IN_AUX2 A_IN_AUX2_L 186 187 /* Audigy Outputs */ 188 #define A_OUT_D_FRONT_L 0x00 189 #define A_OUT_D_FRONT_R 0x01 190 #define A_OUT_D_FRONT A_OUT_D_FRONT_L 191 #define A_OUT_D_CENTER 0x02 192 #define A_OUT_D_SUB 0x03 193 #define A_OUT_D_SIDE_L 0x04 194 #define A_OUT_D_SIDE_R 0x05 195 #define A_OUT_D_SIDE A_OUT_D_SIDE_L 196 #define A_OUT_D_REAR_L 0x06 197 #define A_OUT_D_REAR_R 0x07 198 #define A_OUT_D_REAR A_OUT_D_REAR_L 199 200 /* on Audigy Platinum only */ 201 #define A_OUT_HPHONE_L 0x04 202 #define A_OUT_HPHONE_R 0x05 203 #define A_OUT_HPHONE A_OUT_HPHONE_L 204 205 #define A_OUT_A_FRONT_L 0x08 206 #define A_OUT_A_FRONT_R 0x09 207 #define A_OUT_A_FRONT A_OUT_A_FRONT_L 208 #define A_OUT_A_CENTER 0x0a 209 #define A_OUT_A_SUB 0x0b 210 #define A_OUT_A_SIDE_L 0x0c 211 #define A_OUT_A_SIDE_R 0x0d 212 #define A_OUT_A_SIDE A_OUT_A_SIDE_L 213 #define A_OUT_A_REAR_L 0x0e 214 #define A_OUT_A_REAR_R 0x0f 215 #define A_OUT_A_REAR A_OUT_A_REAR_L 216 #define A_OUT_AC97_L 0x10 217 #define A_OUT_AC97_R 0x11 218 #define A_OUT_AC97 A_OUT_AC97_L 219 #define A_OUT_ADC_REC_L 0x16 220 #define A_OUT_ADC_REC_R 0x17 221 #define A_OUT_ADC_REC A_OUT_ADC_REC_L 222 223 #define EMU_DATA2 0x24 224 #define EMU_IPR2 0x28 225 #define EMU_INTE2 0x2c 226 #define EMU_IPR3 0x38 227 #define EMU_INTE3 0x3c 228 229 #define EMU_A2_SRCSel 0x60 230 #define EMU_A2_SRCMULTI_ENABLE 0x6e 231 232 #define EMU_A_I2S_CAPTURE_96000 0x00000400 233 234 #define EMU_A2_MIXER_I2S_ENABLE 0x7B 235 #define EMU_A2_MIXER_SPDIF_ENABLE 0x7A 236 237 #define C_FRONT_L 0 238 #define C_FRONT_R 1 239 #define C_REC_L 2 240 #define C_REC_R 3 241 #define C_REAR_L 4 242 #define C_REAR_R 5 243 #define C_CENTER 6 244 #define C_SUB 7 245 #define C_SIDE_L 8 246 #define C_SIDE_R 9 247 #define NUM_CACHES 10 248 249 #define CDSPDIFMUTE 0 250 #define ANALOGMUTE 1 251 #define NUM_MUTE 2 252 253 #define EMU_MAX_GPR 512 254 #define EMU_MAX_IRQ_CONSUMERS 32 255 256 struct emu_voice { 257 int vnum; 258 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1; 259 int speed; 260 int start; 261 int end; 262 int vol; 263 uint32_t buf; 264 void *vbuf; 265 struct emu_voice *slave; 266 uint32_t sa; 267 uint32_t ea; 268 uint32_t routing[8]; 269 uint32_t amounts[8]; 270 }; 271 272 struct emu_memblk { 273 SLIST_ENTRY(emu_memblk) link; 274 void *buf; 275 char owner[16]; 276 bus_addr_t buf_addr; 277 uint32_t pte_start, pte_size; 278 bus_dmamap_t buf_map; 279 }; 280 281 struct emu_mem { 282 uint8_t bmap[EMU_MAXPAGES / 8]; 283 uint32_t *ptb_pages; 284 void *silent_page; 285 bus_addr_t ptb_pages_addr; 286 bus_addr_t silent_page_addr; 287 bus_dmamap_t ptb_map; 288 bus_dmamap_t silent_map; 289 bus_dma_tag_t dmat; 290 struct emu_sc_info *card; 291 SLIST_HEAD(, emu_memblk) blocks; 292 }; 293 294 /* rm */ 295 struct emu_rm { 296 struct emu_sc_info *card; 297 struct mtx gpr_lock; 298 signed int allocmap[EMU_MAX_GPR]; 299 int num_gprs; 300 int last_free_gpr; 301 int num_used; 302 }; 303 304 struct emu_intr_handler { 305 void* softc; 306 uint32_t intr_mask; 307 uint32_t inte_mask; 308 uint32_t(*irq_func) (void *softc, uint32_t irq); 309 }; 310 311 struct emu_sc_info { 312 struct mtx lock; 313 struct mtx rw; /* Hardware exclusive access lock */ 314 315 /* Hardware and subdevices */ 316 device_t dev; 317 device_t pcm[RT_COUNT]; 318 device_t midi[2]; 319 uint32_t type; 320 uint32_t rev; 321 322 bus_space_tag_t st; 323 bus_space_handle_t sh; 324 325 struct cdev *cdev; /* /dev/emu10k character device */ 326 struct mtx emu10kx_lock; 327 int emu10kx_isopen; 328 struct sbuf emu10kx_sbuf; 329 int emu10kx_bufptr; 330 331 /* Resources */ 332 struct resource *reg; 333 struct resource *irq; 334 void *ih; 335 336 /* IRQ handlers */ 337 struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS]; 338 339 /* Card HW configuration */ 340 unsigned int mode; /* analog / digital */ 341 unsigned int mchannel_fx; 342 unsigned int dsp_zero; 343 unsigned int code_base; 344 unsigned int code_size; 345 unsigned int gpr_base; 346 unsigned int num_gprs; 347 unsigned int input_base; 348 unsigned int output_base; 349 unsigned int efxc_base; 350 unsigned int opcode_shift; 351 unsigned int high_operand_shift; 352 unsigned int address_mask; 353 uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1, 354 has_ac97:1, has_51:1, has_71:1, 355 enable_ir:1, 356 broken_digital:1, is_cardbus:1; 357 358 signed int mch_disabled, mch_rec, dbg_level; 359 signed int num_inputs; 360 unsigned int num_outputs; 361 unsigned int num_fxbuses; 362 unsigned int routing_code_start; 363 unsigned int routing_code_end; 364 365 /* HW resources */ 366 struct emu_voice voice[NUM_G]; /* Hardware voices */ 367 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */ 368 int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */ 369 int timerinterval; 370 struct emu_rm *rm; 371 struct emu_mem mem; /* memory */ 372 373 /* Mixer */ 374 int mixer_gpr[NUM_MIXERS]; 375 int mixer_volcache[NUM_MIXERS]; 376 int cache_gpr[NUM_CACHES]; 377 int dummy_gpr; 378 int mute_gpr[NUM_MUTE]; 379 struct sysctl_ctx_list *ctx; 380 struct sysctl_oid *root; 381 }; 382 383 static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error); 384 static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, bus_dmamap_t *map); 385 static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map); 386 static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner); 387 static int emu_memfree(struct emu_mem *mem, void *membuf); 388 static int emu_memstart(struct emu_mem *mem, void *membuf); 389 390 /* /dev */ 391 static int emu10kx_dev_init(struct emu_sc_info *sc); 392 static int emu10kx_dev_uninit(struct emu_sc_info *sc); 393 static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s); 394 395 static void emumix_set_mode(struct emu_sc_info *sc, int mode); 396 static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode); 397 static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol); 398 static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val); 399 static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS); 400 401 static int emu_rm_init(struct emu_sc_info *sc); 402 static int emu_rm_uninit(struct emu_sc_info *sc); 403 static int emu_rm_gpr_alloc(struct emu_rm *rm, int count); 404 405 static unsigned int emu_getcard(device_t dev); 406 static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size); 407 static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size); 408 static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data); 409 410 static void emu_vstop(struct emu_sc_info *sc, char channel, int enable); 411 412 static void emu_intr(void *p); 413 static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data); 414 static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc); 415 static void emu_initefx(struct emu_sc_info *sc); 416 417 static int emu_cardbus_init(struct emu_sc_info *sc); 418 static int emu_init(struct emu_sc_info *sc); 419 static int emu_uninit(struct emu_sc_info *sc); 420 421 static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result); 422 static int emu_write_ivar(device_t bus __unused, device_t dev __unused, 423 int ivar_index, uintptr_t value __unused); 424 425 static int emu_pci_probe(device_t dev); 426 static int emu_pci_attach(device_t dev); 427 static int emu_pci_detach(device_t dev); 428 static int emu_modevent(module_t mod __unused, int cmd, void *data __unused); 429 430 #ifdef SND_EMU10KX_DEBUG 431 432 #define EMU_MTX_DEBUG() do { \ 433 if (mtx_owned(&sc->rw)) { \ 434 printf("RW owned in %s line %d for %s\n", __func__, \ 435 __LINE__ , device_get_nameunit(sc->dev)); \ 436 printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \ 437 printf("rw lock: value %x thread %x\n", \ 438 ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \ 439 (uintptr_t)curthread); \ 440 printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\ 441 db_show_mtx(&sc->rw); \ 442 } \ 443 } while (0) 444 #else 445 #define EMU_MTX_DEBUG() do { \ 446 } while (0) 447 #endif 448 449 #define EMU_RWLOCK() do { \ 450 EMU_MTX_DEBUG(); \ 451 mtx_lock(&(sc->rw)); \ 452 } while (0) 453 454 #define EMU_RWUNLOCK() do { \ 455 mtx_unlock(&(sc->rw)); \ 456 EMU_MTX_DEBUG(); \ 457 } while (0) 458 459 /* Supported cards */ 460 struct emu_hwinfo { 461 uint16_t vendor; 462 uint16_t device; 463 uint16_t subvendor; 464 uint16_t subdevice; 465 char SBcode[8]; 466 char desc[32]; 467 int flags; 468 }; 469 470 static struct emu_hwinfo emu_cards[] = { 471 {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0}, 472 /* 0x0020..0x002f 4.0 EMU10K1 cards */ 473 {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 474 {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1}, 475 {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1}, 476 477 /* (range unknown) 5.1 EMU10K1 cards */ 478 {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 479 480 /* 0x80??..0x805? 4.0 EMU10K1 cards */ 481 {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 482 {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1}, 483 {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 484 {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1}, 485 {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 486 {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 487 {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1}, 488 {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 489 {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 490 {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 491 492 /* 0x8061..0x???? 5.1 EMU10K1 cards */ 493 {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 494 {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1}, 495 {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 496 {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 497 {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 498 {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1}, 499 500 /* Generic SB Live! */ 501 {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1}, 502 503 /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */ 504 505 /* 0x0051..0x0051 5.1 CA0100-IAF cards */ 506 {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2}, 507 /* ES is CA0100-IDF chip that don't work in digital mode */ 508 {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL}, 509 /* 0x0053..0x005C 5.1 CA0101-NAF cards */ 510 {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 511 {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 512 513 /* 0x1002..0x1009 5.1 CA0102-IAT cards */ 514 {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102}, 515 {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102}, 516 {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102}, 517 518 /* 0x2001..0x2003 7.1 CA0102-ICT cards */ 519 {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 520 {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 521 /* XXX No reports about 0x2003 & 0x2004 cards */ 522 {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 523 {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 524 {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 525 526 /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */ 527 {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102}, 528 529 /* Generic Audigy or Audigy 2 */ 530 {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2}, 531 532 /* We don't support CA0103-DAT (Audigy LS) cards */ 533 /* There is NO CA0104-xxx cards */ 534 /* There is NO CA0105-xxx cards */ 535 /* We don't support CA0106-DAT (SB Live! 24 bit) cards */ 536 /* There is NO CA0107-xxx cards */ 537 538 /* 0x1000..0x1001 7.1 CA0108-IAT cards */ 539 {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY}, 540 {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 541 {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 542 543 {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS}, 544 545 {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108}, 546 }; 547 /* Unsupported cards */ 548 549 static struct emu_hwinfo emu_bad_cards[] = { 550 /* APS cards should be possible to support */ 551 {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0}, 552 {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0}, 553 {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0}, 554 /* Similar-named ("Live!" or "Audigy") cards on different chipsets */ 555 {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0}, 556 {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0}, 557 {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0}, 558 }; 559 560 /* 561 * Get best known information about device. 562 */ 563 static unsigned int 564 emu_getcard(device_t dev) 565 { 566 uint16_t device; 567 uint16_t subdevice; 568 unsigned int thiscard; 569 int i; 570 571 device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2); 572 subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2); 573 574 thiscard = 0; 575 for (i = 1; i < nitems(emu_cards); i++) { 576 if (device == emu_cards[i].device) { 577 if (subdevice == emu_cards[i].subdevice) { 578 thiscard = i; 579 break; 580 } 581 if (0x0000 == emu_cards[i].subdevice) { 582 thiscard = i; 583 /* 584 * don't break, we can get more specific card 585 * later in the list. 586 */ 587 } 588 } 589 } 590 591 for (i = 0; i < nitems(emu_bad_cards); i++) { 592 if (device == emu_bad_cards[i].device) { 593 if (subdevice == emu_bad_cards[i].subdevice) { 594 thiscard = 0; 595 break; 596 } 597 if (0x0000 == emu_bad_cards[i].subdevice) { 598 thiscard = 0; 599 break; /* we avoid all this cards */ 600 } 601 } 602 } 603 return (thiscard); 604 } 605 606 /* 607 * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers. 608 * Some of them are used directly, some of them provide pointer / data pairs. 609 */ 610 static uint32_t 611 emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 612 { 613 614 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 615 switch (size) { 616 case 1: 617 return (bus_space_read_1(sc->st, sc->sh, regno)); 618 case 2: 619 return (bus_space_read_2(sc->st, sc->sh, regno)); 620 case 4: 621 return (bus_space_read_4(sc->st, sc->sh, regno)); 622 } 623 return (0xffffffff); 624 } 625 626 static void 627 emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 628 { 629 630 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 631 switch (size) { 632 case 1: 633 bus_space_write_1(sc->st, sc->sh, regno, data); 634 break; 635 case 2: 636 bus_space_write_2(sc->st, sc->sh, regno, data); 637 break; 638 case 4: 639 bus_space_write_4(sc->st, sc->sh, regno, data); 640 break; 641 } 642 } 643 /* 644 * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made 645 * via (channel, register) pair. Some registers are channel-specific, 646 * some not. 647 */ 648 uint32_t 649 emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg) 650 { 651 uint32_t ptr, val, mask, size, offset; 652 653 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 654 655 EMU_RWLOCK(); 656 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 657 val = emu_rd_nolock(sc, EMU_DATA, 4); 658 EMU_RWUNLOCK(); 659 660 /* 661 * XXX Some register numbers has data size and offset encoded in 662 * it to get only part of 32bit register. This use is not described 663 * in register name, be careful! 664 */ 665 if (reg & 0xff000000) { 666 size = (reg >> 24) & 0x3f; 667 offset = (reg >> 16) & 0x1f; 668 mask = ((1 << size) - 1) << offset; 669 val &= mask; 670 val >>= offset; 671 } 672 return (val); 673 } 674 675 void 676 emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data) 677 { 678 uint32_t ptr, mask, size, offset; 679 680 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 681 682 EMU_RWLOCK(); 683 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 684 /* 685 * XXX Another kind of magic encoding in register number. This can 686 * give you side effect - it will read previous data from register 687 * and change only required bits. 688 */ 689 if (reg & 0xff000000) { 690 size = (reg >> 24) & 0x3f; 691 offset = (reg >> 16) & 0x1f; 692 mask = ((1 << size) - 1) << offset; 693 data <<= offset; 694 data &= mask; 695 data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask; 696 } 697 emu_wr_nolock(sc, EMU_DATA, data, 4); 698 EMU_RWUNLOCK(); 699 } 700 /* 701 * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made 702 * via (channel, register) pair. Some registers are channel-specific, 703 * some not. This interface is supported by CA0102 and CA0108 chips only. 704 */ 705 uint32_t 706 emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg) 707 { 708 uint32_t val; 709 710 /* XXX separate lock? */ 711 EMU_RWLOCK(); 712 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 713 val = emu_rd_nolock(sc, EMU_DATA2, 4); 714 715 EMU_RWUNLOCK(); 716 717 return (val); 718 } 719 720 void 721 emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data) 722 { 723 724 EMU_RWLOCK(); 725 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 726 emu_wr_nolock(sc, EMU_DATA2, data, 4); 727 EMU_RWUNLOCK(); 728 } 729 /* 730 * XXX CardBus interface. Not tested on any real hardware. 731 */ 732 static void 733 emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data) 734 { 735 736 /* 737 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems 738 * to be some reg/value accessible kind of config register on CardBus 739 * CA0108, with value(?) in top 16 bit, address(?) in low 16 740 */ 741 742 emu_rd_nolock(sc, 0x38, 4); 743 emu_wr_nolock(sc, 0x38, data, 4); 744 emu_rd_nolock(sc, 0x38, 4); 745 746 } 747 748 /* 749 * Direct hardware register access 750 * Assume that it is never used to access EMU_PTR-based registers and can run unlocked. 751 */ 752 void 753 emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 754 { 755 KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR")); 756 KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR")); 757 758 emu_wr_nolock(sc, regno, data, size); 759 } 760 761 uint32_t 762 emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 763 { 764 uint32_t rd; 765 766 KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA")); 767 KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2")); 768 769 rd = emu_rd_nolock(sc, regno, size); 770 return (rd); 771 } 772 773 /* 774 * Enabling IR MIDI messages is another kind of black magic. It just 775 * has to be made this way. It really do it. 776 */ 777 void 778 emu_enable_ir(struct emu_sc_info *sc) 779 { 780 uint32_t iocfg; 781 782 if (sc->is_emu10k2 || sc->is_ca0102) { 783 iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2); 784 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2); 785 DELAY(500); 786 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2); 787 DELAY(500); 788 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2); 789 DELAY(100); 790 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2); 791 device_printf(sc->dev, "Audigy IR MIDI events enabled.\n"); 792 sc->enable_ir = 1; 793 } 794 if (sc->is_emu10k1) { 795 iocfg = emu_rd_nolock(sc, EMU_HCFG, 4); 796 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4); 797 DELAY(500); 798 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4); 799 DELAY(100); 800 emu_wr_nolock(sc, EMU_HCFG, iocfg, 4); 801 device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n"); 802 sc->enable_ir = 1; 803 } 804 } 805 806 /* 807 * emu_timer_ - HW timer management 808 */ 809 int 810 emu_timer_create(struct emu_sc_info *sc) 811 { 812 int i, timer; 813 814 timer = -1; 815 816 mtx_lock(&sc->lock); 817 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 818 if (sc->timer[i] == 0) { 819 sc->timer[i] = -1; /* disable it */ 820 timer = i; 821 mtx_unlock(&sc->lock); 822 return (timer); 823 } 824 mtx_unlock(&sc->lock); 825 826 return (-1); 827 } 828 829 int 830 emu_timer_set(struct emu_sc_info *sc, int timer, int delay) 831 { 832 int i; 833 834 if (timer < 0) 835 return (-1); 836 837 RANGE(delay, 16, 1024); 838 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 839 840 mtx_lock(&sc->lock); 841 sc->timer[timer] = delay; 842 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 843 if (sc->timerinterval > sc->timer[i]) 844 sc->timerinterval = sc->timer[i]; 845 846 /* XXX */ 847 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 848 mtx_unlock(&sc->lock); 849 850 return (timer); 851 } 852 853 int 854 emu_timer_enable(struct emu_sc_info *sc, int timer, int go) 855 { 856 uint32_t x; 857 int ena_int; 858 int i; 859 860 if (timer < 0) 861 return (-1); 862 863 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 864 865 mtx_lock(&sc->lock); 866 867 if ((go == 1) && (sc->timer[timer] < 0)) 868 sc->timer[timer] = -sc->timer[timer]; 869 if ((go == 0) && (sc->timer[timer] > 0)) 870 sc->timer[timer] = -sc->timer[timer]; 871 872 ena_int = 0; 873 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 874 if (sc->timerinterval > sc->timer[i]) 875 sc->timerinterval = sc->timer[i]; 876 if (sc->timer[i] > 0) 877 ena_int = 1; 878 } 879 880 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 881 882 if (ena_int == 1) { 883 x = emu_rd(sc, EMU_INTE, 4); 884 x |= EMU_INTE_INTERTIMERENB; 885 emu_wr(sc, EMU_INTE, x, 4); 886 } else { 887 x = emu_rd(sc, EMU_INTE, 4); 888 x &= ~EMU_INTE_INTERTIMERENB; 889 emu_wr(sc, EMU_INTE, x, 4); 890 } 891 mtx_unlock(&sc->lock); 892 return (0); 893 } 894 895 int 896 emu_timer_clear(struct emu_sc_info *sc, int timer) 897 { 898 if (timer < 0) 899 return (-1); 900 901 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 902 903 emu_timer_enable(sc, timer, 0); 904 905 mtx_lock(&sc->lock); 906 if (sc->timer[timer] != 0) 907 sc->timer[timer] = 0; 908 mtx_unlock(&sc->lock); 909 910 return (timer); 911 } 912 913 /* 914 * emu_intr_ - HW interrupt handler management 915 */ 916 int 917 emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc) 918 { 919 int i; 920 uint32_t x; 921 922 mtx_lock(&sc->lock); 923 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 924 if (sc->ihandler[i].inte_mask == 0) { 925 sc->ihandler[i].inte_mask = inte_mask; 926 sc->ihandler[i].intr_mask = intr_mask; 927 sc->ihandler[i].softc = isc; 928 sc->ihandler[i].irq_func = func; 929 x = emu_rd(sc, EMU_INTE, 4); 930 x |= inte_mask; 931 emu_wr(sc, EMU_INTE, x, 4); 932 mtx_unlock(&sc->lock); 933 if (sc->dbg_level > 1) 934 device_printf(sc->dev, "ihandle %d registered\n", i); 935 936 return (i); 937 } 938 mtx_unlock(&sc->lock); 939 if (sc->dbg_level > 1) 940 device_printf(sc->dev, "ihandle not registered\n"); 941 942 return (-1); 943 } 944 945 int 946 emu_intr_unregister(struct emu_sc_info *sc, int hnumber) 947 { 948 uint32_t x; 949 int i; 950 951 mtx_lock(&sc->lock); 952 953 if (sc->ihandler[hnumber].inte_mask == 0) { 954 mtx_unlock(&sc->lock); 955 return (-1); 956 } 957 958 x = emu_rd(sc, EMU_INTE, 4); 959 x &= ~sc->ihandler[hnumber].inte_mask; 960 961 sc->ihandler[hnumber].inte_mask = 0; 962 sc->ihandler[hnumber].intr_mask = 0; 963 sc->ihandler[hnumber].softc = NULL; 964 sc->ihandler[hnumber].irq_func = NULL; 965 966 /* other interrupt handlers may use this EMU_INTE value */ 967 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 968 if (sc->ihandler[i].inte_mask != 0) 969 x |= sc->ihandler[i].inte_mask; 970 971 emu_wr(sc, EMU_INTE, x, 4); 972 973 mtx_unlock(&sc->lock); 974 return (hnumber); 975 } 976 977 static void 978 emu_intr(void *p) 979 { 980 struct emu_sc_info *sc = (struct emu_sc_info *)p; 981 uint32_t stat, ack; 982 int i; 983 984 for (;;) { 985 stat = emu_rd(sc, EMU_IPR, 4); 986 ack = 0; 987 if (stat == 0) 988 break; 989 emu_wr(sc, EMU_IPR, stat, 4); 990 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 991 if ((((sc->ihandler[i].intr_mask) & stat) != 0) && 992 (((void *)sc->ihandler[i].irq_func) != NULL)) { 993 ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc, 994 (sc->ihandler[i].intr_mask) & stat); 995 } 996 } 997 if (sc->dbg_level > 1) 998 if (stat & (~ack)) 999 device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack)); 1000 } 1001 1002 if ((sc->is_ca0102) || (sc->is_ca0108)) 1003 for (;;) { 1004 stat = emu_rd(sc, EMU_IPR2, 4); 1005 ack = 0; 1006 if (stat == 0) 1007 break; 1008 emu_wr(sc, EMU_IPR2, stat, 4); 1009 if (sc->dbg_level > 1) 1010 device_printf(sc->dev, "EMU_IPR2: %08x\n", stat); 1011 1012 break; /* to avoid infinite loop. should be removed 1013 * after completion of P16V interface. */ 1014 } 1015 1016 if (sc->is_ca0102) 1017 for (;;) { 1018 stat = emu_rd(sc, EMU_IPR3, 4); 1019 ack = 0; 1020 if (stat == 0) 1021 break; 1022 emu_wr(sc, EMU_IPR3, stat, 4); 1023 if (sc->dbg_level > 1) 1024 device_printf(sc->dev, "EMU_IPR3: %08x\n", stat); 1025 1026 break; /* to avoid infinite loop. should be removed 1027 * after completion of S/PDIF interface */ 1028 } 1029 } 1030 1031 /* 1032 * Get data from private emu10kx structure for PCM buffer allocation. 1033 * Used by PCM code only. 1034 */ 1035 bus_dma_tag_t 1036 emu_gettag(struct emu_sc_info *sc) 1037 { 1038 return (sc->mem.dmat); 1039 } 1040 1041 static void 1042 emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error) 1043 { 1044 bus_addr_t *phys = (bus_addr_t *) arg; 1045 1046 *phys = error ? 0 : (bus_addr_t) segs->ds_addr; 1047 1048 if (bootverbose) { 1049 printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n", 1050 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1051 nseg, error); 1052 } 1053 } 1054 1055 static void * 1056 emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, 1057 bus_dmamap_t *map) 1058 { 1059 void *dmabuf; 1060 int error; 1061 1062 *addr = 0; 1063 if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, map))) { 1064 if (mem->card->dbg_level > 2) 1065 device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error); 1066 return (NULL); 1067 } 1068 if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) { 1069 if (mem->card->dbg_level > 2) 1070 device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error); 1071 bus_dmamem_free(mem->dmat, dmabuf, *map); 1072 return (NULL); 1073 } 1074 return (dmabuf); 1075 } 1076 1077 static void 1078 emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map) 1079 { 1080 bus_dmamap_unload(mem->dmat, map); 1081 bus_dmamem_free(mem->dmat, dmabuf, map); 1082 } 1083 1084 static void * 1085 emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner) 1086 { 1087 uint32_t blksz, start, idx, ofs, tmp, found; 1088 struct emu_memblk *blk; 1089 void *membuf; 1090 1091 blksz = sz / EMUPAGESIZE; 1092 if (sz > (blksz * EMUPAGESIZE)) 1093 blksz++; 1094 if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) { 1095 if (mem->card->dbg_level > 2) 1096 device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n"); 1097 return (NULL); 1098 } 1099 /* find a free block in the bitmap */ 1100 found = 0; 1101 start = 1; 1102 while (!found && start + blksz < EMU_MAXPAGES) { 1103 found = 1; 1104 for (idx = start; idx < start + blksz; idx++) 1105 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1106 found = 0; 1107 if (!found) 1108 start++; 1109 } 1110 if (!found) { 1111 if (mem->card->dbg_level > 2) 1112 device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n"); 1113 return (NULL); 1114 } 1115 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1116 if (blk == NULL) { 1117 if (mem->card->dbg_level > 2) 1118 device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n"); 1119 return (NULL); 1120 } 1121 bzero(blk, sizeof(*blk)); 1122 membuf = emu_malloc(mem, sz, &blk->buf_addr, &blk->buf_map); 1123 *addr = blk->buf_addr; 1124 if (membuf == NULL) { 1125 if (mem->card->dbg_level > 2) 1126 device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n"); 1127 free(blk, M_DEVBUF); 1128 return (NULL); 1129 } 1130 blk->buf = membuf; 1131 blk->pte_start = start; 1132 blk->pte_size = blksz; 1133 strncpy(blk->owner, owner, 15); 1134 blk->owner[15] = '\0'; 1135 ofs = 0; 1136 for (idx = start; idx < start + blksz; idx++) { 1137 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1138 tmp = (uint32_t) (blk->buf_addr + ofs); 1139 mem->ptb_pages[idx] = (tmp << 1) | idx; 1140 ofs += EMUPAGESIZE; 1141 } 1142 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1143 return (membuf); 1144 } 1145 1146 static int 1147 emu_memfree(struct emu_mem *mem, void *membuf) 1148 { 1149 uint32_t idx, tmp; 1150 struct emu_memblk *blk, *i; 1151 1152 blk = NULL; 1153 SLIST_FOREACH(i, &mem->blocks, link) { 1154 if (i->buf == membuf) 1155 blk = i; 1156 } 1157 if (blk == NULL) 1158 return (EINVAL); 1159 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1160 emu_free(mem, membuf, blk->buf_map); 1161 tmp = (uint32_t) (mem->silent_page_addr) << 1; 1162 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1163 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1164 mem->ptb_pages[idx] = tmp | idx; 1165 } 1166 free(blk, M_DEVBUF); 1167 return (0); 1168 } 1169 1170 static int 1171 emu_memstart(struct emu_mem *mem, void *membuf) 1172 { 1173 struct emu_memblk *blk, *i; 1174 1175 blk = NULL; 1176 SLIST_FOREACH(i, &mem->blocks, link) { 1177 if (i->buf == membuf) 1178 blk = i; 1179 } 1180 if (blk == NULL) 1181 return (-1); 1182 return (blk->pte_start); 1183 } 1184 1185 static uint32_t 1186 emu_rate_to_pitch(uint32_t rate) 1187 { 1188 static uint32_t logMagTable[128] = { 1189 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 1190 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 1191 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 1192 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 1193 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 1194 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 1195 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 1196 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 1197 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 1198 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 1199 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 1200 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 1201 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 1202 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 1203 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 1204 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 1205 }; 1206 static char logSlopeTable[128] = { 1207 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 1208 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 1209 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 1210 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 1211 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 1212 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 1213 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 1214 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 1215 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 1216 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 1217 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 1218 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 1219 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 1220 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 1221 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 1222 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 1223 }; 1224 int i; 1225 1226 if (rate == 0) 1227 return (0); 1228 rate *= 11185; /* Scale 48000 to 0x20002380 */ 1229 for (i = 31; i > 0; i--) { 1230 if (rate & 0x80000000) { /* Detect leading "1" */ 1231 return (((uint32_t) (i - 15) << 20) + 1232 logMagTable[0x7f & (rate >> 24)] + 1233 (0x7f & (rate >> 17)) * 1234 logSlopeTable[0x7f & (rate >> 24)]); 1235 } 1236 rate <<= 1; 1237 } 1238 /* NOTREACHED */ 1239 return (0); 1240 } 1241 1242 static uint32_t 1243 emu_rate_to_linearpitch(uint32_t rate) 1244 { 1245 rate = (rate << 8) / 375; 1246 return ((rate >> 1) + (rate & 1)); 1247 } 1248 1249 struct emu_voice * 1250 emu_valloc(struct emu_sc_info *sc) 1251 { 1252 struct emu_voice *v; 1253 int i; 1254 1255 v = NULL; 1256 mtx_lock(&sc->lock); 1257 for (i = 0; i < NUM_G && sc->voice[i].busy; i++); 1258 if (i < NUM_G) { 1259 v = &sc->voice[i]; 1260 v->busy = 1; 1261 } 1262 mtx_unlock(&sc->lock); 1263 return (v); 1264 } 1265 1266 void 1267 emu_vfree(struct emu_sc_info *sc, struct emu_voice *v) 1268 { 1269 1270 mtx_lock(&sc->lock); 1271 for (int i = 0; i < NUM_G; i++) { 1272 if (v == &sc->voice[i] && sc->voice[i].busy) { 1273 v->busy = 0; 1274 /* 1275 * XXX What we should do with mono channels? 1276 * See -pcm.c emupchan_init for other side of 1277 * this problem 1278 */ 1279 if (v->slave != NULL) 1280 emu_memfree(&sc->mem, v->vbuf); 1281 } 1282 } 1283 mtx_unlock(&sc->lock); 1284 } 1285 1286 int 1287 emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s, 1288 uint32_t sz, struct snd_dbuf *b) 1289 { 1290 void *vbuf; 1291 bus_addr_t tmp_addr; 1292 1293 vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit"); 1294 if (vbuf == NULL) { 1295 if(sc->dbg_level > 2) 1296 device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n"); 1297 return (ENOMEM); 1298 } 1299 if (b != NULL) 1300 sndbuf_setup(b, vbuf, sz); 1301 m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE; 1302 if (m->start < 0) { 1303 if(sc->dbg_level > 2) 1304 device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n"); 1305 emu_memfree(&sc->mem, vbuf); 1306 return (ENOMEM); 1307 } 1308 m->end = m->start + sz; 1309 m->speed = 0; 1310 m->b16 = 0; 1311 m->stereo = 0; 1312 m->running = 0; 1313 m->ismaster = 1; 1314 m->vol = 0xff; 1315 m->buf = tmp_addr; 1316 m->vbuf = vbuf; 1317 m->slave = s; 1318 if (s != NULL) { 1319 s->start = m->start; 1320 s->end = m->end; 1321 s->speed = 0; 1322 s->b16 = 0; 1323 s->stereo = 0; 1324 s->running = 0; 1325 s->ismaster = 0; 1326 s->vol = m->vol; 1327 s->buf = m->buf; 1328 s->vbuf = NULL; 1329 s->slave = NULL; 1330 } 1331 return (0); 1332 } 1333 1334 void 1335 emu_vsetup(struct emu_voice *v, int fmt, int spd) 1336 { 1337 if (fmt) { 1338 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0; 1339 v->stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0; 1340 if (v->slave != NULL) { 1341 v->slave->b16 = v->b16; 1342 v->slave->stereo = v->stereo; 1343 } 1344 } 1345 if (spd) { 1346 v->speed = spd; 1347 if (v->slave != NULL) 1348 v->slave->speed = v->speed; 1349 } 1350 } 1351 1352 void 1353 emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v) 1354 { 1355 int i; 1356 1357 for (i = 0; i < 8; i++) { 1358 v->routing[i] = rt->routing_left[i]; 1359 v->amounts[i] = rt->amounts_left[i]; 1360 } 1361 if ((v->stereo) && (v->ismaster == 0)) 1362 for (i = 0; i < 8; i++) { 1363 v->routing[i] = rt->routing_right[i]; 1364 v->amounts[i] = rt->amounts_right[i]; 1365 } 1366 1367 if ((v->stereo) && (v->slave != NULL)) 1368 emu_vroute(sc, rt, v->slave); 1369 } 1370 1371 void 1372 emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v) 1373 { 1374 int s; 1375 uint32_t start, val, silent_page; 1376 1377 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); 1378 1379 v->sa = v->start >> s; 1380 v->ea = v->end >> s; 1381 1382 if (v->stereo) { 1383 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK); 1384 } else { 1385 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0); 1386 } 1387 val = v->stereo ? 28 : 30; 1388 val *= v->b16 ? 1 : 2; 1389 start = v->sa + val; 1390 1391 if (sc->is_emu10k1) { 1392 emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) | 1393 (v->routing[2] << 8) | 1394 (v->routing[1] << 4) | 1395 (v->routing[0] << 0)) << 16); 1396 } else { 1397 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) | 1398 (v->routing[2] << 16) | 1399 (v->routing[1] << 8) | 1400 (v->routing[0] << 0)); 1401 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) | 1402 (v->routing[6] << 16) | 1403 (v->routing[5] << 8) | 1404 (v->routing[4] << 0)); 1405 emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) | 1406 (v->amounts[6] << 26) | 1407 (v->amounts[5] << 8) | 1408 (v->amounts[4] << 0)); 1409 } 1410 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0)); 1411 emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24)); 1412 emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24)); 1413 1414 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); 1415 emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0); 1416 emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0); 1417 1418 silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK; 1419 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page); 1420 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page); 1421 1422 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK); 1423 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK); 1424 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0); 1425 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK); 1426 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000); 1427 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000); 1428 emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0); 1429 emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0); 1430 emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0); 1431 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000); 1432 1433 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK); 1434 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000); 1435 1436 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f); 1437 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0); 1438 if ((v->stereo) && (v->slave != NULL)) 1439 emu_vwrite(sc, v->slave); 1440 } 1441 1442 static void 1443 emu_vstop(struct emu_sc_info *sc, char channel, int enable) 1444 { 1445 int reg; 1446 1447 reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL; 1448 channel &= 0x1f; 1449 reg |= 1 << 24; 1450 reg |= channel << 16; 1451 emu_wrptr(sc, 0, reg, enable); 1452 } 1453 1454 void 1455 emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go) 1456 { 1457 uint32_t pitch_target, initial_pitch; 1458 uint32_t cra, cs, ccis; 1459 uint32_t sample, i; 1460 1461 if (go) { 1462 cra = 64; 1463 cs = v->stereo ? 4 : 2; 1464 ccis = v->stereo ? 28 : 30; 1465 ccis *= v->b16 ? 1 : 2; 1466 sample = v->b16 ? 0x00000000 : 0x80808080; 1467 for (i = 0; i < cs; i++) 1468 emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample); 1469 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0); 1470 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra); 1471 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis); 1472 1473 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00); 1474 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff); 1475 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff); 1476 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f); 1477 emu_vstop(sc, v->vnum, 0); 1478 1479 pitch_target = emu_rate_to_linearpitch(v->speed); 1480 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 1481 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target); 1482 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target); 1483 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch); 1484 } else { 1485 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0); 1486 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0); 1487 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff); 1488 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff); 1489 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff); 1490 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0); 1491 emu_vstop(sc, v->vnum, 1); 1492 } 1493 if ((v->stereo) && (v->slave != NULL)) 1494 emu_vtrigger(sc, v->slave, go); 1495 } 1496 1497 int 1498 emu_vpos(struct emu_sc_info *sc, struct emu_voice *v) 1499 { 1500 int s, ptr; 1501 1502 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); 1503 ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s; 1504 return (ptr & ~0x0000001f); 1505 } 1506 1507 /* fx */ 1508 static void 1509 emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data) 1510 { 1511 emu_wrptr(sc, 0, sc->code_base + pc, data); 1512 } 1513 1514 static void 1515 emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc) 1516 { 1517 if ((*pc) + 1 > sc->code_size) { 1518 device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc)); 1519 return; 1520 } 1521 emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y); 1522 emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w); 1523 (*pc)++; 1524 } 1525 1526 static int 1527 sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS) 1528 { 1529 struct emu_sc_info *sc; 1530 int mixer_id; 1531 int new_vol; 1532 int err; 1533 1534 sc = arg1; 1535 mixer_id = arg2; 1536 1537 new_vol = emumix_get_volume(sc, mixer_id); 1538 err = sysctl_handle_int(oidp, &new_vol, 0, req); 1539 1540 if (err || req->newptr == NULL) 1541 return (err); 1542 if (new_vol < 0 || new_vol > 100) 1543 return (EINVAL); 1544 emumix_set_volume(sc, mixer_id, new_vol); 1545 1546 return (0); 1547 } 1548 1549 static int 1550 emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume) 1551 { 1552 int volgpr; 1553 char sysctl_name[32]; 1554 1555 volgpr = emu_rm_gpr_alloc(sc->rm, 1); 1556 emumix_set_fxvol(sc, volgpr, defvolume); 1557 /* 1558 * Mixer controls with NULL mix_name are handled 1559 * by AC97 emulation code or PCM mixer. 1560 */ 1561 if (mix_name != NULL) { 1562 /* 1563 * Temporary sysctls should start with underscore, 1564 * see freebsd-current mailing list, emu10kx driver 1565 * discussion around 2006-05-24. 1566 */ 1567 snprintf(sysctl_name, 32, "_%s", mix_name); 1568 SYSCTL_ADD_PROC(sc->ctx, 1569 SYSCTL_CHILDREN(sc->root), OID_AUTO, sysctl_name, 1570 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, mix_id, 1571 sysctl_emu_mixer_control, "I", ""); 1572 } 1573 1574 return (volgpr); 1575 } 1576 1577 static int 1578 sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS) 1579 { 1580 struct emu_sc_info *sc; 1581 int new_val; 1582 int err; 1583 1584 sc = arg1; 1585 1586 new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0; 1587 err = sysctl_handle_int(oidp, &new_val, 0, req); 1588 1589 if (err || req->newptr == NULL) 1590 return (err); 1591 if (new_val < 0 || new_val > 1) 1592 return (EINVAL); 1593 1594 switch (new_val) { 1595 case 0: 1596 emumix_set_mode(sc, MODE_ANALOG); 1597 break; 1598 case 1: 1599 emumix_set_mode(sc, MODE_DIGITAL); 1600 break; 1601 } 1602 return (0); 1603 } 1604 1605 static void 1606 emu_digitalswitch(struct emu_sc_info *sc) 1607 { 1608 /* XXX temporary? */ 1609 SYSCTL_ADD_PROC(sc->ctx, SYSCTL_CHILDREN(sc->root), OID_AUTO, 1610 "_digital", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 1611 sc, 0, sysctl_emu_digitalswitch_control, "I", 1612 "Enable digital output"); 1613 1614 return; 1615 } 1616 1617 /* 1618 * Allocate cache GPRs that will hold mixed output channels 1619 * and clear it on every DSP run. 1620 */ 1621 #define EFX_CACHE(CACHE_IDX) do { \ 1622 sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \ 1623 emu_addefxop(sc, ACC3, \ 1624 GPR(sc->cache_gpr[CACHE_IDX]), \ 1625 DSP_CONST(0), \ 1626 DSP_CONST(0), \ 1627 DSP_CONST(0), \ 1628 &pc); \ 1629 } while (0) 1630 1631 /* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */ 1632 #define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \ 1633 sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \ 1634 sc->mixer_volcache[IN_GPR_IDX] = DEF; \ 1635 emu_addefxop(sc, MACS, \ 1636 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1637 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1638 INP_NR, \ 1639 GPR(sc->mixer_gpr[IN_GPR_IDX]), \ 1640 &pc); \ 1641 } while (0) 1642 1643 /* allocate GPR, OUT = IN * VOL */ 1644 #define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \ 1645 sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \ 1646 sc->mixer_volcache[OUT_GPR_IDX] = DEF; \ 1647 emu_addefxop(sc, MACS, \ 1648 OUTP(OUTP_NR), \ 1649 DSP_CONST(0), \ 1650 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1651 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1652 &pc); \ 1653 } while (0) 1654 1655 /* like EFX_OUTPUT, but don't allocate mixer gpr */ 1656 #define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \ 1657 emu_addefxop(sc, MACS, \ 1658 OUTP(OUTP_NR), \ 1659 DSP_CONST(0), \ 1660 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1661 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1662 &pc); \ 1663 } while (0) 1664 1665 /* skip next OPCOUNT instructions if FLAG != 0 */ 1666 #define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \ 1667 emu_addefxop(sc, MACS, \ 1668 DSP_CONST(0), \ 1669 GPR(sc->mute_gpr[FLAG_GPR]), \ 1670 DSP_CONST(0), \ 1671 DSP_CONST(0), \ 1672 &pc); \ 1673 emu_addefxop(sc, SKIP, \ 1674 DSP_CCR, \ 1675 DSP_CCR, \ 1676 COND_NEQ_ZERO, \ 1677 OPCOUNT, \ 1678 &pc); \ 1679 } while (0) 1680 1681 #define EFX_COPY(TO, FROM) do { \ 1682 emu_addefxop(sc, ACC3, \ 1683 TO, \ 1684 DSP_CONST(0), \ 1685 DSP_CONST(0), \ 1686 FROM, \ 1687 &pc); \ 1688 } while (0) 1689 1690 static void 1691 emu_initefx(struct emu_sc_info *sc) 1692 { 1693 unsigned int i; 1694 uint32_t pc; 1695 1696 /* stop DSP */ 1697 if (sc->is_emu10k1) { 1698 emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP); 1699 } else { 1700 emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP); 1701 } 1702 1703 /* code size is in instructions */ 1704 pc = 0; 1705 for (i = 0; i < sc->code_size; i++) { 1706 if (sc->is_emu10k1) { 1707 emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc); 1708 } else { 1709 emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc); 1710 } 1711 } 1712 1713 /* allocate GPRs for mute switches (EFX_SKIP). Mute by default */ 1714 for (i = 0; i < NUM_MUTE; i++) { 1715 sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1); 1716 emumix_set_gpr(sc, sc->mute_gpr[i], 1); 1717 } 1718 emu_digitalswitch(sc); 1719 1720 pc = 0; 1721 1722 /* 1723 * DSP code below is not good, because: 1724 * 1. It can be written smaller, if it can use DSP accumulator register 1725 * instead of cache_gpr[]. 1726 * 2. It can be more careful when volume is 100%, because in DSP 1727 * x*0x7fffffff may not be equal to x ! 1728 */ 1729 1730 /* clean outputs */ 1731 for (i = 0; i < 16 ; i++) { 1732 emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc); 1733 } 1734 1735 if (sc->is_emu10k1) { 1736 EFX_CACHE(C_FRONT_L); 1737 EFX_CACHE(C_FRONT_R); 1738 EFX_CACHE(C_REC_L); 1739 EFX_CACHE(C_REC_R); 1740 1741 /* fx0 to front/record, 100%/muted by default */ 1742 EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1743 EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1744 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1745 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1746 1747 /* in0, from AC97 codec output */ 1748 EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0); 1749 EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0); 1750 EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1751 EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1752 1753 /* in1, from CD S/PDIF */ 1754 /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */ 1755 EFX_SKIP(4, CDSPDIFMUTE); 1756 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1757 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1758 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1759 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1760 1761 if (sc->dbg_level > 0) { 1762 /* in2, ZoomVide (???) */ 1763 EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1764 EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1765 EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0); 1766 EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0); 1767 } 1768 1769 /* in3, TOSLink */ 1770 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0); 1771 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0); 1772 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0); 1773 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0); 1774 /* in4, LineIn */ 1775 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0); 1776 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0); 1777 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0); 1778 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0); 1779 1780 /* in5, on-card S/PDIF */ 1781 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 1782 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 1783 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 1784 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 1785 1786 /* in6, Line2 on Live!Drive */ 1787 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 1788 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 1789 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0); 1790 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0); 1791 1792 if (sc->dbg_level > 0) { 1793 /* in7, unknown */ 1794 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 1795 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 1796 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 1797 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 1798 } 1799 1800 /* analog and digital */ 1801 EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100); 1802 EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100); 1803 /* S/PDIF */ 1804 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L); 1805 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R); 1806 /* Headphones */ 1807 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L); 1808 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R); 1809 1810 /* rec output to "ADC" */ 1811 EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100); 1812 EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100); 1813 1814 if (!(sc->mch_disabled)) { 1815 /* 1816 * Additional channel volume is controlled by mixer in 1817 * emu_dspmixer_set() in -pcm.c 1818 */ 1819 1820 /* fx2/3 (pcm1) to rear */ 1821 EFX_CACHE(C_REAR_L); 1822 EFX_CACHE(C_REAR_R); 1823 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 1824 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 1825 1826 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100); 1827 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100); 1828 if (sc->has_51) { 1829 /* fx4 (pcm2) to center */ 1830 EFX_CACHE(C_CENTER); 1831 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 1832 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1833 1834 /* XXX in digital mode (default) this should be muted because 1835 this output is shared with digital out */ 1836 EFX_SKIP(1, ANALOGMUTE); 1837 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1838 1839 /* fx5 (pcm3) to sub */ 1840 EFX_CACHE(C_SUB); 1841 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 1842 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1843 1844 /* XXX in digital mode (default) this should be muted because 1845 this output is shared with digital out */ 1846 EFX_SKIP(1, ANALOGMUTE); 1847 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1848 } 1849 } else { 1850 /* SND_EMU10KX_MULTICHANNEL_DISABLED */ 1851 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */ 1852 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */ 1853 1854 #if 0 1855 /* XXX 5.1 does not work */ 1856 1857 if (sc->has_51) { 1858 /* (fx0+fx1)/2 to center */ 1859 EFX_CACHE(C_CENTER); 1860 emu_addefxop(sc, MACS, 1861 GPR(sc->cache_gpr[C_CENTER]), 1862 GPR(sc->cache_gpr[C_CENTER]), 1863 DSP_CONST(0xd), /* = 1/2 */ 1864 GPR(sc->cache_gpr[C_FRONT_L]), 1865 &pc); 1866 emu_addefxop(sc, MACS, 1867 GPR(sc->cache_gpr[C_CENTER]), 1868 GPR(sc->cache_gpr[C_CENTER]), 1869 DSP_CONST(0xd), /* = 1/2 */ 1870 GPR(sc->cache_gpr[C_FRONT_R]), 1871 &pc); 1872 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1873 1874 /* XXX in digital mode (default) this should be muted because 1875 this output is shared with digital out */ 1876 EFX_SKIP(1, ANALOGMUTE); 1877 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1878 1879 /* (fx0+fx1)/2 to sub */ 1880 EFX_CACHE(C_SUB); 1881 emu_addefxop(sc, MACS, 1882 GPR(sc->cache_gpr[C_CENTER]), 1883 GPR(sc->cache_gpr[C_CENTER]), 1884 DSP_CONST(0xd), /* = 1/2 */ 1885 GPR(sc->cache_gpr[C_FRONT_L]), 1886 &pc); 1887 emu_addefxop(sc, MACS, 1888 GPR(sc->cache_gpr[C_CENTER]), 1889 GPR(sc->cache_gpr[C_CENTER]), 1890 DSP_CONST(0xd), /* = 1/2 */ 1891 GPR(sc->cache_gpr[C_FRONT_R]), 1892 &pc); 1893 /* XXX add lowpass filter here */ 1894 1895 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1896 1897 /* XXX in digital mode (default) this should be muted because 1898 this output is shared with digital out */ 1899 EFX_SKIP(1, ANALOGMUTE); 1900 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1901 } 1902 #endif 1903 } /* !mch_disabled */ 1904 if (sc->mch_rec) { 1905 /* 1906 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots 1907 * are used as outputs and already filled with data 1908 */ 1909 /* 1910 * XXX On Live! cards stream does not begin at zero offset. 1911 * It can be HW, driver or sound buffering problem. 1912 * Use sync substream (offset 0x3E) to let userland find 1913 * correct data. 1914 */ 1915 1916 /* 1917 * Substream map (in byte offsets, each substream is 2 bytes): 1918 * 0x00..0x1E - outputs 1919 * 0x20..0x3E - FX, inputs and sync stream 1920 */ 1921 1922 /* First 2 channels (offset 0x20,0x22) are empty */ 1923 for(i = (sc->has_51 ? 2 : 0); i < 2; i++) 1924 EFX_COPY(FX2(i), DSP_CONST(0)); 1925 1926 /* PCM Playback monitoring, offset 0x24..0x2A */ 1927 for(i = 0; i < 4; i++) 1928 EFX_COPY(FX2(i+2), FX(i)); 1929 1930 /* Copy of some inputs, offset 0x2C..0x3C */ 1931 for(i = 0; i < 9; i++) 1932 EFX_COPY(FX2(i+8), INP(i)); 1933 1934 /* sync data (0xc0de, offset 0x3E) */ 1935 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 1936 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 1937 1938 EFX_COPY(FX2(15), GPR(sc->dummy_gpr)); 1939 } /* mch_rec */ 1940 } else /* emu10k2 and later */ { 1941 EFX_CACHE(C_FRONT_L); 1942 EFX_CACHE(C_FRONT_R); 1943 EFX_CACHE(C_REC_L); 1944 EFX_CACHE(C_REC_R); 1945 1946 /* fx0 to front/record, 100%/muted by default */ 1947 /* 1948 * FRONT_[L|R] is controlled by AC97 emulation in 1949 * emu_ac97_[read|write]_emulation in -pcm.c 1950 */ 1951 EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1952 EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1953 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1954 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1955 1956 /* in0, from AC97 codec output */ 1957 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100); 1958 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100); 1959 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1960 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1961 1962 /* in1, from CD S/PDIF */ 1963 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1964 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1965 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1966 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1967 1968 /* in2, optical & coax S/PDIF on AudigyDrive*/ 1969 /* XXX Should be muted when GPRSCS valid stream == 0 */ 1970 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1971 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1972 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0); 1973 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0); 1974 1975 if (sc->dbg_level > 0) { 1976 /* in3, unknown */ 1977 EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0); 1978 EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0); 1979 EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0); 1980 EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0); 1981 } 1982 1983 /* in4, LineIn 2 on AudigyDrive */ 1984 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0); 1985 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0); 1986 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0); 1987 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0); 1988 1989 /* in5, on-card S/PDIF */ 1990 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 1991 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 1992 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 1993 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 1994 1995 /* in6, AUX2 on AudigyDrive */ 1996 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 1997 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 1998 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0); 1999 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0); 2000 2001 if (sc->dbg_level > 0) { 2002 /* in7, unknown */ 2003 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 2004 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 2005 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 2006 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 2007 } 2008 2009 /* front output to headphones and alog and digital *front */ 2010 /* volume controlled by AC97 emulation */ 2011 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100); 2012 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100); 2013 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L); 2014 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R); 2015 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L); 2016 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R); 2017 2018 /* rec output to "ADC" */ 2019 /* volume controlled by AC97 emulation */ 2020 EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100); 2021 EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100); 2022 2023 if (!(sc->mch_disabled)) { 2024 /* 2025 * Additional channel volume is controlled by mixer in 2026 * emu_dspmixer_set() in -pcm.c 2027 */ 2028 2029 /* fx2/3 (pcm1) to rear */ 2030 EFX_CACHE(C_REAR_L); 2031 EFX_CACHE(C_REAR_R); 2032 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 2033 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 2034 2035 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100); 2036 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100); 2037 EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L); 2038 EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R); 2039 2040 /* fx4 (pcm2) to center */ 2041 EFX_CACHE(C_CENTER); 2042 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 2043 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2044 #if 0 2045 /* 2046 * XXX in digital mode (default) this should be muted 2047 * because this output is shared with digital out 2048 */ 2049 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2050 #endif 2051 /* fx5 (pcm3) to sub */ 2052 EFX_CACHE(C_SUB); 2053 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 2054 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2055 #if 0 2056 /* 2057 * XXX in digital mode (default) this should be muted 2058 * because this output is shared with digital out 2059 */ 2060 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2061 #endif 2062 if (sc->has_71) { 2063 /* XXX this will broke headphones on AudigyDrive */ 2064 /* fx6/7 (pcm4) to side */ 2065 EFX_CACHE(C_SIDE_L); 2066 EFX_CACHE(C_SIDE_R); 2067 EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100); 2068 EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100); 2069 EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100); 2070 EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100); 2071 EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L); 2072 EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R); 2073 } 2074 } else { /* mch_disabled */ 2075 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L); 2076 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R); 2077 2078 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L); 2079 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R); 2080 2081 if (sc->has_51) { 2082 /* (fx0+fx1)/2 to center */ 2083 EFX_CACHE(C_CENTER); 2084 emu_addefxop(sc, MACS, 2085 GPR(sc->cache_gpr[C_CENTER]), 2086 GPR(sc->cache_gpr[C_CENTER]), 2087 DSP_CONST(0xd), /* = 1/2 */ 2088 GPR(sc->cache_gpr[C_FRONT_L]), 2089 &pc); 2090 emu_addefxop(sc, MACS, 2091 GPR(sc->cache_gpr[C_CENTER]), 2092 GPR(sc->cache_gpr[C_CENTER]), 2093 DSP_CONST(0xd), /* = 1/2 */ 2094 GPR(sc->cache_gpr[C_FRONT_R]), 2095 &pc); 2096 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2097 2098 /* XXX in digital mode (default) this should be muted because 2099 this output is shared with digital out */ 2100 EFX_SKIP(1, ANALOGMUTE); 2101 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2102 2103 /* (fx0+fx1)/2 to sub */ 2104 EFX_CACHE(C_SUB); 2105 emu_addefxop(sc, MACS, 2106 GPR(sc->cache_gpr[C_SUB]), 2107 GPR(sc->cache_gpr[C_SUB]), 2108 DSP_CONST(0xd), /* = 1/2 */ 2109 GPR(sc->cache_gpr[C_FRONT_L]), 2110 &pc); 2111 emu_addefxop(sc, MACS, 2112 GPR(sc->cache_gpr[C_SUB]), 2113 GPR(sc->cache_gpr[C_SUB]), 2114 DSP_CONST(0xd), /* = 1/2 */ 2115 GPR(sc->cache_gpr[C_FRONT_R]), 2116 &pc); 2117 /* XXX add lowpass filter here */ 2118 2119 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2120 2121 /* XXX in digital mode (default) this should be muted because 2122 this output is shared with digital out */ 2123 EFX_SKIP(1, ANALOGMUTE); 2124 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2125 } 2126 } /* mch_disabled */ 2127 if (sc->mch_rec) { 2128 /* MCH RECORDING, high 32 slots */ 2129 2130 /* 2131 * Stream map (in byte offsets): 2132 * 0x00..0x3E - outputs 2133 * 0x40..0x7E - FX, inputs 2134 * each substream is 2 bytes. 2135 */ 2136 /* 2137 * XXX Audigy 2 Value cards (and, possibly, 2138 * Audigy 4) write some unknown data in place of 2139 * some outputs (offsets 0x20..0x3F) and one 2140 * input (offset 0x7E). 2141 */ 2142 2143 /* PCM Playback monitoring, offsets 0x40..0x5E */ 2144 for(i = 0; i < 16; i++) 2145 EFX_COPY(FX2(i), FX(i)); 2146 2147 /* Copy of all inputs, offsets 0x60..0x7E */ 2148 for(i = 0; i < 16; i++) 2149 EFX_COPY(FX2(i+16), INP(i)); 2150 #if 0 2151 /* XXX Audigy seems to work correct and does not need this */ 2152 /* sync data (0xc0de), offset 0x7E */ 2153 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 2154 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 2155 EFX_COPY(FX2(31), GPR(sc->dummy_gpr)); 2156 #endif 2157 } /* mch_rec */ 2158 } 2159 2160 sc->routing_code_end = pc; 2161 2162 /* start DSP */ 2163 if (sc->is_emu10k1) { 2164 emu_wrptr(sc, 0, EMU_DBG, 0); 2165 } else { 2166 emu_wrptr(sc, 0, EMU_A_DBG, 0); 2167 } 2168 } 2169 2170 /* /dev/em10kx */ 2171 static d_open_t emu10kx_open; 2172 static d_close_t emu10kx_close; 2173 static d_read_t emu10kx_read; 2174 2175 static struct cdevsw emu10kx_cdevsw = { 2176 .d_open = emu10kx_open, 2177 .d_close = emu10kx_close, 2178 .d_read = emu10kx_read, 2179 .d_name = "emu10kx", 2180 .d_version = D_VERSION, 2181 }; 2182 2183 static int 2184 emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2185 { 2186 int error; 2187 struct emu_sc_info *sc; 2188 2189 sc = i_dev->si_drv1; 2190 mtx_lock(&sc->emu10kx_lock); 2191 if (sc->emu10kx_isopen) { 2192 mtx_unlock(&sc->emu10kx_lock); 2193 return (EBUSY); 2194 } 2195 sc->emu10kx_isopen = 1; 2196 mtx_unlock(&sc->emu10kx_lock); 2197 if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) { 2198 error = ENXIO; 2199 goto out; 2200 } 2201 sc->emu10kx_bufptr = 0; 2202 error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM; 2203 out: 2204 if (error) { 2205 mtx_lock(&sc->emu10kx_lock); 2206 sc->emu10kx_isopen = 0; 2207 mtx_unlock(&sc->emu10kx_lock); 2208 } 2209 return (error); 2210 } 2211 2212 static int 2213 emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2214 { 2215 struct emu_sc_info *sc; 2216 2217 sc = i_dev->si_drv1; 2218 2219 mtx_lock(&sc->emu10kx_lock); 2220 if (!(sc->emu10kx_isopen)) { 2221 mtx_unlock(&sc->emu10kx_lock); 2222 return (EBADF); 2223 } 2224 sbuf_delete(&sc->emu10kx_sbuf); 2225 sc->emu10kx_isopen = 0; 2226 mtx_unlock(&sc->emu10kx_lock); 2227 2228 return (0); 2229 } 2230 2231 static int 2232 emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused) 2233 { 2234 int l, err; 2235 struct emu_sc_info *sc; 2236 2237 sc = i_dev->si_drv1; 2238 mtx_lock(&sc->emu10kx_lock); 2239 if (!(sc->emu10kx_isopen)) { 2240 mtx_unlock(&sc->emu10kx_lock); 2241 return (EBADF); 2242 } 2243 mtx_unlock(&sc->emu10kx_lock); 2244 2245 l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr); 2246 err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0; 2247 sc->emu10kx_bufptr += l; 2248 2249 return (err); 2250 } 2251 2252 static int 2253 emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s) 2254 { 2255 int i; 2256 2257 sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n"); 2258 sbuf_printf(s, "\nHardware resource usage:\n"); 2259 sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs); 2260 sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size); 2261 sbuf_printf(s, "Card supports"); 2262 if (sc->has_ac97) { 2263 sbuf_printf(s, " AC97 codec"); 2264 } else { 2265 sbuf_printf(s, " NO AC97 codec"); 2266 } 2267 if (sc->has_51) { 2268 if (sc->has_71) 2269 sbuf_printf(s, " and 7.1 output"); 2270 else 2271 sbuf_printf(s, " and 5.1 output"); 2272 } 2273 if (sc->is_emu10k1) 2274 sbuf_printf(s, ", SBLive! DSP code"); 2275 if (sc->is_emu10k2) 2276 sbuf_printf(s, ", Audigy DSP code"); 2277 if (sc->is_ca0102) 2278 sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks"); 2279 if (sc->is_ca0108) 2280 sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks"); 2281 sbuf_printf(s, "\n"); 2282 if (sc->broken_digital) 2283 sbuf_printf(s, "Digital mode unsupported\n"); 2284 sbuf_printf(s, "\nInstalled devices:\n"); 2285 for (i = 0; i < RT_COUNT; i++) 2286 if (sc->pcm[i] != NULL) 2287 if (device_is_attached(sc->pcm[i])) { 2288 sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i])); 2289 } 2290 if (sc->midi[0] != NULL) 2291 if (device_is_attached(sc->midi[0])) { 2292 sbuf_printf(s, "EMU10Kx MIDI Interface\n"); 2293 sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0])); 2294 } 2295 if (sc->midi[1] != NULL) 2296 if (device_is_attached(sc->midi[1])) { 2297 sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1])); 2298 } 2299 if (sc->midi[0] != NULL) 2300 if (device_is_attached(sc->midi[0])) { 2301 sbuf_printf(s, "\tIR receiver MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled"); 2302 } 2303 sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital"); 2304 2305 sbuf_finish(s); 2306 return (sbuf_len(s)); 2307 } 2308 2309 /* INIT & UNINIT */ 2310 static int 2311 emu10kx_dev_init(struct emu_sc_info *sc) 2312 { 2313 int unit; 2314 2315 mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0); 2316 unit = device_get_unit(sc->dev); 2317 2318 sc->cdev = make_dev(&emu10kx_cdevsw, PCMMINOR(unit), UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit); 2319 if (sc->cdev != NULL) { 2320 sc->cdev->si_drv1 = sc; 2321 return (0); 2322 } 2323 return (ENXIO); 2324 } 2325 2326 static int 2327 emu10kx_dev_uninit(struct emu_sc_info *sc) 2328 { 2329 mtx_lock(&sc->emu10kx_lock); 2330 if (sc->emu10kx_isopen) { 2331 mtx_unlock(&sc->emu10kx_lock); 2332 return (EBUSY); 2333 } 2334 if (sc->cdev) 2335 destroy_dev(sc->cdev); 2336 sc->cdev = NULL; 2337 2338 mtx_destroy(&sc->emu10kx_lock); 2339 return (0); 2340 } 2341 2342 /* resource manager */ 2343 int 2344 emu_rm_init(struct emu_sc_info *sc) 2345 { 2346 int i; 2347 int maxcount; 2348 struct emu_rm *rm; 2349 2350 rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO); 2351 if (rm == NULL) { 2352 return (ENOMEM); 2353 } 2354 sc->rm = rm; 2355 rm->card = sc; 2356 maxcount = sc->num_gprs; 2357 rm->num_used = 0; 2358 mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF); 2359 rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR); 2360 for (i = 0; i < rm->num_gprs; i++) 2361 rm->allocmap[i] = 0; 2362 /* pre-allocate gpr[0] */ 2363 rm->allocmap[0] = 1; 2364 rm->last_free_gpr = 1; 2365 2366 return (0); 2367 } 2368 2369 int 2370 emu_rm_uninit(struct emu_sc_info *sc) 2371 { 2372 int i; 2373 2374 if (sc->dbg_level > 1) { 2375 mtx_lock(&(sc->rm->gpr_lock)); 2376 for (i = 1; i < sc->rm->last_free_gpr; i++) 2377 if (sc->rm->allocmap[i] > 0) 2378 device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i); 2379 mtx_unlock(&(sc->rm->gpr_lock)); 2380 } 2381 2382 mtx_destroy(&(sc->rm->gpr_lock)); 2383 free(sc->rm, M_DEVBUF); 2384 return (0); 2385 } 2386 2387 static int 2388 emu_rm_gpr_alloc(struct emu_rm *rm, int count) 2389 { 2390 int i, j; 2391 int allocated_gpr; 2392 2393 allocated_gpr = rm->num_gprs; 2394 /* try fast way first */ 2395 mtx_lock(&(rm->gpr_lock)); 2396 if (rm->last_free_gpr + count <= rm->num_gprs) { 2397 allocated_gpr = rm->last_free_gpr; 2398 rm->last_free_gpr += count; 2399 rm->allocmap[allocated_gpr] = count; 2400 for (i = 1; i < count; i++) 2401 rm->allocmap[allocated_gpr + i] = -(count - i); 2402 } else { 2403 /* longer */ 2404 i = 0; 2405 allocated_gpr = rm->num_gprs; 2406 while (i < rm->last_free_gpr - count) { 2407 if (rm->allocmap[i] > 0) { 2408 i += rm->allocmap[i]; 2409 } else { 2410 allocated_gpr = i; 2411 for (j = 1; j < count; j++) { 2412 if (rm->allocmap[i + j] != 0) 2413 allocated_gpr = rm->num_gprs; 2414 } 2415 if (allocated_gpr == i) 2416 break; 2417 } 2418 } 2419 if (allocated_gpr + count < rm->last_free_gpr) { 2420 rm->allocmap[allocated_gpr] = count; 2421 for (i = 1; i < count; i++) 2422 rm->allocmap[allocated_gpr + i] = -(count - i); 2423 } 2424 } 2425 if (allocated_gpr == rm->num_gprs) 2426 allocated_gpr = (-1); 2427 if (allocated_gpr >= 0) 2428 rm->num_used += count; 2429 mtx_unlock(&(rm->gpr_lock)); 2430 return (allocated_gpr); 2431 } 2432 2433 /* mixer */ 2434 void 2435 emumix_set_mode(struct emu_sc_info *sc, int mode) 2436 { 2437 uint32_t a_iocfg; 2438 uint32_t hcfg; 2439 uint32_t tmp; 2440 2441 switch (mode) { 2442 case MODE_DIGITAL: 2443 /* FALLTHROUGH */ 2444 case MODE_ANALOG: 2445 break; 2446 default: 2447 return; 2448 } 2449 2450 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE; 2451 a_iocfg = 0; 2452 2453 if (sc->rev >= 6) 2454 hcfg |= EMU_HCFG_JOYENABLE; 2455 2456 if (sc->is_emu10k1) 2457 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK; 2458 else 2459 hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE; 2460 2461 if (mode == MODE_DIGITAL) { 2462 if (sc->broken_digital) { 2463 device_printf(sc->dev, "Digital mode is reported as broken on this card.\n"); 2464 } 2465 a_iocfg |= EMU_A_IOCFG_GPOUT1; 2466 hcfg |= EMU_HCFG_GPOUT0; 2467 } 2468 2469 if (mode == MODE_ANALOG) 2470 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2471 2472 if (sc->is_emu10k2) 2473 a_iocfg |= 0x80; /* XXX */ 2474 2475 if ((sc->is_ca0102) || (sc->is_ca0108)) 2476 /* 2477 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things 2478 * on diffrerent cards. 2479 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108) 2480 * "disable analog outs" on Audigy (emu10k2) 2481 */ 2482 a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG; 2483 2484 if (sc->is_ca0108) 2485 a_iocfg |= 0x20; /* XXX */ 2486 2487 /* Mute analog center & subwoofer before mode change */ 2488 if (mode == MODE_DIGITAL) 2489 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1); 2490 2491 emu_wr(sc, EMU_HCFG, hcfg, 4); 2492 2493 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2494 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2495 tmp = a_iocfg; 2496 emu_wr(sc, EMU_A_IOCFG, tmp, 2); 2497 } 2498 2499 /* Unmute if we have changed mode to analog. */ 2500 2501 if (mode == MODE_ANALOG) 2502 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0); 2503 2504 sc->mode = mode; 2505 } 2506 2507 void 2508 emumix_set_spdif_mode(struct emu_sc_info *sc, int mode) 2509 { 2510 uint32_t spcs; 2511 2512 switch (mode) { 2513 case SPDIF_MODE_PCM: 2514 break; 2515 case SPDIF_MODE_AC3: 2516 device_printf(sc->dev, "AC3 mode does not work and disabled\n"); 2517 return; 2518 default: 2519 return; 2520 } 2521 2522 spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 | 2523 EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC | 2524 EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 2525 EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT; 2526 2527 mode = SPDIF_MODE_PCM; 2528 2529 emu_wrptr(sc, 0, EMU_SPCS0, spcs); 2530 emu_wrptr(sc, 0, EMU_SPCS1, spcs); 2531 emu_wrptr(sc, 0, EMU_SPCS2, spcs); 2532 } 2533 2534 #define L2L_POINTS 10 2535 2536 static int l2l_df[L2L_POINTS] = { 2537 0x572C5CA, /* 100..90 */ 2538 0x3211625, /* 90..80 */ 2539 0x1CC1A76, /* 80..70 */ 2540 0x108428F, /* 70..60 */ 2541 0x097C70A, /* 60..50 */ 2542 0x0572C5C, /* 50..40 */ 2543 0x0321162, /* 40..30 */ 2544 0x01CC1A7, /* 30..20 */ 2545 0x0108428, /* 20..10 */ 2546 0x016493D /* 10..0 */ 2547 }; 2548 2549 static int l2l_f[L2L_POINTS] = { 2550 0x4984461A, /* 90 */ 2551 0x2A3968A7, /* 80 */ 2552 0x18406003, /* 70 */ 2553 0x0DEDC66D, /* 60 */ 2554 0x07FFFFFF, /* 50 */ 2555 0x04984461, /* 40 */ 2556 0x02A3968A, /* 30 */ 2557 0x01840600, /* 20 */ 2558 0x00DEDC66, /* 10 */ 2559 0x00000000 /* 0 */ 2560 }; 2561 2562 static int 2563 log2lin(int log_t) 2564 { 2565 int lin_t; 2566 int idx, lin; 2567 2568 if (log_t <= 0) { 2569 lin_t = 0x00000000; 2570 return (lin_t); 2571 } 2572 2573 if (log_t >= 100) { 2574 lin_t = 0x7fffffff; 2575 return (lin_t); 2576 } 2577 2578 idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS); 2579 lin = log_t % (L2L_POINTS); 2580 lin_t = l2l_df[idx] * lin + l2l_f[idx]; 2581 return (lin_t); 2582 } 2583 2584 void 2585 emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol) 2586 { 2587 2588 vol = log2lin(vol); 2589 emumix_set_gpr(sc, gpr, vol); 2590 } 2591 2592 void 2593 emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val) 2594 { 2595 if (sc->dbg_level > 1) 2596 if (gpr == 0) { 2597 device_printf(sc->dev, "Zero gpr write access\n"); 2598 #ifdef KDB 2599 kdb_backtrace(); 2600 #endif 2601 return; 2602 } 2603 2604 emu_wrptr(sc, 0, GPR(gpr), val); 2605 } 2606 2607 void 2608 emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume) 2609 { 2610 2611 RANGE(volume, 0, 100); 2612 if (mixer_idx < NUM_MIXERS) { 2613 sc->mixer_volcache[mixer_idx] = volume; 2614 emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume); 2615 } 2616 } 2617 2618 int 2619 emumix_get_volume(struct emu_sc_info *sc, int mixer_idx) 2620 { 2621 if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0)) 2622 return (sc->mixer_volcache[mixer_idx]); 2623 return (-1); 2624 } 2625 2626 /* Init CardBus part */ 2627 static int 2628 emu_cardbus_init(struct emu_sc_info *sc) 2629 { 2630 2631 /* 2632 * XXX May not need this if we have EMU_IPR3 handler. 2633 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments? 2634 * Looks much like "(data << 16) | register". 2635 */ 2636 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000); 2637 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001); 2638 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f); 2639 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f); 2640 2641 emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f); 2642 2643 return (0); 2644 } 2645 2646 /* Probe and attach the card */ 2647 static int 2648 emu_init(struct emu_sc_info *sc) 2649 { 2650 uint32_t ch, tmp; 2651 uint32_t spdif_sr; 2652 uint32_t ac97slot; 2653 int def_mode; 2654 int i; 2655 2656 /* disable audio and lock cache */ 2657 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2658 2659 /* reset recording buffers */ 2660 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2661 emu_wrptr(sc, 0, EMU_MICBA, 0); 2662 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2663 emu_wrptr(sc, 0, EMU_FXBA, 0); 2664 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2665 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2666 2667 /* disable channel interrupt */ 2668 emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4); 2669 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2670 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2671 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2672 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2673 2674 /* disable P16V and S/PDIF interrupts */ 2675 if ((sc->is_ca0102) || (sc->is_ca0108)) 2676 emu_wr(sc, EMU_INTE2, 0, 4); 2677 2678 if (sc->is_ca0102) 2679 emu_wr(sc, EMU_INTE3, 0, 4); 2680 2681 /* init phys inputs and outputs */ 2682 ac97slot = 0; 2683 if (sc->has_51) 2684 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE; 2685 if (sc->has_71) 2686 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT; 2687 if (sc->is_emu10k2) 2688 ac97slot |= 0x40; 2689 emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot); 2690 2691 if (sc->is_emu10k2) /* XXX for later cards? */ 2692 emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if 2693 * we write 1 here? */ 2694 2695 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev), 2696 /* alignment */ 2, /* boundary */ 0, 2697 /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */ 2698 /* highaddr */ BUS_SPACE_MAXADDR, 2699 /* filter */ NULL, /* filterarg */ NULL, 2700 /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff, 2701 /* flags */ 0, /* lockfunc */NULL, /* lockarg */NULL, 2702 &sc->mem.dmat) != 0) { 2703 device_printf(sc->dev, "unable to create dma tag\n"); 2704 bus_dma_tag_destroy(sc->mem.dmat); 2705 return (ENOMEM); 2706 } 2707 2708 sc->mem.card = sc; 2709 SLIST_INIT(&sc->mem.blocks); 2710 sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, &sc->mem.ptb_map); 2711 if (sc->mem.ptb_pages == NULL) 2712 return (ENOMEM); 2713 2714 sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr, &sc->mem.silent_map); 2715 if (sc->mem.silent_page == NULL) { 2716 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2717 return (ENOMEM); 2718 } 2719 /* Clear page with silence & setup all pointers to this page */ 2720 bzero(sc->mem.silent_page, EMUPAGESIZE); 2721 tmp = (uint32_t) (sc->mem.silent_page_addr) << 1; 2722 for (i = 0; i < EMU_MAXPAGES; i++) 2723 sc->mem.ptb_pages[i] = tmp | i; 2724 2725 for (ch = 0; ch < NUM_G; ch++) { 2726 emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK); 2727 emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK); 2728 } 2729 emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr)); 2730 emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */ 2731 emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */ 2732 2733 /* init envelope engine */ 2734 for (ch = 0; ch < NUM_G; ch++) { 2735 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2736 emu_wrptr(sc, ch, EMU_CHAN_IP, 0); 2737 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff); 2738 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff); 2739 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2740 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2741 emu_wrptr(sc, ch, EMU_CHAN_CCR, 0); 2742 2743 emu_wrptr(sc, ch, EMU_CHAN_PSST, 0); 2744 emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10); 2745 emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0); 2746 emu_wrptr(sc, ch, EMU_CHAN_Z1, 0); 2747 emu_wrptr(sc, ch, EMU_CHAN_Z2, 0); 2748 emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000); 2749 2750 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0); 2751 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0); 2752 emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff); 2753 emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0); 2754 emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0); 2755 emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */ 2756 emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */ 2757 emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0); 2758 2759 /*** these are last so OFF prevents writing ***/ 2760 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0); 2761 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0); 2762 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0); 2763 emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0); 2764 emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0); 2765 2766 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2767 emu_wrptr(sc, ch, 0x4c, 0x0); 2768 emu_wrptr(sc, ch, 0x4d, 0x0); 2769 emu_wrptr(sc, ch, 0x4e, 0x0); 2770 emu_wrptr(sc, ch, 0x4f, 0x0); 2771 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f); 2772 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f); 2773 emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0); 2774 } 2775 } 2776 2777 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2778 2779 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2780 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000); 2781 2782 /* 2783 * CAxxxx cards needs additional setup: 2784 * 1. Set I2S capture sample rate to 96000 2785 * 2. Disable P16v / P17v proceesing 2786 * 3. Allow EMU10K DSP inputs 2787 */ 2788 if ((sc->is_ca0102) || (sc->is_ca0108)) { 2789 spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE); 2790 spdif_sr &= 0xfffff1ff; 2791 spdif_sr |= EMU_A_I2S_CAPTURE_96000; 2792 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr); 2793 2794 /* Disable P16v processing */ 2795 emu_wr_p16vptr(sc, 0, EMU_A2_SRCSel, 0x14); 2796 2797 /* Setup P16v/P17v sound routing */ 2798 if (sc->is_ca0102) 2799 emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00); 2800 else { 2801 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000); 2802 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000); 2803 2804 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2805 emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2); 2806 } 2807 } 2808 emu_initefx(sc); 2809 2810 def_mode = MODE_ANALOG; 2811 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2812 def_mode = MODE_DIGITAL; 2813 if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) { 2814 device_printf(sc->dev, "Audigy card initialized in analog mode.\n"); 2815 def_mode = MODE_ANALOG; 2816 } 2817 emumix_set_mode(sc, def_mode); 2818 2819 if (bootverbose) { 2820 tmp = emu_rd(sc, EMU_HCFG, 4); 2821 device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp); 2822 device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n", 2823 (tmp & 0x80000000 ? "[Legacy MPIC] " : ""), 2824 (tmp & 0x40000000 ? "[0x40] " : ""), 2825 (tmp & 0x20000000 ? "[0x20] " : ""), 2826 (tmp & 0x10000000 ? "[0x10] " : ""), 2827 (tmp & 0x08000000 ? "[0x08] " : ""), 2828 (tmp & 0x04000000 ? "[0x04] " : ""), 2829 (tmp & 0x02000000 ? "[0x02] " : ""), 2830 (tmp & 0x01000000 ? "[0x01]" : " ")); 2831 device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n", 2832 (tmp & 0x00800000 ? "[0x80] " : ""), 2833 (tmp & 0x00400000 ? "[0x40] " : ""), 2834 (tmp & 0x00200000 ? "[Legacy INT] " : ""), 2835 (tmp & 0x00100000 ? "[0x10] " : ""), 2836 (tmp & 0x00080000 ? "[0x08] " : ""), 2837 (tmp & 0x00040000 ? "[Codec4] " : ""), 2838 (tmp & 0x00020000 ? "[Codec2] " : ""), 2839 (tmp & 0x00010000 ? "[I2S Codec]" : " ")); 2840 device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n", 2841 (tmp & 0x00008000 ? "[0x80] " : ""), 2842 (tmp & 0x00004000 ? "[GPINPUT0] " : ""), 2843 (tmp & 0x00002000 ? "[GPINPUT1] " : ""), 2844 (tmp & 0x00001000 ? "[GPOUT0] " : ""), 2845 (tmp & 0x00000800 ? "[GPOUT1] " : ""), 2846 (tmp & 0x00000400 ? "[GPOUT2] " : ""), 2847 (tmp & 0x00000200 ? "[Joystick] " : ""), 2848 (tmp & 0x00000100 ? "[0x01]" : " ")); 2849 device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n", 2850 (tmp & 0x00000080 ? "[0x80] " : ""), 2851 (tmp & 0x00000040 ? "[0x40] " : ""), 2852 (tmp & 0x00000020 ? "[0x20] " : ""), 2853 (tmp & 0x00000010 ? "[AUTOMUTE] " : ""), 2854 (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""), 2855 (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""), 2856 (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""), 2857 (tmp & 0x00000001 ? "[AUDIOENABLE]" : " ")); 2858 2859 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2860 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2861 device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp); 2862 device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )"); 2863 printf(" : %s%s%s%s%s%s%s%s\n", 2864 (tmp & 0x8000 ? "[Rear Speakers] " : ""), 2865 (tmp & 0x4000 ? "[Front Speakers] " : ""), 2866 (tmp & 0x2000 ? "[0x20] " : ""), 2867 (tmp & 0x1000 ? "[0x10] " : ""), 2868 (tmp & 0x0800 ? "[0x08] " : ""), 2869 (tmp & 0x0400 ? "[0x04] " : ""), 2870 (tmp & 0x0200 ? "[0x02] " : ""), 2871 (tmp & 0x0100 ? "[AudigyDrive Phones]" : " ")); 2872 device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )"); 2873 printf(" : %s%s%s%s%s%s%s%s\n", 2874 (tmp & 0x0080 ? "[0x80] " : ""), 2875 (tmp & 0x0040 ? "[Mute AnalogOut] " : ""), 2876 (tmp & 0x0020 ? "[0x20] " : ""), 2877 (tmp & 0x0010 ? "[0x10] " : ""), 2878 (tmp & 0x0008 ? "[0x08] " : ""), 2879 (tmp & 0x0004 ? "[GPOUT0] " : ""), 2880 (tmp & 0x0002 ? "[GPOUT1] " : ""), 2881 (tmp & 0x0001 ? "[GPOUT2]" : " ")); 2882 } /* is_emu10k2 or ca* */ 2883 } /* bootverbose */ 2884 return (0); 2885 } 2886 2887 static int 2888 emu_uninit(struct emu_sc_info *sc) 2889 { 2890 uint32_t ch; 2891 struct emu_memblk *blk; 2892 2893 emu_wr(sc, EMU_INTE, 0, 4); 2894 for (ch = 0; ch < NUM_G; ch++) 2895 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2896 for (ch = 0; ch < NUM_G; ch++) { 2897 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0); 2898 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0); 2899 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2900 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2901 } 2902 2903 /* disable audio and lock cache */ 2904 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2905 2906 emu_wrptr(sc, 0, EMU_PTB, 0); 2907 /* reset recording buffers */ 2908 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2909 emu_wrptr(sc, 0, EMU_MICBA, 0); 2910 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2911 emu_wrptr(sc, 0, EMU_FXBA, 0); 2912 emu_wrptr(sc, 0, EMU_FXWC, 0); 2913 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2914 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2915 emu_wrptr(sc, 0, EMU_TCB, 0); 2916 emu_wrptr(sc, 0, EMU_TCBS, 0); 2917 2918 /* disable channel interrupt */ 2919 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2920 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2921 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2922 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2923 2924 if (!SLIST_EMPTY(&sc->mem.blocks)) 2925 device_printf(sc->dev, "warning: memblock list not empty\n"); 2926 2927 SLIST_FOREACH(blk, &sc->mem.blocks, link) 2928 if (blk != NULL) 2929 device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner); 2930 2931 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2932 emu_free(&sc->mem, sc->mem.silent_page, sc->mem.silent_map); 2933 2934 return (0); 2935 } 2936 2937 static int 2938 emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result) 2939 { 2940 struct sndcard_func *func = device_get_ivars(dev); 2941 struct emu_sc_info *sc = device_get_softc(bus); 2942 2943 if (func==NULL) 2944 return (ENOMEM); 2945 if (sc == NULL) 2946 return (ENOMEM); 2947 2948 switch (ivar_index) { 2949 case EMU_VAR_FUNC: 2950 *result = func->func; 2951 break; 2952 case EMU_VAR_ROUTE: 2953 if (func->varinfo == NULL) 2954 return (ENOMEM); 2955 *result = ((struct emu_pcminfo *)func->varinfo)->route; 2956 break; 2957 case EMU_VAR_ISEMU10K1: 2958 *result = sc->is_emu10k1; 2959 break; 2960 case EMU_VAR_MCH_DISABLED: 2961 *result = sc->mch_disabled; 2962 break; 2963 case EMU_VAR_MCH_REC: 2964 *result = sc->mch_rec; 2965 break; 2966 default: 2967 return (ENOENT); 2968 } 2969 2970 return (0); 2971 } 2972 2973 static int 2974 emu_write_ivar(device_t bus __unused, device_t dev __unused, 2975 int ivar_index, uintptr_t value __unused) 2976 { 2977 2978 switch (ivar_index) { 2979 case 0: 2980 return (EINVAL); 2981 2982 default: 2983 return (ENOENT); 2984 } 2985 } 2986 2987 static int 2988 emu_pci_probe(device_t dev) 2989 { 2990 struct sbuf *s; 2991 unsigned int thiscard = 0; 2992 uint16_t vendor; 2993 2994 vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2); 2995 if (vendor != 0x1102) 2996 return (ENXIO); /* Not Creative */ 2997 2998 thiscard = emu_getcard(dev); 2999 if (thiscard == 0) 3000 return (ENXIO); 3001 3002 s = sbuf_new(NULL, NULL, 4096, 0); 3003 if (s == NULL) 3004 return (ENOMEM); 3005 sbuf_printf(s, "Creative %s [%s]", emu_cards[thiscard].desc, emu_cards[thiscard].SBcode); 3006 sbuf_finish(s); 3007 3008 device_set_desc_copy(dev, sbuf_data(s)); 3009 3010 sbuf_delete(s); 3011 3012 return (BUS_PROBE_DEFAULT); 3013 } 3014 3015 static int 3016 emu_pci_attach(device_t dev) 3017 { 3018 struct sndcard_func *func; 3019 struct emu_sc_info *sc; 3020 struct emu_pcminfo *pcminfo; 3021 #if 0 3022 struct emu_midiinfo *midiinfo; 3023 #endif 3024 int i; 3025 int device_flags; 3026 char status[255]; 3027 int error = ENXIO; 3028 int unit; 3029 3030 sc = device_get_softc(dev); 3031 unit = device_get_unit(dev); 3032 3033 /* Get configuration */ 3034 3035 sc->ctx = device_get_sysctl_ctx(dev); 3036 if (sc->ctx == NULL) 3037 goto bad; 3038 sc->root = device_get_sysctl_tree(dev); 3039 if (sc->root == NULL) 3040 goto bad; 3041 3042 if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled))) 3043 RANGE(sc->mch_disabled, 0, 1); 3044 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3045 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3046 OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting"); 3047 3048 if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec))) 3049 RANGE(sc->mch_rec, 0, 1); 3050 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3051 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3052 OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting"); 3053 3054 if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level))) 3055 RANGE(sc->mch_rec, 0, 2); 3056 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3057 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3058 OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level"); 3059 3060 /* Fill in the softc. */ 3061 mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF); 3062 mtx_init(&sc->rw, device_get_nameunit(dev), "exclusive io", MTX_DEF); 3063 sc->dev = dev; 3064 sc->type = pci_get_devid(dev); 3065 sc->rev = pci_get_revid(dev); 3066 sc->enable_ir = 0; 3067 sc->has_ac97 = 0; 3068 sc->has_51 = 0; 3069 sc->has_71 = 0; 3070 sc->broken_digital = 0; 3071 sc->is_emu10k1 = 0; 3072 sc->is_emu10k2 = 0; 3073 sc->is_ca0102 = 0; 3074 sc->is_ca0108 = 0; 3075 sc->is_cardbus = 0; 3076 3077 device_flags = emu_cards[emu_getcard(dev)].flags; 3078 if (device_flags & HAS_51) 3079 sc->has_51 = 1; 3080 if (device_flags & HAS_71) { 3081 sc->has_51 = 1; 3082 sc->has_71 = 1; 3083 } 3084 if (device_flags & IS_EMU10K1) 3085 sc->is_emu10k1 = 1; 3086 if (device_flags & IS_EMU10K2) 3087 sc->is_emu10k2 = 1; 3088 if (device_flags & IS_CA0102) 3089 sc->is_ca0102 = 1; 3090 if (device_flags & IS_CA0108) 3091 sc->is_ca0108 = 1; 3092 if ((sc->is_emu10k2) && (sc->rev == 4)) { 3093 sc->is_emu10k2 = 0; 3094 sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */ 3095 } 3096 if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1)) 3097 if (device_flags & IS_CARDBUS) 3098 sc->is_cardbus = 1; 3099 3100 if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) { 3101 device_printf(sc->dev, "Unable to detect HW chipset\n"); 3102 goto bad; 3103 } 3104 if (device_flags & BROKEN_DIGITAL) 3105 sc->broken_digital = 1; 3106 if (device_flags & HAS_AC97) 3107 sc->has_ac97 = 1; 3108 3109 sc->opcode_shift = 0; 3110 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 3111 sc->opcode_shift = 24; 3112 sc->high_operand_shift = 12; 3113 3114 /* DSP map */ 3115 /* sc->fx_base = 0x0 */ 3116 sc->input_base = 0x40; 3117 /* sc->p16vinput_base = 0x50; */ 3118 sc->output_base = 0x60; 3119 sc->efxc_base = 0x80; 3120 /* sc->output32h_base = 0xa0; */ 3121 /* sc->output32l_base = 0xb0; */ 3122 sc->dsp_zero = 0xc0; 3123 /* 0xe0...0x100 are unknown */ 3124 /* sc->tram_base = 0x200 */ 3125 /* sc->tram_addr_base = 0x300 */ 3126 sc->gpr_base = EMU_A_FXGPREGBASE; 3127 sc->num_gprs = 0x200; 3128 sc->code_base = EMU_A_MICROCODEBASE; 3129 sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words, 3130 * 1024 instructions */ 3131 3132 sc->mchannel_fx = 8; 3133 sc->num_fxbuses = 16; 3134 sc->num_inputs = 8; 3135 sc->num_outputs = 16; 3136 sc->address_mask = EMU_A_PTR_ADDR_MASK; 3137 } 3138 if (sc->is_emu10k1) { 3139 sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */ 3140 sc->opcode_shift = 20; 3141 sc->high_operand_shift = 10; 3142 sc->code_base = EMU_MICROCODEBASE; 3143 sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words, 3144 * 512 instructions */ 3145 sc->gpr_base = EMU_FXGPREGBASE; 3146 sc->num_gprs = 0x100; 3147 sc->input_base = 0x10; 3148 sc->output_base = 0x20; 3149 /* 3150 * XXX 5.1 Analog outputs are inside efxc address space! 3151 * They use output+0x11/+0x12 (=efxc+1/+2). 3152 * Don't use this efx registers for recording on SB Live! 5.1! 3153 */ 3154 sc->efxc_base = 0x30; 3155 sc->dsp_zero = 0x40; 3156 sc->mchannel_fx = 0; 3157 sc->num_fxbuses = 8; 3158 sc->num_inputs = 8; 3159 sc->num_outputs = 16; 3160 sc->address_mask = EMU_PTR_ADDR_MASK; 3161 } 3162 if (sc->opcode_shift == 0) 3163 goto bad; 3164 3165 pci_enable_busmaster(dev); 3166 3167 i = PCIR_BAR(0); 3168 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE); 3169 if (sc->reg == NULL) { 3170 device_printf(dev, "unable to map register space\n"); 3171 goto bad; 3172 } 3173 sc->st = rman_get_bustag(sc->reg); 3174 sc->sh = rman_get_bushandle(sc->reg); 3175 3176 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 3177 sc->timer[i] = 0; /* disable it */ 3178 3179 i = 0; 3180 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE); 3181 if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, 3182 NULL, 3183 emu_intr, sc, &sc->ih)) { 3184 device_printf(dev, "unable to map interrupt\n"); 3185 goto bad; 3186 } 3187 if (emu_rm_init(sc) != 0) { 3188 device_printf(dev, "unable to create resource manager\n"); 3189 goto bad; 3190 } 3191 if (sc->is_cardbus) 3192 if (emu_cardbus_init(sc) != 0) { 3193 device_printf(dev, "unable to initialize CardBus interface\n"); 3194 goto bad; 3195 } 3196 if (emu_init(sc) != 0) { 3197 device_printf(dev, "unable to initialize the card\n"); 3198 goto bad; 3199 } 3200 if (emu10kx_dev_init(sc) != 0) { 3201 device_printf(dev, "unable to create control device\n"); 3202 goto bad; 3203 } 3204 snprintf(status, 255, "rev %d at io 0x%jx irq %jd", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq)); 3205 3206 /* Voices */ 3207 for (i = 0; i < NUM_G; i++) { 3208 sc->voice[i].vnum = i; 3209 sc->voice[i].slave = NULL; 3210 sc->voice[i].busy = 0; 3211 sc->voice[i].ismaster = 0; 3212 sc->voice[i].running = 0; 3213 sc->voice[i].b16 = 0; 3214 sc->voice[i].stereo = 0; 3215 sc->voice[i].speed = 0; 3216 sc->voice[i].start = 0; 3217 sc->voice[i].end = 0; 3218 } 3219 3220 /* PCM Audio */ 3221 for (i = 0; i < RT_COUNT; i++) 3222 sc->pcm[i] = NULL; 3223 3224 /* FRONT */ 3225 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3226 if (func == NULL) { 3227 error = ENOMEM; 3228 goto bad; 3229 } 3230 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3231 if (pcminfo == NULL) { 3232 error = ENOMEM; 3233 goto bad; 3234 } 3235 pcminfo->card = sc; 3236 pcminfo->route = RT_FRONT; 3237 3238 func->func = SCF_PCM; 3239 func->varinfo = pcminfo; 3240 sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1); 3241 device_set_ivars(sc->pcm[RT_FRONT], func); 3242 3243 if (!(sc->mch_disabled)) { 3244 /* REAR */ 3245 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3246 if (func == NULL) { 3247 error = ENOMEM; 3248 goto bad; 3249 } 3250 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3251 if (pcminfo == NULL) { 3252 error = ENOMEM; 3253 goto bad; 3254 } 3255 pcminfo->card = sc; 3256 pcminfo->route = RT_REAR; 3257 3258 func->func = SCF_PCM; 3259 func->varinfo = pcminfo; 3260 sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1); 3261 device_set_ivars(sc->pcm[RT_REAR], func); 3262 if (sc->has_51) { 3263 /* CENTER */ 3264 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3265 if (func == NULL) { 3266 error = ENOMEM; 3267 goto bad; 3268 } 3269 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3270 if (pcminfo == NULL) { 3271 error = ENOMEM; 3272 goto bad; 3273 } 3274 pcminfo->card = sc; 3275 pcminfo->route = RT_CENTER; 3276 3277 func->func = SCF_PCM; 3278 func->varinfo = pcminfo; 3279 sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1); 3280 device_set_ivars(sc->pcm[RT_CENTER], func); 3281 /* SUB */ 3282 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3283 if (func == NULL) { 3284 error = ENOMEM; 3285 goto bad; 3286 } 3287 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3288 if (pcminfo == NULL) { 3289 error = ENOMEM; 3290 goto bad; 3291 } 3292 pcminfo->card = sc; 3293 pcminfo->route = RT_SUB; 3294 3295 func->func = SCF_PCM; 3296 func->varinfo = pcminfo; 3297 sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1); 3298 device_set_ivars(sc->pcm[RT_SUB], func); 3299 } 3300 if (sc->has_71) { 3301 /* SIDE */ 3302 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3303 if (func == NULL) { 3304 error = ENOMEM; 3305 goto bad; 3306 } 3307 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3308 if (pcminfo == NULL) { 3309 error = ENOMEM; 3310 goto bad; 3311 } 3312 pcminfo->card = sc; 3313 pcminfo->route = RT_SIDE; 3314 3315 func->func = SCF_PCM; 3316 func->varinfo = pcminfo; 3317 sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1); 3318 device_set_ivars(sc->pcm[RT_SIDE], func); 3319 } 3320 } /* mch_disabled */ 3321 3322 if (sc->mch_rec) { 3323 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3324 if (func == NULL) { 3325 error = ENOMEM; 3326 goto bad; 3327 } 3328 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3329 if (pcminfo == NULL) { 3330 error = ENOMEM; 3331 goto bad; 3332 } 3333 pcminfo->card = sc; 3334 pcminfo->route = RT_MCHRECORD; 3335 3336 func->func = SCF_PCM; 3337 func->varinfo = pcminfo; 3338 sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1); 3339 device_set_ivars(sc->pcm[RT_MCHRECORD], func); 3340 } /*mch_rec */ 3341 3342 for (i = 0; i < 2; i++) 3343 sc->midi[i] = NULL; 3344 3345 /* MIDI has some memory mangament and (possible) locking problems */ 3346 #if 0 3347 /* Midi Interface 1: Live!, Audigy, Audigy 2 */ 3348 if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) { 3349 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3350 if (func == NULL) { 3351 error = ENOMEM; 3352 goto bad; 3353 } 3354 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3355 if (midiinfo == NULL) { 3356 error = ENOMEM; 3357 goto bad; 3358 } 3359 midiinfo->card = sc; 3360 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3361 midiinfo->port = EMU_A_MUDATA1; 3362 midiinfo->portnr = 1; 3363 } 3364 if (sc->is_emu10k1) { 3365 midiinfo->port = MUDATA; 3366 midiinfo->portnr = 1; 3367 } 3368 func->func = SCF_MIDI; 3369 func->varinfo = midiinfo; 3370 sc->midi[0] = device_add_child(dev, "midi", -1); 3371 device_set_ivars(sc->midi[0], func); 3372 } 3373 /* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */ 3374 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3375 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3376 if (func == NULL) { 3377 error = ENOMEM; 3378 goto bad; 3379 } 3380 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3381 if (midiinfo == NULL) { 3382 error = ENOMEM; 3383 goto bad; 3384 } 3385 midiinfo->card = sc; 3386 3387 midiinfo->port = EMU_A_MUDATA2; 3388 midiinfo->portnr = 2; 3389 3390 func->func = SCF_MIDI; 3391 func->varinfo = midiinfo; 3392 sc->midi[1] = device_add_child(dev, "midi", -1); 3393 device_set_ivars(sc->midi[1], func); 3394 } 3395 #endif 3396 return (bus_generic_attach(dev)); 3397 3398 bad: 3399 /* XXX can we just call emu_pci_detach here? */ 3400 if (sc->cdev) 3401 emu10kx_dev_uninit(sc); 3402 if (sc->rm != NULL) 3403 emu_rm_uninit(sc); 3404 if (sc->reg) 3405 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3406 if (sc->ih) 3407 bus_teardown_intr(dev, sc->irq, sc->ih); 3408 if (sc->irq) 3409 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3410 mtx_destroy(&sc->rw); 3411 mtx_destroy(&sc->lock); 3412 return (error); 3413 } 3414 3415 static int 3416 emu_pci_detach(device_t dev) 3417 { 3418 struct emu_sc_info *sc; 3419 struct sndcard_func *func; 3420 int devcount, i; 3421 device_t *childlist; 3422 int r = 0; 3423 3424 sc = device_get_softc(dev); 3425 3426 for (i = 0; i < RT_COUNT; i++) { 3427 if (sc->pcm[i] != NULL) { 3428 func = device_get_ivars(sc->pcm[i]); 3429 if (func != NULL && func->func == SCF_PCM) { 3430 device_set_ivars(sc->pcm[i], NULL); 3431 free(func->varinfo, M_DEVBUF); 3432 free(func, M_DEVBUF); 3433 } 3434 r = device_delete_child(dev, sc->pcm[i]); 3435 if (r) return (r); 3436 } 3437 } 3438 3439 if (sc->midi[0] != NULL) { 3440 func = device_get_ivars(sc->midi[0]); 3441 if (func != NULL && func->func == SCF_MIDI) { 3442 device_set_ivars(sc->midi[0], NULL); 3443 free(func->varinfo, M_DEVBUF); 3444 free(func, M_DEVBUF); 3445 } 3446 r = device_delete_child(dev, sc->midi[0]); 3447 if (r) return (r); 3448 } 3449 3450 if (sc->midi[1] != NULL) { 3451 func = device_get_ivars(sc->midi[1]); 3452 if (func != NULL && func->func == SCF_MIDI) { 3453 device_set_ivars(sc->midi[1], NULL); 3454 free(func->varinfo, M_DEVBUF); 3455 free(func, M_DEVBUF); 3456 } 3457 r = device_delete_child(dev, sc->midi[1]); 3458 if (r) return (r); 3459 } 3460 3461 if (device_get_children(dev, &childlist, &devcount) == 0) 3462 for (i = 0; i < devcount - 1; i++) { 3463 device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i])); 3464 func = device_get_ivars(childlist[i]); 3465 if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) { 3466 device_set_ivars(childlist[i], NULL); 3467 free(func->varinfo, M_DEVBUF); 3468 free(func, M_DEVBUF); 3469 } 3470 device_delete_child(dev, childlist[i]); 3471 } 3472 if (childlist != NULL) 3473 free(childlist, M_TEMP); 3474 3475 r = emu10kx_dev_uninit(sc); 3476 if (r) 3477 return (r); 3478 3479 /* shutdown chip */ 3480 emu_uninit(sc); 3481 emu_rm_uninit(sc); 3482 3483 if (sc->mem.dmat) 3484 bus_dma_tag_destroy(sc->mem.dmat); 3485 3486 if (sc->reg) 3487 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3488 bus_teardown_intr(dev, sc->irq, sc->ih); 3489 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3490 mtx_destroy(&sc->rw); 3491 mtx_destroy(&sc->lock); 3492 3493 return (bus_generic_detach(dev)); 3494 } 3495 /* add suspend, resume */ 3496 static device_method_t emu_methods[] = { 3497 /* Device interface */ 3498 DEVMETHOD(device_probe, emu_pci_probe), 3499 DEVMETHOD(device_attach, emu_pci_attach), 3500 DEVMETHOD(device_detach, emu_pci_detach), 3501 /* Bus methods */ 3502 DEVMETHOD(bus_read_ivar, emu_read_ivar), 3503 DEVMETHOD(bus_write_ivar, emu_write_ivar), 3504 3505 DEVMETHOD_END 3506 }; 3507 3508 static driver_t emu_driver = { 3509 "emu10kx", 3510 emu_methods, 3511 sizeof(struct emu_sc_info), 3512 NULL, 3513 0, 3514 NULL 3515 }; 3516 3517 static int 3518 emu_modevent(module_t mod __unused, int cmd, void *data __unused) 3519 { 3520 int err = 0; 3521 3522 switch (cmd) { 3523 case MOD_LOAD: 3524 break; /* Success */ 3525 3526 case MOD_UNLOAD: 3527 case MOD_SHUTDOWN: 3528 3529 /* XXX Should we check state of pcm & midi subdevices here? */ 3530 3531 break; /* Success */ 3532 3533 default: 3534 err = EINVAL; 3535 break; 3536 } 3537 3538 return (err); 3539 3540 } 3541 3542 DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_modevent, NULL); 3543 MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER);
Cache object: 5346f62fb0d02349bc4f5f8f164aa264
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