1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
5 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD$
30 */
31
32 #include <sys/param.h>
33 #include <sys/types.h>
34 #include <sys/bus.h>
35 #include <machine/bus.h>
36 #include <sys/rman.h>
37 #include <sys/systm.h>
38 #include <sys/sbuf.h>
39 #include <sys/queue.h>
40 #include <sys/lock.h>
41 #include <sys/mutex.h>
42 #include <sys/sysctl.h>
43 #include <sys/kdb.h>
44
45 #include <dev/pci/pcireg.h>
46 #include <dev/pci/pcivar.h>
47
48 #include <machine/clock.h> /* for DELAY */
49
50 #ifdef HAVE_KERNEL_OPTION_HEADERS
51 #include "opt_snd.h"
52 #endif
53
54 #include <dev/sound/chip.h>
55 #include <dev/sound/pcm/sound.h>
56 #include <dev/sound/pcm/ac97.h>
57
58 #include <dev/sound/pci/emuxkireg.h>
59 #include <dev/sound/pci/emu10kx.h>
60
61 /* hw flags */
62 #define HAS_51 0x0001
63 #define HAS_71 0x0002
64 #define HAS_AC97 0x0004
65
66 #define IS_EMU10K1 0x0008
67 #define IS_EMU10K2 0x0010
68 #define IS_CA0102 0x0020
69 #define IS_CA0108 0x0040
70 #define IS_UNKNOWN 0x0080
71
72 #define BROKEN_DIGITAL 0x0100
73 #define DIGITAL_ONLY 0x0200
74
75 #define IS_CARDBUS 0x0400
76
77 #define MODE_ANALOG 1
78 #define MODE_DIGITAL 2
79 #define SPDIF_MODE_PCM 1
80 #define SPDIF_MODE_AC3 2
81
82 #define MACS 0x0
83 #define MACS1 0x1
84 #define MACW 0x2
85 #define MACW1 0x3
86 #define MACINTS 0x4
87 #define MACINTW 0x5
88 #define ACC3 0x6
89 #define MACMV 0x7
90 #define ANDXOR 0x8
91 #define TSTNEG 0x9
92 #define LIMIT 0xA
93 #define LIMIT1 0xB
94 #define LOG 0xC
95 #define EXP 0xD
96 #define INTERP 0xE
97 #define SKIP 0xF
98
99 #define GPR(i) (sc->gpr_base+(i))
100 #define INP(i) (sc->input_base+(i))
101 #define OUTP(i) (sc->output_base+(i))
102 #define FX(i) (i)
103 #define FX2(i) (sc->efxc_base+(i))
104 #define DSP_CONST(i) (sc->dsp_zero+(i))
105
106 #define COND_NORMALIZED DSP_CONST(0x1)
107 #define COND_BORROW DSP_CONST(0x2)
108 #define COND_MINUS DSP_CONST(0x3)
109 #define COND_LESS_ZERO DSP_CONST(0x4)
110 #define COND_EQ_ZERO DSP_CONST(0x5)
111 #define COND_SATURATION DSP_CONST(0x6)
112 #define COND_NEQ_ZERO DSP_CONST(0x8)
113
114 #define DSP_ACCUM DSP_CONST(0x16)
115 #define DSP_CCR DSP_CONST(0x17)
116
117 /* Live! Inputs */
118 #define IN_AC97_L 0x00
119 #define IN_AC97_R 0x01
120 #define IN_AC97 IN_AC97_L
121 #define IN_SPDIF_CD_L 0x02
122 #define IN_SPDIF_CD_R 0x03
123 #define IN_SPDIF_CD IN_SPDIF_CD_L
124 #define IN_ZOOM_L 0x04
125 #define IN_ZOOM_R 0x05
126 #define IN_ZOOM IN_ZOOM_L
127 #define IN_TOSLINK_L 0x06
128 #define IN_TOSLINK_R 0x07
129 #define IN_TOSLINK IN_TOSLINK_L
130 #define IN_LINE1_L 0x08
131 #define IN_LINE1_R 0x09
132 #define IN_LINE1 IN_LINE1_L
133 #define IN_COAX_SPDIF_L 0x0a
134 #define IN_COAX_SPDIF_R 0x0b
135 #define IN_COAX_SPDIF IN_COAX_SPDIF_L
136 #define IN_LINE2_L 0x0c
137 #define IN_LINE2_R 0x0d
138 #define IN_LINE2 IN_LINE2_L
139 #define IN_0E 0x0e
140 #define IN_0F 0x0f
141
142 /* Outputs */
143 #define OUT_AC97_L 0x00
144 #define OUT_AC97_R 0x01
145 #define OUT_AC97 OUT_AC97_L
146 #define OUT_A_FRONT OUT_AC97
147 #define OUT_TOSLINK_L 0x02
148 #define OUT_TOSLINK_R 0x03
149 #define OUT_TOSLINK OUT_TOSLINK_L
150 #define OUT_D_CENTER 0x04
151 #define OUT_D_SUB 0x05
152 #define OUT_HEADPHONE_L 0x06
153 #define OUT_HEADPHONE_R 0x07
154 #define OUT_HEADPHONE OUT_HEADPHONE_L
155 #define OUT_REAR_L 0x08
156 #define OUT_REAR_R 0x09
157 #define OUT_REAR OUT_REAR_L
158 #define OUT_ADC_REC_L 0x0a
159 #define OUT_ADC_REC_R 0x0b
160 #define OUT_ADC_REC OUT_ADC_REC_L
161 #define OUT_MIC_CAP 0x0c
162
163 /* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */
164 #define OUT_A_CENTER 0x11
165 #define OUT_A_SUB 0x12
166
167 /* Audigy Inputs */
168 #define A_IN_AC97_L 0x00
169 #define A_IN_AC97_R 0x01
170 #define A_IN_AC97 A_IN_AC97_L
171 #define A_IN_SPDIF_CD_L 0x02
172 #define A_IN_SPDIF_CD_R 0x03
173 #define A_IN_SPDIF_CD A_IN_SPDIF_CD_L
174 #define A_IN_O_SPDIF_L 0x04
175 #define A_IN_O_SPDIF_R 0x05
176 #define A_IN_O_SPDIF A_IN_O_SPDIF_L
177 #define A_IN_LINE2_L 0x08
178 #define A_IN_LINE2_R 0x09
179 #define A_IN_LINE2 A_IN_LINE2_L
180 #define A_IN_R_SPDIF_L 0x0a
181 #define A_IN_R_SPDIF_R 0x0b
182 #define A_IN_R_SPDIF A_IN_R_SPDIF_L
183 #define A_IN_AUX2_L 0x0c
184 #define A_IN_AUX2_R 0x0d
185 #define A_IN_AUX2 A_IN_AUX2_L
186
187 /* Audigy Outputs */
188 #define A_OUT_D_FRONT_L 0x00
189 #define A_OUT_D_FRONT_R 0x01
190 #define A_OUT_D_FRONT A_OUT_D_FRONT_L
191 #define A_OUT_D_CENTER 0x02
192 #define A_OUT_D_SUB 0x03
193 #define A_OUT_D_SIDE_L 0x04
194 #define A_OUT_D_SIDE_R 0x05
195 #define A_OUT_D_SIDE A_OUT_D_SIDE_L
196 #define A_OUT_D_REAR_L 0x06
197 #define A_OUT_D_REAR_R 0x07
198 #define A_OUT_D_REAR A_OUT_D_REAR_L
199
200 /* on Audigy Platinum only */
201 #define A_OUT_HPHONE_L 0x04
202 #define A_OUT_HPHONE_R 0x05
203 #define A_OUT_HPHONE A_OUT_HPHONE_L
204
205 #define A_OUT_A_FRONT_L 0x08
206 #define A_OUT_A_FRONT_R 0x09
207 #define A_OUT_A_FRONT A_OUT_A_FRONT_L
208 #define A_OUT_A_CENTER 0x0a
209 #define A_OUT_A_SUB 0x0b
210 #define A_OUT_A_SIDE_L 0x0c
211 #define A_OUT_A_SIDE_R 0x0d
212 #define A_OUT_A_SIDE A_OUT_A_SIDE_L
213 #define A_OUT_A_REAR_L 0x0e
214 #define A_OUT_A_REAR_R 0x0f
215 #define A_OUT_A_REAR A_OUT_A_REAR_L
216 #define A_OUT_AC97_L 0x10
217 #define A_OUT_AC97_R 0x11
218 #define A_OUT_AC97 A_OUT_AC97_L
219 #define A_OUT_ADC_REC_L 0x16
220 #define A_OUT_ADC_REC_R 0x17
221 #define A_OUT_ADC_REC A_OUT_ADC_REC_L
222
223 #define EMU_DATA2 0x24
224 #define EMU_IPR2 0x28
225 #define EMU_INTE2 0x2c
226 #define EMU_IPR3 0x38
227 #define EMU_INTE3 0x3c
228
229 #define EMU_A2_SRCSel 0x60
230 #define EMU_A2_SRCMULTI_ENABLE 0x6e
231
232 #define EMU_A_I2S_CAPTURE_96000 0x00000400
233
234 #define EMU_A2_MIXER_I2S_ENABLE 0x7B
235 #define EMU_A2_MIXER_SPDIF_ENABLE 0x7A
236
237 #define C_FRONT_L 0
238 #define C_FRONT_R 1
239 #define C_REC_L 2
240 #define C_REC_R 3
241 #define C_REAR_L 4
242 #define C_REAR_R 5
243 #define C_CENTER 6
244 #define C_SUB 7
245 #define C_SIDE_L 8
246 #define C_SIDE_R 9
247 #define NUM_CACHES 10
248
249 #define CDSPDIFMUTE 0
250 #define ANALOGMUTE 1
251 #define NUM_MUTE 2
252
253 #define EMU_MAX_GPR 512
254 #define EMU_MAX_IRQ_CONSUMERS 32
255
256 struct emu_voice {
257 int vnum;
258 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1;
259 int speed;
260 int start;
261 int end;
262 int vol;
263 uint32_t buf;
264 void *vbuf;
265 struct emu_voice *slave;
266 uint32_t sa;
267 uint32_t ea;
268 uint32_t routing[8];
269 uint32_t amounts[8];
270 };
271
272 struct emu_memblk {
273 SLIST_ENTRY(emu_memblk) link;
274 void *buf;
275 char owner[16];
276 bus_addr_t buf_addr;
277 uint32_t pte_start, pte_size;
278 bus_dmamap_t buf_map;
279 };
280
281 struct emu_mem {
282 uint8_t bmap[EMU_MAXPAGES / 8];
283 uint32_t *ptb_pages;
284 void *silent_page;
285 bus_addr_t ptb_pages_addr;
286 bus_addr_t silent_page_addr;
287 bus_dmamap_t ptb_map;
288 bus_dmamap_t silent_map;
289 bus_dma_tag_t dmat;
290 struct emu_sc_info *card;
291 SLIST_HEAD(, emu_memblk) blocks;
292 };
293
294 /* rm */
295 struct emu_rm {
296 struct emu_sc_info *card;
297 struct mtx gpr_lock;
298 signed int allocmap[EMU_MAX_GPR];
299 int num_gprs;
300 int last_free_gpr;
301 int num_used;
302 };
303
304 struct emu_intr_handler {
305 void* softc;
306 uint32_t intr_mask;
307 uint32_t inte_mask;
308 uint32_t(*irq_func) (void *softc, uint32_t irq);
309 };
310
311 struct emu_sc_info {
312 struct mtx lock;
313 struct mtx rw; /* Hardware exclusive access lock */
314
315 /* Hardware and subdevices */
316 device_t dev;
317 device_t pcm[RT_COUNT];
318 device_t midi[2];
319 uint32_t type;
320 uint32_t rev;
321
322 bus_space_tag_t st;
323 bus_space_handle_t sh;
324
325 struct cdev *cdev; /* /dev/emu10k character device */
326 struct mtx emu10kx_lock;
327 int emu10kx_isopen;
328 struct sbuf emu10kx_sbuf;
329 int emu10kx_bufptr;
330
331
332 /* Resources */
333 struct resource *reg;
334 struct resource *irq;
335 void *ih;
336
337 /* IRQ handlers */
338 struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS];
339
340 /* Card HW configuration */
341 unsigned int mode; /* analog / digital */
342 unsigned int mchannel_fx;
343 unsigned int dsp_zero;
344 unsigned int code_base;
345 unsigned int code_size;
346 unsigned int gpr_base;
347 unsigned int num_gprs;
348 unsigned int input_base;
349 unsigned int output_base;
350 unsigned int efxc_base;
351 unsigned int opcode_shift;
352 unsigned int high_operand_shift;
353 unsigned int address_mask;
354 uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1,
355 has_ac97:1, has_51:1, has_71:1,
356 enable_ir:1,
357 broken_digital:1, is_cardbus:1;
358
359 signed int mch_disabled, mch_rec, dbg_level;
360 signed int num_inputs;
361 unsigned int num_outputs;
362 unsigned int num_fxbuses;
363 unsigned int routing_code_start;
364 unsigned int routing_code_end;
365
366 /* HW resources */
367 struct emu_voice voice[NUM_G]; /* Hardware voices */
368 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */
369 int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */
370 int timerinterval;
371 struct emu_rm *rm;
372 struct emu_mem mem; /* memory */
373
374 /* Mixer */
375 int mixer_gpr[NUM_MIXERS];
376 int mixer_volcache[NUM_MIXERS];
377 int cache_gpr[NUM_CACHES];
378 int dummy_gpr;
379 int mute_gpr[NUM_MUTE];
380 struct sysctl_ctx_list *ctx;
381 struct sysctl_oid *root;
382 };
383
384 static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error);
385 static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, bus_dmamap_t *map);
386 static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map);
387 static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner);
388 static int emu_memfree(struct emu_mem *mem, void *membuf);
389 static int emu_memstart(struct emu_mem *mem, void *membuf);
390
391 /* /dev */
392 static int emu10kx_dev_init(struct emu_sc_info *sc);
393 static int emu10kx_dev_uninit(struct emu_sc_info *sc);
394 static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s);
395
396 static void emumix_set_mode(struct emu_sc_info *sc, int mode);
397 static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode);
398 static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol);
399 static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val);
400 static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS);
401
402 static int emu_rm_init(struct emu_sc_info *sc);
403 static int emu_rm_uninit(struct emu_sc_info *sc);
404 static int emu_rm_gpr_alloc(struct emu_rm *rm, int count);
405
406 static unsigned int emu_getcard(device_t dev);
407 static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size);
408 static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size);
409 static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data);
410
411 static void emu_vstop(struct emu_sc_info *sc, char channel, int enable);
412
413 static void emu_intr(void *p);
414 static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data);
415 static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc);
416 static void emu_initefx(struct emu_sc_info *sc);
417
418 static int emu_cardbus_init(struct emu_sc_info *sc);
419 static int emu_init(struct emu_sc_info *sc);
420 static int emu_uninit(struct emu_sc_info *sc);
421
422 static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result);
423 static int emu_write_ivar(device_t bus __unused, device_t dev __unused,
424 int ivar_index, uintptr_t value __unused);
425
426 static int emu_pci_probe(device_t dev);
427 static int emu_pci_attach(device_t dev);
428 static int emu_pci_detach(device_t dev);
429 static int emu_modevent(module_t mod __unused, int cmd, void *data __unused);
430
431 #ifdef SND_EMU10KX_DEBUG
432
433 #define EMU_MTX_DEBUG() do { \
434 if (mtx_owned(&sc->rw)) { \
435 printf("RW owned in %s line %d for %s\n", __func__, \
436 __LINE__ , device_get_nameunit(sc->dev)); \
437 printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \
438 printf("rw lock: value %x thread %x\n", \
439 ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \
440 (uintptr_t)curthread); \
441 printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\
442 db_show_mtx(&sc->rw); \
443 } \
444 } while (0)
445 #else
446 #define EMU_MTX_DEBUG() do { \
447 } while (0)
448 #endif
449
450 #define EMU_RWLOCK() do { \
451 EMU_MTX_DEBUG(); \
452 mtx_lock(&(sc->rw)); \
453 } while (0)
454
455 #define EMU_RWUNLOCK() do { \
456 mtx_unlock(&(sc->rw)); \
457 EMU_MTX_DEBUG(); \
458 } while (0)
459
460 /* Supported cards */
461 struct emu_hwinfo {
462 uint16_t vendor;
463 uint16_t device;
464 uint16_t subvendor;
465 uint16_t subdevice;
466 char SBcode[8];
467 char desc[32];
468 int flags;
469 };
470
471 static struct emu_hwinfo emu_cards[] = {
472 {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0},
473 /* 0x0020..0x002f 4.0 EMU10K1 cards */
474 {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
475 {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1},
476 {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1},
477
478 /* (range unknown) 5.1 EMU10K1 cards */
479 {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
480
481 /* 0x80??..0x805? 4.0 EMU10K1 cards */
482 {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
483 {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1},
484 {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
485 {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1},
486 {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
487 {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
488 {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1},
489 {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
490 {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
491 {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
492
493 /* 0x8061..0x???? 5.1 EMU10K1 cards */
494 {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
495 {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1},
496 {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
497 {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
498 {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
499 {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1},
500
501 /* Generic SB Live! */
502 {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1},
503
504 /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */
505
506 /* 0x0051..0x0051 5.1 CA0100-IAF cards */
507 {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2},
508 /* ES is CA0100-IDF chip that don't work in digital mode */
509 {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL},
510 /* 0x0053..0x005C 5.1 CA0101-NAF cards */
511 {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
512 {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
513
514 /* 0x1002..0x1009 5.1 CA0102-IAT cards */
515 {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102},
516 {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102},
517 {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102},
518
519 /* 0x2001..0x2003 7.1 CA0102-ICT cards */
520 {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
521 {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
522 /* XXX No reports about 0x2003 & 0x2004 cards */
523 {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
524 {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
525 {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
526
527 /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */
528 {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102},
529
530 /* Generic Audigy or Audigy 2 */
531 {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2},
532
533 /* We don't support CA0103-DAT (Audigy LS) cards */
534 /* There is NO CA0104-xxx cards */
535 /* There is NO CA0105-xxx cards */
536 /* We don't support CA0106-DAT (SB Live! 24 bit) cards */
537 /* There is NO CA0107-xxx cards */
538
539 /* 0x1000..0x1001 7.1 CA0108-IAT cards */
540 {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY},
541 {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
542 {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
543
544 {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS},
545
546 {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108},
547 };
548 /* Unsupported cards */
549
550 static struct emu_hwinfo emu_bad_cards[] = {
551 /* APS cards should be possible to support */
552 {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0},
553 {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0},
554 {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0},
555 /* Similar-named ("Live!" or "Audigy") cards on different chipsets */
556 {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0},
557 {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0},
558 {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0},
559 };
560
561 /*
562 * Get best known information about device.
563 */
564 static unsigned int
565 emu_getcard(device_t dev)
566 {
567 uint16_t device;
568 uint16_t subdevice;
569 unsigned int thiscard;
570 int i;
571
572 device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2);
573 subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2);
574
575 thiscard = 0;
576 for (i = 1; i < nitems(emu_cards); i++) {
577 if (device == emu_cards[i].device) {
578 if (subdevice == emu_cards[i].subdevice) {
579 thiscard = i;
580 break;
581 }
582 if (0x0000 == emu_cards[i].subdevice) {
583 thiscard = i;
584 /*
585 * don't break, we can get more specific card
586 * later in the list.
587 */
588 }
589 }
590 }
591
592 for (i = 0; i < nitems(emu_bad_cards); i++) {
593 if (device == emu_bad_cards[i].device) {
594 if (subdevice == emu_bad_cards[i].subdevice) {
595 thiscard = 0;
596 break;
597 }
598 if (0x0000 == emu_bad_cards[i].subdevice) {
599 thiscard = 0;
600 break; /* we avoid all this cards */
601 }
602 }
603 }
604 return (thiscard);
605 }
606
607
608 /*
609 * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers.
610 * Some of them are used directly, some of them provide pointer / data pairs.
611 */
612 static uint32_t
613 emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
614 {
615
616 KASSERT(sc != NULL, ("emu_rd: NULL sc"));
617 switch (size) {
618 case 1:
619 return (bus_space_read_1(sc->st, sc->sh, regno));
620 case 2:
621 return (bus_space_read_2(sc->st, sc->sh, regno));
622 case 4:
623 return (bus_space_read_4(sc->st, sc->sh, regno));
624 }
625 return (0xffffffff);
626 }
627
628 static void
629 emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
630 {
631
632 KASSERT(sc != NULL, ("emu_rd: NULL sc"));
633 switch (size) {
634 case 1:
635 bus_space_write_1(sc->st, sc->sh, regno, data);
636 break;
637 case 2:
638 bus_space_write_2(sc->st, sc->sh, regno, data);
639 break;
640 case 4:
641 bus_space_write_4(sc->st, sc->sh, regno, data);
642 break;
643 }
644 }
645 /*
646 * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made
647 * via (channel, register) pair. Some registers are channel-specific,
648 * some not.
649 */
650 uint32_t
651 emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg)
652 {
653 uint32_t ptr, val, mask, size, offset;
654
655 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
656
657 EMU_RWLOCK();
658 emu_wr_nolock(sc, EMU_PTR, ptr, 4);
659 val = emu_rd_nolock(sc, EMU_DATA, 4);
660 EMU_RWUNLOCK();
661
662 /*
663 * XXX Some register numbers has data size and offset encoded in
664 * it to get only part of 32bit register. This use is not described
665 * in register name, be careful!
666 */
667 if (reg & 0xff000000) {
668 size = (reg >> 24) & 0x3f;
669 offset = (reg >> 16) & 0x1f;
670 mask = ((1 << size) - 1) << offset;
671 val &= mask;
672 val >>= offset;
673 }
674 return (val);
675 }
676
677 void
678 emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data)
679 {
680 uint32_t ptr, mask, size, offset;
681
682 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
683
684 EMU_RWLOCK();
685 emu_wr_nolock(sc, EMU_PTR, ptr, 4);
686 /*
687 * XXX Another kind of magic encoding in register number. This can
688 * give you side effect - it will read previous data from register
689 * and change only required bits.
690 */
691 if (reg & 0xff000000) {
692 size = (reg >> 24) & 0x3f;
693 offset = (reg >> 16) & 0x1f;
694 mask = ((1 << size) - 1) << offset;
695 data <<= offset;
696 data &= mask;
697 data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask;
698 }
699 emu_wr_nolock(sc, EMU_DATA, data, 4);
700 EMU_RWUNLOCK();
701 }
702 /*
703 * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made
704 * via (channel, register) pair. Some registers are channel-specific,
705 * some not. This interface is supported by CA0102 and CA0108 chips only.
706 */
707 uint32_t
708 emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg)
709 {
710 uint32_t val;
711
712 /* XXX separate lock? */
713 EMU_RWLOCK();
714 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
715 val = emu_rd_nolock(sc, EMU_DATA2, 4);
716
717 EMU_RWUNLOCK();
718
719 return (val);
720 }
721
722 void
723 emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data)
724 {
725
726 EMU_RWLOCK();
727 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
728 emu_wr_nolock(sc, EMU_DATA2, data, 4);
729 EMU_RWUNLOCK();
730 }
731 /*
732 * XXX CardBus interface. Not tested on any real hardware.
733 */
734 static void
735 emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data)
736 {
737 uint32_t val;
738
739 /*
740 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems
741 * to be some reg/value accessible kind of config register on CardBus
742 * CA0108, with value(?) in top 16 bit, address(?) in low 16
743 */
744
745 val = emu_rd_nolock(sc, 0x38, 4);
746 emu_wr_nolock(sc, 0x38, data, 4);
747 val = emu_rd_nolock(sc, 0x38, 4);
748
749 }
750
751 /*
752 * Direct hardware register access
753 * Assume that it is never used to access EMU_PTR-based registers and can run unlocked.
754 */
755 void
756 emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
757 {
758 KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR"));
759 KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR"));
760
761 emu_wr_nolock(sc, regno, data, size);
762 }
763
764 uint32_t
765 emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
766 {
767 uint32_t rd;
768
769 KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA"));
770 KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2"));
771
772 rd = emu_rd_nolock(sc, regno, size);
773 return (rd);
774 }
775
776 /*
777 * Enabling IR MIDI messages is another kind of black magic. It just
778 * has to be made this way. It really do it.
779 */
780 void
781 emu_enable_ir(struct emu_sc_info *sc)
782 {
783 uint32_t iocfg;
784
785 if (sc->is_emu10k2 || sc->is_ca0102) {
786 iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2);
787 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2);
788 DELAY(500);
789 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2);
790 DELAY(500);
791 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2);
792 DELAY(100);
793 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2);
794 device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
795 sc->enable_ir = 1;
796 }
797 if (sc->is_emu10k1) {
798 iocfg = emu_rd_nolock(sc, EMU_HCFG, 4);
799 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4);
800 DELAY(500);
801 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4);
802 DELAY(100);
803 emu_wr_nolock(sc, EMU_HCFG, iocfg, 4);
804 device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
805 sc->enable_ir = 1;
806 }
807 }
808
809
810 /*
811 * emu_timer_ - HW timer management
812 */
813 int
814 emu_timer_create(struct emu_sc_info *sc)
815 {
816 int i, timer;
817
818 timer = -1;
819
820 mtx_lock(&sc->lock);
821 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
822 if (sc->timer[i] == 0) {
823 sc->timer[i] = -1; /* disable it */
824 timer = i;
825 mtx_unlock(&sc->lock);
826 return (timer);
827 }
828 mtx_unlock(&sc->lock);
829
830 return (-1);
831 }
832
833 int
834 emu_timer_set(struct emu_sc_info *sc, int timer, int delay)
835 {
836 int i;
837
838 if (timer < 0)
839 return (-1);
840
841 RANGE(delay, 16, 1024);
842 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
843
844 mtx_lock(&sc->lock);
845 sc->timer[timer] = delay;
846 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
847 if (sc->timerinterval > sc->timer[i])
848 sc->timerinterval = sc->timer[i];
849
850 /* XXX */
851 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
852 mtx_unlock(&sc->lock);
853
854 return (timer);
855 }
856
857 int
858 emu_timer_enable(struct emu_sc_info *sc, int timer, int go)
859 {
860 uint32_t x;
861 int ena_int;
862 int i;
863
864 if (timer < 0)
865 return (-1);
866
867 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
868
869 mtx_lock(&sc->lock);
870
871 if ((go == 1) && (sc->timer[timer] < 0))
872 sc->timer[timer] = -sc->timer[timer];
873 if ((go == 0) && (sc->timer[timer] > 0))
874 sc->timer[timer] = -sc->timer[timer];
875
876 ena_int = 0;
877 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
878 if (sc->timerinterval > sc->timer[i])
879 sc->timerinterval = sc->timer[i];
880 if (sc->timer[i] > 0)
881 ena_int = 1;
882 }
883
884 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
885
886 if (ena_int == 1) {
887 x = emu_rd(sc, EMU_INTE, 4);
888 x |= EMU_INTE_INTERTIMERENB;
889 emu_wr(sc, EMU_INTE, x, 4);
890 } else {
891 x = emu_rd(sc, EMU_INTE, 4);
892 x &= ~EMU_INTE_INTERTIMERENB;
893 emu_wr(sc, EMU_INTE, x, 4);
894 }
895 mtx_unlock(&sc->lock);
896 return (0);
897 }
898
899 int
900 emu_timer_clear(struct emu_sc_info *sc, int timer)
901 {
902 if (timer < 0)
903 return (-1);
904
905 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
906
907 emu_timer_enable(sc, timer, 0);
908
909 mtx_lock(&sc->lock);
910 if (sc->timer[timer] != 0)
911 sc->timer[timer] = 0;
912 mtx_unlock(&sc->lock);
913
914 return (timer);
915 }
916
917 /*
918 * emu_intr_ - HW interrupt handler management
919 */
920 int
921 emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc)
922 {
923 int i;
924 uint32_t x;
925
926 mtx_lock(&sc->lock);
927 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
928 if (sc->ihandler[i].inte_mask == 0) {
929 sc->ihandler[i].inte_mask = inte_mask;
930 sc->ihandler[i].intr_mask = intr_mask;
931 sc->ihandler[i].softc = isc;
932 sc->ihandler[i].irq_func = func;
933 x = emu_rd(sc, EMU_INTE, 4);
934 x |= inte_mask;
935 emu_wr(sc, EMU_INTE, x, 4);
936 mtx_unlock(&sc->lock);
937 if (sc->dbg_level > 1)
938 device_printf(sc->dev, "ihandle %d registered\n", i);
939
940 return (i);
941 }
942 mtx_unlock(&sc->lock);
943 if (sc->dbg_level > 1)
944 device_printf(sc->dev, "ihandle not registered\n");
945
946 return (-1);
947 }
948
949 int
950 emu_intr_unregister(struct emu_sc_info *sc, int hnumber)
951 {
952 uint32_t x;
953 int i;
954
955 mtx_lock(&sc->lock);
956
957 if (sc->ihandler[hnumber].inte_mask == 0) {
958 mtx_unlock(&sc->lock);
959 return (-1);
960 }
961
962 x = emu_rd(sc, EMU_INTE, 4);
963 x &= ~sc->ihandler[hnumber].inte_mask;
964
965 sc->ihandler[hnumber].inte_mask = 0;
966 sc->ihandler[hnumber].intr_mask = 0;
967 sc->ihandler[hnumber].softc = NULL;
968 sc->ihandler[hnumber].irq_func = NULL;
969
970 /* other interrupt handlers may use this EMU_INTE value */
971 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
972 if (sc->ihandler[i].inte_mask != 0)
973 x |= sc->ihandler[i].inte_mask;
974
975 emu_wr(sc, EMU_INTE, x, 4);
976
977 mtx_unlock(&sc->lock);
978 return (hnumber);
979 }
980
981 static void
982 emu_intr(void *p)
983 {
984 struct emu_sc_info *sc = (struct emu_sc_info *)p;
985 uint32_t stat, ack;
986 int i;
987
988 for (;;) {
989 stat = emu_rd(sc, EMU_IPR, 4);
990 ack = 0;
991 if (stat == 0)
992 break;
993 emu_wr(sc, EMU_IPR, stat, 4);
994 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
995 if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
996 (((void *)sc->ihandler[i].irq_func) != NULL)) {
997 ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc,
998 (sc->ihandler[i].intr_mask) & stat);
999 }
1000 }
1001 if (sc->dbg_level > 1)
1002 if (stat & (~ack))
1003 device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack));
1004
1005 }
1006
1007 if ((sc->is_ca0102) || (sc->is_ca0108))
1008 for (;;) {
1009 stat = emu_rd(sc, EMU_IPR2, 4);
1010 ack = 0;
1011 if (stat == 0)
1012 break;
1013 emu_wr(sc, EMU_IPR2, stat, 4);
1014 if (sc->dbg_level > 1)
1015 device_printf(sc->dev, "EMU_IPR2: %08x\n", stat);
1016
1017 break; /* to avoid infinite loop. should be removed
1018 * after completion of P16V interface. */
1019 }
1020
1021 if (sc->is_ca0102)
1022 for (;;) {
1023 stat = emu_rd(sc, EMU_IPR3, 4);
1024 ack = 0;
1025 if (stat == 0)
1026 break;
1027 emu_wr(sc, EMU_IPR3, stat, 4);
1028 if (sc->dbg_level > 1)
1029 device_printf(sc->dev, "EMU_IPR3: %08x\n", stat);
1030
1031 break; /* to avoid infinite loop. should be removed
1032 * after completion of S/PDIF interface */
1033 }
1034 }
1035
1036
1037 /*
1038 * Get data from private emu10kx structure for PCM buffer allocation.
1039 * Used by PCM code only.
1040 */
1041 bus_dma_tag_t
1042 emu_gettag(struct emu_sc_info *sc)
1043 {
1044 return (sc->mem.dmat);
1045 }
1046
1047 static void
1048 emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error)
1049 {
1050 bus_addr_t *phys = (bus_addr_t *) arg;
1051
1052 *phys = error ? 0 : (bus_addr_t) segs->ds_addr;
1053
1054 if (bootverbose) {
1055 printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n",
1056 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
1057 nseg, error);
1058 }
1059 }
1060
1061 static void *
1062 emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr,
1063 bus_dmamap_t *map)
1064 {
1065 void *dmabuf;
1066 int error;
1067
1068 *addr = 0;
1069 if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, map))) {
1070 if (mem->card->dbg_level > 2)
1071 device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error);
1072 return (NULL);
1073 }
1074 if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) {
1075 if (mem->card->dbg_level > 2)
1076 device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error);
1077 bus_dmamem_free(mem->dmat, dmabuf, *map);
1078 return (NULL);
1079 }
1080 return (dmabuf);
1081 }
1082
1083 static void
1084 emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map)
1085 {
1086 bus_dmamap_unload(mem->dmat, map);
1087 bus_dmamem_free(mem->dmat, dmabuf, map);
1088 }
1089
1090 static void *
1091 emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner)
1092 {
1093 uint32_t blksz, start, idx, ofs, tmp, found;
1094 struct emu_memblk *blk;
1095 void *membuf;
1096
1097 blksz = sz / EMUPAGESIZE;
1098 if (sz > (blksz * EMUPAGESIZE))
1099 blksz++;
1100 if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) {
1101 if (mem->card->dbg_level > 2)
1102 device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n");
1103 return (NULL);
1104 }
1105 /* find a free block in the bitmap */
1106 found = 0;
1107 start = 1;
1108 while (!found && start + blksz < EMU_MAXPAGES) {
1109 found = 1;
1110 for (idx = start; idx < start + blksz; idx++)
1111 if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
1112 found = 0;
1113 if (!found)
1114 start++;
1115 }
1116 if (!found) {
1117 if (mem->card->dbg_level > 2)
1118 device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n");
1119 return (NULL);
1120 }
1121 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT);
1122 if (blk == NULL) {
1123 if (mem->card->dbg_level > 2)
1124 device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n");
1125 return (NULL);
1126 }
1127 bzero(blk, sizeof(*blk));
1128 membuf = emu_malloc(mem, sz, &blk->buf_addr, &blk->buf_map);
1129 *addr = blk->buf_addr;
1130 if (membuf == NULL) {
1131 if (mem->card->dbg_level > 2)
1132 device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n");
1133 free(blk, M_DEVBUF);
1134 return (NULL);
1135 }
1136 blk->buf = membuf;
1137 blk->pte_start = start;
1138 blk->pte_size = blksz;
1139 strncpy(blk->owner, owner, 15);
1140 blk->owner[15] = '\0';
1141 ofs = 0;
1142 for (idx = start; idx < start + blksz; idx++) {
1143 mem->bmap[idx >> 3] |= 1 << (idx & 7);
1144 tmp = (uint32_t) (blk->buf_addr + ofs);
1145 mem->ptb_pages[idx] = (tmp << 1) | idx;
1146 ofs += EMUPAGESIZE;
1147 }
1148 SLIST_INSERT_HEAD(&mem->blocks, blk, link);
1149 return (membuf);
1150 }
1151
1152 static int
1153 emu_memfree(struct emu_mem *mem, void *membuf)
1154 {
1155 uint32_t idx, tmp;
1156 struct emu_memblk *blk, *i;
1157
1158 blk = NULL;
1159 SLIST_FOREACH(i, &mem->blocks, link) {
1160 if (i->buf == membuf)
1161 blk = i;
1162 }
1163 if (blk == NULL)
1164 return (EINVAL);
1165 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
1166 emu_free(mem, membuf, blk->buf_map);
1167 tmp = (uint32_t) (mem->silent_page_addr) << 1;
1168 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
1169 mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
1170 mem->ptb_pages[idx] = tmp | idx;
1171 }
1172 free(blk, M_DEVBUF);
1173 return (0);
1174 }
1175
1176 static int
1177 emu_memstart(struct emu_mem *mem, void *membuf)
1178 {
1179 struct emu_memblk *blk, *i;
1180
1181 blk = NULL;
1182 SLIST_FOREACH(i, &mem->blocks, link) {
1183 if (i->buf == membuf)
1184 blk = i;
1185 }
1186 if (blk == NULL)
1187 return (-1);
1188 return (blk->pte_start);
1189 }
1190
1191
1192 static uint32_t
1193 emu_rate_to_pitch(uint32_t rate)
1194 {
1195 static uint32_t logMagTable[128] = {
1196 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
1197 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
1198 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
1199 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
1200 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
1201 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
1202 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
1203 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
1204 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
1205 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
1206 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
1207 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
1208 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
1209 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
1210 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
1211 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
1212 };
1213 static char logSlopeTable[128] = {
1214 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
1215 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
1216 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
1217 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
1218 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
1219 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
1220 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
1221 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
1222 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
1223 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
1224 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
1225 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
1226 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
1227 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
1228 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
1229 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
1230 };
1231 int i;
1232
1233 if (rate == 0)
1234 return (0);
1235 rate *= 11185; /* Scale 48000 to 0x20002380 */
1236 for (i = 31; i > 0; i--) {
1237 if (rate & 0x80000000) { /* Detect leading "1" */
1238 return (((uint32_t) (i - 15) << 20) +
1239 logMagTable[0x7f & (rate >> 24)] +
1240 (0x7f & (rate >> 17)) *
1241 logSlopeTable[0x7f & (rate >> 24)]);
1242 }
1243 rate <<= 1;
1244 }
1245 /* NOTREACHED */
1246 return (0);
1247 }
1248
1249 static uint32_t
1250 emu_rate_to_linearpitch(uint32_t rate)
1251 {
1252 rate = (rate << 8) / 375;
1253 return ((rate >> 1) + (rate & 1));
1254 }
1255
1256 struct emu_voice *
1257 emu_valloc(struct emu_sc_info *sc)
1258 {
1259 struct emu_voice *v;
1260 int i;
1261
1262 v = NULL;
1263 mtx_lock(&sc->lock);
1264 for (i = 0; i < NUM_G && sc->voice[i].busy; i++);
1265 if (i < NUM_G) {
1266 v = &sc->voice[i];
1267 v->busy = 1;
1268 }
1269 mtx_unlock(&sc->lock);
1270 return (v);
1271 }
1272
1273 void
1274 emu_vfree(struct emu_sc_info *sc, struct emu_voice *v)
1275 {
1276 int i, r;
1277
1278 mtx_lock(&sc->lock);
1279 for (i = 0; i < NUM_G; i++) {
1280 if (v == &sc->voice[i] && sc->voice[i].busy) {
1281 v->busy = 0;
1282 /*
1283 * XXX What we should do with mono channels?
1284 * See -pcm.c emupchan_init for other side of
1285 * this problem
1286 */
1287 if (v->slave != NULL)
1288 r = emu_memfree(&sc->mem, v->vbuf);
1289 }
1290 }
1291 mtx_unlock(&sc->lock);
1292 }
1293
1294 int
1295 emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s,
1296 uint32_t sz, struct snd_dbuf *b)
1297 {
1298 void *vbuf;
1299 bus_addr_t tmp_addr;
1300
1301 vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit");
1302 if (vbuf == NULL) {
1303 if(sc->dbg_level > 2)
1304 device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n");
1305 return (ENOMEM);
1306 }
1307 if (b != NULL)
1308 sndbuf_setup(b, vbuf, sz);
1309 m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE;
1310 if (m->start < 0) {
1311 if(sc->dbg_level > 2)
1312 device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n");
1313 emu_memfree(&sc->mem, vbuf);
1314 return (ENOMEM);
1315 }
1316 m->end = m->start + sz;
1317 m->speed = 0;
1318 m->b16 = 0;
1319 m->stereo = 0;
1320 m->running = 0;
1321 m->ismaster = 1;
1322 m->vol = 0xff;
1323 m->buf = tmp_addr;
1324 m->vbuf = vbuf;
1325 m->slave = s;
1326 if (s != NULL) {
1327 s->start = m->start;
1328 s->end = m->end;
1329 s->speed = 0;
1330 s->b16 = 0;
1331 s->stereo = 0;
1332 s->running = 0;
1333 s->ismaster = 0;
1334 s->vol = m->vol;
1335 s->buf = m->buf;
1336 s->vbuf = NULL;
1337 s->slave = NULL;
1338 }
1339 return (0);
1340 }
1341
1342 void
1343 emu_vsetup(struct emu_voice *v, int fmt, int spd)
1344 {
1345 if (fmt) {
1346 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0;
1347 v->stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0;
1348 if (v->slave != NULL) {
1349 v->slave->b16 = v->b16;
1350 v->slave->stereo = v->stereo;
1351 }
1352 }
1353 if (spd) {
1354 v->speed = spd;
1355 if (v->slave != NULL)
1356 v->slave->speed = v->speed;
1357 }
1358 }
1359
1360 void
1361 emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v)
1362 {
1363 int i;
1364
1365 for (i = 0; i < 8; i++) {
1366 v->routing[i] = rt->routing_left[i];
1367 v->amounts[i] = rt->amounts_left[i];
1368 }
1369 if ((v->stereo) && (v->ismaster == 0))
1370 for (i = 0; i < 8; i++) {
1371 v->routing[i] = rt->routing_right[i];
1372 v->amounts[i] = rt->amounts_right[i];
1373 }
1374
1375 if ((v->stereo) && (v->slave != NULL))
1376 emu_vroute(sc, rt, v->slave);
1377 }
1378
1379 void
1380 emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v)
1381 {
1382 int s;
1383 uint32_t start, val, silent_page;
1384
1385 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
1386
1387 v->sa = v->start >> s;
1388 v->ea = v->end >> s;
1389
1390
1391 if (v->stereo) {
1392 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK);
1393 } else {
1394 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0);
1395 }
1396 val = v->stereo ? 28 : 30;
1397 val *= v->b16 ? 1 : 2;
1398 start = v->sa + val;
1399
1400 if (sc->is_emu10k1) {
1401 emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) |
1402 (v->routing[2] << 8) |
1403 (v->routing[1] << 4) |
1404 (v->routing[0] << 0)) << 16);
1405 } else {
1406 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) |
1407 (v->routing[2] << 16) |
1408 (v->routing[1] << 8) |
1409 (v->routing[0] << 0));
1410 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) |
1411 (v->routing[6] << 16) |
1412 (v->routing[5] << 8) |
1413 (v->routing[4] << 0));
1414 emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) |
1415 (v->amounts[6] << 26) |
1416 (v->amounts[5] << 8) |
1417 (v->amounts[4] << 0));
1418 }
1419 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
1420 emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24));
1421 emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24));
1422
1423 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
1424 emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
1425 emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
1426
1427 silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK;
1428 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
1429 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
1430
1431 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
1432 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
1433 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
1434 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
1435 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
1436 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
1437 emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
1438 emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
1439 emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
1440 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
1441
1442 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
1443 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
1444
1445 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
1446 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
1447 if ((v->stereo) && (v->slave != NULL))
1448 emu_vwrite(sc, v->slave);
1449 }
1450
1451 static void
1452 emu_vstop(struct emu_sc_info *sc, char channel, int enable)
1453 {
1454 int reg;
1455
1456 reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
1457 channel &= 0x1f;
1458 reg |= 1 << 24;
1459 reg |= channel << 16;
1460 emu_wrptr(sc, 0, reg, enable);
1461 }
1462
1463 void
1464 emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go)
1465 {
1466 uint32_t pitch_target, initial_pitch;
1467 uint32_t cra, cs, ccis;
1468 uint32_t sample, i;
1469
1470 if (go) {
1471 cra = 64;
1472 cs = v->stereo ? 4 : 2;
1473 ccis = v->stereo ? 28 : 30;
1474 ccis *= v->b16 ? 1 : 2;
1475 sample = v->b16 ? 0x00000000 : 0x80808080;
1476 for (i = 0; i < cs; i++)
1477 emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
1478 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
1479 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
1480 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
1481
1482 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
1483 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
1484 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
1485 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
1486 emu_vstop(sc, v->vnum, 0);
1487
1488 pitch_target = emu_rate_to_linearpitch(v->speed);
1489 initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
1490 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
1491 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
1492 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
1493 } else {
1494 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
1495 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
1496 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
1497 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
1498 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
1499 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
1500 emu_vstop(sc, v->vnum, 1);
1501 }
1502 if ((v->stereo) && (v->slave != NULL))
1503 emu_vtrigger(sc, v->slave, go);
1504 }
1505
1506 int
1507 emu_vpos(struct emu_sc_info *sc, struct emu_voice *v)
1508 {
1509 int s, ptr;
1510
1511 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
1512 ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
1513 return (ptr & ~0x0000001f);
1514 }
1515
1516
1517 /* fx */
1518 static void
1519 emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data)
1520 {
1521 emu_wrptr(sc, 0, sc->code_base + pc, data);
1522 }
1523
1524
1525 static void
1526 emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc)
1527 {
1528 if ((*pc) + 1 > sc->code_size) {
1529 device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc));
1530 return;
1531 }
1532 emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y);
1533 emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w);
1534 (*pc)++;
1535 }
1536
1537 static int
1538 sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS)
1539 {
1540 struct emu_sc_info *sc;
1541 int mixer_id;
1542 int new_vol;
1543 int err;
1544
1545 sc = arg1;
1546 mixer_id = arg2;
1547
1548 new_vol = emumix_get_volume(sc, mixer_id);
1549 err = sysctl_handle_int(oidp, &new_vol, 0, req);
1550
1551 if (err || req->newptr == NULL)
1552 return (err);
1553 if (new_vol < 0 || new_vol > 100)
1554 return (EINVAL);
1555 emumix_set_volume(sc, mixer_id, new_vol);
1556
1557 return (0);
1558 }
1559
1560 static int
1561 emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume)
1562 {
1563 int volgpr;
1564 char sysctl_name[32];
1565
1566 volgpr = emu_rm_gpr_alloc(sc->rm, 1);
1567 emumix_set_fxvol(sc, volgpr, defvolume);
1568 /*
1569 * Mixer controls with NULL mix_name are handled
1570 * by AC97 emulation code or PCM mixer.
1571 */
1572 if (mix_name != NULL) {
1573 /*
1574 * Temporary sysctls should start with underscore,
1575 * see freebsd-current mailing list, emu10kx driver
1576 * discussion around 2006-05-24.
1577 */
1578 snprintf(sysctl_name, 32, "_%s", mix_name);
1579 SYSCTL_ADD_PROC(sc->ctx,
1580 SYSCTL_CHILDREN(sc->root),
1581 OID_AUTO, sysctl_name,
1582 CTLTYPE_INT | CTLFLAG_RW, sc, mix_id,
1583 sysctl_emu_mixer_control, "I", "");
1584 }
1585
1586 return (volgpr);
1587 }
1588
1589 static int
1590 sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS)
1591 {
1592 struct emu_sc_info *sc;
1593 int new_val;
1594 int err;
1595
1596 sc = arg1;
1597
1598 new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0;
1599 err = sysctl_handle_int(oidp, &new_val, 0, req);
1600
1601 if (err || req->newptr == NULL)
1602 return (err);
1603 if (new_val < 0 || new_val > 1)
1604 return (EINVAL);
1605
1606 switch (new_val) {
1607 case 0:
1608 emumix_set_mode(sc, MODE_ANALOG);
1609 break;
1610 case 1:
1611 emumix_set_mode(sc, MODE_DIGITAL);
1612 break;
1613 }
1614 return (0);
1615 }
1616
1617 static void
1618 emu_digitalswitch(struct emu_sc_info *sc)
1619 {
1620 /* XXX temporary? */
1621 SYSCTL_ADD_PROC(sc->ctx,
1622 SYSCTL_CHILDREN(sc->root),
1623 OID_AUTO, "_digital",
1624 CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1625 sysctl_emu_digitalswitch_control, "I", "Enable digital output");
1626
1627 return;
1628 }
1629
1630 /*
1631 * Allocate cache GPRs that will hold mixed output channels
1632 * and clear it on every DSP run.
1633 */
1634 #define EFX_CACHE(CACHE_IDX) do { \
1635 sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \
1636 emu_addefxop(sc, ACC3, \
1637 GPR(sc->cache_gpr[CACHE_IDX]), \
1638 DSP_CONST(0), \
1639 DSP_CONST(0), \
1640 DSP_CONST(0), \
1641 &pc); \
1642 } while (0)
1643
1644 /* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */
1645 #define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \
1646 sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \
1647 sc->mixer_volcache[IN_GPR_IDX] = DEF; \
1648 emu_addefxop(sc, MACS, \
1649 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1650 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1651 INP_NR, \
1652 GPR(sc->mixer_gpr[IN_GPR_IDX]), \
1653 &pc); \
1654 } while (0)
1655
1656 /* allocate GPR, OUT = IN * VOL */
1657 #define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \
1658 sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \
1659 sc->mixer_volcache[OUT_GPR_IDX] = DEF; \
1660 emu_addefxop(sc, MACS, \
1661 OUTP(OUTP_NR), \
1662 DSP_CONST(0), \
1663 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1664 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
1665 &pc); \
1666 } while (0)
1667
1668 /* like EFX_OUTPUT, but don't allocate mixer gpr */
1669 #define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \
1670 emu_addefxop(sc, MACS, \
1671 OUTP(OUTP_NR), \
1672 DSP_CONST(0), \
1673 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1674 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
1675 &pc); \
1676 } while (0)
1677
1678 /* skip next OPCOUNT instructions if FLAG != 0 */
1679 #define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \
1680 emu_addefxop(sc, MACS, \
1681 DSP_CONST(0), \
1682 GPR(sc->mute_gpr[FLAG_GPR]), \
1683 DSP_CONST(0), \
1684 DSP_CONST(0), \
1685 &pc); \
1686 emu_addefxop(sc, SKIP, \
1687 DSP_CCR, \
1688 DSP_CCR, \
1689 COND_NEQ_ZERO, \
1690 OPCOUNT, \
1691 &pc); \
1692 } while (0)
1693
1694 #define EFX_COPY(TO, FROM) do { \
1695 emu_addefxop(sc, ACC3, \
1696 TO, \
1697 DSP_CONST(0), \
1698 DSP_CONST(0), \
1699 FROM, \
1700 &pc); \
1701 } while (0)
1702
1703
1704 static void
1705 emu_initefx(struct emu_sc_info *sc)
1706 {
1707 unsigned int i;
1708 uint32_t pc;
1709
1710 /* stop DSP */
1711 if (sc->is_emu10k1) {
1712 emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP);
1713 } else {
1714 emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
1715 }
1716
1717 /* code size is in instructions */
1718 pc = 0;
1719 for (i = 0; i < sc->code_size; i++) {
1720 if (sc->is_emu10k1) {
1721 emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc);
1722 } else {
1723 emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc);
1724 }
1725 }
1726
1727 /* allocate GPRs for mute switches (EFX_SKIP). Mute by default */
1728 for (i = 0; i < NUM_MUTE; i++) {
1729 sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1);
1730 emumix_set_gpr(sc, sc->mute_gpr[i], 1);
1731 }
1732 emu_digitalswitch(sc);
1733
1734 pc = 0;
1735
1736 /*
1737 * DSP code below is not good, because:
1738 * 1. It can be written smaller, if it can use DSP accumulator register
1739 * instead of cache_gpr[].
1740 * 2. It can be more careful when volume is 100%, because in DSP
1741 * x*0x7fffffff may not be equal to x !
1742 */
1743
1744 /* clean outputs */
1745 for (i = 0; i < 16 ; i++) {
1746 emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc);
1747 }
1748
1749
1750 if (sc->is_emu10k1) {
1751 EFX_CACHE(C_FRONT_L);
1752 EFX_CACHE(C_FRONT_R);
1753 EFX_CACHE(C_REC_L);
1754 EFX_CACHE(C_REC_R);
1755
1756 /* fx0 to front/record, 100%/muted by default */
1757 EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1758 EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1759 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1760 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1761
1762 /* in0, from AC97 codec output */
1763 EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0);
1764 EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0);
1765 EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1766 EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1767
1768 /* in1, from CD S/PDIF */
1769 /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */
1770 EFX_SKIP(4, CDSPDIFMUTE);
1771 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1772 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1773 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1774 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1775
1776 if (sc->dbg_level > 0) {
1777 /* in2, ZoomVide (???) */
1778 EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1779 EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1780 EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0);
1781 EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0);
1782 }
1783
1784 /* in3, TOSLink */
1785 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0);
1786 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0);
1787 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0);
1788 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0);
1789 /* in4, LineIn */
1790 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0);
1791 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0);
1792 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0);
1793 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0);
1794
1795 /* in5, on-card S/PDIF */
1796 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
1797 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
1798 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
1799 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
1800
1801 /* in6, Line2 on Live!Drive */
1802 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
1803 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
1804 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0);
1805 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0);
1806
1807 if (sc->dbg_level > 0) {
1808 /* in7, unknown */
1809 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
1810 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
1811 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
1812 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
1813 }
1814
1815 /* analog and digital */
1816 EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100);
1817 EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100);
1818 /* S/PDIF */
1819 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L);
1820 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R);
1821 /* Headphones */
1822 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L);
1823 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R);
1824
1825 /* rec output to "ADC" */
1826 EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100);
1827 EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100);
1828
1829 if (!(sc->mch_disabled)) {
1830 /*
1831 * Additional channel volume is controlled by mixer in
1832 * emu_dspmixer_set() in -pcm.c
1833 */
1834
1835 /* fx2/3 (pcm1) to rear */
1836 EFX_CACHE(C_REAR_L);
1837 EFX_CACHE(C_REAR_R);
1838 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
1839 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
1840
1841 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100);
1842 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100);
1843 if (sc->has_51) {
1844 /* fx4 (pcm2) to center */
1845 EFX_CACHE(C_CENTER);
1846 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
1847 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1848
1849 /* XXX in digital mode (default) this should be muted because
1850 this output is shared with digital out */
1851 EFX_SKIP(1, ANALOGMUTE);
1852 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1853
1854 /* fx5 (pcm3) to sub */
1855 EFX_CACHE(C_SUB);
1856 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
1857 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1858
1859 /* XXX in digital mode (default) this should be muted because
1860 this output is shared with digital out */
1861 EFX_SKIP(1, ANALOGMUTE);
1862 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1863
1864 }
1865 } else {
1866 /* SND_EMU10KX_MULTICHANNEL_DISABLED */
1867 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */
1868 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */
1869
1870 #if 0
1871 /* XXX 5.1 does not work */
1872
1873 if (sc->has_51) {
1874 /* (fx0+fx1)/2 to center */
1875 EFX_CACHE(C_CENTER);
1876 emu_addefxop(sc, MACS,
1877 GPR(sc->cache_gpr[C_CENTER]),
1878 GPR(sc->cache_gpr[C_CENTER]),
1879 DSP_CONST(0xd), /* = 1/2 */
1880 GPR(sc->cache_gpr[C_FRONT_L]),
1881 &pc);
1882 emu_addefxop(sc, MACS,
1883 GPR(sc->cache_gpr[C_CENTER]),
1884 GPR(sc->cache_gpr[C_CENTER]),
1885 DSP_CONST(0xd), /* = 1/2 */
1886 GPR(sc->cache_gpr[C_FRONT_R]),
1887 &pc);
1888 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1889
1890 /* XXX in digital mode (default) this should be muted because
1891 this output is shared with digital out */
1892 EFX_SKIP(1, ANALOGMUTE);
1893 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1894
1895 /* (fx0+fx1)/2 to sub */
1896 EFX_CACHE(C_SUB);
1897 emu_addefxop(sc, MACS,
1898 GPR(sc->cache_gpr[C_CENTER]),
1899 GPR(sc->cache_gpr[C_CENTER]),
1900 DSP_CONST(0xd), /* = 1/2 */
1901 GPR(sc->cache_gpr[C_FRONT_L]),
1902 &pc);
1903 emu_addefxop(sc, MACS,
1904 GPR(sc->cache_gpr[C_CENTER]),
1905 GPR(sc->cache_gpr[C_CENTER]),
1906 DSP_CONST(0xd), /* = 1/2 */
1907 GPR(sc->cache_gpr[C_FRONT_R]),
1908 &pc);
1909 /* XXX add lowpass filter here */
1910
1911 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1912
1913 /* XXX in digital mode (default) this should be muted because
1914 this output is shared with digital out */
1915 EFX_SKIP(1, ANALOGMUTE);
1916 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1917 }
1918 #endif
1919 } /* !mch_disabled */
1920 if (sc->mch_rec) {
1921 /*
1922 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots
1923 * are used as outputs and already filled with data
1924 */
1925 /*
1926 * XXX On Live! cards stream does not begin at zero offset.
1927 * It can be HW, driver or sound buffering problem.
1928 * Use sync substream (offset 0x3E) to let userland find
1929 * correct data.
1930 */
1931
1932 /*
1933 * Substream map (in byte offsets, each substream is 2 bytes):
1934 * 0x00..0x1E - outputs
1935 * 0x20..0x3E - FX, inputs and sync stream
1936 */
1937
1938 /* First 2 channels (offset 0x20,0x22) are empty */
1939 for(i = (sc->has_51 ? 2 : 0); i < 2; i++)
1940 EFX_COPY(FX2(i), DSP_CONST(0));
1941
1942 /* PCM Playback monitoring, offset 0x24..0x2A */
1943 for(i = 0; i < 4; i++)
1944 EFX_COPY(FX2(i+2), FX(i));
1945
1946 /* Copy of some inputs, offset 0x2C..0x3C */
1947 for(i = 0; i < 9; i++)
1948 EFX_COPY(FX2(i+8), INP(i));
1949
1950 /* sync data (0xc0de, offset 0x3E) */
1951 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
1952 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
1953
1954 EFX_COPY(FX2(15), GPR(sc->dummy_gpr));
1955 } /* mch_rec */
1956 } else /* emu10k2 and later */ {
1957 EFX_CACHE(C_FRONT_L);
1958 EFX_CACHE(C_FRONT_R);
1959 EFX_CACHE(C_REC_L);
1960 EFX_CACHE(C_REC_R);
1961
1962 /* fx0 to front/record, 100%/muted by default */
1963 /*
1964 * FRONT_[L|R] is controlled by AC97 emulation in
1965 * emu_ac97_[read|write]_emulation in -pcm.c
1966 */
1967 EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1968 EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1969 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1970 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1971
1972 /* in0, from AC97 codec output */
1973 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100);
1974 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100);
1975 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1976 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1977
1978 /* in1, from CD S/PDIF */
1979 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1980 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1981 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1982 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1983
1984 /* in2, optical & coax S/PDIF on AudigyDrive*/
1985 /* XXX Should be muted when GPRSCS valid stream == 0 */
1986 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1987 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1988 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0);
1989 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0);
1990
1991 if (sc->dbg_level > 0) {
1992 /* in3, unknown */
1993 EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0);
1994 EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0);
1995 EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0);
1996 EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0);
1997 }
1998
1999 /* in4, LineIn 2 on AudigyDrive */
2000 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0);
2001 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0);
2002 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0);
2003 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0);
2004
2005 /* in5, on-card S/PDIF */
2006 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
2007 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
2008 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
2009 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
2010
2011 /* in6, AUX2 on AudigyDrive */
2012 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
2013 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
2014 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0);
2015 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0);
2016
2017 if (sc->dbg_level > 0) {
2018 /* in7, unknown */
2019 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
2020 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
2021 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
2022 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
2023 }
2024
2025 /* front output to headphones and alog and digital *front */
2026 /* volume controlled by AC97 emulation */
2027 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100);
2028 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100);
2029 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L);
2030 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R);
2031 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L);
2032 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R);
2033
2034 /* rec output to "ADC" */
2035 /* volume controlled by AC97 emulation */
2036 EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100);
2037 EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100);
2038
2039 if (!(sc->mch_disabled)) {
2040 /*
2041 * Additional channel volume is controlled by mixer in
2042 * emu_dspmixer_set() in -pcm.c
2043 */
2044
2045 /* fx2/3 (pcm1) to rear */
2046 EFX_CACHE(C_REAR_L);
2047 EFX_CACHE(C_REAR_R);
2048 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
2049 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
2050
2051 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100);
2052 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100);
2053 EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L);
2054 EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R);
2055
2056 /* fx4 (pcm2) to center */
2057 EFX_CACHE(C_CENTER);
2058 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
2059 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2060 #if 0
2061 /*
2062 * XXX in digital mode (default) this should be muted
2063 * because this output is shared with digital out
2064 */
2065 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2066 #endif
2067 /* fx5 (pcm3) to sub */
2068 EFX_CACHE(C_SUB);
2069 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
2070 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2071 #if 0
2072 /*
2073 * XXX in digital mode (default) this should be muted
2074 * because this output is shared with digital out
2075 */
2076 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2077 #endif
2078 if (sc->has_71) {
2079 /* XXX this will broke headphones on AudigyDrive */
2080 /* fx6/7 (pcm4) to side */
2081 EFX_CACHE(C_SIDE_L);
2082 EFX_CACHE(C_SIDE_R);
2083 EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100);
2084 EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100);
2085 EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100);
2086 EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100);
2087 EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L);
2088 EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R);
2089 }
2090 } else { /* mch_disabled */
2091 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L);
2092 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R);
2093
2094 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L);
2095 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R);
2096
2097 if (sc->has_51) {
2098 /* (fx0+fx1)/2 to center */
2099 EFX_CACHE(C_CENTER);
2100 emu_addefxop(sc, MACS,
2101 GPR(sc->cache_gpr[C_CENTER]),
2102 GPR(sc->cache_gpr[C_CENTER]),
2103 DSP_CONST(0xd), /* = 1/2 */
2104 GPR(sc->cache_gpr[C_FRONT_L]),
2105 &pc);
2106 emu_addefxop(sc, MACS,
2107 GPR(sc->cache_gpr[C_CENTER]),
2108 GPR(sc->cache_gpr[C_CENTER]),
2109 DSP_CONST(0xd), /* = 1/2 */
2110 GPR(sc->cache_gpr[C_FRONT_R]),
2111 &pc);
2112 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2113
2114 /* XXX in digital mode (default) this should be muted because
2115 this output is shared with digital out */
2116 EFX_SKIP(1, ANALOGMUTE);
2117 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2118
2119 /* (fx0+fx1)/2 to sub */
2120 EFX_CACHE(C_SUB);
2121 emu_addefxop(sc, MACS,
2122 GPR(sc->cache_gpr[C_SUB]),
2123 GPR(sc->cache_gpr[C_SUB]),
2124 DSP_CONST(0xd), /* = 1/2 */
2125 GPR(sc->cache_gpr[C_FRONT_L]),
2126 &pc);
2127 emu_addefxop(sc, MACS,
2128 GPR(sc->cache_gpr[C_SUB]),
2129 GPR(sc->cache_gpr[C_SUB]),
2130 DSP_CONST(0xd), /* = 1/2 */
2131 GPR(sc->cache_gpr[C_FRONT_R]),
2132 &pc);
2133 /* XXX add lowpass filter here */
2134
2135 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2136
2137 /* XXX in digital mode (default) this should be muted because
2138 this output is shared with digital out */
2139 EFX_SKIP(1, ANALOGMUTE);
2140 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2141 }
2142 } /* mch_disabled */
2143 if (sc->mch_rec) {
2144 /* MCH RECORDING, high 32 slots */
2145
2146 /*
2147 * Stream map (in byte offsets):
2148 * 0x00..0x3E - outputs
2149 * 0x40..0x7E - FX, inputs
2150 * each substream is 2 bytes.
2151 */
2152 /*
2153 * XXX Audigy 2 Value cards (and, possibly,
2154 * Audigy 4) write some unknown data in place of
2155 * some outputs (offsets 0x20..0x3F) and one
2156 * input (offset 0x7E).
2157 */
2158
2159 /* PCM Playback monitoring, offsets 0x40..0x5E */
2160 for(i = 0; i < 16; i++)
2161 EFX_COPY(FX2(i), FX(i));
2162
2163 /* Copy of all inputs, offsets 0x60..0x7E */
2164 for(i = 0; i < 16; i++)
2165 EFX_COPY(FX2(i+16), INP(i));
2166 #if 0
2167 /* XXX Audigy seems to work correct and does not need this */
2168 /* sync data (0xc0de), offset 0x7E */
2169 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
2170 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
2171 EFX_COPY(FX2(31), GPR(sc->dummy_gpr));
2172 #endif
2173 } /* mch_rec */
2174 }
2175
2176 sc->routing_code_end = pc;
2177
2178 /* start DSP */
2179 if (sc->is_emu10k1) {
2180 emu_wrptr(sc, 0, EMU_DBG, 0);
2181 } else {
2182 emu_wrptr(sc, 0, EMU_A_DBG, 0);
2183 }
2184 }
2185
2186 /* /dev/em10kx */
2187 static d_open_t emu10kx_open;
2188 static d_close_t emu10kx_close;
2189 static d_read_t emu10kx_read;
2190
2191 static struct cdevsw emu10kx_cdevsw = {
2192 .d_open = emu10kx_open,
2193 .d_close = emu10kx_close,
2194 .d_read = emu10kx_read,
2195 .d_name = "emu10kx",
2196 .d_version = D_VERSION,
2197 };
2198
2199
2200 static int
2201 emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
2202 {
2203 int error;
2204 struct emu_sc_info *sc;
2205
2206 sc = i_dev->si_drv1;
2207 mtx_lock(&sc->emu10kx_lock);
2208 if (sc->emu10kx_isopen) {
2209 mtx_unlock(&sc->emu10kx_lock);
2210 return (EBUSY);
2211 }
2212 sc->emu10kx_isopen = 1;
2213 mtx_unlock(&sc->emu10kx_lock);
2214 if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) {
2215 error = ENXIO;
2216 goto out;
2217 }
2218 sc->emu10kx_bufptr = 0;
2219 error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM;
2220 out:
2221 if (error) {
2222 mtx_lock(&sc->emu10kx_lock);
2223 sc->emu10kx_isopen = 0;
2224 mtx_unlock(&sc->emu10kx_lock);
2225 }
2226 return (error);
2227 }
2228
2229 static int
2230 emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
2231 {
2232 struct emu_sc_info *sc;
2233
2234 sc = i_dev->si_drv1;
2235
2236 mtx_lock(&sc->emu10kx_lock);
2237 if (!(sc->emu10kx_isopen)) {
2238 mtx_unlock(&sc->emu10kx_lock);
2239 return (EBADF);
2240 }
2241 sbuf_delete(&sc->emu10kx_sbuf);
2242 sc->emu10kx_isopen = 0;
2243 mtx_unlock(&sc->emu10kx_lock);
2244
2245 return (0);
2246 }
2247
2248 static int
2249 emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused)
2250 {
2251 int l, err;
2252 struct emu_sc_info *sc;
2253
2254 sc = i_dev->si_drv1;
2255 mtx_lock(&sc->emu10kx_lock);
2256 if (!(sc->emu10kx_isopen)) {
2257 mtx_unlock(&sc->emu10kx_lock);
2258 return (EBADF);
2259 }
2260 mtx_unlock(&sc->emu10kx_lock);
2261
2262 l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr);
2263 err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0;
2264 sc->emu10kx_bufptr += l;
2265
2266 return (err);
2267 }
2268
2269 static int
2270 emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s)
2271 {
2272 int i;
2273
2274 sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n");
2275 sbuf_printf(s, "\nHardware resource usage:\n");
2276 sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs);
2277 sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size);
2278 sbuf_printf(s, "Card supports");
2279 if (sc->has_ac97) {
2280 sbuf_printf(s, " AC97 codec");
2281 } else {
2282 sbuf_printf(s, " NO AC97 codec");
2283 }
2284 if (sc->has_51) {
2285 if (sc->has_71)
2286 sbuf_printf(s, " and 7.1 output");
2287 else
2288 sbuf_printf(s, " and 5.1 output");
2289 }
2290 if (sc->is_emu10k1)
2291 sbuf_printf(s, ", SBLive! DSP code");
2292 if (sc->is_emu10k2)
2293 sbuf_printf(s, ", Audigy DSP code");
2294 if (sc->is_ca0102)
2295 sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks");
2296 if (sc->is_ca0108)
2297 sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks");
2298 sbuf_printf(s, "\n");
2299 if (sc->broken_digital)
2300 sbuf_printf(s, "Digital mode unsupported\n");
2301 sbuf_printf(s, "\nInstalled devices:\n");
2302 for (i = 0; i < RT_COUNT; i++)
2303 if (sc->pcm[i] != NULL)
2304 if (device_is_attached(sc->pcm[i])) {
2305 sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i]));
2306 }
2307 if (sc->midi[0] != NULL)
2308 if (device_is_attached(sc->midi[0])) {
2309 sbuf_printf(s, "EMU10Kx MIDI Interface\n");
2310 sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0]));
2311 }
2312 if (sc->midi[1] != NULL)
2313 if (device_is_attached(sc->midi[1])) {
2314 sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1]));
2315 }
2316 if (sc->midi[0] != NULL)
2317 if (device_is_attached(sc->midi[0])) {
2318 sbuf_printf(s, "\tIR receiver MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled");
2319 }
2320 sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital");
2321
2322 sbuf_finish(s);
2323 return (sbuf_len(s));
2324 }
2325
2326 /* INIT & UNINIT */
2327 static int
2328 emu10kx_dev_init(struct emu_sc_info *sc)
2329 {
2330 int unit;
2331
2332 mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0);
2333 unit = device_get_unit(sc->dev);
2334
2335 sc->cdev = make_dev(&emu10kx_cdevsw, PCMMINOR(unit), UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit);
2336 if (sc->cdev != NULL) {
2337 sc->cdev->si_drv1 = sc;
2338 return (0);
2339 }
2340 return (ENXIO);
2341 }
2342
2343 static int
2344 emu10kx_dev_uninit(struct emu_sc_info *sc)
2345 {
2346 mtx_lock(&sc->emu10kx_lock);
2347 if (sc->emu10kx_isopen) {
2348 mtx_unlock(&sc->emu10kx_lock);
2349 return (EBUSY);
2350 }
2351 if (sc->cdev)
2352 destroy_dev(sc->cdev);
2353 sc->cdev = NULL;
2354
2355 mtx_destroy(&sc->emu10kx_lock);
2356 return (0);
2357 }
2358
2359 /* resource manager */
2360 int
2361 emu_rm_init(struct emu_sc_info *sc)
2362 {
2363 int i;
2364 int maxcount;
2365 struct emu_rm *rm;
2366
2367 rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO);
2368 if (rm == NULL) {
2369 return (ENOMEM);
2370 }
2371 sc->rm = rm;
2372 rm->card = sc;
2373 maxcount = sc->num_gprs;
2374 rm->num_used = 0;
2375 mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF);
2376 rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR);
2377 for (i = 0; i < rm->num_gprs; i++)
2378 rm->allocmap[i] = 0;
2379 /* pre-allocate gpr[0] */
2380 rm->allocmap[0] = 1;
2381 rm->last_free_gpr = 1;
2382
2383 return (0);
2384 }
2385
2386 int
2387 emu_rm_uninit(struct emu_sc_info *sc)
2388 {
2389 int i;
2390
2391 if (sc->dbg_level > 1) {
2392 mtx_lock(&(sc->rm->gpr_lock));
2393 for (i = 1; i < sc->rm->last_free_gpr; i++)
2394 if (sc->rm->allocmap[i] > 0)
2395 device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i);
2396 mtx_unlock(&(sc->rm->gpr_lock));
2397 }
2398
2399 mtx_destroy(&(sc->rm->gpr_lock));
2400 free(sc->rm, M_DEVBUF);
2401 return (0);
2402 }
2403
2404 static int
2405 emu_rm_gpr_alloc(struct emu_rm *rm, int count)
2406 {
2407 int i, j;
2408 int allocated_gpr;
2409
2410 allocated_gpr = rm->num_gprs;
2411 /* try fast way first */
2412 mtx_lock(&(rm->gpr_lock));
2413 if (rm->last_free_gpr + count <= rm->num_gprs) {
2414 allocated_gpr = rm->last_free_gpr;
2415 rm->last_free_gpr += count;
2416 rm->allocmap[allocated_gpr] = count;
2417 for (i = 1; i < count; i++)
2418 rm->allocmap[allocated_gpr + i] = -(count - i);
2419 } else {
2420 /* longer */
2421 i = 0;
2422 allocated_gpr = rm->num_gprs;
2423 while (i < rm->last_free_gpr - count) {
2424 if (rm->allocmap[i] > 0) {
2425 i += rm->allocmap[i];
2426 } else {
2427 allocated_gpr = i;
2428 for (j = 1; j < count; j++) {
2429 if (rm->allocmap[i + j] != 0)
2430 allocated_gpr = rm->num_gprs;
2431 }
2432 if (allocated_gpr == i)
2433 break;
2434 }
2435 }
2436 if (allocated_gpr + count < rm->last_free_gpr) {
2437 rm->allocmap[allocated_gpr] = count;
2438 for (i = 1; i < count; i++)
2439 rm->allocmap[allocated_gpr + i] = -(count - i);
2440
2441 }
2442 }
2443 if (allocated_gpr == rm->num_gprs)
2444 allocated_gpr = (-1);
2445 if (allocated_gpr >= 0)
2446 rm->num_used += count;
2447 mtx_unlock(&(rm->gpr_lock));
2448 return (allocated_gpr);
2449 }
2450
2451 /* mixer */
2452 void
2453 emumix_set_mode(struct emu_sc_info *sc, int mode)
2454 {
2455 uint32_t a_iocfg;
2456 uint32_t hcfg;
2457 uint32_t tmp;
2458
2459 switch (mode) {
2460 case MODE_DIGITAL:
2461 /* FALLTHROUGH */
2462 case MODE_ANALOG:
2463 break;
2464 default:
2465 return;
2466 }
2467
2468 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE;
2469 a_iocfg = 0;
2470
2471 if (sc->rev >= 6)
2472 hcfg |= EMU_HCFG_JOYENABLE;
2473
2474 if (sc->is_emu10k1)
2475 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK;
2476 else
2477 hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE;
2478
2479
2480 if (mode == MODE_DIGITAL) {
2481 if (sc->broken_digital) {
2482 device_printf(sc->dev, "Digital mode is reported as broken on this card.\n");
2483 }
2484 a_iocfg |= EMU_A_IOCFG_GPOUT1;
2485 hcfg |= EMU_HCFG_GPOUT0;
2486 }
2487
2488 if (mode == MODE_ANALOG)
2489 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2490
2491 if (sc->is_emu10k2)
2492 a_iocfg |= 0x80; /* XXX */
2493
2494 if ((sc->is_ca0102) || (sc->is_ca0108))
2495 /*
2496 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things
2497 * on diffrerent cards.
2498 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108)
2499 * "disable analog outs" on Audigy (emu10k2)
2500 */
2501 a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG;
2502
2503 if (sc->is_ca0108)
2504 a_iocfg |= 0x20; /* XXX */
2505
2506 /* Mute analog center & subwoofer before mode change */
2507 if (mode == MODE_DIGITAL)
2508 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1);
2509
2510 emu_wr(sc, EMU_HCFG, hcfg, 4);
2511
2512 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2513 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2514 tmp = a_iocfg;
2515 emu_wr(sc, EMU_A_IOCFG, tmp, 2);
2516 }
2517
2518 /* Unmute if we have changed mode to analog. */
2519
2520 if (mode == MODE_ANALOG)
2521 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0);
2522
2523 sc->mode = mode;
2524 }
2525
2526 void
2527 emumix_set_spdif_mode(struct emu_sc_info *sc, int mode)
2528 {
2529 uint32_t spcs;
2530
2531 switch (mode) {
2532 case SPDIF_MODE_PCM:
2533 break;
2534 case SPDIF_MODE_AC3:
2535 device_printf(sc->dev, "AC3 mode does not work and disabled\n");
2536 return;
2537 default:
2538 return;
2539 }
2540
2541 spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
2542 EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
2543 EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
2544 EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
2545
2546 mode = SPDIF_MODE_PCM;
2547
2548 emu_wrptr(sc, 0, EMU_SPCS0, spcs);
2549 emu_wrptr(sc, 0, EMU_SPCS1, spcs);
2550 emu_wrptr(sc, 0, EMU_SPCS2, spcs);
2551 }
2552
2553 #define L2L_POINTS 10
2554
2555 static int l2l_df[L2L_POINTS] = {
2556 0x572C5CA, /* 100..90 */
2557 0x3211625, /* 90..80 */
2558 0x1CC1A76, /* 80..70 */
2559 0x108428F, /* 70..60 */
2560 0x097C70A, /* 60..50 */
2561 0x0572C5C, /* 50..40 */
2562 0x0321162, /* 40..30 */
2563 0x01CC1A7, /* 30..20 */
2564 0x0108428, /* 20..10 */
2565 0x016493D /* 10..0 */
2566 };
2567
2568 static int l2l_f[L2L_POINTS] = {
2569 0x4984461A, /* 90 */
2570 0x2A3968A7, /* 80 */
2571 0x18406003, /* 70 */
2572 0x0DEDC66D, /* 60 */
2573 0x07FFFFFF, /* 50 */
2574 0x04984461, /* 40 */
2575 0x02A3968A, /* 30 */
2576 0x01840600, /* 20 */
2577 0x00DEDC66, /* 10 */
2578 0x00000000 /* 0 */
2579 };
2580
2581
2582 static int
2583 log2lin(int log_t)
2584 {
2585 int lin_t;
2586 int idx, lin;
2587
2588 if (log_t <= 0) {
2589 lin_t = 0x00000000;
2590 return (lin_t);
2591 }
2592
2593 if (log_t >= 100) {
2594 lin_t = 0x7fffffff;
2595 return (lin_t);
2596 }
2597
2598 idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS);
2599 lin = log_t % (L2L_POINTS);
2600 lin_t = l2l_df[idx] * lin + l2l_f[idx];
2601 return (lin_t);
2602 }
2603
2604
2605 void
2606 emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol)
2607 {
2608
2609 vol = log2lin(vol);
2610 emumix_set_gpr(sc, gpr, vol);
2611 }
2612
2613 void
2614 emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val)
2615 {
2616 if (sc->dbg_level > 1)
2617 if (gpr == 0) {
2618 device_printf(sc->dev, "Zero gpr write access\n");
2619 #ifdef KDB
2620 kdb_backtrace();
2621 #endif
2622 return;
2623 }
2624
2625 emu_wrptr(sc, 0, GPR(gpr), val);
2626 }
2627
2628 void
2629 emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume)
2630 {
2631
2632 RANGE(volume, 0, 100);
2633 if (mixer_idx < NUM_MIXERS) {
2634 sc->mixer_volcache[mixer_idx] = volume;
2635 emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume);
2636 }
2637 }
2638
2639 int
2640 emumix_get_volume(struct emu_sc_info *sc, int mixer_idx)
2641 {
2642 if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0))
2643 return (sc->mixer_volcache[mixer_idx]);
2644 return (-1);
2645 }
2646
2647 /* Init CardBus part */
2648 static int
2649 emu_cardbus_init(struct emu_sc_info *sc)
2650 {
2651
2652 /*
2653 * XXX May not need this if we have EMU_IPR3 handler.
2654 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments?
2655 * Looks much like "(data << 16) | register".
2656 */
2657 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
2658 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001);
2659 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f);
2660 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f);
2661
2662 emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f);
2663
2664 return (0);
2665 }
2666
2667 /* Probe and attach the card */
2668 static int
2669 emu_init(struct emu_sc_info *sc)
2670 {
2671 uint32_t ch, tmp;
2672 uint32_t spdif_sr;
2673 uint32_t ac97slot;
2674 int def_mode;
2675 int i;
2676
2677 /* disable audio and lock cache */
2678 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
2679
2680 /* reset recording buffers */
2681 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
2682 emu_wrptr(sc, 0, EMU_MICBA, 0);
2683 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
2684 emu_wrptr(sc, 0, EMU_FXBA, 0);
2685 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
2686 emu_wrptr(sc, 0, EMU_ADCBA, 0);
2687
2688 /* disable channel interrupt */
2689 emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4);
2690 emu_wrptr(sc, 0, EMU_CLIEL, 0);
2691 emu_wrptr(sc, 0, EMU_CLIEH, 0);
2692 emu_wrptr(sc, 0, EMU_SOLEL, 0);
2693 emu_wrptr(sc, 0, EMU_SOLEH, 0);
2694
2695 /* disable P16V and S/PDIF interrupts */
2696 if ((sc->is_ca0102) || (sc->is_ca0108))
2697 emu_wr(sc, EMU_INTE2, 0, 4);
2698
2699 if (sc->is_ca0102)
2700 emu_wr(sc, EMU_INTE3, 0, 4);
2701
2702 /* init phys inputs and outputs */
2703 ac97slot = 0;
2704 if (sc->has_51)
2705 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE;
2706 if (sc->has_71)
2707 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT;
2708 if (sc->is_emu10k2)
2709 ac97slot |= 0x40;
2710 emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot);
2711
2712 if (sc->is_emu10k2) /* XXX for later cards? */
2713 emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if
2714 * we write 1 here? */
2715
2716 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev),
2717 /* alignment */ 2, /* boundary */ 0,
2718 /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */
2719 /* highaddr */ BUS_SPACE_MAXADDR,
2720 /* filter */ NULL, /* filterarg */ NULL,
2721 /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff,
2722 /* flags */ 0, /* lockfunc */ busdma_lock_mutex,
2723 /* lockarg */ &Giant, &(sc->mem.dmat)) != 0) {
2724 device_printf(sc->dev, "unable to create dma tag\n");
2725 bus_dma_tag_destroy(sc->mem.dmat);
2726 return (ENOMEM);
2727 }
2728
2729 sc->mem.card = sc;
2730 SLIST_INIT(&sc->mem.blocks);
2731 sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, &sc->mem.ptb_map);
2732 if (sc->mem.ptb_pages == NULL)
2733 return (ENOMEM);
2734
2735 sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr, &sc->mem.silent_map);
2736 if (sc->mem.silent_page == NULL) {
2737 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map);
2738 return (ENOMEM);
2739 }
2740 /* Clear page with silence & setup all pointers to this page */
2741 bzero(sc->mem.silent_page, EMUPAGESIZE);
2742 tmp = (uint32_t) (sc->mem.silent_page_addr) << 1;
2743 for (i = 0; i < EMU_MAXPAGES; i++)
2744 sc->mem.ptb_pages[i] = tmp | i;
2745
2746 for (ch = 0; ch < NUM_G; ch++) {
2747 emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
2748 emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
2749 }
2750 emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
2751 emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */
2752 emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */
2753
2754 /* init envelope engine */
2755 for (ch = 0; ch < NUM_G; ch++) {
2756 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
2757 emu_wrptr(sc, ch, EMU_CHAN_IP, 0);
2758 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff);
2759 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff);
2760 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
2761 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
2762 emu_wrptr(sc, ch, EMU_CHAN_CCR, 0);
2763
2764 emu_wrptr(sc, ch, EMU_CHAN_PSST, 0);
2765 emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10);
2766 emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0);
2767 emu_wrptr(sc, ch, EMU_CHAN_Z1, 0);
2768 emu_wrptr(sc, ch, EMU_CHAN_Z2, 0);
2769 emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000);
2770
2771 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0);
2772 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0);
2773 emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff);
2774 emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0);
2775 emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0);
2776 emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */
2777 emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */
2778 emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0);
2779
2780 /*** these are last so OFF prevents writing ***/
2781 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0);
2782 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0);
2783 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0);
2784 emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0);
2785 emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0);
2786
2787 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2788 emu_wrptr(sc, ch, 0x4c, 0x0);
2789 emu_wrptr(sc, ch, 0x4d, 0x0);
2790 emu_wrptr(sc, ch, 0x4e, 0x0);
2791 emu_wrptr(sc, ch, 0x4f, 0x0);
2792 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f);
2793 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f);
2794 emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0);
2795 }
2796 }
2797
2798 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2799
2800 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2801 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000);
2802
2803 /*
2804 * CAxxxx cards needs additional setup:
2805 * 1. Set I2S capture sample rate to 96000
2806 * 2. Disable P16v / P17v proceesing
2807 * 3. Allow EMU10K DSP inputs
2808 */
2809 if ((sc->is_ca0102) || (sc->is_ca0108)) {
2810
2811 spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE);
2812 spdif_sr &= 0xfffff1ff;
2813 spdif_sr |= EMU_A_I2S_CAPTURE_96000;
2814 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr);
2815
2816 /* Disable P16v processing */
2817 emu_wr_p16vptr(sc, 0, EMU_A2_SRCSel, 0x14);
2818
2819 /* Setup P16v/P17v sound routing */
2820 if (sc->is_ca0102)
2821 emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00);
2822 else {
2823 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000);
2824 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000);
2825
2826 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2827 emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2);
2828 }
2829 }
2830 emu_initefx(sc);
2831
2832 def_mode = MODE_ANALOG;
2833 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2834 def_mode = MODE_DIGITAL;
2835 if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) {
2836 device_printf(sc->dev, "Audigy card initialized in analog mode.\n");
2837 def_mode = MODE_ANALOG;
2838 }
2839 emumix_set_mode(sc, def_mode);
2840
2841 if (bootverbose) {
2842 tmp = emu_rd(sc, EMU_HCFG, 4);
2843 device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp);
2844 device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n",
2845 (tmp & 0x80000000 ? "[Legacy MPIC] " : ""),
2846 (tmp & 0x40000000 ? "[0x40] " : ""),
2847 (tmp & 0x20000000 ? "[0x20] " : ""),
2848 (tmp & 0x10000000 ? "[0x10] " : ""),
2849 (tmp & 0x08000000 ? "[0x08] " : ""),
2850 (tmp & 0x04000000 ? "[0x04] " : ""),
2851 (tmp & 0x02000000 ? "[0x02] " : ""),
2852 (tmp & 0x01000000 ? "[0x01]" : " "));
2853 device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n",
2854 (tmp & 0x00800000 ? "[0x80] " : ""),
2855 (tmp & 0x00400000 ? "[0x40] " : ""),
2856 (tmp & 0x00200000 ? "[Legacy INT] " : ""),
2857 (tmp & 0x00100000 ? "[0x10] " : ""),
2858 (tmp & 0x00080000 ? "[0x08] " : ""),
2859 (tmp & 0x00040000 ? "[Codec4] " : ""),
2860 (tmp & 0x00020000 ? "[Codec2] " : ""),
2861 (tmp & 0x00010000 ? "[I2S Codec]" : " "));
2862 device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n",
2863 (tmp & 0x00008000 ? "[0x80] " : ""),
2864 (tmp & 0x00004000 ? "[GPINPUT0] " : ""),
2865 (tmp & 0x00002000 ? "[GPINPUT1] " : ""),
2866 (tmp & 0x00001000 ? "[GPOUT0] " : ""),
2867 (tmp & 0x00000800 ? "[GPOUT1] " : ""),
2868 (tmp & 0x00000400 ? "[GPOUT2] " : ""),
2869 (tmp & 0x00000200 ? "[Joystick] " : ""),
2870 (tmp & 0x00000100 ? "[0x01]" : " "));
2871 device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n",
2872 (tmp & 0x00000080 ? "[0x80] " : ""),
2873 (tmp & 0x00000040 ? "[0x40] " : ""),
2874 (tmp & 0x00000020 ? "[0x20] " : ""),
2875 (tmp & 0x00000010 ? "[AUTOMUTE] " : ""),
2876 (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""),
2877 (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""),
2878 (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""),
2879 (tmp & 0x00000001 ? "[AUDIOENABLE]" : " "));
2880
2881 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2882 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2883 device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp);
2884 device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )");
2885 printf(" : %s%s%s%s%s%s%s%s\n",
2886 (tmp & 0x8000 ? "[Rear Speakers] " : ""),
2887 (tmp & 0x4000 ? "[Front Speakers] " : ""),
2888 (tmp & 0x2000 ? "[0x20] " : ""),
2889 (tmp & 0x1000 ? "[0x10] " : ""),
2890 (tmp & 0x0800 ? "[0x08] " : ""),
2891 (tmp & 0x0400 ? "[0x04] " : ""),
2892 (tmp & 0x0200 ? "[0x02] " : ""),
2893 (tmp & 0x0100 ? "[AudigyDrive Phones]" : " "));
2894 device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )");
2895 printf(" : %s%s%s%s%s%s%s%s\n",
2896 (tmp & 0x0080 ? "[0x80] " : ""),
2897 (tmp & 0x0040 ? "[Mute AnalogOut] " : ""),
2898 (tmp & 0x0020 ? "[0x20] " : ""),
2899 (tmp & 0x0010 ? "[0x10] " : ""),
2900 (tmp & 0x0008 ? "[0x08] " : ""),
2901 (tmp & 0x0004 ? "[GPOUT0] " : ""),
2902 (tmp & 0x0002 ? "[GPOUT1] " : ""),
2903 (tmp & 0x0001 ? "[GPOUT2]" : " "));
2904 } /* is_emu10k2 or ca* */
2905 } /* bootverbose */
2906 return (0);
2907 }
2908
2909 static int
2910 emu_uninit(struct emu_sc_info *sc)
2911 {
2912 uint32_t ch;
2913 struct emu_memblk *blk;
2914
2915 emu_wr(sc, EMU_INTE, 0, 4);
2916 for (ch = 0; ch < NUM_G; ch++)
2917 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
2918 for (ch = 0; ch < NUM_G; ch++) {
2919 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0);
2920 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0);
2921 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
2922 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
2923 }
2924
2925 /* disable audio and lock cache */
2926 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
2927
2928 emu_wrptr(sc, 0, EMU_PTB, 0);
2929 /* reset recording buffers */
2930 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
2931 emu_wrptr(sc, 0, EMU_MICBA, 0);
2932 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
2933 emu_wrptr(sc, 0, EMU_FXBA, 0);
2934 emu_wrptr(sc, 0, EMU_FXWC, 0);
2935 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
2936 emu_wrptr(sc, 0, EMU_ADCBA, 0);
2937 emu_wrptr(sc, 0, EMU_TCB, 0);
2938 emu_wrptr(sc, 0, EMU_TCBS, 0);
2939
2940 /* disable channel interrupt */
2941 emu_wrptr(sc, 0, EMU_CLIEL, 0);
2942 emu_wrptr(sc, 0, EMU_CLIEH, 0);
2943 emu_wrptr(sc, 0, EMU_SOLEL, 0);
2944 emu_wrptr(sc, 0, EMU_SOLEH, 0);
2945
2946 if (!SLIST_EMPTY(&sc->mem.blocks))
2947 device_printf(sc->dev, "warning: memblock list not empty\n");
2948
2949 SLIST_FOREACH(blk, &sc->mem.blocks, link)
2950 if (blk != NULL)
2951 device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner);
2952
2953 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map);
2954 emu_free(&sc->mem, sc->mem.silent_page, sc->mem.silent_map);
2955
2956 return (0);
2957 }
2958
2959 static int
2960 emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result)
2961 {
2962 struct sndcard_func *func = device_get_ivars(dev);
2963 struct emu_sc_info *sc = device_get_softc(bus);
2964
2965 if (func==NULL)
2966 return (ENOMEM);
2967 if (sc == NULL)
2968 return (ENOMEM);
2969
2970 switch (ivar_index) {
2971 case EMU_VAR_FUNC:
2972 *result = func->func;
2973 break;
2974 case EMU_VAR_ROUTE:
2975 if (func->varinfo == NULL)
2976 return (ENOMEM);
2977 *result = ((struct emu_pcminfo *)func->varinfo)->route;
2978 break;
2979 case EMU_VAR_ISEMU10K1:
2980 *result = sc->is_emu10k1;
2981 break;
2982 case EMU_VAR_MCH_DISABLED:
2983 *result = sc->mch_disabled;
2984 break;
2985 case EMU_VAR_MCH_REC:
2986 *result = sc->mch_rec;
2987 break;
2988 default:
2989 return (ENOENT);
2990 }
2991
2992 return (0);
2993 }
2994
2995 static int
2996 emu_write_ivar(device_t bus __unused, device_t dev __unused,
2997 int ivar_index, uintptr_t value __unused)
2998 {
2999
3000 switch (ivar_index) {
3001 case 0:
3002 return (EINVAL);
3003
3004 default:
3005 return (ENOENT);
3006 }
3007 }
3008
3009 static int
3010 emu_pci_probe(device_t dev)
3011 {
3012 struct sbuf *s;
3013 unsigned int thiscard = 0;
3014 uint16_t vendor;
3015
3016 vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2);
3017 if (vendor != 0x1102)
3018 return (ENXIO); /* Not Creative */
3019
3020 thiscard = emu_getcard(dev);
3021 if (thiscard == 0)
3022 return (ENXIO);
3023
3024 s = sbuf_new(NULL, NULL, 4096, 0);
3025 if (s == NULL)
3026 return (ENOMEM);
3027 sbuf_printf(s, "Creative %s [%s]", emu_cards[thiscard].desc, emu_cards[thiscard].SBcode);
3028 sbuf_finish(s);
3029
3030 device_set_desc_copy(dev, sbuf_data(s));
3031
3032 sbuf_delete(s);
3033
3034 return (BUS_PROBE_DEFAULT);
3035 }
3036
3037
3038 static int
3039 emu_pci_attach(device_t dev)
3040 {
3041 struct sndcard_func *func;
3042 struct emu_sc_info *sc;
3043 struct emu_pcminfo *pcminfo;
3044 #if 0
3045 struct emu_midiinfo *midiinfo;
3046 #endif
3047 int i;
3048 int device_flags;
3049 char status[255];
3050 int error = ENXIO;
3051 int unit;
3052
3053 sc = device_get_softc(dev);
3054 unit = device_get_unit(dev);
3055
3056 /* Get configuration */
3057
3058 sc->ctx = device_get_sysctl_ctx(dev);
3059 if (sc->ctx == NULL)
3060 goto bad;
3061 sc->root = device_get_sysctl_tree(dev);
3062 if (sc->root == NULL)
3063 goto bad;
3064
3065 if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled)))
3066 RANGE(sc->mch_disabled, 0, 1);
3067 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3068 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3069 OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting");
3070
3071 if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec)))
3072 RANGE(sc->mch_rec, 0, 1);
3073 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3074 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3075 OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting");
3076
3077 if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level)))
3078 RANGE(sc->mch_rec, 0, 2);
3079 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3080 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3081 OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level");
3082
3083 /* Fill in the softc. */
3084 mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF);
3085 mtx_init(&sc->rw, device_get_nameunit(dev), "exclusive io", MTX_DEF);
3086 sc->dev = dev;
3087 sc->type = pci_get_devid(dev);
3088 sc->rev = pci_get_revid(dev);
3089 sc->enable_ir = 0;
3090 sc->has_ac97 = 0;
3091 sc->has_51 = 0;
3092 sc->has_71 = 0;
3093 sc->broken_digital = 0;
3094 sc->is_emu10k1 = 0;
3095 sc->is_emu10k2 = 0;
3096 sc->is_ca0102 = 0;
3097 sc->is_ca0108 = 0;
3098 sc->is_cardbus = 0;
3099
3100 device_flags = emu_cards[emu_getcard(dev)].flags;
3101 if (device_flags & HAS_51)
3102 sc->has_51 = 1;
3103 if (device_flags & HAS_71) {
3104 sc->has_51 = 1;
3105 sc->has_71 = 1;
3106 }
3107 if (device_flags & IS_EMU10K1)
3108 sc->is_emu10k1 = 1;
3109 if (device_flags & IS_EMU10K2)
3110 sc->is_emu10k2 = 1;
3111 if (device_flags & IS_CA0102)
3112 sc->is_ca0102 = 1;
3113 if (device_flags & IS_CA0108)
3114 sc->is_ca0108 = 1;
3115 if ((sc->is_emu10k2) && (sc->rev == 4)) {
3116 sc->is_emu10k2 = 0;
3117 sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */
3118 }
3119 if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1))
3120 if (device_flags & IS_CARDBUS)
3121 sc->is_cardbus = 1;
3122
3123 if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) {
3124 device_printf(sc->dev, "Unable to detect HW chipset\n");
3125 goto bad;
3126 }
3127 if (device_flags & BROKEN_DIGITAL)
3128 sc->broken_digital = 1;
3129 if (device_flags & HAS_AC97)
3130 sc->has_ac97 = 1;
3131
3132 sc->opcode_shift = 0;
3133 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
3134 sc->opcode_shift = 24;
3135 sc->high_operand_shift = 12;
3136
3137 /* DSP map */
3138 /* sc->fx_base = 0x0 */
3139 sc->input_base = 0x40;
3140 /* sc->p16vinput_base = 0x50; */
3141 sc->output_base = 0x60;
3142 sc->efxc_base = 0x80;
3143 /* sc->output32h_base = 0xa0; */
3144 /* sc->output32l_base = 0xb0; */
3145 sc->dsp_zero = 0xc0;
3146 /* 0xe0...0x100 are unknown */
3147 /* sc->tram_base = 0x200 */
3148 /* sc->tram_addr_base = 0x300 */
3149 sc->gpr_base = EMU_A_FXGPREGBASE;
3150 sc->num_gprs = 0x200;
3151 sc->code_base = EMU_A_MICROCODEBASE;
3152 sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words,
3153 * 1024 instructions */
3154
3155 sc->mchannel_fx = 8;
3156 sc->num_fxbuses = 16;
3157 sc->num_inputs = 8;
3158 sc->num_outputs = 16;
3159 sc->address_mask = EMU_A_PTR_ADDR_MASK;
3160 }
3161 if (sc->is_emu10k1) {
3162 sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */
3163 sc->opcode_shift = 20;
3164 sc->high_operand_shift = 10;
3165 sc->code_base = EMU_MICROCODEBASE;
3166 sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words,
3167 * 512 instructions */
3168 sc->gpr_base = EMU_FXGPREGBASE;
3169 sc->num_gprs = 0x100;
3170 sc->input_base = 0x10;
3171 sc->output_base = 0x20;
3172 /*
3173 * XXX 5.1 Analog outputs are inside efxc address space!
3174 * They use output+0x11/+0x12 (=efxc+1/+2).
3175 * Don't use this efx registers for recording on SB Live! 5.1!
3176 */
3177 sc->efxc_base = 0x30;
3178 sc->dsp_zero = 0x40;
3179 sc->mchannel_fx = 0;
3180 sc->num_fxbuses = 8;
3181 sc->num_inputs = 8;
3182 sc->num_outputs = 16;
3183 sc->address_mask = EMU_PTR_ADDR_MASK;
3184 }
3185 if (sc->opcode_shift == 0)
3186 goto bad;
3187
3188 pci_enable_busmaster(dev);
3189
3190 i = PCIR_BAR(0);
3191 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
3192 if (sc->reg == NULL) {
3193 device_printf(dev, "unable to map register space\n");
3194 goto bad;
3195 }
3196 sc->st = rman_get_bustag(sc->reg);
3197 sc->sh = rman_get_bushandle(sc->reg);
3198
3199 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
3200 sc->timer[i] = 0; /* disable it */
3201
3202 i = 0;
3203 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE);
3204 if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV,
3205 NULL,
3206 emu_intr, sc, &sc->ih)) {
3207 device_printf(dev, "unable to map interrupt\n");
3208 goto bad;
3209 }
3210 if (emu_rm_init(sc) != 0) {
3211 device_printf(dev, "unable to create resource manager\n");
3212 goto bad;
3213 }
3214 if (sc->is_cardbus)
3215 if (emu_cardbus_init(sc) != 0) {
3216 device_printf(dev, "unable to initialize CardBus interface\n");
3217 goto bad;
3218 }
3219 if (emu_init(sc) != 0) {
3220 device_printf(dev, "unable to initialize the card\n");
3221 goto bad;
3222 }
3223 if (emu10kx_dev_init(sc) != 0) {
3224 device_printf(dev, "unable to create control device\n");
3225 goto bad;
3226 }
3227 snprintf(status, 255, "rev %d at io 0x%jx irq %jd", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq));
3228
3229 /* Voices */
3230 for (i = 0; i < NUM_G; i++) {
3231 sc->voice[i].vnum = i;
3232 sc->voice[i].slave = NULL;
3233 sc->voice[i].busy = 0;
3234 sc->voice[i].ismaster = 0;
3235 sc->voice[i].running = 0;
3236 sc->voice[i].b16 = 0;
3237 sc->voice[i].stereo = 0;
3238 sc->voice[i].speed = 0;
3239 sc->voice[i].start = 0;
3240 sc->voice[i].end = 0;
3241 }
3242
3243 /* PCM Audio */
3244 for (i = 0; i < RT_COUNT; i++)
3245 sc->pcm[i] = NULL;
3246
3247 /* FRONT */
3248 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3249 if (func == NULL) {
3250 error = ENOMEM;
3251 goto bad;
3252 }
3253 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3254 if (pcminfo == NULL) {
3255 error = ENOMEM;
3256 goto bad;
3257 }
3258 pcminfo->card = sc;
3259 pcminfo->route = RT_FRONT;
3260
3261 func->func = SCF_PCM;
3262 func->varinfo = pcminfo;
3263 sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1);
3264 device_set_ivars(sc->pcm[RT_FRONT], func);
3265
3266 if (!(sc->mch_disabled)) {
3267 /* REAR */
3268 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3269 if (func == NULL) {
3270 error = ENOMEM;
3271 goto bad;
3272 }
3273 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3274 if (pcminfo == NULL) {
3275 error = ENOMEM;
3276 goto bad;
3277 }
3278 pcminfo->card = sc;
3279 pcminfo->route = RT_REAR;
3280
3281 func->func = SCF_PCM;
3282 func->varinfo = pcminfo;
3283 sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1);
3284 device_set_ivars(sc->pcm[RT_REAR], func);
3285 if (sc->has_51) {
3286 /* CENTER */
3287 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3288 if (func == NULL) {
3289 error = ENOMEM;
3290 goto bad;
3291 }
3292 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3293 if (pcminfo == NULL) {
3294 error = ENOMEM;
3295 goto bad;
3296 }
3297 pcminfo->card = sc;
3298 pcminfo->route = RT_CENTER;
3299
3300 func->func = SCF_PCM;
3301 func->varinfo = pcminfo;
3302 sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1);
3303 device_set_ivars(sc->pcm[RT_CENTER], func);
3304 /* SUB */
3305 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3306 if (func == NULL) {
3307 error = ENOMEM;
3308 goto bad;
3309 }
3310 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3311 if (pcminfo == NULL) {
3312 error = ENOMEM;
3313 goto bad;
3314 }
3315 pcminfo->card = sc;
3316 pcminfo->route = RT_SUB;
3317
3318 func->func = SCF_PCM;
3319 func->varinfo = pcminfo;
3320 sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1);
3321 device_set_ivars(sc->pcm[RT_SUB], func);
3322 }
3323 if (sc->has_71) {
3324 /* SIDE */
3325 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3326 if (func == NULL) {
3327 error = ENOMEM;
3328 goto bad;
3329 }
3330 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3331 if (pcminfo == NULL) {
3332 error = ENOMEM;
3333 goto bad;
3334 }
3335 pcminfo->card = sc;
3336 pcminfo->route = RT_SIDE;
3337
3338 func->func = SCF_PCM;
3339 func->varinfo = pcminfo;
3340 sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1);
3341 device_set_ivars(sc->pcm[RT_SIDE], func);
3342 }
3343 } /* mch_disabled */
3344
3345 if (sc->mch_rec) {
3346 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3347 if (func == NULL) {
3348 error = ENOMEM;
3349 goto bad;
3350 }
3351 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3352 if (pcminfo == NULL) {
3353 error = ENOMEM;
3354 goto bad;
3355 }
3356 pcminfo->card = sc;
3357 pcminfo->route = RT_MCHRECORD;
3358
3359 func->func = SCF_PCM;
3360 func->varinfo = pcminfo;
3361 sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1);
3362 device_set_ivars(sc->pcm[RT_MCHRECORD], func);
3363 } /*mch_rec */
3364
3365 for (i = 0; i < 2; i++)
3366 sc->midi[i] = NULL;
3367
3368 /* MIDI has some memory mangament and (possible) locking problems */
3369 #if 0
3370 /* Midi Interface 1: Live!, Audigy, Audigy 2 */
3371 if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) {
3372 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3373 if (func == NULL) {
3374 error = ENOMEM;
3375 goto bad;
3376 }
3377 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3378 if (midiinfo == NULL) {
3379 error = ENOMEM;
3380 goto bad;
3381 }
3382 midiinfo->card = sc;
3383 if (sc->is_emu10k2 || (sc->is_ca0102)) {
3384 midiinfo->port = EMU_A_MUDATA1;
3385 midiinfo->portnr = 1;
3386 }
3387 if (sc->is_emu10k1) {
3388 midiinfo->port = MUDATA;
3389 midiinfo->portnr = 1;
3390 }
3391 func->func = SCF_MIDI;
3392 func->varinfo = midiinfo;
3393 sc->midi[0] = device_add_child(dev, "midi", -1);
3394 device_set_ivars(sc->midi[0], func);
3395 }
3396 /* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */
3397 if (sc->is_emu10k2 || (sc->is_ca0102)) {
3398 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3399 if (func == NULL) {
3400 error = ENOMEM;
3401 goto bad;
3402 }
3403 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3404 if (midiinfo == NULL) {
3405 error = ENOMEM;
3406 goto bad;
3407 }
3408 midiinfo->card = sc;
3409
3410 midiinfo->port = EMU_A_MUDATA2;
3411 midiinfo->portnr = 2;
3412
3413 func->func = SCF_MIDI;
3414 func->varinfo = midiinfo;
3415 sc->midi[1] = device_add_child(dev, "midi", -1);
3416 device_set_ivars(sc->midi[1], func);
3417 }
3418 #endif
3419 return (bus_generic_attach(dev));
3420
3421 bad:
3422 /* XXX can we just call emu_pci_detach here? */
3423 if (sc->cdev)
3424 emu10kx_dev_uninit(sc);
3425 if (sc->rm != NULL)
3426 emu_rm_uninit(sc);
3427 if (sc->reg)
3428 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3429 if (sc->ih)
3430 bus_teardown_intr(dev, sc->irq, sc->ih);
3431 if (sc->irq)
3432 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3433 mtx_destroy(&sc->rw);
3434 mtx_destroy(&sc->lock);
3435 return (error);
3436 }
3437
3438 static int
3439 emu_pci_detach(device_t dev)
3440 {
3441 struct emu_sc_info *sc;
3442 struct sndcard_func *func;
3443 int devcount, i;
3444 device_t *childlist;
3445 int r = 0;
3446
3447 sc = device_get_softc(dev);
3448
3449 for (i = 0; i < RT_COUNT; i++) {
3450 if (sc->pcm[i] != NULL) {
3451 func = device_get_ivars(sc->pcm[i]);
3452 if (func != NULL && func->func == SCF_PCM) {
3453 device_set_ivars(sc->pcm[i], NULL);
3454 free(func->varinfo, M_DEVBUF);
3455 free(func, M_DEVBUF);
3456 }
3457 r = device_delete_child(dev, sc->pcm[i]);
3458 if (r) return (r);
3459 }
3460 }
3461
3462 if (sc->midi[0] != NULL) {
3463 func = device_get_ivars(sc->midi[0]);
3464 if (func != NULL && func->func == SCF_MIDI) {
3465 device_set_ivars(sc->midi[0], NULL);
3466 free(func->varinfo, M_DEVBUF);
3467 free(func, M_DEVBUF);
3468 }
3469 r = device_delete_child(dev, sc->midi[0]);
3470 if (r) return (r);
3471 }
3472
3473 if (sc->midi[1] != NULL) {
3474 func = device_get_ivars(sc->midi[1]);
3475 if (func != NULL && func->func == SCF_MIDI) {
3476 device_set_ivars(sc->midi[1], NULL);
3477 free(func->varinfo, M_DEVBUF);
3478 free(func, M_DEVBUF);
3479 }
3480 r = device_delete_child(dev, sc->midi[1]);
3481 if (r) return (r);
3482 }
3483
3484 if (device_get_children(dev, &childlist, &devcount) == 0)
3485 for (i = 0; i < devcount - 1; i++) {
3486 device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i]));
3487 func = device_get_ivars(childlist[i]);
3488 if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) {
3489 device_set_ivars(childlist[i], NULL);
3490 free(func->varinfo, M_DEVBUF);
3491 free(func, M_DEVBUF);
3492 }
3493 device_delete_child(dev, childlist[i]);
3494 }
3495 if (childlist != NULL)
3496 free(childlist, M_TEMP);
3497
3498 r = emu10kx_dev_uninit(sc);
3499 if (r)
3500 return (r);
3501
3502 /* shutdown chip */
3503 emu_uninit(sc);
3504 emu_rm_uninit(sc);
3505
3506 if (sc->mem.dmat)
3507 bus_dma_tag_destroy(sc->mem.dmat);
3508
3509 if (sc->reg)
3510 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3511 bus_teardown_intr(dev, sc->irq, sc->ih);
3512 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3513 mtx_destroy(&sc->rw);
3514 mtx_destroy(&sc->lock);
3515
3516 return (bus_generic_detach(dev));
3517 }
3518 /* add suspend, resume */
3519 static device_method_t emu_methods[] = {
3520 /* Device interface */
3521 DEVMETHOD(device_probe, emu_pci_probe),
3522 DEVMETHOD(device_attach, emu_pci_attach),
3523 DEVMETHOD(device_detach, emu_pci_detach),
3524 /* Bus methods */
3525 DEVMETHOD(bus_read_ivar, emu_read_ivar),
3526 DEVMETHOD(bus_write_ivar, emu_write_ivar),
3527
3528 DEVMETHOD_END
3529 };
3530
3531
3532 static driver_t emu_driver = {
3533 "emu10kx",
3534 emu_methods,
3535 sizeof(struct emu_sc_info),
3536 NULL,
3537 0,
3538 NULL
3539 };
3540
3541 static int
3542 emu_modevent(module_t mod __unused, int cmd, void *data __unused)
3543 {
3544 int err = 0;
3545
3546 switch (cmd) {
3547 case MOD_LOAD:
3548 break; /* Success */
3549
3550 case MOD_UNLOAD:
3551 case MOD_SHUTDOWN:
3552
3553 /* XXX Should we check state of pcm & midi subdevices here? */
3554
3555 break; /* Success */
3556
3557 default:
3558 err = EINVAL;
3559 break;
3560 }
3561
3562 return (err);
3563
3564 }
3565
3566 static devclass_t emu_devclass;
3567
3568 DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_devclass, emu_modevent, NULL);
3569 MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER);
Cache object: 6158f2444b3cb2a53dc64331ff1b7291
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