1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-4-Clause
3 *
4 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com>
5 * Copyright (c) 1998 Joachim Kuebart <joachim.kuebart@gmx.net>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 /*-
31 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
36 * are met:
37 *
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 *
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in
43 * the documentation and/or other materials provided with the
44 * distribution.
45 *
46 * 3. All advertising materials mentioning features or use of this
47 * software must display the following acknowledgement:
48 * This product includes software developed by Joachim Kuebart.
49 *
50 * 4. The name of the author may not be used to endorse or promote
51 * products derived from this software without specific prior
52 * written permission.
53 *
54 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
55 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
57 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
58 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
59 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
60 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
61 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
62 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
64 * OF THE POSSIBILITY OF SUCH DAMAGE.
65 */
66
67 /*
68 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI
69 * boards based on the ES1370, ES1371 and ES1373 chips.
70 *
71 * Part of this code was heavily inspired by the linux driver from
72 * Thomas Sailer (sailer@ife.ee.ethz.ch)
73 * Just about everything has been touched and reworked in some way but
74 * the all the underlying sequences/timing/register values are from
75 * Thomas' code.
76 */
77
78 #ifdef HAVE_KERNEL_OPTION_HEADERS
79 #include "opt_snd.h"
80 #endif
81
82 #include <dev/sound/pcm/sound.h>
83 #include <dev/sound/pcm/ac97.h>
84 #include <dev/sound/pci/es137x.h>
85
86 #include <dev/pci/pcireg.h>
87 #include <dev/pci/pcivar.h>
88
89 #include <sys/sysctl.h>
90
91 #include "mixer_if.h"
92
93 SND_DECLARE_FILE("$FreeBSD$");
94
95 #define MEM_MAP_REG 0x14
96
97 /* PCI IDs of supported chips */
98 #define ES1370_PCI_ID 0x50001274
99 #define ES1371_PCI_ID 0x13711274
100 #define ES1371_PCI_ID2 0x13713274
101 #define CT5880_PCI_ID 0x58801274
102 #define CT4730_PCI_ID 0x89381102
103
104 #define ES1371REV_ES1371_A 0x02
105 #define ES1371REV_ES1371_B 0x09
106
107 #define ES1371REV_ES1373_8 0x08
108 #define ES1371REV_ES1373_A 0x04
109 #define ES1371REV_ES1373_B 0x06
110
111 #define ES1371REV_CT5880_A 0x07
112
113 #define CT5880REV_CT5880_C 0x02
114 #define CT5880REV_CT5880_D 0x03
115 #define CT5880REV_CT5880_E 0x04
116
117 #define CT4730REV_CT4730_A 0x00
118
119 #define ES_DEFAULT_BUFSZ 4096
120
121 /* 2 DAC for playback, 1 ADC for record */
122 #define ES_DAC1 0
123 #define ES_DAC2 1
124 #define ES_ADC 2
125 #define ES_NCHANS 3
126
127 #define ES_DMA_SEGS_MIN 2
128 #define ES_DMA_SEGS_MAX 256
129 #define ES_BLK_MIN 64
130 #define ES_BLK_ALIGN (~(ES_BLK_MIN - 1))
131
132 #define ES1370_DAC1_MINSPEED 5512
133 #define ES1370_DAC1_MAXSPEED 44100
134
135 /* device private data */
136 struct es_info;
137
138 struct es_chinfo {
139 struct es_info *parent;
140 struct pcm_channel *channel;
141 struct snd_dbuf *buffer;
142 struct pcmchan_caps caps;
143 int dir, num, index;
144 uint32_t fmt, blksz, blkcnt, bufsz;
145 uint32_t ptr, prevptr;
146 int active;
147 };
148
149 /*
150 * 32bit Ensoniq Configuration (es->escfg).
151 * ----------------------------------------
152 *
153 * +-------+--------+------+------+---------+--------+---------+---------+
154 * len | 16 | 1 | 1 | 1 | 2 | 2 | 1 | 8 |
155 * +-------+--------+------+------+---------+--------+---------+---------+
156 * | fixed | single | | | | | is | general |
157 * | rate | pcm | DACx | DACy | numplay | numrec | es1370? | purpose |
158 * | | mixer | | | | | | |
159 * +-------+--------+------+------+---------+--------+---------+---------+
160 */
161 #define ES_FIXED_RATE(cfgv) \
162 (((cfgv) & 0xffff0000) >> 16)
163 #define ES_SET_FIXED_RATE(cfgv, nv) \
164 (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16))
165 #define ES_SINGLE_PCM_MIX(cfgv) \
166 (((cfgv) & 0x8000) >> 15)
167 #define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \
168 (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15))
169 #define ES_DAC_FIRST(cfgv) \
170 (((cfgv) & 0x4000) >> 14)
171 #define ES_SET_DAC_FIRST(cfgv, nv) \
172 (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14))
173 #define ES_DAC_SECOND(cfgv) \
174 (((cfgv) & 0x2000) >> 13)
175 #define ES_SET_DAC_SECOND(cfgv, nv) \
176 (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13))
177 #define ES_NUMPLAY(cfgv) \
178 (((cfgv) & 0x1800) >> 11)
179 #define ES_SET_NUMPLAY(cfgv, nv) \
180 (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11))
181 #define ES_NUMREC(cfgv) \
182 (((cfgv) & 0x600) >> 9)
183 #define ES_SET_NUMREC(cfgv, nv) \
184 (((cfgv) & ~0x600) | (((nv) & 0x3) << 9))
185 #define ES_IS_ES1370(cfgv) \
186 (((cfgv) & 0x100) >> 8)
187 #define ES_SET_IS_ES1370(cfgv, nv) \
188 (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8))
189 #define ES_GP(cfgv) \
190 ((cfgv) & 0xff)
191 #define ES_SET_GP(cfgv, nv) \
192 (((cfgv) & ~0xff) | ((nv) & 0xff))
193
194 #define ES_DAC1_ENABLED(cfgv) \
195 (ES_NUMPLAY(cfgv) > 1 || \
196 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1))
197 #define ES_DAC2_ENABLED(cfgv) \
198 (ES_NUMPLAY(cfgv) > 1 || \
199 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2))
200
201 /*
202 * DAC 1/2 configuration through kernel hint - hint.pcm.<unit>.dac="val"
203 *
204 * 0 = Enable both DACs - Default
205 * 1 = Enable single DAC (DAC1)
206 * 2 = Enable single DAC (DAC2)
207 * 3 = Enable both DACs, swap position (DAC2 comes first instead of DAC1)
208 */
209 #define ES_DEFAULT_DAC_CFG 0
210
211 struct es_info {
212 bus_space_tag_t st;
213 bus_space_handle_t sh;
214 bus_dma_tag_t parent_dmat;
215
216 struct resource *reg, *irq;
217 int regtype, regid, irqid;
218 void *ih;
219
220 device_t dev;
221 int num;
222 unsigned int bufsz, blkcnt;
223
224 /* Contents of board's registers */
225 uint32_t ctrl;
226 uint32_t sctrl;
227 uint32_t escfg;
228 struct es_chinfo ch[ES_NCHANS];
229 struct mtx *lock;
230 struct callout poll_timer;
231 int poll_ticks, polling;
232 };
233
234 #define ES_LOCK(sc) snd_mtxlock((sc)->lock)
235 #define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock)
236 #define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock)
237
238 /* prototypes */
239 static void es_intr(void *);
240 static uint32_t es1371_wait_src_ready(struct es_info *);
241 static void es1371_src_write(struct es_info *,
242 unsigned short, unsigned short);
243 static unsigned int es1371_adc_rate(struct es_info *, unsigned int, int);
244 static unsigned int es1371_dac_rate(struct es_info *, unsigned int, int);
245 static int es1371_init(struct es_info *);
246 static int es1370_init(struct es_info *);
247 static int es1370_wrcodec(struct es_info *, unsigned char, unsigned char);
248
249 static uint32_t es_fmt[] = {
250 SND_FORMAT(AFMT_U8, 1, 0),
251 SND_FORMAT(AFMT_U8, 2, 0),
252 SND_FORMAT(AFMT_S16_LE, 1, 0),
253 SND_FORMAT(AFMT_S16_LE, 2, 0),
254 0
255 };
256 static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0};
257
258 static const struct {
259 unsigned volidx:4;
260 unsigned left:4;
261 unsigned right:4;
262 unsigned stereo:1;
263 unsigned recmask:13;
264 unsigned avail:1;
265 } mixtable[SOUND_MIXER_NRDEVICES] = {
266 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x1f7f, 1 },
267 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 },
268 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 },
269 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 },
270 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 },
271 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 },
272 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 },
273 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 },
274 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 },
275 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 }
276 };
277
278 static __inline uint32_t
279 es_rd(struct es_info *es, int regno, int size)
280 {
281 switch (size) {
282 case 1:
283 return (bus_space_read_1(es->st, es->sh, regno));
284 case 2:
285 return (bus_space_read_2(es->st, es->sh, regno));
286 case 4:
287 return (bus_space_read_4(es->st, es->sh, regno));
288 default:
289 return (0xFFFFFFFF);
290 }
291 }
292
293 static __inline void
294 es_wr(struct es_info *es, int regno, uint32_t data, int size)
295 {
296
297 switch (size) {
298 case 1:
299 bus_space_write_1(es->st, es->sh, regno, data);
300 break;
301 case 2:
302 bus_space_write_2(es->st, es->sh, regno, data);
303 break;
304 case 4:
305 bus_space_write_4(es->st, es->sh, regno, data);
306 break;
307 }
308 }
309
310 /* -------------------------------------------------------------------- */
311 /* The es1370 mixer interface */
312
313 static int
314 es1370_mixinit(struct snd_mixer *m)
315 {
316 struct es_info *es;
317 int i;
318 uint32_t v;
319
320 es = mix_getdevinfo(m);
321 v = 0;
322 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
323 if (mixtable[i].avail)
324 v |= (1 << i);
325 }
326 /*
327 * Each DAC1/2 for ES1370 can be controlled independently
328 * DAC1 = controlled by synth
329 * DAC2 = controlled by pcm
330 * This is indeed can confuse user if DAC1 become primary playback
331 * channel. Try to be smart and combine both if necessary.
332 */
333 if (ES_SINGLE_PCM_MIX(es->escfg))
334 v &= ~(1 << SOUND_MIXER_SYNTH);
335 mix_setdevs(m, v);
336 v = 0;
337 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
338 if (mixtable[i].recmask)
339 v |= (1 << i);
340 }
341 if (ES_SINGLE_PCM_MIX(es->escfg)) /* ditto */
342 v &= ~(1 << SOUND_MIXER_SYNTH);
343 mix_setrecdevs(m, v);
344 return (0);
345 }
346
347 static int
348 es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right)
349 {
350 struct es_info *es;
351 int l, r, rl, rr, set_dac1;
352
353 if (!mixtable[dev].avail)
354 return (-1);
355 l = left;
356 r = (mixtable[dev].stereo) ? right : l;
357 if (mixtable[dev].left == 0xf)
358 rl = (l < 2) ? 0x80 : 7 - (l - 2) / 14;
359 else
360 rl = (l < 7) ? 0x80 : 31 - (l - 7) / 3;
361 es = mix_getdevinfo(m);
362 ES_LOCK(es);
363 if (dev == SOUND_MIXER_PCM && (ES_SINGLE_PCM_MIX(es->escfg)) &&
364 ES_DAC1_ENABLED(es->escfg))
365 set_dac1 = 1;
366 else
367 set_dac1 = 0;
368 if (mixtable[dev].stereo) {
369 rr = (r < 7) ? 0x80 : 31 - (r - 7) / 3;
370 es1370_wrcodec(es, mixtable[dev].right, rr);
371 if (set_dac1 && mixtable[SOUND_MIXER_SYNTH].stereo)
372 es1370_wrcodec(es,
373 mixtable[SOUND_MIXER_SYNTH].right, rr);
374 }
375 es1370_wrcodec(es, mixtable[dev].left, rl);
376 if (set_dac1)
377 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].left, rl);
378 ES_UNLOCK(es);
379
380 return (l | (r << 8));
381 }
382
383 static uint32_t
384 es1370_mixsetrecsrc(struct snd_mixer *m, uint32_t src)
385 {
386 struct es_info *es;
387 int i, j = 0;
388
389 es = mix_getdevinfo(m);
390 if (src == 0) src = 1 << SOUND_MIXER_MIC;
391 src &= mix_getrecdevs(m);
392 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
393 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask;
394
395 ES_LOCK(es);
396 if ((src & (1 << SOUND_MIXER_PCM)) && ES_SINGLE_PCM_MIX(es->escfg) &&
397 ES_DAC1_ENABLED(es->escfg))
398 j |= mixtable[SOUND_MIXER_SYNTH].recmask;
399 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55);
400 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa);
401 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17);
402 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f);
403 es1370_wrcodec(es, CODEC_OMIX1, 0x7f);
404 es1370_wrcodec(es, CODEC_OMIX2, 0x3f);
405 ES_UNLOCK(es);
406
407 return (src);
408 }
409
410 static kobj_method_t es1370_mixer_methods[] = {
411 KOBJMETHOD(mixer_init, es1370_mixinit),
412 KOBJMETHOD(mixer_set, es1370_mixset),
413 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc),
414 KOBJMETHOD_END
415 };
416 MIXER_DECLARE(es1370_mixer);
417
418 /* -------------------------------------------------------------------- */
419
420 static int
421 es1370_wrcodec(struct es_info *es, unsigned char i, unsigned char data)
422 {
423 unsigned int t;
424
425 ES_LOCK_ASSERT(es);
426
427 for (t = 0; t < 0x1000; t++) {
428 if ((es_rd(es, ES1370_REG_STATUS, 4) &
429 STAT_CSTAT) == 0) {
430 es_wr(es, ES1370_REG_CODEC,
431 ((unsigned short)i << CODEC_INDEX_SHIFT) | data, 2);
432 return (0);
433 }
434 DELAY(1);
435 }
436 device_printf(es->dev, "%s: timed out\n", __func__);
437 return (-1);
438 }
439
440 /* -------------------------------------------------------------------- */
441
442 /* channel interface */
443 static void *
444 eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
445 struct pcm_channel *c, int dir)
446 {
447 struct es_info *es = devinfo;
448 struct es_chinfo *ch;
449 uint32_t index;
450
451 ES_LOCK(es);
452
453 if (dir == PCMDIR_PLAY) {
454 index = ES_GP(es->escfg);
455 es->escfg = ES_SET_GP(es->escfg, index + 1);
456 if (index == 0)
457 index = ES_DAC_FIRST(es->escfg);
458 else if (index == 1)
459 index = ES_DAC_SECOND(es->escfg);
460 else {
461 device_printf(es->dev,
462 "Invalid ES_GP index: %d\n", index);
463 ES_UNLOCK(es);
464 return (NULL);
465 }
466 if (!(index == ES_DAC1 || index == ES_DAC2)) {
467 device_printf(es->dev, "Unknown DAC: %d\n", index + 1);
468 ES_UNLOCK(es);
469 return (NULL);
470 }
471 if (es->ch[index].channel != NULL) {
472 device_printf(es->dev, "DAC%d already initialized!\n",
473 index + 1);
474 ES_UNLOCK(es);
475 return (NULL);
476 }
477 } else
478 index = ES_ADC;
479
480 ch = &es->ch[index];
481 ch->index = index;
482 ch->num = es->num++;
483 ch->caps = es_caps;
484 if (ES_IS_ES1370(es->escfg)) {
485 if (ch->index == ES_DAC1) {
486 ch->caps.maxspeed = ES1370_DAC1_MAXSPEED;
487 ch->caps.minspeed = ES1370_DAC1_MINSPEED;
488 } else {
489 uint32_t fixed_rate = ES_FIXED_RATE(es->escfg);
490 if (!(fixed_rate < es_caps.minspeed ||
491 fixed_rate > es_caps.maxspeed)) {
492 ch->caps.maxspeed = fixed_rate;
493 ch->caps.minspeed = fixed_rate;
494 }
495 }
496 }
497 ch->parent = es;
498 ch->channel = c;
499 ch->buffer = b;
500 ch->bufsz = es->bufsz;
501 ch->blkcnt = es->blkcnt;
502 ch->blksz = ch->bufsz / ch->blkcnt;
503 ch->dir = dir;
504 ES_UNLOCK(es);
505 if (sndbuf_alloc(ch->buffer, es->parent_dmat, 0, ch->bufsz) != 0)
506 return (NULL);
507 ES_LOCK(es);
508 if (dir == PCMDIR_PLAY) {
509 if (ch->index == ES_DAC1) {
510 es_wr(es, ES1370_REG_MEMPAGE,
511 ES1370_REG_DAC1_FRAMEADR >> 8, 1);
512 es_wr(es, ES1370_REG_DAC1_FRAMEADR & 0xff,
513 sndbuf_getbufaddr(ch->buffer), 4);
514 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff,
515 (ch->bufsz >> 2) - 1, 4);
516 } else {
517 es_wr(es, ES1370_REG_MEMPAGE,
518 ES1370_REG_DAC2_FRAMEADR >> 8, 1);
519 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff,
520 sndbuf_getbufaddr(ch->buffer), 4);
521 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff,
522 (ch->bufsz >> 2) - 1, 4);
523 }
524 } else {
525 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1);
526 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff,
527 sndbuf_getbufaddr(ch->buffer), 4);
528 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff,
529 (ch->bufsz >> 2) - 1, 4);
530 }
531 ES_UNLOCK(es);
532 return (ch);
533 }
534
535 static int
536 eschan_setformat(kobj_t obj, void *data, uint32_t format)
537 {
538 struct es_chinfo *ch = data;
539 struct es_info *es = ch->parent;
540
541 ES_LOCK(es);
542 if (ch->dir == PCMDIR_PLAY) {
543 if (ch->index == ES_DAC1) {
544 es->sctrl &= ~SCTRL_P1FMT;
545 if (format & AFMT_S16_LE)
546 es->sctrl |= SCTRL_P1SEB;
547 if (AFMT_CHANNEL(format) > 1)
548 es->sctrl |= SCTRL_P1SMB;
549 } else {
550 es->sctrl &= ~SCTRL_P2FMT;
551 if (format & AFMT_S16_LE)
552 es->sctrl |= SCTRL_P2SEB;
553 if (AFMT_CHANNEL(format) > 1)
554 es->sctrl |= SCTRL_P2SMB;
555 }
556 } else {
557 es->sctrl &= ~SCTRL_R1FMT;
558 if (format & AFMT_S16_LE)
559 es->sctrl |= SCTRL_R1SEB;
560 if (AFMT_CHANNEL(format) > 1)
561 es->sctrl |= SCTRL_R1SMB;
562 }
563 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
564 ES_UNLOCK(es);
565 ch->fmt = format;
566 return (0);
567 }
568
569 static uint32_t
570 eschan1370_setspeed(kobj_t obj, void *data, uint32_t speed)
571 {
572 struct es_chinfo *ch = data;
573 struct es_info *es = ch->parent;
574
575 ES_LOCK(es);
576 /* Fixed rate , do nothing. */
577 if (ch->caps.minspeed == ch->caps.maxspeed) {
578 ES_UNLOCK(es);
579 return (ch->caps.maxspeed);
580 }
581 if (speed < ch->caps.minspeed)
582 speed = ch->caps.minspeed;
583 if (speed > ch->caps.maxspeed)
584 speed = ch->caps.maxspeed;
585 if (ch->index == ES_DAC1) {
586 /*
587 * DAC1 does not support continuous rate settings.
588 * Pick the nearest and use it since FEEDER_RATE will
589 * do the proper conversion for us.
590 */
591 es->ctrl &= ~CTRL_WTSRSEL;
592 if (speed < 8268) {
593 speed = 5512;
594 es->ctrl |= 0 << CTRL_SH_WTSRSEL;
595 } else if (speed < 16537) {
596 speed = 11025;
597 es->ctrl |= 1 << CTRL_SH_WTSRSEL;
598 } else if (speed < 33075) {
599 speed = 22050;
600 es->ctrl |= 2 << CTRL_SH_WTSRSEL;
601 } else {
602 speed = 44100;
603 es->ctrl |= 3 << CTRL_SH_WTSRSEL;
604 }
605 } else {
606 es->ctrl &= ~CTRL_PCLKDIV;
607 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV;
608 }
609 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
610 ES_UNLOCK(es);
611 return (speed);
612 }
613
614 static uint32_t
615 eschan1371_setspeed(kobj_t obj, void *data, uint32_t speed)
616 {
617 struct es_chinfo *ch = data;
618 struct es_info *es = ch->parent;
619 uint32_t i;
620 int delta;
621
622 ES_LOCK(es);
623 if (ch->dir == PCMDIR_PLAY)
624 i = es1371_dac_rate(es, speed, ch->index); /* play */
625 else
626 i = es1371_adc_rate(es, speed, ch->index); /* record */
627 ES_UNLOCK(es);
628 delta = (speed > i) ? (speed - i) : (i - speed);
629 if (delta < 2)
630 return (speed);
631 return (i);
632 }
633
634 static int
635 eschan_setfragments(kobj_t obj, void *data, uint32_t blksz, uint32_t blkcnt)
636 {
637 struct es_chinfo *ch = data;
638 struct es_info *es = ch->parent;
639
640 blksz &= ES_BLK_ALIGN;
641
642 if (blksz > (sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN))
643 blksz = sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN;
644 if (blksz < ES_BLK_MIN)
645 blksz = ES_BLK_MIN;
646 if (blkcnt > ES_DMA_SEGS_MAX)
647 blkcnt = ES_DMA_SEGS_MAX;
648 if (blkcnt < ES_DMA_SEGS_MIN)
649 blkcnt = ES_DMA_SEGS_MIN;
650
651 while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->buffer)) {
652 if ((blkcnt >> 1) >= ES_DMA_SEGS_MIN)
653 blkcnt >>= 1;
654 else if ((blksz >> 1) >= ES_BLK_MIN)
655 blksz >>= 1;
656 else
657 break;
658 }
659
660 if ((sndbuf_getblksz(ch->buffer) != blksz ||
661 sndbuf_getblkcnt(ch->buffer) != blkcnt) &&
662 sndbuf_resize(ch->buffer, blkcnt, blksz) != 0)
663 device_printf(es->dev, "%s: failed blksz=%u blkcnt=%u\n",
664 __func__, blksz, blkcnt);
665
666 ch->bufsz = sndbuf_getsize(ch->buffer);
667 ch->blksz = sndbuf_getblksz(ch->buffer);
668 ch->blkcnt = sndbuf_getblkcnt(ch->buffer);
669
670 return (0);
671 }
672
673 static uint32_t
674 eschan_setblocksize(kobj_t obj, void *data, uint32_t blksz)
675 {
676 struct es_chinfo *ch = data;
677 struct es_info *es = ch->parent;
678
679 eschan_setfragments(obj, data, blksz, es->blkcnt);
680
681 return (ch->blksz);
682 }
683
684 #define es_chan_active(es) ((es)->ch[ES_DAC1].active + \
685 (es)->ch[ES_DAC2].active + \
686 (es)->ch[ES_ADC].active)
687
688 static __inline int
689 es_poll_channel(struct es_chinfo *ch)
690 {
691 struct es_info *es;
692 uint32_t sz, delta;
693 uint32_t reg, ptr;
694
695 if (ch == NULL || ch->channel == NULL || ch->active == 0)
696 return (0);
697
698 es = ch->parent;
699 if (ch->dir == PCMDIR_PLAY) {
700 if (ch->index == ES_DAC1)
701 reg = ES1370_REG_DAC1_FRAMECNT;
702 else
703 reg = ES1370_REG_DAC2_FRAMECNT;
704 } else
705 reg = ES1370_REG_ADC_FRAMECNT;
706 sz = ch->blksz * ch->blkcnt;
707 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4);
708 ptr = es_rd(es, reg & 0x000000ff, 4) >> 16;
709 ptr <<= 2;
710 ch->ptr = ptr;
711 ptr %= sz;
712 ptr &= ~(ch->blksz - 1);
713 delta = (sz + ptr - ch->prevptr) % sz;
714
715 if (delta < ch->blksz)
716 return (0);
717
718 ch->prevptr = ptr;
719
720 return (1);
721 }
722
723 static void
724 es_poll_callback(void *arg)
725 {
726 struct es_info *es = arg;
727 uint32_t trigger = 0;
728 int i;
729
730 if (es == NULL)
731 return;
732
733 ES_LOCK(es);
734 if (es->polling == 0 || es_chan_active(es) == 0) {
735 ES_UNLOCK(es);
736 return;
737 }
738
739 for (i = 0; i < ES_NCHANS; i++) {
740 if (es_poll_channel(&es->ch[i]) != 0)
741 trigger |= 1 << i;
742 }
743
744 /* XXX */
745 callout_reset(&es->poll_timer, 1/*es->poll_ticks*/,
746 es_poll_callback, es);
747
748 ES_UNLOCK(es);
749
750 for (i = 0; i < ES_NCHANS; i++) {
751 if (trigger & (1 << i))
752 chn_intr(es->ch[i].channel);
753 }
754 }
755
756 static int
757 eschan_trigger(kobj_t obj, void *data, int go)
758 {
759 struct es_chinfo *ch = data;
760 struct es_info *es = ch->parent;
761 uint32_t cnt, b = 0;
762
763 if (!PCMTRIG_COMMON(go))
764 return 0;
765
766 ES_LOCK(es);
767 cnt = (ch->blksz / sndbuf_getalign(ch->buffer)) - 1;
768 if (ch->fmt & AFMT_16BIT)
769 b |= 0x02;
770 if (AFMT_CHANNEL(ch->fmt) > 1)
771 b |= 0x01;
772 if (ch->dir == PCMDIR_PLAY) {
773 if (go == PCMTRIG_START) {
774 if (ch->index == ES_DAC1) {
775 es->ctrl |= CTRL_DAC1_EN;
776 es->sctrl &= ~(SCTRL_P1LOOPSEL |
777 SCTRL_P1PAUSE | SCTRL_P1SCTRLD);
778 if (es->polling == 0)
779 es->sctrl |= SCTRL_P1INTEN;
780 else
781 es->sctrl &= ~SCTRL_P1INTEN;
782 es->sctrl |= b;
783 es_wr(es, ES1370_REG_DAC1_SCOUNT, cnt, 4);
784 /* start at beginning of buffer */
785 es_wr(es, ES1370_REG_MEMPAGE,
786 ES1370_REG_DAC1_FRAMECNT >> 8, 4);
787 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff,
788 (ch->bufsz >> 2) - 1, 4);
789 } else {
790 es->ctrl |= CTRL_DAC2_EN;
791 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC |
792 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE |
793 SCTRL_P2DACSEN);
794 if (es->polling == 0)
795 es->sctrl |= SCTRL_P2INTEN;
796 else
797 es->sctrl &= ~SCTRL_P2INTEN;
798 es->sctrl |= (b << 2) |
799 ((((b >> 1) & 1) + 1) << SCTRL_SH_P2ENDINC);
800 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4);
801 /* start at beginning of buffer */
802 es_wr(es, ES1370_REG_MEMPAGE,
803 ES1370_REG_DAC2_FRAMECNT >> 8, 4);
804 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff,
805 (ch->bufsz >> 2) - 1, 4);
806 }
807 } else
808 es->ctrl &= ~((ch->index == ES_DAC1) ?
809 CTRL_DAC1_EN : CTRL_DAC2_EN);
810 } else {
811 if (go == PCMTRIG_START) {
812 es->ctrl |= CTRL_ADC_EN;
813 es->sctrl &= ~SCTRL_R1LOOPSEL;
814 if (es->polling == 0)
815 es->sctrl |= SCTRL_R1INTEN;
816 else
817 es->sctrl &= ~SCTRL_R1INTEN;
818 es->sctrl |= b << 4;
819 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4);
820 /* start at beginning of buffer */
821 es_wr(es, ES1370_REG_MEMPAGE,
822 ES1370_REG_ADC_FRAMECNT >> 8, 4);
823 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff,
824 (ch->bufsz >> 2) - 1, 4);
825 } else
826 es->ctrl &= ~CTRL_ADC_EN;
827 }
828 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
829 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
830 if (go == PCMTRIG_START) {
831 if (es->polling != 0) {
832 ch->ptr = 0;
833 ch->prevptr = 0;
834 if (es_chan_active(es) == 0) {
835 es->poll_ticks = 1;
836 callout_reset(&es->poll_timer, 1,
837 es_poll_callback, es);
838 }
839 }
840 ch->active = 1;
841 } else {
842 ch->active = 0;
843 if (es->polling != 0) {
844 if (es_chan_active(es) == 0) {
845 callout_stop(&es->poll_timer);
846 es->poll_ticks = 1;
847 }
848 }
849 }
850 ES_UNLOCK(es);
851 return (0);
852 }
853
854 static uint32_t
855 eschan_getptr(kobj_t obj, void *data)
856 {
857 struct es_chinfo *ch = data;
858 struct es_info *es = ch->parent;
859 uint32_t reg, cnt;
860
861 ES_LOCK(es);
862 if (es->polling != 0)
863 cnt = ch->ptr;
864 else {
865 if (ch->dir == PCMDIR_PLAY) {
866 if (ch->index == ES_DAC1)
867 reg = ES1370_REG_DAC1_FRAMECNT;
868 else
869 reg = ES1370_REG_DAC2_FRAMECNT;
870 } else
871 reg = ES1370_REG_ADC_FRAMECNT;
872 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4);
873 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16;
874 /* cnt is longwords */
875 cnt <<= 2;
876 }
877 ES_UNLOCK(es);
878
879 cnt &= ES_BLK_ALIGN;
880
881 return (cnt);
882 }
883
884 static struct pcmchan_caps *
885 eschan_getcaps(kobj_t obj, void *data)
886 {
887 struct es_chinfo *ch = data;
888
889 return (&ch->caps);
890 }
891
892 static kobj_method_t eschan1370_methods[] = {
893 KOBJMETHOD(channel_init, eschan_init),
894 KOBJMETHOD(channel_setformat, eschan_setformat),
895 KOBJMETHOD(channel_setspeed, eschan1370_setspeed),
896 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
897 KOBJMETHOD(channel_setfragments, eschan_setfragments),
898 KOBJMETHOD(channel_trigger, eschan_trigger),
899 KOBJMETHOD(channel_getptr, eschan_getptr),
900 KOBJMETHOD(channel_getcaps, eschan_getcaps),
901 KOBJMETHOD_END
902 };
903 CHANNEL_DECLARE(eschan1370);
904
905 static kobj_method_t eschan1371_methods[] = {
906 KOBJMETHOD(channel_init, eschan_init),
907 KOBJMETHOD(channel_setformat, eschan_setformat),
908 KOBJMETHOD(channel_setspeed, eschan1371_setspeed),
909 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
910 KOBJMETHOD(channel_setfragments, eschan_setfragments),
911 KOBJMETHOD(channel_trigger, eschan_trigger),
912 KOBJMETHOD(channel_getptr, eschan_getptr),
913 KOBJMETHOD(channel_getcaps, eschan_getcaps),
914 KOBJMETHOD_END
915 };
916 CHANNEL_DECLARE(eschan1371);
917
918 /* -------------------------------------------------------------------- */
919 /* The interrupt handler */
920 static void
921 es_intr(void *p)
922 {
923 struct es_info *es = p;
924 uint32_t intsrc, sctrl;
925
926 ES_LOCK(es);
927 if (es->polling != 0) {
928 ES_UNLOCK(es);
929 return;
930 }
931 intsrc = es_rd(es, ES1370_REG_STATUS, 4);
932 if ((intsrc & STAT_INTR) == 0) {
933 ES_UNLOCK(es);
934 return;
935 }
936
937 sctrl = es->sctrl;
938 if (intsrc & STAT_ADC)
939 sctrl &= ~SCTRL_R1INTEN;
940 if (intsrc & STAT_DAC1)
941 sctrl &= ~SCTRL_P1INTEN;
942 if (intsrc & STAT_DAC2)
943 sctrl &= ~SCTRL_P2INTEN;
944
945 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4);
946 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
947 ES_UNLOCK(es);
948
949 if (intsrc & STAT_ADC)
950 chn_intr(es->ch[ES_ADC].channel);
951 if (intsrc & STAT_DAC1)
952 chn_intr(es->ch[ES_DAC1].channel);
953 if (intsrc & STAT_DAC2)
954 chn_intr(es->ch[ES_DAC2].channel);
955 }
956
957 /* ES1370 specific */
958 static int
959 es1370_init(struct es_info *es)
960 {
961 uint32_t fixed_rate;
962 int r, single_pcm;
963
964 /* ES1370 default to fixed rate operation */
965 if (resource_int_value(device_get_name(es->dev),
966 device_get_unit(es->dev), "fixed_rate", &r) == 0) {
967 fixed_rate = r;
968 if (fixed_rate) {
969 if (fixed_rate < es_caps.minspeed)
970 fixed_rate = es_caps.minspeed;
971 if (fixed_rate > es_caps.maxspeed)
972 fixed_rate = es_caps.maxspeed;
973 }
974 } else
975 fixed_rate = es_caps.maxspeed;
976
977 if (resource_int_value(device_get_name(es->dev),
978 device_get_unit(es->dev), "single_pcm_mixer", &r) == 0)
979 single_pcm = (r != 0) ? 1 : 0;
980 else
981 single_pcm = 1;
982
983 ES_LOCK(es);
984 if (ES_NUMPLAY(es->escfg) == 1)
985 single_pcm = 1;
986 /* This is ES1370 */
987 es->escfg = ES_SET_IS_ES1370(es->escfg, 1);
988 if (fixed_rate)
989 es->escfg = ES_SET_FIXED_RATE(es->escfg, fixed_rate);
990 else {
991 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
992 fixed_rate = DSP_DEFAULT_SPEED;
993 }
994 if (single_pcm)
995 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1);
996 else
997 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0);
998 es->ctrl = CTRL_CDC_EN | CTRL_JYSTK_EN | CTRL_SERR_DIS |
999 (DAC2_SRTODIV(fixed_rate) << CTRL_SH_PCLKDIV);
1000 es->ctrl |= 3 << CTRL_SH_WTSRSEL;
1001 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1002
1003 es->sctrl = 0;
1004 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
1005
1006 /* No RST, PD */
1007 es1370_wrcodec(es, CODEC_RES_PD, 3);
1008 /*
1009 * CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off the LRCLK2 PLL;
1010 * program DAC_SYNC=0!
1011 */
1012 es1370_wrcodec(es, CODEC_CSEL, 0);
1013 /* Recording source is mixer */
1014 es1370_wrcodec(es, CODEC_ADSEL, 0);
1015 /* MIC amp is 0db */
1016 es1370_wrcodec(es, CODEC_MGAIN, 0);
1017 ES_UNLOCK(es);
1018
1019 return (0);
1020 }
1021
1022 /* ES1371 specific */
1023 int
1024 es1371_init(struct es_info *es)
1025 {
1026 uint32_t cssr, devid, revid, subdev;
1027 int idx;
1028
1029 ES_LOCK(es);
1030 /* This is NOT ES1370 */
1031 es->escfg = ES_SET_IS_ES1370(es->escfg, 0);
1032 es->num = 0;
1033 es->sctrl = 0;
1034 cssr = 0;
1035 devid = pci_get_devid(es->dev);
1036 revid = pci_get_revid(es->dev);
1037 subdev = (pci_get_subdevice(es->dev) << 16) |
1038 pci_get_subvendor(es->dev);
1039 /*
1040 * Joyport blacklist. Either we're facing with broken hardware
1041 * or because this hardware need special (unknown) initialization
1042 * procedures.
1043 */
1044 switch (subdev) {
1045 case 0x20001274: /* old Ensoniq */
1046 es->ctrl = 0;
1047 break;
1048 default:
1049 es->ctrl = CTRL_JYSTK_EN;
1050 break;
1051 }
1052 if (devid == CT4730_PCI_ID) {
1053 /* XXX amplifier hack? */
1054 es->ctrl |= (1 << 16);
1055 }
1056 /* initialize the chips */
1057 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1058 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
1059 es_wr(es, ES1371_REG_LEGACY, 0, 4);
1060 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
1061 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
1062 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
1063 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
1064 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
1065 cssr = 1 << 29;
1066 es_wr(es, ES1370_REG_STATUS, cssr, 4);
1067 DELAY(20000);
1068 }
1069 /* AC'97 warm reset to start the bitclk */
1070 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1071 es_wr(es, ES1371_REG_LEGACY, ES1371_SYNC_RES, 4);
1072 DELAY(2000);
1073 es_wr(es, ES1370_REG_CONTROL, es->sctrl, 4);
1074 es1371_wait_src_ready(es);
1075 /* Init the sample rate converter */
1076 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4);
1077 for (idx = 0; idx < 0x80; idx++)
1078 es1371_src_write(es, idx, 0);
1079 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
1080 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
1081 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
1082 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
1083 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12);
1084 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12);
1085 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12);
1086 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
1087 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12);
1088 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
1089 es1371_adc_rate(es, 22050, ES_ADC);
1090 es1371_dac_rate(es, 22050, ES_DAC1);
1091 es1371_dac_rate(es, 22050, ES_DAC2);
1092 /*
1093 * WARNING:
1094 * enabling the sample rate converter without properly programming
1095 * its parameters causes the chip to lock up (the SRC busy bit will
1096 * be stuck high, and I've found no way to rectify this other than
1097 * power cycle)
1098 */
1099 es1371_wait_src_ready(es);
1100 es_wr(es, ES1371_REG_SMPRATE, 0, 4);
1101 /* try to reset codec directly */
1102 es_wr(es, ES1371_REG_CODEC, 0, 4);
1103 es_wr(es, ES1370_REG_STATUS, cssr, 4);
1104 ES_UNLOCK(es);
1105
1106 return (0);
1107 }
1108
1109 /* -------------------------------------------------------------------- */
1110
1111 static int
1112 es1371_wrcd(kobj_t obj, void *s, int addr, uint32_t data)
1113 {
1114 uint32_t t, x, orig;
1115 struct es_info *es = (struct es_info*)s;
1116
1117 for (t = 0; t < 0x1000; t++) {
1118 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4))
1119 break;
1120 }
1121 /* save the current state for later */
1122 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4);
1123 /* enable SRC state data in SRC mux */
1124 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1125 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4);
1126 /* busy wait */
1127 for (t = 0; t < 0x1000; t++) {
1128 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1129 0x00000000)
1130 break;
1131 }
1132 /* wait for a SAFE time to write addr/data and then do it, dammit */
1133 for (t = 0; t < 0x1000; t++) {
1134 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1135 0x00010000)
1136 break;
1137 }
1138
1139 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) &
1140 CODEC_POADD_MASK) | ((data << CODEC_PODAT_SHIFT) &
1141 CODEC_PODAT_MASK), 4);
1142 /* restore SRC reg */
1143 es1371_wait_src_ready(s);
1144 es_wr(es, ES1371_REG_SMPRATE, orig, 4);
1145
1146 return (0);
1147 }
1148
1149 static int
1150 es1371_rdcd(kobj_t obj, void *s, int addr)
1151 {
1152 uint32_t t, x, orig;
1153 struct es_info *es = (struct es_info *)s;
1154
1155 for (t = 0; t < 0x1000; t++) {
1156 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP))
1157 break;
1158 }
1159
1160 /* save the current state for later */
1161 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4);
1162 /* enable SRC state data in SRC mux */
1163 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1164 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4);
1165 /* busy wait */
1166 for (t = 0; t < 0x1000; t++) {
1167 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1168 0x00000000)
1169 break;
1170 }
1171 /* wait for a SAFE time to write addr/data and then do it, dammit */
1172 for (t = 0; t < 0x1000; t++) {
1173 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1174 0x00010000)
1175 break;
1176 }
1177
1178 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) &
1179 CODEC_POADD_MASK) | CODEC_PORD, 4);
1180
1181 /* restore SRC reg */
1182 es1371_wait_src_ready(s);
1183 es_wr(es, ES1371_REG_SMPRATE, orig, 4);
1184
1185 /* now wait for the stinkin' data (RDY) */
1186 for (t = 0; t < 0x1000; t++) {
1187 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY)
1188 break;
1189 }
1190
1191 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
1192 }
1193
1194 static kobj_method_t es1371_ac97_methods[] = {
1195 KOBJMETHOD(ac97_read, es1371_rdcd),
1196 KOBJMETHOD(ac97_write, es1371_wrcd),
1197 KOBJMETHOD_END
1198 };
1199 AC97_DECLARE(es1371_ac97);
1200
1201 /* -------------------------------------------------------------------- */
1202
1203 static unsigned int
1204 es1371_src_read(struct es_info *es, unsigned short reg)
1205 {
1206 uint32_t r;
1207
1208 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1209 ES1371_DIS_P2 | ES1371_DIS_R1);
1210 r |= ES1371_SRC_RAM_ADDRO(reg);
1211 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1212 return (ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)));
1213 }
1214
1215 static void
1216 es1371_src_write(struct es_info *es, unsigned short reg, unsigned short data)
1217 {
1218 uint32_t r;
1219
1220 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1221 ES1371_DIS_P2 | ES1371_DIS_R1);
1222 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
1223 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4);
1224 }
1225
1226 static unsigned int
1227 es1371_adc_rate(struct es_info *es, unsigned int rate, int set)
1228 {
1229 unsigned int n, truncm, freq, result;
1230
1231 ES_LOCK_ASSERT(es);
1232
1233 if (rate > 48000)
1234 rate = 48000;
1235 if (rate < 4000)
1236 rate = 4000;
1237 n = rate / 3000;
1238 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
1239 n--;
1240 truncm = (21 * n - 1) | 1;
1241 freq = ((48000UL << 15) / rate) * n;
1242 result = (48000UL << 15) / (freq / n);
1243 if (set) {
1244 if (rate >= 24000) {
1245 if (truncm > 239)
1246 truncm = 239;
1247 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
1248 (((239 - truncm) >> 1) << 9) | (n << 4));
1249 } else {
1250 if (truncm > 119)
1251 truncm = 119;
1252 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
1253 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
1254 }
1255 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
1256 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) &
1257 0x00ff) | ((freq >> 5) & 0xfc00));
1258 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC,
1259 freq & 0x7fff);
1260 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
1261 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
1262 }
1263 return (result);
1264 }
1265
1266 static unsigned int
1267 es1371_dac_rate(struct es_info *es, unsigned int rate, int set)
1268 {
1269 unsigned int freq, r, result, dac, dis;
1270
1271 ES_LOCK_ASSERT(es);
1272
1273 if (rate > 48000)
1274 rate = 48000;
1275 if (rate < 4000)
1276 rate = 4000;
1277 freq = ((rate << 15) + 1500) / 3000;
1278 result = (freq * 3000) >> 15;
1279
1280 dac = (set == ES_DAC1) ? ES_SMPREG_DAC1 : ES_SMPREG_DAC2;
1281 dis = (set == ES_DAC1) ? ES1371_DIS_P2 : ES1371_DIS_P1;
1282 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1283 ES1371_DIS_P2 | ES1371_DIS_R1));
1284 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1285 es1371_src_write(es, dac + ES_SMPREG_INT_REGS,
1286 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) |
1287 ((freq >> 5) & 0xfc00));
1288 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
1289 r = (es1371_wait_src_ready(es) &
1290 (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
1291 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1292 return (result);
1293 }
1294
1295 static uint32_t
1296 es1371_wait_src_ready(struct es_info *es)
1297 {
1298 uint32_t t, r;
1299
1300 for (t = 0; t < 0x1000; t++) {
1301 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) &
1302 ES1371_SRC_RAM_BUSY))
1303 return (r);
1304 DELAY(1);
1305 }
1306 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__,
1307 ES1371_REG_SMPRATE, r);
1308 return (0);
1309 }
1310
1311 /* -------------------------------------------------------------------- */
1312
1313 /*
1314 * Probe and attach the card
1315 */
1316
1317 static int
1318 es_pci_probe(device_t dev)
1319 {
1320 switch(pci_get_devid(dev)) {
1321 case ES1370_PCI_ID:
1322 device_set_desc(dev, "AudioPCI ES1370");
1323 return (BUS_PROBE_DEFAULT);
1324 case ES1371_PCI_ID:
1325 switch(pci_get_revid(dev)) {
1326 case ES1371REV_ES1371_A:
1327 device_set_desc(dev, "AudioPCI ES1371-A");
1328 return (BUS_PROBE_DEFAULT);
1329 case ES1371REV_ES1371_B:
1330 device_set_desc(dev, "AudioPCI ES1371-B");
1331 return (BUS_PROBE_DEFAULT);
1332 case ES1371REV_ES1373_A:
1333 device_set_desc(dev, "AudioPCI ES1373-A");
1334 return (BUS_PROBE_DEFAULT);
1335 case ES1371REV_ES1373_B:
1336 device_set_desc(dev, "AudioPCI ES1373-B");
1337 return (BUS_PROBE_DEFAULT);
1338 case ES1371REV_ES1373_8:
1339 device_set_desc(dev, "AudioPCI ES1373-8");
1340 return (BUS_PROBE_DEFAULT);
1341 case ES1371REV_CT5880_A:
1342 device_set_desc(dev, "Creative CT5880-A");
1343 return (BUS_PROBE_DEFAULT);
1344 default:
1345 device_set_desc(dev, "AudioPCI ES1371-?");
1346 device_printf(dev,
1347 "unknown revision %d -- please report to "
1348 "freebsd-multimedia@freebsd.org\n",
1349 pci_get_revid(dev));
1350 return (BUS_PROBE_DEFAULT);
1351 }
1352 case ES1371_PCI_ID2:
1353 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)");
1354 device_printf(dev,
1355 "unknown revision %d -- please report to "
1356 "freebsd-multimedia@freebsd.org\n", pci_get_revid(dev));
1357 return (BUS_PROBE_DEFAULT);
1358 case CT4730_PCI_ID:
1359 switch(pci_get_revid(dev)) {
1360 case CT4730REV_CT4730_A:
1361 device_set_desc(dev,
1362 "Creative SB AudioPCI CT4730/EV1938");
1363 return (BUS_PROBE_DEFAULT);
1364 default:
1365 device_set_desc(dev, "Creative SB AudioPCI CT4730-?");
1366 device_printf(dev,
1367 "unknown revision %d -- please report to "
1368 "freebsd-multimedia@freebsd.org\n",
1369 pci_get_revid(dev));
1370 return (BUS_PROBE_DEFAULT);
1371 }
1372 case CT5880_PCI_ID:
1373 switch(pci_get_revid(dev)) {
1374 case CT5880REV_CT5880_C:
1375 device_set_desc(dev, "Creative CT5880-C");
1376 return (BUS_PROBE_DEFAULT);
1377 case CT5880REV_CT5880_D:
1378 device_set_desc(dev, "Creative CT5880-D");
1379 return (BUS_PROBE_DEFAULT);
1380 case CT5880REV_CT5880_E:
1381 device_set_desc(dev, "Creative CT5880-E");
1382 return (BUS_PROBE_DEFAULT);
1383 default:
1384 device_set_desc(dev, "Creative CT5880-?");
1385 device_printf(dev,
1386 "unknown revision %d -- please report to "
1387 "freebsd-multimedia@freebsd.org\n",
1388 pci_get_revid(dev));
1389 return (BUS_PROBE_DEFAULT);
1390 }
1391 default:
1392 return (ENXIO);
1393 }
1394 }
1395
1396 static int
1397 sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS)
1398 {
1399 struct es_info *es;
1400 device_t dev;
1401 uint32_t r;
1402 int err, new_en;
1403
1404 dev = oidp->oid_arg1;
1405 es = pcm_getdevinfo(dev);
1406 ES_LOCK(es);
1407 r = es_rd(es, ES1370_REG_STATUS, 4);
1408 ES_UNLOCK(es);
1409 new_en = (r & ENABLE_SPDIF) ? 1 : 0;
1410 err = sysctl_handle_int(oidp, &new_en, 0, req);
1411
1412 if (err || req->newptr == NULL)
1413 return (err);
1414 if (new_en < 0 || new_en > 1)
1415 return (EINVAL);
1416
1417 ES_LOCK(es);
1418 if (new_en) {
1419 r |= ENABLE_SPDIF;
1420 es->ctrl |= SPDIFEN_B;
1421 es->ctrl |= RECEN_B;
1422 } else {
1423 r &= ~ENABLE_SPDIF;
1424 es->ctrl &= ~SPDIFEN_B;
1425 es->ctrl &= ~RECEN_B;
1426 }
1427 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1428 es_wr(es, ES1370_REG_STATUS, r, 4);
1429 ES_UNLOCK(es);
1430
1431 return (0);
1432 }
1433
1434 static int
1435 sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS)
1436 {
1437 struct es_info *es;
1438 device_t dev;
1439 uint32_t val;
1440 int err;
1441
1442 dev = oidp->oid_arg1;
1443 es = pcm_getdevinfo(dev);
1444 ES_LOCK(es);
1445 val = pci_read_config(dev, PCIR_LATTIMER, 1);
1446 ES_UNLOCK(es);
1447 err = sysctl_handle_int(oidp, &val, 0, req);
1448
1449 if (err || req->newptr == NULL)
1450 return (err);
1451 if (val > 255)
1452 return (EINVAL);
1453
1454 ES_LOCK(es);
1455 pci_write_config(dev, PCIR_LATTIMER, val, 1);
1456 ES_UNLOCK(es);
1457
1458 return (0);
1459 }
1460
1461 static int
1462 sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS)
1463 {
1464 struct es_info *es;
1465 device_t dev;
1466 uint32_t val;
1467 int err;
1468
1469 dev = oidp->oid_arg1;
1470 es = pcm_getdevinfo(dev);
1471 ES_LOCK(es);
1472 val = ES_FIXED_RATE(es->escfg);
1473 if (val < es_caps.minspeed)
1474 val = 0;
1475 ES_UNLOCK(es);
1476 err = sysctl_handle_int(oidp, &val, 0, req);
1477
1478 if (err || req->newptr == NULL)
1479 return (err);
1480 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed))
1481 return (EINVAL);
1482
1483 ES_LOCK(es);
1484 if (es->ctrl & (CTRL_DAC2_EN|CTRL_ADC_EN)) {
1485 ES_UNLOCK(es);
1486 return (EBUSY);
1487 }
1488 if (val) {
1489 if (val != ES_FIXED_RATE(es->escfg)) {
1490 es->escfg = ES_SET_FIXED_RATE(es->escfg, val);
1491 es->ch[ES_DAC2].caps.maxspeed = val;
1492 es->ch[ES_DAC2].caps.minspeed = val;
1493 es->ch[ES_ADC].caps.maxspeed = val;
1494 es->ch[ES_ADC].caps.minspeed = val;
1495 es->ctrl &= ~CTRL_PCLKDIV;
1496 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV;
1497 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1498 }
1499 } else {
1500 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
1501 es->ch[ES_DAC2].caps = es_caps;
1502 es->ch[ES_ADC].caps = es_caps;
1503 }
1504 ES_UNLOCK(es);
1505
1506 return (0);
1507 }
1508
1509 static int
1510 sysctl_es137x_single_pcm_mixer(SYSCTL_HANDLER_ARGS)
1511 {
1512 struct es_info *es;
1513 struct snddev_info *d;
1514 struct snd_mixer *m;
1515 device_t dev;
1516 uint32_t val, set;
1517 int recsrc, level, err;
1518
1519 dev = oidp->oid_arg1;
1520 d = device_get_softc(dev);
1521 if (!PCM_REGISTERED(d) || d->mixer_dev == NULL ||
1522 d->mixer_dev->si_drv1 == NULL)
1523 return (EINVAL);
1524 es = d->devinfo;
1525 if (es == NULL)
1526 return (EINVAL);
1527 ES_LOCK(es);
1528 set = ES_SINGLE_PCM_MIX(es->escfg);
1529 val = set;
1530 ES_UNLOCK(es);
1531 err = sysctl_handle_int(oidp, &val, 0, req);
1532
1533 if (err || req->newptr == NULL)
1534 return (err);
1535 if (!(val == 0 || val == 1))
1536 return (EINVAL);
1537 if (val == set)
1538 return (0);
1539 PCM_ACQUIRE_QUICK(d);
1540 m = (d->mixer_dev != NULL) ? d->mixer_dev->si_drv1 : NULL;
1541 if (m == NULL) {
1542 PCM_RELEASE_QUICK(d);
1543 return (ENODEV);
1544 }
1545 if (mixer_busy(m) != 0) {
1546 PCM_RELEASE_QUICK(d);
1547 return (EBUSY);
1548 }
1549 level = mix_get(m, SOUND_MIXER_PCM);
1550 recsrc = mix_getrecsrc(m);
1551 if (level < 0 || recsrc < 0) {
1552 PCM_RELEASE_QUICK(d);
1553 return (ENXIO);
1554 }
1555
1556 ES_LOCK(es);
1557 if (es->ctrl & (CTRL_ADC_EN | CTRL_DAC1_EN | CTRL_DAC2_EN)) {
1558 ES_UNLOCK(es);
1559 PCM_RELEASE_QUICK(d);
1560 return (EBUSY);
1561 }
1562 if (val)
1563 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1);
1564 else
1565 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0);
1566 ES_UNLOCK(es);
1567 if (!val) {
1568 mix_setdevs(m, mix_getdevs(m) | (1 << SOUND_MIXER_SYNTH));
1569 mix_setrecdevs(m, mix_getrecdevs(m) | (1 << SOUND_MIXER_SYNTH));
1570 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f,
1571 (level >> 8) & 0x7f);
1572 } else {
1573 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f,
1574 (level >> 8) & 0x7f);
1575 mix_setdevs(m, mix_getdevs(m) & ~(1 << SOUND_MIXER_SYNTH));
1576 mix_setrecdevs(m, mix_getrecdevs(m) &
1577 ~(1 << SOUND_MIXER_SYNTH));
1578 }
1579 if (!err) {
1580 level = recsrc;
1581 if (recsrc & (1 << SOUND_MIXER_PCM))
1582 recsrc |= 1 << SOUND_MIXER_SYNTH;
1583 else if (recsrc & (1 << SOUND_MIXER_SYNTH))
1584 recsrc |= 1 << SOUND_MIXER_PCM;
1585 if (level != recsrc)
1586 err = mix_setrecsrc(m, recsrc);
1587 }
1588
1589 PCM_RELEASE_QUICK(d);
1590
1591 return (err);
1592 }
1593
1594 static int
1595 sysctl_es_polling(SYSCTL_HANDLER_ARGS)
1596 {
1597 struct es_info *es;
1598 device_t dev;
1599 int err, val;
1600
1601 dev = oidp->oid_arg1;
1602 es = pcm_getdevinfo(dev);
1603 if (es == NULL)
1604 return (EINVAL);
1605 ES_LOCK(es);
1606 val = es->polling;
1607 ES_UNLOCK(es);
1608 err = sysctl_handle_int(oidp, &val, 0, req);
1609
1610 if (err || req->newptr == NULL)
1611 return (err);
1612 if (val < 0 || val > 1)
1613 return (EINVAL);
1614
1615 ES_LOCK(es);
1616 if (val != es->polling) {
1617 if (es_chan_active(es) != 0)
1618 err = EBUSY;
1619 else if (val == 0)
1620 es->polling = 0;
1621 else
1622 es->polling = 1;
1623 }
1624 ES_UNLOCK(es);
1625
1626 return (err);
1627 }
1628
1629 static void
1630 es_init_sysctls(device_t dev)
1631 {
1632 struct es_info *es;
1633 int r, devid, revid;
1634
1635 devid = pci_get_devid(dev);
1636 revid = pci_get_revid(dev);
1637 es = pcm_getdevinfo(dev);
1638 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
1639 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
1640 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
1641 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
1642 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
1643 /* XXX: an user should be able to set this with a control tool,
1644 if not done before 7.0-RELEASE, this needs to be converted
1645 to a device specific sysctl "dev.pcm.X.yyy" via
1646 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1647 <861wujij2q.fsf@xps.des.no> */
1648 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1649 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1650 "spdif_enabled", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
1651 dev, sizeof(dev), sysctl_es137x_spdif_enable, "I",
1652 "Enable S/PDIF output on primary playback channel");
1653 } else if (devid == ES1370_PCI_ID) {
1654 /*
1655 * Enable fixed rate sysctl if both DAC2 / ADC enabled.
1656 */
1657 if (es->ch[ES_DAC2].channel != NULL &&
1658 es->ch[ES_ADC].channel != NULL) {
1659 /* XXX: an user should be able to set this with a control tool,
1660 if not done before 7.0-RELEASE, this needs to be converted
1661 to a device specific sysctl "dev.pcm.X.yyy" via
1662 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1663 <861wujij2q.fsf@xps.des.no> */
1664 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1665 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1666 OID_AUTO, "fixed_rate",
1667 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
1668 dev, sizeof(dev), sysctl_es137x_fixed_rate, "I",
1669 "Enable fixed rate playback/recording");
1670 }
1671 /*
1672 * Enable single pcm mixer sysctl if both DAC1/2 enabled.
1673 */
1674 if (es->ch[ES_DAC1].channel != NULL &&
1675 es->ch[ES_DAC2].channel != NULL) {
1676 /* XXX: an user should be able to set this with a control tool,
1677 if not done before 7.0-RELEASE, this needs to be converted
1678 to a device specific sysctl "dev.pcm.X.yyy" via
1679 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1680 <861wujij2q.fsf@xps.des.no> */
1681 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1682 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1683 OID_AUTO, "single_pcm_mixer",
1684 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev,
1685 sizeof(dev), sysctl_es137x_single_pcm_mixer, "I",
1686 "Single PCM mixer controller for both DAC1/DAC2");
1687 }
1688 }
1689 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
1690 "latency_timer", &r) == 0 && !(r < 0 || r > 255))
1691 pci_write_config(dev, PCIR_LATTIMER, r, 1);
1692 /* XXX: this needs to be converted to a device specific sysctl
1693 "dev.pcm.X.yyy" via device_get_sysctl_*() as discussed on
1694 multimedia@ in msg-id <861wujij2q.fsf@xps.des.no> */
1695 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1696 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1697 "latency_timer", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
1698 dev, sizeof(dev), sysctl_es137x_latency_timer, "I",
1699 "PCI Latency Timer configuration");
1700 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1701 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1702 "polling", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev,
1703 sizeof(dev), sysctl_es_polling, "I", "Enable polling mode");
1704 }
1705
1706 static int
1707 es_pci_attach(device_t dev)
1708 {
1709 struct es_info *es = NULL;
1710 int mapped, i, numplay, dac_cfg;
1711 char status[SND_STATUSLEN];
1712 struct ac97_info *codec = NULL;
1713 kobj_class_t ct = NULL;
1714 uint32_t devid;
1715
1716 es = malloc(sizeof *es, M_DEVBUF, M_WAITOK | M_ZERO);
1717 es->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_es137x softc");
1718 es->dev = dev;
1719 es->escfg = 0;
1720 mapped = 0;
1721
1722 pci_enable_busmaster(dev);
1723 if (mapped == 0) {
1724 es->regid = MEM_MAP_REG;
1725 es->regtype = SYS_RES_MEMORY;
1726 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid,
1727 RF_ACTIVE);
1728 if (es->reg)
1729 mapped++;
1730 }
1731 if (mapped == 0) {
1732 es->regid = PCIR_BAR(0);
1733 es->regtype = SYS_RES_IOPORT;
1734 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid,
1735 RF_ACTIVE);
1736 if (es->reg)
1737 mapped++;
1738 }
1739 if (mapped == 0) {
1740 device_printf(dev, "unable to map register space\n");
1741 goto bad;
1742 }
1743
1744 es->st = rman_get_bustag(es->reg);
1745 es->sh = rman_get_bushandle(es->reg);
1746 callout_init(&es->poll_timer, 1);
1747 es->poll_ticks = 1;
1748
1749 if (resource_int_value(device_get_name(dev),
1750 device_get_unit(dev), "polling", &i) == 0 && i != 0)
1751 es->polling = 1;
1752 else
1753 es->polling = 0;
1754
1755 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536);
1756 if (resource_int_value(device_get_name(dev),
1757 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
1758 i &= ES_BLK_ALIGN;
1759 if (i < ES_BLK_MIN)
1760 i = ES_BLK_MIN;
1761 es->blkcnt = es->bufsz / i;
1762 i = 0;
1763 while (es->blkcnt >> i)
1764 i++;
1765 es->blkcnt = 1 << (i - 1);
1766 if (es->blkcnt < ES_DMA_SEGS_MIN)
1767 es->blkcnt = ES_DMA_SEGS_MIN;
1768 else if (es->blkcnt > ES_DMA_SEGS_MAX)
1769 es->blkcnt = ES_DMA_SEGS_MAX;
1770
1771 } else
1772 es->blkcnt = 2;
1773
1774 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
1775 "dac", &dac_cfg) == 0) {
1776 if (dac_cfg < 0 || dac_cfg > 3)
1777 dac_cfg = ES_DEFAULT_DAC_CFG;
1778 } else
1779 dac_cfg = ES_DEFAULT_DAC_CFG;
1780
1781 switch (dac_cfg) {
1782 case 0: /* Enable all DAC: DAC1, DAC2 */
1783 numplay = 2;
1784 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1);
1785 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC2);
1786 break;
1787 case 1: /* Only DAC1 */
1788 numplay = 1;
1789 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1);
1790 break;
1791 case 3: /* Enable all DAC / swap position: DAC2, DAC1 */
1792 numplay = 2;
1793 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2);
1794 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC1);
1795 break;
1796 case 2: /* Only DAC2 */
1797 default:
1798 numplay = 1;
1799 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2);
1800 break;
1801 }
1802 es->escfg = ES_SET_NUMPLAY(es->escfg, numplay);
1803 es->escfg = ES_SET_NUMREC(es->escfg, 1);
1804
1805 devid = pci_get_devid(dev);
1806 switch (devid) {
1807 case ES1371_PCI_ID:
1808 case ES1371_PCI_ID2:
1809 case CT5880_PCI_ID:
1810 case CT4730_PCI_ID:
1811 es1371_init(es);
1812 codec = AC97_CREATE(dev, es, es1371_ac97);
1813 if (codec == NULL)
1814 goto bad;
1815 /* our init routine does everything for us */
1816 /* set to NULL; flag mixer_init not to run the ac97_init */
1817 /* ac97_mixer.init = NULL; */
1818 if (mixer_init(dev, ac97_getmixerclass(), codec))
1819 goto bad;
1820 ct = &eschan1371_class;
1821 break;
1822 case ES1370_PCI_ID:
1823 es1370_init(es);
1824 /*
1825 * Disable fixed rate operation if DAC2 disabled.
1826 * This is a special case for es1370 only, where the
1827 * speed of both ADC and DAC2 locked together.
1828 */
1829 if (!ES_DAC2_ENABLED(es->escfg))
1830 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
1831 if (mixer_init(dev, &es1370_mixer_class, es))
1832 goto bad;
1833 ct = &eschan1370_class;
1834 break;
1835 default:
1836 goto bad;
1837 /* NOTREACHED */
1838 }
1839
1840 es->irqid = 0;
1841 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid,
1842 RF_ACTIVE | RF_SHAREABLE);
1843 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr,
1844 es, &es->ih)) {
1845 device_printf(dev, "unable to map interrupt\n");
1846 goto bad;
1847 }
1848
1849 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev),
1850 /*alignment*/2, /*boundary*/0,
1851 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1852 /*highaddr*/BUS_SPACE_MAXADDR,
1853 /*filter*/NULL, /*filterarg*/NULL,
1854 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1855 /*flags*/0, /*lockfunc*/NULL,
1856 /*lockarg*/NULL, &es->parent_dmat) != 0) {
1857 device_printf(dev, "unable to create dma tag\n");
1858 goto bad;
1859 }
1860
1861 snprintf(status, SND_STATUSLEN, "at %s 0x%jx irq %jd %s",
1862 (es->regtype == SYS_RES_IOPORT)? "io" : "memory",
1863 rman_get_start(es->reg), rman_get_start(es->irq),
1864 PCM_KLDSTRING(snd_es137x));
1865
1866 if (pcm_register(dev, es, numplay, 1))
1867 goto bad;
1868 for (i = 0; i < numplay; i++)
1869 pcm_addchan(dev, PCMDIR_PLAY, ct, es);
1870 pcm_addchan(dev, PCMDIR_REC, ct, es);
1871 es_init_sysctls(dev);
1872 pcm_setstatus(dev, status);
1873 es->escfg = ES_SET_GP(es->escfg, 0);
1874 if (numplay == 1)
1875 device_printf(dev, "<Playback: DAC%d / Record: ADC>\n",
1876 ES_DAC_FIRST(es->escfg) + 1);
1877 else if (numplay == 2)
1878 device_printf(dev, "<Playback: DAC%d,DAC%d / Record: ADC>\n",
1879 ES_DAC_FIRST(es->escfg) + 1, ES_DAC_SECOND(es->escfg) + 1);
1880 return (0);
1881
1882 bad:
1883 if (es->parent_dmat)
1884 bus_dma_tag_destroy(es->parent_dmat);
1885 if (es->ih)
1886 bus_teardown_intr(dev, es->irq, es->ih);
1887 if (es->irq)
1888 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
1889 if (codec)
1890 ac97_destroy(codec);
1891 if (es->reg)
1892 bus_release_resource(dev, es->regtype, es->regid, es->reg);
1893 if (es->lock)
1894 snd_mtxfree(es->lock);
1895 if (es)
1896 free(es, M_DEVBUF);
1897 return (ENXIO);
1898 }
1899
1900 static int
1901 es_pci_detach(device_t dev)
1902 {
1903 int r;
1904 struct es_info *es;
1905
1906 r = pcm_unregister(dev);
1907 if (r)
1908 return (r);
1909
1910 es = pcm_getdevinfo(dev);
1911
1912 if (es != NULL && es->num != 0) {
1913 ES_LOCK(es);
1914 es->polling = 0;
1915 callout_stop(&es->poll_timer);
1916 ES_UNLOCK(es);
1917 callout_drain(&es->poll_timer);
1918 }
1919
1920 bus_teardown_intr(dev, es->irq, es->ih);
1921 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
1922 bus_release_resource(dev, es->regtype, es->regid, es->reg);
1923 bus_dma_tag_destroy(es->parent_dmat);
1924 snd_mtxfree(es->lock);
1925 free(es, M_DEVBUF);
1926
1927 return (0);
1928 }
1929
1930 static device_method_t es_methods[] = {
1931 /* Device interface */
1932 DEVMETHOD(device_probe, es_pci_probe),
1933 DEVMETHOD(device_attach, es_pci_attach),
1934 DEVMETHOD(device_detach, es_pci_detach),
1935 { 0, 0 }
1936 };
1937
1938 static driver_t es_driver = {
1939 "pcm",
1940 es_methods,
1941 PCM_SOFTC_SIZE,
1942 };
1943
1944 DRIVER_MODULE(snd_es137x, pci, es_driver, 0, 0);
1945 MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
1946 MODULE_VERSION(snd_es137x, 1);
Cache object: 734ea8fa1b13c0a4e5a96061d9a7ad07
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