Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/sound/pci/hda/hdacc.c
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1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca> 5 * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org> 6 * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org> 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * Intel High Definition Audio (CODEC) driver for FreeBSD. 33 */ 34 35 #ifdef HAVE_KERNEL_OPTION_HEADERS 36 #include "opt_snd.h" 37 #endif 38 39 #include <dev/sound/pcm/sound.h> 40 41 #include <sys/ctype.h> 42 43 #include <dev/sound/pci/hda/hda_reg.h> 44 #include <dev/sound/pci/hda/hdac.h> 45 46 SND_DECLARE_FILE("$FreeBSD$"); 47 48 struct hdacc_fg { 49 device_t dev; 50 nid_t nid; 51 uint8_t type; 52 uint32_t subsystem_id; 53 }; 54 55 struct hdacc_softc { 56 device_t dev; 57 struct mtx *lock; 58 nid_t cad; 59 device_t streams[2][16]; 60 device_t tags[64]; 61 int fgcnt; 62 struct hdacc_fg *fgs; 63 }; 64 65 #define hdacc_lock(codec) snd_mtxlock((codec)->lock) 66 #define hdacc_unlock(codec) snd_mtxunlock((codec)->lock) 67 #define hdacc_lockassert(codec) snd_mtxassert((codec)->lock) 68 69 MALLOC_DEFINE(M_HDACC, "hdacc", "HDA CODEC"); 70 71 /* CODECs */ 72 static const struct { 73 uint32_t id; 74 uint16_t revid; 75 const char *name; 76 } hdacc_codecs[] = { 77 { HDA_CODEC_CS4206, 0, "Cirrus Logic CS4206" }, 78 { HDA_CODEC_CS4207, 0, "Cirrus Logic CS4207" }, 79 { HDA_CODEC_CS4210, 0, "Cirrus Logic CS4210" }, 80 { HDA_CODEC_ALC215, 0, "Realtek ALC215" }, 81 { HDA_CODEC_ALC221, 0, "Realtek ALC221" }, 82 { HDA_CODEC_ALC222, 0, "Realtek ALC222" }, 83 { HDA_CODEC_ALC225, 0, "Realtek ALC225" }, 84 { HDA_CODEC_ALC231, 0, "Realtek ALC231" }, 85 { HDA_CODEC_ALC233, 0, "Realtek ALC233" }, 86 { HDA_CODEC_ALC234, 0, "Realtek ALC234" }, 87 { HDA_CODEC_ALC235, 0, "Realtek ALC235" }, 88 { HDA_CODEC_ALC236, 0, "Realtek ALC236" }, 89 { HDA_CODEC_ALC245, 0, "Realtek ALC245" }, 90 { HDA_CODEC_ALC255, 0, "Realtek ALC255" }, 91 { HDA_CODEC_ALC256, 0, "Realtek ALC256" }, 92 { HDA_CODEC_ALC257, 0, "Realtek ALC257" }, 93 { HDA_CODEC_ALC260, 0, "Realtek ALC260" }, 94 { HDA_CODEC_ALC262, 0, "Realtek ALC262" }, 95 { HDA_CODEC_ALC267, 0, "Realtek ALC267" }, 96 { HDA_CODEC_ALC268, 0, "Realtek ALC268" }, 97 { HDA_CODEC_ALC269, 0, "Realtek ALC269" }, 98 { HDA_CODEC_ALC270, 0, "Realtek ALC270" }, 99 { HDA_CODEC_ALC272, 0, "Realtek ALC272" }, 100 { HDA_CODEC_ALC273, 0, "Realtek ALC273" }, 101 { HDA_CODEC_ALC274, 0, "Realtek ALC274" }, 102 { HDA_CODEC_ALC275, 0, "Realtek ALC275" }, 103 { HDA_CODEC_ALC276, 0, "Realtek ALC276" }, 104 { HDA_CODEC_ALC292, 0, "Realtek ALC292" }, 105 { HDA_CODEC_ALC295, 0, "Realtek ALC295" }, 106 { HDA_CODEC_ALC280, 0, "Realtek ALC280" }, 107 { HDA_CODEC_ALC282, 0, "Realtek ALC282" }, 108 { HDA_CODEC_ALC283, 0, "Realtek ALC283" }, 109 { HDA_CODEC_ALC284, 0, "Realtek ALC284" }, 110 { HDA_CODEC_ALC285, 0, "Realtek ALC285" }, 111 { HDA_CODEC_ALC286, 0, "Realtek ALC286" }, 112 { HDA_CODEC_ALC288, 0, "Realtek ALC288" }, 113 { HDA_CODEC_ALC289, 0, "Realtek ALC289" }, 114 { HDA_CODEC_ALC290, 0, "Realtek ALC290" }, 115 { HDA_CODEC_ALC292, 0, "Realtek ALC292" }, 116 { HDA_CODEC_ALC293, 0, "Realtek ALC293" }, 117 { HDA_CODEC_ALC294, 0, "Realtek ALC294" }, 118 { HDA_CODEC_ALC295, 0, "Realtek ALC295" }, 119 { HDA_CODEC_ALC298, 0, "Realtek ALC298" }, 120 { HDA_CODEC_ALC299, 0, "Realtek ALC299" }, 121 { HDA_CODEC_ALC300, 0, "Realtek ALC300" }, 122 { HDA_CODEC_ALC623, 0, "Realtek ALC623" }, 123 { HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" }, 124 { HDA_CODEC_ALC662, 0x0002, "Realtek ALC662 rev2" }, 125 { HDA_CODEC_ALC662, 0x0101, "Realtek ALC662 rev1" }, 126 { HDA_CODEC_ALC662, 0x0300, "Realtek ALC662 rev3" }, 127 { HDA_CODEC_ALC662, 0, "Realtek ALC662" }, 128 { HDA_CODEC_ALC663, 0, "Realtek ALC663" }, 129 { HDA_CODEC_ALC665, 0, "Realtek ALC665" }, 130 { HDA_CODEC_ALC670, 0, "Realtek ALC670" }, 131 { HDA_CODEC_ALC671, 0, "Realtek ALC671" }, 132 { HDA_CODEC_ALC680, 0, "Realtek ALC680" }, 133 { HDA_CODEC_ALC700, 0, "Realtek ALC700" }, 134 { HDA_CODEC_ALC701, 0, "Realtek ALC701" }, 135 { HDA_CODEC_ALC703, 0, "Realtek ALC703" }, 136 { HDA_CODEC_ALC861, 0x0340, "Realtek ALC660" }, 137 { HDA_CODEC_ALC861, 0, "Realtek ALC861" }, 138 { HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" }, 139 { HDA_CODEC_ALC880, 0, "Realtek ALC880" }, 140 { HDA_CODEC_ALC882, 0, "Realtek ALC882" }, 141 { HDA_CODEC_ALC883, 0, "Realtek ALC883" }, 142 { HDA_CODEC_ALC885, 0x0101, "Realtek ALC889A" }, 143 { HDA_CODEC_ALC885, 0x0103, "Realtek ALC889A" }, 144 { HDA_CODEC_ALC885, 0, "Realtek ALC885" }, 145 { HDA_CODEC_ALC887, 0, "Realtek ALC887" }, 146 { HDA_CODEC_ALC888, 0x0101, "Realtek ALC1200" }, 147 { HDA_CODEC_ALC888, 0, "Realtek ALC888" }, 148 { HDA_CODEC_ALC889, 0, "Realtek ALC889" }, 149 { HDA_CODEC_ALC892, 0, "Realtek ALC892" }, 150 { HDA_CODEC_ALC897, 0, "Realtek ALC897" }, 151 { HDA_CODEC_ALC899, 0, "Realtek ALC899" }, 152 { HDA_CODEC_ALC1150, 0, "Realtek ALC1150" }, 153 { HDA_CODEC_ALCS1200A, 0, "Realtek ALCS1200A" }, 154 { HDA_CODEC_ALC1220_1, 0, "Realtek ALC1220" }, 155 { HDA_CODEC_ALC1220, 0, "Realtek ALC1220" }, 156 { HDA_CODEC_AD1882, 0, "Analog Devices AD1882" }, 157 { HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" }, 158 { HDA_CODEC_AD1883, 0, "Analog Devices AD1883" }, 159 { HDA_CODEC_AD1884, 0, "Analog Devices AD1884" }, 160 { HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" }, 161 { HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" }, 162 { HDA_CODEC_AD1983, 0, "Analog Devices AD1983" }, 163 { HDA_CODEC_AD1984, 0, "Analog Devices AD1984" }, 164 { HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" }, 165 { HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" }, 166 { HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" }, 167 { HDA_CODEC_AD1987, 0, "Analog Devices AD1987" }, 168 { HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" }, 169 { HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" }, 170 { HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" }, 171 { HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" }, 172 { HDA_CODEC_CA0110, 0, "Creative CA0110-IBG" }, 173 { HDA_CODEC_CA0110_2, 0, "Creative CA0110-IBG" }, 174 { HDA_CODEC_CA0132, 0, "Creative CA0132" }, 175 { HDA_CODEC_SB0880, 0, "Creative SB0880 X-Fi" }, 176 { HDA_CODEC_CMI9880, 0, "CMedia CMI9880" }, 177 { HDA_CODEC_CMI98802, 0, "CMedia CMI9880" }, 178 { HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" }, 179 { HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" }, 180 { HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" }, 181 { HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" }, 182 { HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" }, 183 { HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" }, 184 { HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" }, 185 { HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" }, 186 { HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" }, 187 { HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" }, 188 { HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" }, 189 { HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" }, 190 { HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" }, 191 { HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" }, 192 { HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" }, 193 { HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" }, 194 { HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" }, 195 { HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" }, 196 { HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" }, 197 { HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" }, 198 { HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" }, 199 { HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" }, 200 { HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" }, 201 { HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" }, 202 { HDA_CODEC_STAC9255, 0, "Sigmatel STAC9255" }, 203 { HDA_CODEC_STAC9255D, 0, "Sigmatel STAC9255D" }, 204 { HDA_CODEC_STAC9254, 0, "Sigmatel STAC9254" }, 205 { HDA_CODEC_STAC9254D, 0, "Sigmatel STAC9254D" }, 206 { HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" }, 207 { HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" }, 208 { HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" }, 209 { HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" }, 210 { HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" }, 211 { HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" }, 212 { HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" }, 213 { HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" }, 214 { HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" }, 215 { HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" }, 216 { HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" }, 217 { HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" }, 218 { HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" }, 219 { HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" }, 220 { HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" }, 221 { HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" }, 222 { HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" }, 223 { HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" }, 224 { HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" }, 225 { HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" }, 226 { HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" }, 227 { HDA_CODEC_IDT92HD66B1X3, 0, "IDT 92HD66B1X3" }, 228 { HDA_CODEC_IDT92HD66B2X3, 0, "IDT 92HD66B2X3" }, 229 { HDA_CODEC_IDT92HD66B3X3, 0, "IDT 92HD66B3X3" }, 230 { HDA_CODEC_IDT92HD66C1X3, 0, "IDT 92HD66C1X3" }, 231 { HDA_CODEC_IDT92HD66C2X3, 0, "IDT 92HD66C2X3" }, 232 { HDA_CODEC_IDT92HD66C3_65, 0, "IDT 92HD66C3_65" }, 233 { HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" }, 234 { HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" }, 235 { HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" }, 236 { HDA_CODEC_IDT92HD71B5_2, 0, "IDT 92HD71B5" }, 237 { HDA_CODEC_IDT92HD71B6, 0, "IDT 92HD71B6" }, 238 { HDA_CODEC_IDT92HD71B6_2, 0, "IDT 92HD71B6" }, 239 { HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" }, 240 { HDA_CODEC_IDT92HD71B7_2, 0, "IDT 92HD71B7" }, 241 { HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" }, 242 { HDA_CODEC_IDT92HD71B8_2, 0, "IDT 92HD71B8" }, 243 { HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" }, 244 { HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" }, 245 { HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" }, 246 { HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" }, 247 { HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" }, 248 { HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" }, 249 { HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" }, 250 { HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" }, 251 { HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" }, 252 { HDA_CODEC_IDT92HD87B1_3, 0, "IDT 92HD87B1/3" }, 253 { HDA_CODEC_IDT92HD87B2_4, 0, "IDT 92HD87B2/4" }, 254 { HDA_CODEC_IDT92HD89C3, 0, "IDT 92HD89C3" }, 255 { HDA_CODEC_IDT92HD89C2, 0, "IDT 92HD89C2" }, 256 { HDA_CODEC_IDT92HD89C1, 0, "IDT 92HD89C1" }, 257 { HDA_CODEC_IDT92HD89B3, 0, "IDT 92HD89B3" }, 258 { HDA_CODEC_IDT92HD89B2, 0, "IDT 92HD89B2" }, 259 { HDA_CODEC_IDT92HD89B1, 0, "IDT 92HD89B1" }, 260 { HDA_CODEC_IDT92HD89E3, 0, "IDT 92HD89E3" }, 261 { HDA_CODEC_IDT92HD89E2, 0, "IDT 92HD89E2" }, 262 { HDA_CODEC_IDT92HD89E1, 0, "IDT 92HD89E1" }, 263 { HDA_CODEC_IDT92HD89D3, 0, "IDT 92HD89D3" }, 264 { HDA_CODEC_IDT92HD89D2, 0, "IDT 92HD89D2" }, 265 { HDA_CODEC_IDT92HD89D1, 0, "IDT 92HD89D1" }, 266 { HDA_CODEC_IDT92HD89F3, 0, "IDT 92HD89F3" }, 267 { HDA_CODEC_IDT92HD89F2, 0, "IDT 92HD89F2" }, 268 { HDA_CODEC_IDT92HD89F1, 0, "IDT 92HD89F1" }, 269 { HDA_CODEC_IDT92HD90BXX, 0, "IDT 92HD90BXX" }, 270 { HDA_CODEC_IDT92HD91BXX, 0, "IDT 92HD91BXX" }, 271 { HDA_CODEC_IDT92HD93BXX, 0, "IDT 92HD93BXX" }, 272 { HDA_CODEC_IDT92HD95B, 0, "Tempo 92HD95B" }, 273 { HDA_CODEC_IDT92HD98BXX, 0, "IDT 92HD98BXX" }, 274 { HDA_CODEC_IDT92HD99BXX, 0, "IDT 92HD99BXX" }, 275 { HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" }, 276 { HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" }, 277 { HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" }, 278 { HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" }, 279 { HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" }, 280 { HDA_CODEC_CX20584, 0, "Conexant CX20584" }, 281 { HDA_CODEC_CX20585, 0, "Conexant CX20585" }, 282 { HDA_CODEC_CX20588, 0, "Conexant CX20588" }, 283 { HDA_CODEC_CX20590, 0, "Conexant CX20590" }, 284 { HDA_CODEC_CX20631, 0, "Conexant CX20631" }, 285 { HDA_CODEC_CX20632, 0, "Conexant CX20632" }, 286 { HDA_CODEC_CX20641, 0, "Conexant CX20641" }, 287 { HDA_CODEC_CX20642, 0, "Conexant CX20642" }, 288 { HDA_CODEC_CX20651, 0, "Conexant CX20651" }, 289 { HDA_CODEC_CX20652, 0, "Conexant CX20652" }, 290 { HDA_CODEC_CX20664, 0, "Conexant CX20664" }, 291 { HDA_CODEC_CX20665, 0, "Conexant CX20665" }, 292 { HDA_CODEC_CX21722, 0, "Conexant CX21722" }, 293 { HDA_CODEC_CX20722, 0, "Conexant CX20722" }, 294 { HDA_CODEC_CX21724, 0, "Conexant CX21724" }, 295 { HDA_CODEC_CX20724, 0, "Conexant CX20724" }, 296 { HDA_CODEC_CX20751, 0, "Conexant CX20751/2" }, 297 { HDA_CODEC_CX20751_2, 0, "Conexant CX20751/2" }, 298 { HDA_CODEC_CX20753, 0, "Conexant CX20753/4" }, 299 { HDA_CODEC_CX20755, 0, "Conexant CX20755" }, 300 { HDA_CODEC_CX20756, 0, "Conexant CX20756" }, 301 { HDA_CODEC_CX20757, 0, "Conexant CX20757" }, 302 { HDA_CODEC_CX20952, 0, "Conexant CX20952" }, 303 { HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" }, 304 { HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" }, 305 { HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" }, 306 { HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" }, 307 { HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" }, 308 { HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" }, 309 { HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" }, 310 { HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" }, 311 { HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" }, 312 { HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" }, 313 { HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" }, 314 { HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" }, 315 { HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" }, 316 { HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" }, 317 { HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" }, 318 { HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" }, 319 { HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" }, 320 { HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" }, 321 { HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" }, 322 { HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" }, 323 { HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" }, 324 { HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" }, 325 { HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" }, 326 { HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" }, 327 { HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" }, 328 { HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" }, 329 { HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" }, 330 { HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" }, 331 { HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" }, 332 { HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" }, 333 { HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" }, 334 { HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" }, 335 { HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" }, 336 { HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" }, 337 { HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" }, 338 { HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" }, 339 { HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" }, 340 { HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" }, 341 { HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" }, 342 { HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" }, 343 { HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" }, 344 { HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" }, 345 { HDA_CODEC_VT1812, 0, "VIA VT1812" }, 346 { HDA_CODEC_VT1818S, 0, "VIA VT1818S" }, 347 { HDA_CODEC_VT1828S, 0, "VIA VT1828S" }, 348 { HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" }, 349 { HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" }, 350 { HDA_CODEC_VT2020, 0, "VIA VT2020" }, 351 { HDA_CODEC_ATIRS600_1, 0, "ATI RS600" }, 352 { HDA_CODEC_ATIRS600_2, 0, "ATI RS600" }, 353 { HDA_CODEC_ATIRS690, 0, "ATI RS690/780" }, 354 { HDA_CODEC_ATIR6XX, 0, "ATI R6xx" }, 355 { HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" }, 356 { HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" }, 357 { HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" }, 358 { HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" }, 359 { HDA_CODEC_NVIDIAMCP78_3, 0, "NVIDIA MCP78" }, 360 { HDA_CODEC_NVIDIAMCP78_4, 0, "NVIDIA MCP78" }, 361 { HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" }, 362 { HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" }, 363 { HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" }, 364 { HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" }, 365 { HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" }, 366 { HDA_CODEC_NVIDIAGTS450, 0, "NVIDIA GTS450" }, 367 { HDA_CODEC_NVIDIAGT440, 0, "NVIDIA GT440" }, 368 { HDA_CODEC_NVIDIAGTX550, 0, "NVIDIA GTX550" }, 369 { HDA_CODEC_NVIDIAGTX570, 0, "NVIDIA GTX570" }, 370 { HDA_CODEC_NVIDIATEGRA30, 0, "NVIDIA Tegra30" }, 371 { HDA_CODEC_NVIDIATEGRA114, 0, "NVIDIA Tegra114" }, 372 { HDA_CODEC_NVIDIATEGRA124, 0, "NVIDIA Tegra124" }, 373 { HDA_CODEC_NVIDIATEGRA210, 0, "NVIDIA Tegra210" }, 374 { HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" }, 375 { HDA_CODEC_INTELBL, 0, "Intel Bearlake" }, 376 { HDA_CODEC_INTELCA, 0, "Intel Cantiga" }, 377 { HDA_CODEC_INTELEL, 0, "Intel Eaglelake" }, 378 { HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" }, 379 { HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" }, 380 { HDA_CODEC_INTELPPT, 0, "Intel Panther Point" }, 381 { HDA_CODEC_INTELHSW, 0, "Intel Haswell" }, 382 { HDA_CODEC_INTELBDW, 0, "Intel Broadwell" }, 383 { HDA_CODEC_INTELSKLK, 0, "Intel Skylake" }, 384 { HDA_CODEC_INTELKBLK, 0, "Intel Kaby Lake" }, 385 { HDA_CODEC_INTELJLK, 0, "Intel Jasper Lake" }, 386 { HDA_CODEC_INTELELLK, 0, "Intel Elkhart Lake" }, 387 { HDA_CODEC_INTELCT, 0, "Intel Cedar Trail" }, 388 { HDA_CODEC_INTELVV2, 0, "Intel Valleyview2" }, 389 { HDA_CODEC_INTELBR, 0, "Intel Braswell" }, 390 { HDA_CODEC_INTELCL, 0, "Intel Crestline" }, 391 { HDA_CODEC_INTELBXTN, 0, "Intel Broxton" }, 392 { HDA_CODEC_INTELCNLK, 0, "Intel Cannon Lake" }, 393 { HDA_CODEC_INTELGMLK, 0, "Intel Gemini Lake" }, 394 { HDA_CODEC_INTELGMLK1, 0, "Intel Gemini Lake" }, 395 { HDA_CODEC_INTELICLK, 0, "Intel Ice Lake" }, 396 { HDA_CODEC_INTELTGLK, 0, "Intel Tiger Lake" }, 397 { HDA_CODEC_INTELALLK, 0, "Intel Alder Lake" }, 398 { HDA_CODEC_SII1390, 0, "Silicon Image SiI1390" }, 399 { HDA_CODEC_SII1392, 0, "Silicon Image SiI1392" }, 400 { HDA_CODEC_VMWARE, 0, "VMware" }, 401 /* Unknown CODECs */ 402 { HDA_CODEC_ADXXXX, 0, "Analog Devices" }, 403 { HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems" }, 404 { HDA_CODEC_ALCXXXX, 0, "Realtek" }, 405 { HDA_CODEC_ATIXXXX, 0, "ATI" }, 406 { HDA_CODEC_CAXXXX, 0, "Creative" }, 407 { HDA_CODEC_CMIXXXX, 0, "CMedia" }, 408 { HDA_CODEC_CMIXXXX2, 0, "CMedia" }, 409 { HDA_CODEC_CSXXXX, 0, "Cirrus Logic" }, 410 { HDA_CODEC_CXXXXX, 0, "Conexant" }, 411 { HDA_CODEC_CHXXXX, 0, "Chrontel" }, 412 { HDA_CODEC_IDTXXXX, 0, "IDT" }, 413 { HDA_CODEC_INTELXXXX, 0, "Intel" }, 414 { HDA_CODEC_MOTOXXXX, 0, "Motorola" }, 415 { HDA_CODEC_NVIDIAXXXX, 0, "NVIDIA" }, 416 { HDA_CODEC_SIIXXXX, 0, "Silicon Image" }, 417 { HDA_CODEC_STACXXXX, 0, "Sigmatel" }, 418 { HDA_CODEC_VMWAREXXXX, 0, "VMware" }, 419 { HDA_CODEC_VTXXXX, 0, "VIA" }, 420 }; 421 422 static int 423 hdacc_suspend(device_t dev) 424 { 425 426 HDA_BOOTHVERBOSE( 427 device_printf(dev, "Suspend...\n"); 428 ); 429 bus_generic_suspend(dev); 430 HDA_BOOTHVERBOSE( 431 device_printf(dev, "Suspend done\n"); 432 ); 433 return (0); 434 } 435 436 static int 437 hdacc_resume(device_t dev) 438 { 439 440 HDA_BOOTHVERBOSE( 441 device_printf(dev, "Resume...\n"); 442 ); 443 bus_generic_resume(dev); 444 HDA_BOOTHVERBOSE( 445 device_printf(dev, "Resume done\n"); 446 ); 447 return (0); 448 } 449 450 static int 451 hdacc_probe(device_t dev) 452 { 453 uint32_t id, revid; 454 char buf[128]; 455 int i; 456 457 id = ((uint32_t)hda_get_vendor_id(dev) << 16) + hda_get_device_id(dev); 458 revid = ((uint32_t)hda_get_revision_id(dev) << 8) + 459 hda_get_stepping_id(dev); 460 461 for (i = 0; i < nitems(hdacc_codecs); i++) { 462 if (!HDA_DEV_MATCH(hdacc_codecs[i].id, id)) 463 continue; 464 if (hdacc_codecs[i].revid != 0 && 465 hdacc_codecs[i].revid != revid) 466 continue; 467 break; 468 } 469 if (i < nitems(hdacc_codecs)) { 470 if ((hdacc_codecs[i].id & 0xffff) != 0xffff) 471 strlcpy(buf, hdacc_codecs[i].name, sizeof(buf)); 472 else 473 snprintf(buf, sizeof(buf), "%s (0x%04x)", 474 hdacc_codecs[i].name, hda_get_device_id(dev)); 475 } else 476 snprintf(buf, sizeof(buf), "Generic (0x%04x)", id); 477 strlcat(buf, " HDA CODEC", sizeof(buf)); 478 device_set_desc_copy(dev, buf); 479 return (BUS_PROBE_DEFAULT); 480 } 481 482 static int 483 hdacc_attach(device_t dev) 484 { 485 struct hdacc_softc *codec = device_get_softc(dev); 486 device_t child; 487 int cad = (intptr_t)device_get_ivars(dev); 488 uint32_t subnode; 489 int startnode; 490 int endnode; 491 int i, n; 492 493 codec->lock = HDAC_GET_MTX(device_get_parent(dev), dev); 494 codec->dev = dev; 495 codec->cad = cad; 496 497 hdacc_lock(codec); 498 subnode = hda_command(dev, 499 HDA_CMD_GET_PARAMETER(0, 0x0, HDA_PARAM_SUB_NODE_COUNT)); 500 hdacc_unlock(codec); 501 if (subnode == HDA_INVALID) 502 return (EIO); 503 codec->fgcnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode); 504 startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode); 505 endnode = startnode + codec->fgcnt; 506 507 HDA_BOOTHVERBOSE( 508 device_printf(dev, 509 "Root Node at nid=0: %d subnodes %d-%d\n", 510 HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode), 511 startnode, endnode - 1); 512 ); 513 514 codec->fgs = malloc(sizeof(struct hdacc_fg) * codec->fgcnt, 515 M_HDACC, M_ZERO | M_WAITOK); 516 for (i = startnode, n = 0; i < endnode; i++, n++) { 517 codec->fgs[n].nid = i; 518 hdacc_lock(codec); 519 codec->fgs[n].type = 520 HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hda_command(dev, 521 HDA_CMD_GET_PARAMETER(0, i, HDA_PARAM_FCT_GRP_TYPE))); 522 codec->fgs[n].subsystem_id = hda_command(dev, 523 HDA_CMD_GET_SUBSYSTEM_ID(0, i)); 524 hdacc_unlock(codec); 525 codec->fgs[n].dev = child = device_add_child(dev, NULL, -1); 526 if (child == NULL) { 527 device_printf(dev, "Failed to add function device\n"); 528 continue; 529 } 530 device_set_ivars(child, &codec->fgs[n]); 531 } 532 533 bus_generic_attach(dev); 534 535 return (0); 536 } 537 538 static int 539 hdacc_detach(device_t dev) 540 { 541 struct hdacc_softc *codec = device_get_softc(dev); 542 int error; 543 544 error = device_delete_children(dev); 545 free(codec->fgs, M_HDACC); 546 return (error); 547 } 548 549 static int 550 hdacc_child_location(device_t dev, device_t child, struct sbuf *sb) 551 { 552 struct hdacc_fg *fg = device_get_ivars(child); 553 554 sbuf_printf(sb, "nid=%d", fg->nid); 555 return (0); 556 } 557 558 static int 559 hdacc_child_pnpinfo_method(device_t dev, device_t child, struct sbuf *sb) 560 { 561 struct hdacc_fg *fg = device_get_ivars(child); 562 563 sbuf_printf(sb, "type=0x%02x subsystem=0x%08x", 564 fg->type, fg->subsystem_id); 565 return (0); 566 } 567 568 static int 569 hdacc_print_child(device_t dev, device_t child) 570 { 571 struct hdacc_fg *fg = device_get_ivars(child); 572 int retval; 573 574 retval = bus_print_child_header(dev, child); 575 retval += printf(" at nid %d", fg->nid); 576 retval += bus_print_child_footer(dev, child); 577 578 return (retval); 579 } 580 581 static void 582 hdacc_probe_nomatch(device_t dev, device_t child) 583 { 584 struct hdacc_softc *codec = device_get_softc(dev); 585 struct hdacc_fg *fg = device_get_ivars(child); 586 587 device_printf(child, "<%s %s Function Group> at nid %d on %s " 588 "(no driver attached)\n", 589 device_get_desc(dev), 590 fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ? "Audio" : 591 (fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM ? "Modem" : 592 "Unknown"), fg->nid, device_get_nameunit(dev)); 593 HDA_BOOTVERBOSE( 594 device_printf(dev, "Subsystem ID: 0x%08x\n", 595 hda_get_subsystem_id(dev)); 596 ); 597 HDA_BOOTHVERBOSE( 598 device_printf(dev, "Power down FG nid=%d to the D3 state...\n", 599 fg->nid); 600 ); 601 hdacc_lock(codec); 602 hda_command(dev, HDA_CMD_SET_POWER_STATE(0, 603 fg->nid, HDA_CMD_POWER_STATE_D3)); 604 hdacc_unlock(codec); 605 } 606 607 static int 608 hdacc_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 609 { 610 struct hdacc_fg *fg = device_get_ivars(child); 611 612 switch (which) { 613 case HDA_IVAR_NODE_ID: 614 *result = fg->nid; 615 break; 616 case HDA_IVAR_NODE_TYPE: 617 *result = fg->type; 618 break; 619 case HDA_IVAR_SUBSYSTEM_ID: 620 *result = fg->subsystem_id; 621 break; 622 default: 623 return(BUS_READ_IVAR(device_get_parent(dev), dev, 624 which, result)); 625 } 626 return (0); 627 } 628 629 static struct mtx * 630 hdacc_get_mtx(device_t dev, device_t child) 631 { 632 struct hdacc_softc *codec = device_get_softc(dev); 633 634 return (codec->lock); 635 } 636 637 static uint32_t 638 hdacc_codec_command(device_t dev, device_t child, uint32_t verb) 639 { 640 641 return (HDAC_CODEC_COMMAND(device_get_parent(dev), dev, verb)); 642 } 643 644 static int 645 hdacc_stream_alloc(device_t dev, device_t child, int dir, int format, 646 int stripe, uint32_t **dmapos) 647 { 648 struct hdacc_softc *codec = device_get_softc(dev); 649 int stream; 650 651 stream = HDAC_STREAM_ALLOC(device_get_parent(dev), dev, 652 dir, format, stripe, dmapos); 653 if (stream > 0) 654 codec->streams[dir][stream] = child; 655 return (stream); 656 } 657 658 static void 659 hdacc_stream_free(device_t dev, device_t child, int dir, int stream) 660 { 661 struct hdacc_softc *codec = device_get_softc(dev); 662 663 codec->streams[dir][stream] = NULL; 664 HDAC_STREAM_FREE(device_get_parent(dev), dev, dir, stream); 665 } 666 667 static int 668 hdacc_stream_start(device_t dev, device_t child, int dir, int stream, 669 bus_addr_t buf, int blksz, int blkcnt) 670 { 671 672 return (HDAC_STREAM_START(device_get_parent(dev), dev, 673 dir, stream, buf, blksz, blkcnt)); 674 } 675 676 static void 677 hdacc_stream_stop(device_t dev, device_t child, int dir, int stream) 678 { 679 680 HDAC_STREAM_STOP(device_get_parent(dev), dev, dir, stream); 681 } 682 683 static void 684 hdacc_stream_reset(device_t dev, device_t child, int dir, int stream) 685 { 686 687 HDAC_STREAM_RESET(device_get_parent(dev), dev, dir, stream); 688 } 689 690 static uint32_t 691 hdacc_stream_getptr(device_t dev, device_t child, int dir, int stream) 692 { 693 694 return (HDAC_STREAM_GETPTR(device_get_parent(dev), dev, dir, stream)); 695 } 696 697 static void 698 hdacc_stream_intr(device_t dev, int dir, int stream) 699 { 700 struct hdacc_softc *codec = device_get_softc(dev); 701 device_t child; 702 703 if ((child = codec->streams[dir][stream]) != NULL) 704 HDAC_STREAM_INTR(child, dir, stream); 705 } 706 707 static int 708 hdacc_unsol_alloc(device_t dev, device_t child, int wanted) 709 { 710 struct hdacc_softc *codec = device_get_softc(dev); 711 int tag; 712 713 wanted &= 0x3f; 714 tag = wanted; 715 do { 716 if (codec->tags[tag] == NULL) { 717 codec->tags[tag] = child; 718 HDAC_UNSOL_ALLOC(device_get_parent(dev), dev, tag); 719 return (tag); 720 } 721 tag++; 722 tag &= 0x3f; 723 } while (tag != wanted); 724 return (-1); 725 } 726 727 static void 728 hdacc_unsol_free(device_t dev, device_t child, int tag) 729 { 730 struct hdacc_softc *codec = device_get_softc(dev); 731 732 KASSERT(tag >= 0 && tag <= 0x3f, ("Wrong tag value %d\n", tag)); 733 codec->tags[tag] = NULL; 734 HDAC_UNSOL_FREE(device_get_parent(dev), dev, tag); 735 } 736 737 static void 738 hdacc_unsol_intr(device_t dev, uint32_t resp) 739 { 740 struct hdacc_softc *codec = device_get_softc(dev); 741 device_t child; 742 int tag; 743 744 tag = resp >> 26; 745 if ((child = codec->tags[tag]) != NULL) 746 HDAC_UNSOL_INTR(child, resp); 747 else 748 device_printf(codec->dev, "Unexpected unsolicited " 749 "response with tag %d: %08x\n", tag, resp); 750 } 751 752 static void 753 hdacc_pindump(device_t dev) 754 { 755 device_t *devlist; 756 int devcount, i; 757 758 if (device_get_children(dev, &devlist, &devcount) != 0) 759 return; 760 for (i = 0; i < devcount; i++) 761 HDAC_PINDUMP(devlist[i]); 762 free(devlist, M_TEMP); 763 } 764 765 static device_method_t hdacc_methods[] = { 766 /* device interface */ 767 DEVMETHOD(device_probe, hdacc_probe), 768 DEVMETHOD(device_attach, hdacc_attach), 769 DEVMETHOD(device_detach, hdacc_detach), 770 DEVMETHOD(device_suspend, hdacc_suspend), 771 DEVMETHOD(device_resume, hdacc_resume), 772 /* Bus interface */ 773 DEVMETHOD(bus_child_location, hdacc_child_location), 774 DEVMETHOD(bus_child_pnpinfo, hdacc_child_pnpinfo_method), 775 DEVMETHOD(bus_print_child, hdacc_print_child), 776 DEVMETHOD(bus_probe_nomatch, hdacc_probe_nomatch), 777 DEVMETHOD(bus_read_ivar, hdacc_read_ivar), 778 DEVMETHOD(hdac_get_mtx, hdacc_get_mtx), 779 DEVMETHOD(hdac_codec_command, hdacc_codec_command), 780 DEVMETHOD(hdac_stream_alloc, hdacc_stream_alloc), 781 DEVMETHOD(hdac_stream_free, hdacc_stream_free), 782 DEVMETHOD(hdac_stream_start, hdacc_stream_start), 783 DEVMETHOD(hdac_stream_stop, hdacc_stream_stop), 784 DEVMETHOD(hdac_stream_reset, hdacc_stream_reset), 785 DEVMETHOD(hdac_stream_getptr, hdacc_stream_getptr), 786 DEVMETHOD(hdac_stream_intr, hdacc_stream_intr), 787 DEVMETHOD(hdac_unsol_alloc, hdacc_unsol_alloc), 788 DEVMETHOD(hdac_unsol_free, hdacc_unsol_free), 789 DEVMETHOD(hdac_unsol_intr, hdacc_unsol_intr), 790 DEVMETHOD(hdac_pindump, hdacc_pindump), 791 DEVMETHOD_END 792 }; 793 794 static driver_t hdacc_driver = { 795 "hdacc", 796 hdacc_methods, 797 sizeof(struct hdacc_softc), 798 }; 799 800 DRIVER_MODULE(snd_hda, hdac, hdacc_driver, NULL, NULL);
Cache object: 0538813f23b4a1c8eb96f193d5f488fa
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