hdspe.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2012-2016 Ruslan Bukin <br@bsdpad.com>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 /*
   30  * RME HDSPe driver for FreeBSD.
   31  * Supported cards: AIO, RayDAT.
   32  */
   33 
   34 #include <dev/sound/pcm/sound.h>
   35 #include <dev/sound/pci/hdspe.h>
   36 #include <dev/sound/chip.h>
   37 
   38 #include <dev/pci/pcireg.h>
   39 #include <dev/pci/pcivar.h>
   40 
   41 #include <mixer_if.h>
   42 
   43 SND_DECLARE_FILE("$FreeBSD$");
   44 
   45 static struct hdspe_channel chan_map_aio[] = {
   46         {  0,  1,   "line", 1, 1 },
   47         {  6,  7,  "phone", 1, 0 },
   48         {  8,  9,    "aes", 1, 1 },
   49         { 10, 11, "s/pdif", 1, 1 },
   50         { 12, 16,   "adat", 1, 1 },
   51 
   52         /* Single or double speed. */
   53         { 14, 18,   "adat", 1, 1 },
   54 
   55         /* Single speed only. */
   56         { 13, 15,   "adat", 1, 1 },
   57         { 17, 19,   "adat", 1, 1 },
   58 
   59         {  0,  0,     NULL, 0, 0 },
   60 };
   61 
   62 static struct hdspe_channel chan_map_rd[] = {
   63         {   0, 1,    "aes", 1, 1 },
   64         {   2, 3, "s/pdif", 1, 1 },
   65         {   4, 5,   "adat", 1, 1 },
   66         {   6, 7,   "adat", 1, 1 },
   67         {   8, 9,   "adat", 1, 1 },
   68         { 10, 11,   "adat", 1, 1 },
   69 
   70         /* Single or double speed. */
   71         { 12, 13,   "adat", 1, 1 },
   72         { 14, 15,   "adat", 1, 1 },
   73         { 16, 17,   "adat", 1, 1 },
   74         { 18, 19,   "adat", 1, 1 },
   75 
   76         /* Single speed only. */
   77         { 20, 21,   "adat", 1, 1 },
   78         { 22, 23,   "adat", 1, 1 },
   79         { 24, 25,   "adat", 1, 1 },
   80         { 26, 27,   "adat", 1, 1 },
   81         { 28, 29,   "adat", 1, 1 },
   82         { 30, 31,   "adat", 1, 1 },
   83         { 32, 33,   "adat", 1, 1 },
   84         { 34, 35,   "adat", 1, 1 },
   85 
   86         { 0,  0,      NULL, 0, 0 },
   87 };
   88 
   89 static void
   90 hdspe_intr(void *p)
   91 {
   92         struct sc_pcminfo *scp;
   93         struct sc_info *sc;
   94         device_t *devlist;
   95         int devcount;
   96         int status;
   97         int err;
   98         int i;
   99 
  100         sc = (struct sc_info *)p;
  101 
  102         snd_mtxlock(sc->lock);
  103 
  104         status = hdspe_read_1(sc, HDSPE_STATUS_REG);
  105         if (status & HDSPE_AUDIO_IRQ_PENDING) {
  106                 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
  107                         return;
  108 
  109                 for (i = 0; i < devcount; i++) {
  110                         scp = device_get_ivars(devlist[i]);
  111                         if (scp->ih != NULL)
  112                                 scp->ih(scp);
  113                 }
  114 
  115                 hdspe_write_1(sc, HDSPE_INTERRUPT_ACK, 0);
  116                 free(devlist, M_TEMP);
  117         }
  118 
  119         snd_mtxunlock(sc->lock);
  120 }
  121 
  122 static void
  123 hdspe_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
  124 {
  125 #if 0
  126         device_printf(sc->dev, "hdspe_dmapsetmap()\n");
  127 #endif
  128 }
  129 
  130 static int
  131 hdspe_alloc_resources(struct sc_info *sc)
  132 {
  133 
  134         /* Allocate resource. */
  135         sc->csid = PCIR_BAR(0);
  136         sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
  137             &sc->csid, RF_ACTIVE);
  138 
  139         if (!sc->cs) {
  140                 device_printf(sc->dev, "Unable to map SYS_RES_MEMORY.\n");
  141                 return (ENXIO);
  142         }
  143 
  144         sc->cst = rman_get_bustag(sc->cs);
  145         sc->csh = rman_get_bushandle(sc->cs);
  146 
  147         /* Allocate interrupt resource. */
  148         sc->irqid = 0;
  149         sc->irq = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &sc->irqid,
  150             RF_ACTIVE | RF_SHAREABLE);
  151 
  152         if (!sc->irq ||
  153             bus_setup_intr(sc->dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV,
  154                 NULL, hdspe_intr, sc, &sc->ih)) {
  155                 device_printf(sc->dev, "Unable to alloc interrupt resource.\n");
  156                 return (ENXIO);
  157         }
  158 
  159         /* Allocate DMA resources. */
  160         if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev),
  161                 /*alignment*/4,
  162                 /*boundary*/0,
  163                 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
  164                 /*highaddr*/BUS_SPACE_MAXADDR,
  165                 /*filter*/NULL,
  166                 /*filterarg*/NULL,
  167                 /*maxsize*/2 * HDSPE_DMASEGSIZE,
  168                 /*nsegments*/2,
  169                 /*maxsegsz*/HDSPE_DMASEGSIZE,
  170                 /*flags*/0,
  171                 /*lockfunc*/NULL,
  172                 /*lockarg*/NULL,
  173                 /*dmatag*/&sc->dmat) != 0) {
  174                 device_printf(sc->dev, "Unable to create dma tag.\n");
  175                 return (ENXIO);
  176         }
  177 
  178         sc->bufsize = HDSPE_DMASEGSIZE;
  179 
  180         /* pbuf (play buffer). */
  181         if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf, BUS_DMA_WAITOK,
  182             &sc->pmap)) {
  183                 device_printf(sc->dev, "Can't alloc pbuf.\n");
  184                 return (ENXIO);
  185         }
  186 
  187         if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->bufsize,
  188             hdspe_dmapsetmap, sc, BUS_DMA_NOWAIT)) {
  189                 device_printf(sc->dev, "Can't load pbuf.\n");
  190                 return (ENXIO);
  191         }
  192 
  193         /* rbuf (rec buffer). */
  194         if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf, BUS_DMA_WAITOK,
  195             &sc->rmap)) {
  196                 device_printf(sc->dev, "Can't alloc rbuf.\n");
  197                 return (ENXIO);
  198         }
  199 
  200         if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->bufsize,
  201             hdspe_dmapsetmap, sc, BUS_DMA_NOWAIT)) {
  202                 device_printf(sc->dev, "Can't load rbuf.\n");
  203                 return (ENXIO);
  204         }
  205 
  206         bzero(sc->pbuf, sc->bufsize);
  207         bzero(sc->rbuf, sc->bufsize);
  208 
  209         return (0);
  210 }
  211 
  212 static void
  213 hdspe_map_dmabuf(struct sc_info *sc)
  214 {
  215         uint32_t paddr, raddr;
  216         int i;
  217 
  218         paddr = vtophys(sc->pbuf);
  219         raddr = vtophys(sc->rbuf);
  220 
  221         for (i = 0; i < HDSPE_MAX_SLOTS * 16; i++) {
  222                 hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_OUT + 4 * i,
  223                     paddr + i * 4096);
  224                 hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_IN + 4 * i,
  225                     raddr + i * 4096);
  226         }
  227 }
  228 
  229 static int
  230 hdspe_probe(device_t dev)
  231 {
  232         uint32_t rev;
  233 
  234         if (pci_get_vendor(dev) == PCI_VENDOR_XILINX &&
  235             pci_get_device(dev) == PCI_DEVICE_XILINX_HDSPE) {
  236                 rev = pci_get_revid(dev);
  237                 switch (rev) {
  238                 case PCI_REVISION_AIO:
  239                         device_set_desc(dev, "RME HDSPe AIO");
  240                         return (0);
  241                 case PCI_REVISION_RAYDAT:
  242                         device_set_desc(dev, "RME HDSPe RayDAT");
  243                         return (0);
  244                 }
  245         }
  246 
  247         return (ENXIO);
  248 }
  249 
  250 static int
  251 hdspe_init(struct sc_info *sc)
  252 {
  253         long long period;
  254 
  255         /* Set defaults. */
  256         sc->ctrl_register |= HDSPM_CLOCK_MODE_MASTER;
  257 
  258         /* Set latency. */
  259         sc->period = 32;
  260         sc->ctrl_register = hdspe_encode_latency(7);
  261 
  262         /* Set rate. */
  263         sc->speed = HDSPE_SPEED_DEFAULT;
  264         sc->ctrl_register &= ~HDSPE_FREQ_MASK;
  265         sc->ctrl_register |= HDSPE_FREQ_MASK_DEFAULT;
  266         hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register);
  267 
  268         switch (sc->type) {
  269         case RAYDAT:
  270         case AIO:
  271                 period = HDSPE_FREQ_AIO;
  272                 break;
  273         default:
  274                 return (ENXIO);
  275         }
  276 
  277         /* Set DDS value. */
  278         period /= sc->speed;
  279         hdspe_write_4(sc, HDSPE_FREQ_REG, period);
  280 
  281         /* Other settings. */
  282         sc->settings_register = 0;
  283         hdspe_write_4(sc, HDSPE_SETTINGS_REG, sc->settings_register);
  284 
  285         return (0);
  286 }
  287 
  288 static int
  289 hdspe_attach(device_t dev)
  290 {
  291         struct hdspe_channel *chan_map;
  292         struct sc_pcminfo *scp;
  293         struct sc_info *sc;
  294         uint32_t rev;
  295         int i, err;
  296 
  297 #if 0
  298         device_printf(dev, "hdspe_attach()\n");
  299 #endif
  300 
  301         sc = device_get_softc(dev);
  302         sc->lock = snd_mtxcreate(device_get_nameunit(dev),
  303             "snd_hdspe softc");
  304         sc->dev = dev;
  305 
  306         pci_enable_busmaster(dev);
  307         rev = pci_get_revid(dev);
  308         switch (rev) {
  309         case PCI_REVISION_AIO:
  310                 sc->type = AIO;
  311                 chan_map = chan_map_aio;
  312                 break;
  313         case PCI_REVISION_RAYDAT:
  314                 sc->type = RAYDAT;
  315                 chan_map = chan_map_rd;
  316                 break;
  317         default:
  318                 return (ENXIO);
  319         }
  320 
  321         /* Allocate resources. */
  322         err = hdspe_alloc_resources(sc);
  323         if (err) {
  324                 device_printf(dev, "Unable to allocate system resources.\n");
  325                 return (ENXIO);
  326         }
  327 
  328         if (hdspe_init(sc) != 0)
  329                 return (ENXIO);
  330 
  331         for (i = 0; i < HDSPE_MAX_CHANS && chan_map[i].descr != NULL; i++) {
  332                 scp = malloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
  333                 scp->hc = &chan_map[i];
  334                 scp->sc = sc;
  335                 scp->dev = device_add_child(dev, "pcm", -1);
  336                 device_set_ivars(scp->dev, scp);
  337         }
  338 
  339         hdspe_map_dmabuf(sc);
  340 
  341         return (bus_generic_attach(dev));
  342 }
  343 
  344 static void
  345 hdspe_dmafree(struct sc_info *sc)
  346 {
  347 
  348         bus_dmamap_unload(sc->dmat, sc->rmap);
  349         bus_dmamap_unload(sc->dmat, sc->pmap);
  350         bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap);
  351         bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap);
  352         sc->rbuf = sc->pbuf = NULL;
  353 }
  354 
  355 static int
  356 hdspe_detach(device_t dev)
  357 {
  358         struct sc_info *sc;
  359         int err;
  360 
  361         sc = device_get_softc(dev);
  362         if (sc == NULL) {
  363                 device_printf(dev,"Can't detach: softc is null.\n");
  364                 return (0);
  365         }
  366 
  367         err = device_delete_children(dev);
  368         if (err)
  369                 return (err);
  370 
  371         hdspe_dmafree(sc);
  372 
  373         if (sc->ih)
  374                 bus_teardown_intr(dev, sc->irq, sc->ih);
  375         if (sc->dmat)
  376                 bus_dma_tag_destroy(sc->dmat);
  377         if (sc->irq)
  378                 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
  379         if (sc->cs)
  380                 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), sc->cs);
  381         if (sc->lock)
  382                 snd_mtxfree(sc->lock);
  383 
  384         return (0);
  385 }
  386 
  387 static device_method_t hdspe_methods[] = {
  388         DEVMETHOD(device_probe,     hdspe_probe),
  389         DEVMETHOD(device_attach,    hdspe_attach),
  390         DEVMETHOD(device_detach,    hdspe_detach),
  391         { 0, 0 }
  392 };
  393 
  394 static driver_t hdspe_driver = {
  395         "hdspe",
  396         hdspe_methods,
  397         PCM_SOFTC_SIZE,
  398 };
  399 
  400 DRIVER_MODULE(snd_hdspe, pci, hdspe_driver, 0, 0);
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FreeBSD/Linux Kernel Cross Reference sys/dev/sound/pci/hdspe.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/sound/pci/hdspe.c
