The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/sr/if_sr_pci.c

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    1 /*-
    2  * Copyright (c) 1996 - 2001 John Hay.
    3  * Copyright (c) 1996 SDL Communications, Inc.
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  * 3. Neither the name of the author nor the names of any co-contributors
   15  *    may be used to endorse or promote products derived from this software
   16  *    without specific prior written permission.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  */
   30 
   31 #include <sys/cdefs.h>
   32 __FBSDID("$FreeBSD$");
   33 
   34 #include <sys/param.h>
   35 #include <sys/systm.h>
   36 #include <sys/kernel.h>
   37 #include <sys/malloc.h>
   38 #include <sys/module.h>
   39 #include <sys/bus.h>
   40 #include <machine/bus.h>
   41 #include <machine/resource.h>
   42 #include <machine/bus_pio.h>
   43 #include <machine/bus_memio.h>
   44 #include <sys/rman.h>
   45 
   46 #include <dev/pci/pcivar.h>
   47 #include <machine/md_var.h>
   48 
   49 #include <dev/ic/hd64570.h>
   50 #include <dev/sr/if_srregs.h>
   51 
   52 #ifndef BUGGY
   53 #define BUGGY           0
   54 #endif
   55 
   56 static int      sr_pci_probe(device_t);
   57 static int      sr_pci_attach(device_t);
   58 
   59 static device_method_t sr_pci_methods[] = {
   60         /* Device interface */
   61         DEVMETHOD(device_probe,         sr_pci_probe),
   62         DEVMETHOD(device_attach,        sr_pci_attach),
   63         DEVMETHOD(device_detach,        sr_detach),
   64         { 0, 0 }
   65 };
   66 
   67 static driver_t sr_pci_driver = {
   68         "sr",
   69         sr_pci_methods,
   70         sizeof(struct sr_hardc),
   71 };
   72 
   73 DRIVER_MODULE(sr, pci, sr_pci_driver, sr_devclass, 0, 0);
   74 MODULE_DEPEND(sr, pci, 1, 1, 1);
   75 
   76 static u_int    src_get8_mem(struct sr_hardc *hc, u_int off);
   77 static u_int    src_get16_mem(struct sr_hardc *hc, u_int off);
   78 static void     src_put8_mem(struct sr_hardc *hc, u_int off, u_int val);
   79 static void     src_put16_mem(struct sr_hardc *hc, u_int off, u_int val);
   80 
   81 static int
   82 sr_pci_probe(device_t device)
   83 {
   84         u_int32_t       type = pci_get_devid(device);
   85 
   86         switch(type) {
   87         case 0x556812aa:
   88                 device_set_desc(device, "RISCom/N2pci");
   89                 return (0);
   90                 break;
   91         case 0x55684778:
   92         case 0x55684877:
   93                 /*
   94                  * XXX This can probably be removed sometime.
   95                  */
   96                 device_set_desc(device, "RISCom/N2pci (old id)");
   97                 return (0);
   98                 break;
   99         default:
  100                 break;
  101         }
  102         return (ENXIO);
  103 }
  104 
  105 static int
  106 sr_pci_attach(device_t device)
  107 {
  108         int numports;
  109         u_int fecr;
  110         struct sr_hardc *hc;
  111         bus_space_tag_t bt_plx;
  112         bus_space_handle_t bh_plx;
  113 
  114         hc = (struct sr_hardc *)device_get_softc(device);
  115         bzero(hc, sizeof(struct sr_hardc));
  116 
  117         if (sr_allocate_plx_memory(device, 0x10, 1))
  118                 goto errexit;
  119         bt_plx = rman_get_bustag(hc->res_plx_memory);
  120         bh_plx = rman_get_bushandle(hc->res_plx_memory);
  121 
  122         if (sr_allocate_memory(device, 0x18, 1))
  123                 goto errexit;
  124 
  125         if (sr_allocate_irq(device, 0, 1))
  126                 goto errexit;
  127 
  128         hc->cunit = device_get_unit(device);
  129 
  130         /*
  131          * Configure the PLX. This is magic. I'm doing it just like I'm told
  132          * to. :-)
  133          * 
  134          * offset
  135          *  0x00 - Map Range    - Mem-mapped to locate anywhere
  136          *  0x04 - Re-Map       - PCI address decode enable
  137          *  0x18 - Bus Region   - 32-bit bus, ready enable
  138          *  0x1c - Master Range - include all 16 MB
  139          *  0x20 - Master RAM   - Map SCA Base at 0
  140          *  0x28 - Master Remap - direct master memory enable
  141          *  0x68 - Interrupt    - Enable interrupt (0 to disable)
  142          * 
  143          * Note: This is "cargo cult" stuff.  - jrc
  144          */
  145         bus_space_write_4(bt_plx, bh_plx, 0x00, 0xfffff000);
  146         bus_space_write_4(bt_plx, bh_plx, 0x04, 0x00000001);
  147         bus_space_write_4(bt_plx, bh_plx, 0x18, 0x40030043);
  148         bus_space_write_4(bt_plx, bh_plx, 0x1c, 0xff000000);
  149         bus_space_write_4(bt_plx, bh_plx, 0x20, 0x00000000);
  150         bus_space_write_4(bt_plx, bh_plx, 0x28, 0x000000e9);
  151         bus_space_write_4(bt_plx, bh_plx, 0x68, 0x00010900);
  152 
  153         /*
  154          * Get info from card.
  155          *
  156          * Only look for the second port if the first exists. Too many things
  157          * will break if we have only a second port.
  158          */
  159         fecr = sr_read_fecr(hc);
  160         numports = 0;
  161 
  162         if (((fecr & SR_FECR_ID0) >> SR_FE_ID0_SHFT) != SR_FE_ID_NONE) {
  163                 numports++;
  164                 if (((fecr & SR_FECR_ID1) >> SR_FE_ID1_SHFT) != SR_FE_ID_NONE)
  165                         numports++;
  166         }
  167         if (numports == 0)
  168                 goto errexit;
  169 
  170         hc->numports = numports;
  171         hc->cardtype = SR_CRD_N2PCI;
  172 
  173         hc->src_put8 = src_put8_mem;
  174         hc->src_put16 = src_put16_mem;
  175         hc->src_get8 = src_get8_mem;
  176         hc->src_get16 = src_get16_mem;
  177 
  178         /*
  179          * Malloc area for tx and rx buffers. For now allocate SRC_WIN_SIZ
  180          * (16k) for each buffer.
  181          *
  182          * Allocate the block below 16M because the N2pci card can only access
  183          * 16M memory at a time.
  184          *
  185          * (We could actually allocate a contiguous block above the 16MB limit,
  186          * but this would complicate card programming more than we want to
  187          * right now -jrc)
  188          */
  189         hc->memsize = 2 * hc->numports * SRC_WIN_SIZ;
  190         hc->mem_start = contigmalloc(hc->memsize,
  191                                      M_DEVBUF,
  192                                      M_NOWAIT,
  193                                      0ul,
  194                                      0xfffffful,
  195                                      0x10000,
  196                                      0x1000000);
  197 
  198         if (hc->mem_start == NULL) {
  199                 printf("src%d: pci: failed to allocate buffer space.\n",
  200                     hc->cunit);
  201                 goto errexit;
  202         }
  203         hc->winmsk = 0xffffffff;
  204         hc->mem_end = (caddr_t)((u_int)hc->mem_start + hc->memsize);
  205         hc->mem_pstart = kvtop(hc->mem_start);
  206         bzero(hc->mem_start, hc->memsize);
  207 
  208         sr_write_fecr(hc,
  209             SR_FECR_DTR0 | SR_FECR_DTR1 | SR_FECR_TE0 | SR_FECR_TE1);
  210 
  211         if (sr_attach(device))
  212                 goto errexit;
  213 
  214         return (0);
  215 errexit:
  216         sr_deallocate_resources(device);
  217         return (ENXIO);
  218 }
  219 
  220 /*
  221  * I/O for PCI N2 card(s)
  222  */
  223 #define SRC_PCI_SCA_REG(y)      ((y & 2) ? ((y & 0xfd) + 0x100) : y)
  224 
  225 static u_int
  226 src_get8_mem(struct sr_hardc *hc, u_int off)
  227 {
  228         return bus_space_read_1(hc->bt_memory, hc->bh_memory,
  229             SRC_PCI_SCA_REG(off));
  230 }
  231 
  232 static u_int
  233 src_get16_mem(struct sr_hardc *hc, u_int off)
  234 {
  235         return bus_space_read_2(hc->bt_memory, hc->bh_memory,
  236             SRC_PCI_SCA_REG(off));
  237 }
  238 
  239 static void
  240 src_put8_mem(struct sr_hardc *hc, u_int off, u_int val)
  241 {
  242         bus_space_write_1(hc->bt_memory, hc->bh_memory,
  243             SRC_PCI_SCA_REG(off), val);
  244 }
  245 
  246 static void
  247 src_put16_mem(struct sr_hardc *hc, u_int off, u_int val)
  248 {
  249         bus_space_write_2(hc->bt_memory, hc->bh_memory,
  250             SRC_PCI_SCA_REG(off), val);
  251 }

Cache object: 9b24728412fab76f2398e8000cfb0c36


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