The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/sram/mmio_sram.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause
    3  *
    4  * Copyright (c) 2022 Ruslan Bukin <br@bsdpad.com>
    5  *
    6  * This work was supported by Innovate UK project 105694, "Digital Security
    7  * by Design (DSbD) Technology Platform Prototype".
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  */
   30 
   31 #include <sys/cdefs.h>
   32 __FBSDID("$FreeBSD$");
   33 
   34 #include <sys/param.h>
   35 #include <sys/systm.h>
   36 #include <sys/bus.h>
   37 #include <sys/rman.h>
   38 #include <sys/kernel.h>
   39 #include <sys/module.h>
   40 
   41 #include <machine/bus.h>
   42 
   43 #include <dev/fdt/simplebus.h>
   44 #include <dev/fdt/fdt_common.h>
   45 #include <dev/ofw/ofw_bus_subr.h>
   46 
   47 #include "mmio_sram_if.h"
   48 
   49 #define dprintf(fmt, ...)
   50 
   51 static struct resource_spec mmio_sram_spec[] = {
   52         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
   53         { -1, 0 }
   54 };
   55 
   56 struct mmio_sram_softc {
   57         struct simplebus_softc  simplebus_sc;
   58         struct resource         *res[1];
   59         device_t                dev;
   60 };
   61 
   62 static int
   63 mmio_sram_probe(device_t dev)
   64 {
   65 
   66         if (!ofw_bus_is_compatible(dev, "mmio-sram"))
   67                 return (ENXIO);
   68 
   69         if (!ofw_bus_status_okay(dev))
   70                 return (ENXIO);
   71 
   72         device_set_desc(dev, "MMIO SRAM");
   73 
   74         return (BUS_PROBE_DEFAULT);
   75 }
   76 
   77 static int
   78 mmio_sram_attach(device_t dev)
   79 {
   80         struct mmio_sram_softc *sc;
   81         phandle_t node;
   82 
   83         sc = device_get_softc(dev);
   84         sc->dev = dev;
   85 
   86         if (bus_alloc_resources(dev, mmio_sram_spec, sc->res) != 0) {
   87                 device_printf(dev, "Can't allocate resources for device.\n");
   88                 return (ENXIO);
   89         }
   90 
   91         node = ofw_bus_get_node(dev);
   92         if (node == -1)
   93                 return (ENXIO);
   94 
   95         simplebus_init(dev, node);
   96 
   97         /*
   98          * Allow devices to identify.
   99          */
  100         bus_generic_probe(dev);
  101 
  102         /*
  103          * Now walk the OFW tree and attach top-level devices.
  104          */
  105         for (node = OF_child(node); node > 0; node = OF_peer(node))
  106                 simplebus_add_device(dev, node, 0, NULL, -1, NULL);
  107 
  108         return (bus_generic_attach(dev));
  109 }
  110 
  111 static int
  112 mmio_sram_detach(device_t dev)
  113 {
  114         struct mmio_sram_softc *sc;
  115 
  116         sc = device_get_softc(dev);
  117 
  118         bus_release_resources(dev, mmio_sram_spec, sc->res);
  119 
  120         return (0);
  121 }
  122 
  123 static uint8_t
  124 mmio_sram_read_1(device_t dev, bus_size_t offset)
  125 {
  126         struct mmio_sram_softc *sc;
  127 
  128         sc = device_get_softc(dev);
  129 
  130         dprintf("%s: reading from %lx\n", __func__, offset);
  131 
  132         return (bus_read_1(sc->res[0], offset));
  133 }
  134 
  135 static void
  136 mmio_sram_write_1(device_t dev, bus_size_t offset, uint8_t val)
  137 {
  138         struct mmio_sram_softc *sc;
  139 
  140         sc = device_get_softc(dev);
  141 
  142         dprintf("%s: writing to %lx val %x\n", __func__, offset, val);
  143 
  144         bus_write_1(sc->res[0], offset, val);
  145 }
  146 
  147 static device_method_t mmio_sram_methods[] = {
  148         /* Device Interface */
  149         DEVMETHOD(device_probe,         mmio_sram_probe),
  150         DEVMETHOD(device_attach,        mmio_sram_attach),
  151         DEVMETHOD(device_detach,        mmio_sram_detach),
  152 
  153         /* MMIO interface */
  154         DEVMETHOD(mmio_sram_read_1,     mmio_sram_read_1),
  155         DEVMETHOD(mmio_sram_write_1,    mmio_sram_write_1),
  156         DEVMETHOD_END
  157 };
  158 
  159 DEFINE_CLASS_1(mmio_sram, mmio_sram_driver, mmio_sram_methods,
  160     sizeof(struct mmio_sram_softc), simplebus_driver);
  161 
  162 EARLY_DRIVER_MODULE(mmio_sram, simplebus, mmio_sram_driver, 0, 0,
  163     BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE);
  164 MODULE_VERSION(mmio_sram, 1);

Cache object: 9b1a016dc3d8c8168bdc31120ae6bde5


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