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sys/dev/stg/tmc18c30.c
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1 /* $NecBSD: tmc18c30.c,v 1.28.12.3 2001/06/19 04:35:48 honda Exp $ */ 2 /* $NetBSD$ */ 3 4 #define STG_DEBUG 5 #define STG_STATICS 6 #define STG_IO_CONTROL_FLAGS (STG_FIFO_INTERRUPTS | STG_WAIT_FOR_SELECT) 7 8 /*- 9 * [NetBSD for NEC PC-98 series] 10 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001 11 * NetBSD/pc98 porting staff. All rights reserved. 12 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001 13 * Naofumi HONDA. All rights reserved. 14 * Copyright (c) 1996, 1997, 1998, 1999 15 * Kouichi Matsuda. All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. The name of the author may not be used to endorse or promote products 26 * derived from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 30 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 31 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 32 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 33 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 #include <sys/cdefs.h> 42 __FBSDID("$FreeBSD: releng/8.4/sys/dev/stg/tmc18c30.c 189004 2009-02-24 18:09:31Z rdivacky $"); 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #if defined(__FreeBSD__) && __FreeBSD_version >= 500001 48 #include <sys/bio.h> 49 #endif /* __FreeBSD__ */ 50 #include <sys/buf.h> 51 #include <sys/queue.h> 52 #include <sys/malloc.h> 53 #include <sys/errno.h> 54 55 #ifdef __NetBSD__ 56 #include <sys/device.h> 57 #include <machine/bus.h> 58 #include <machine/intr.h> 59 60 #include <dev/scsipi/scsi_all.h> 61 #include <dev/scsipi/scsipi_all.h> 62 #include <dev/scsipi/scsiconf.h> 63 #include <dev/scsipi/scsi_disk.h> 64 65 #include <machine/dvcfg.h> 66 #include <machine/physio_proc.h> 67 68 #include <i386/Cbus/dev/scsi_low.h> 69 #include <i386/Cbus/dev/tmc18c30reg.h> 70 #include <i386/Cbus/dev/tmc18c30var.h> 71 #endif /* __NetBSD__ */ 72 73 #ifdef __FreeBSD__ 74 #include <machine/cpu.h> 75 #include <machine/bus.h> 76 77 #include <compat/netbsd/dvcfg.h> 78 #include <compat/netbsd/physio_proc.h> 79 80 #include <cam/scsi/scsi_low.h> 81 #include <dev/stg/tmc18c30reg.h> 82 #include <dev/stg/tmc18c30var.h> 83 #endif /* __FreeBSD__ */ 84 85 /*************************************************** 86 * USER SETTINGS 87 ***************************************************/ 88 /* DEVICE CONFIGURATION FLAGS (MINOR) 89 * 90 * 0x01 DISCONECT OFF 91 * 0x02 PARITY LINE OFF 92 * 0x04 IDENTIFY MSG OFF ( = single lun) 93 * 0x08 SYNC TRANSFER OFF 94 */ 95 /* #define STG_SYNC_SUPPORT */ /* NOT YET but easy */ 96 97 /* For the 512 fifo type: change below */ 98 #define TMC18C30_FIFOSZ 0x800 99 #define TMC18C30_FCBSZ 0x200 100 #define TMC18C50_FIFOSZ 0x2000 101 #define TMC18C50_FCBSZ 0x400 102 103 #define STG_MAX_DATA_SIZE (64 * 1024) 104 #define STG_DELAY_MAX (2 * 1000 * 1000) 105 #define STG_DELAY_INTERVAL (1) 106 #define STG_DELAY_SELECT_POLLING_MAX (5 * 1000 * 1000) 107 108 /*************************************************** 109 * PARAMS 110 ***************************************************/ 111 #define STG_NTARGETS 8 112 #define STG_NLUNS 8 113 114 /*************************************************** 115 * DEBUG 116 ***************************************************/ 117 #ifdef STG_DEBUG 118 static int stg_debug; 119 #endif /* STG_DEBUG */ 120 121 #ifdef STG_STATICS 122 static struct stg_statics { 123 int arbit_fail_0; 124 int arbit_fail_1; 125 int disconnect; 126 int reselect; 127 } stg_statics; 128 #endif /* STG_STATICS */ 129 130 /*************************************************** 131 * IO control flags 132 ***************************************************/ 133 #define STG_FIFO_INTERRUPTS 0x0001 134 #define STG_WAIT_FOR_SELECT 0x0100 135 136 int stg_io_control = STG_IO_CONTROL_FLAGS; 137 138 /*************************************************** 139 * DEVICE STRUCTURE 140 ***************************************************/ 141 extern struct cfdriver stg_cd; 142 143 /************************************************************** 144 * DECLARE 145 **************************************************************/ 146 /* static */ 147 static void stg_pio_read(struct stg_softc *, struct targ_info *, u_int); 148 static void stg_pio_write(struct stg_softc *, struct targ_info *, u_int); 149 static int stg_xfer(struct stg_softc *, u_int8_t *, int, int, int); 150 static int stg_msg(struct stg_softc *, struct targ_info *, u_int); 151 static int stg_reselected(struct stg_softc *); 152 static int stg_disconnected(struct stg_softc *, struct targ_info *); 153 static __inline void stg_pdma_end(struct stg_softc *, struct targ_info *); 154 static int stghw_select_targ_wait(struct stg_softc *, int); 155 static int stghw_check(struct stg_softc *); 156 static void stghw_init(struct stg_softc *); 157 static int stg_negate_signal(struct stg_softc *, u_int8_t, u_char *); 158 static int stg_expect_signal(struct stg_softc *, u_int8_t, u_int8_t); 159 static int stg_world_start(struct stg_softc *, int); 160 static int stghw_start_selection(struct stg_softc *sc, struct slccb *); 161 static void stghw_bus_reset(struct stg_softc *); 162 static void stghw_attention(struct stg_softc *); 163 static int stg_target_nexus_establish(struct stg_softc *); 164 static int stg_lun_nexus_establish(struct stg_softc *); 165 static int stg_ccb_nexus_establish(struct stg_softc *); 166 static int stg_targ_init(struct stg_softc *, struct targ_info *, int); 167 static __inline void stghw_bcr_write_1(struct stg_softc *, u_int8_t); 168 static int stg_timeout(struct stg_softc *); 169 static void stg_selection_done_and_expect_msgout(struct stg_softc *); 170 171 struct scsi_low_funcs stgfuncs = { 172 SC_LOW_INIT_T stg_world_start, 173 SC_LOW_BUSRST_T stghw_bus_reset, 174 SC_LOW_TARG_INIT_T stg_targ_init, 175 SC_LOW_LUN_INIT_T NULL, 176 177 SC_LOW_SELECT_T stghw_start_selection, 178 SC_LOW_NEXUS_T stg_lun_nexus_establish, 179 SC_LOW_NEXUS_T stg_ccb_nexus_establish, 180 181 SC_LOW_ATTEN_T stghw_attention, 182 SC_LOW_MSG_T stg_msg, 183 184 SC_LOW_TIMEOUT_T stg_timeout, 185 SC_LOW_POLL_T stgintr, 186 187 NULL, 188 }; 189 190 /**************************************************** 191 * hwfuncs 192 ****************************************************/ 193 static __inline void 194 stghw_bcr_write_1(struct stg_softc *sc, u_int8_t bcv) 195 { 196 197 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, bcv); 198 sc->sc_busimg = bcv; 199 } 200 201 static int 202 stghw_check(sc) 203 struct stg_softc *sc; 204 { 205 struct scsi_low_softc *slp = &sc->sc_sclow; 206 bus_space_tag_t iot = sc->sc_iot; 207 bus_space_handle_t ioh = sc->sc_ioh; 208 u_int fcbsize, fcb; 209 u_int16_t lsb, msb; 210 211 lsb = bus_space_read_1(iot, ioh, tmc_idlsb); 212 msb = bus_space_read_1(iot, ioh, tmc_idmsb); 213 switch (msb << 8 | lsb) 214 { 215 case 0x6127: 216 /* TMCCHIP_1800 not supported. (it's my policy) */ 217 sc->sc_chip = TMCCHIP_1800; 218 return EINVAL; 219 220 case 0x60e9: 221 if (bus_space_read_1(iot, ioh, tmc_cfg2) & 0x02) 222 { 223 sc->sc_chip = TMCCHIP_18C30; 224 sc->sc_fsz = TMC18C30_FIFOSZ; 225 fcbsize = TMC18C30_FCBSZ; 226 } 227 else 228 { 229 sc->sc_chip = TMCCHIP_18C50; 230 sc->sc_fsz = TMC18C50_FIFOSZ; 231 fcbsize = TMC18C50_FCBSZ; 232 } 233 break; 234 235 default: 236 sc->sc_chip = TMCCHIP_UNK; 237 return ENODEV; 238 } 239 240 sc->sc_fcRinit = FCTL_INTEN; 241 sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN; 242 243 if (slp->sl_cfgflags & CFG_NOATTEN) 244 sc->sc_imsg = 0; 245 else 246 sc->sc_imsg = BCTL_ATN; 247 sc->sc_busc = BCTL_BUSEN; 248 249 sc->sc_wthold = fcbsize + 256; 250 sc->sc_rthold = fcbsize - 256; 251 sc->sc_maxwsize = sc->sc_fsz; 252 253 fcb = fcbsize / (sc->sc_fsz / 16); 254 sc->sc_icinit = ICTL_CD | ICTL_SEL | ICTL_ARBIT | fcb; 255 return 0; 256 } 257 258 static void 259 stghw_init(sc) 260 struct stg_softc *sc; 261 { 262 bus_space_tag_t iot = sc->sc_iot; 263 bus_space_handle_t ioh = sc->sc_ioh; 264 265 bus_space_write_1(iot, ioh, tmc_ictl, 0); 266 stghw_bcr_write_1(sc, BCTL_BUSFREE); 267 bus_space_write_1(iot, ioh, tmc_fctl, 268 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT); 269 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 270 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 271 272 bus_space_write_1(iot, ioh, tmc_ssctl, 0); 273 } 274 275 static int 276 stg_targ_init(sc, ti, action) 277 struct stg_softc *sc; 278 struct targ_info *ti; 279 int action; 280 { 281 struct stg_targ_info *sti = (void *) ti; 282 283 if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE) 284 { 285 ti->ti_width = SCSI_LOW_BUS_WIDTH_8; 286 ti->ti_maxsynch.period = 0; 287 ti->ti_maxsynch.offset = 0; 288 sti->sti_reg_synch = 0; 289 } 290 return 0; 291 } 292 293 /**************************************************** 294 * scsi low interface 295 ****************************************************/ 296 static void 297 stghw_attention(sc) 298 struct stg_softc *sc; 299 { 300 301 sc->sc_busc |= BCTL_ATN; 302 sc->sc_busimg |= BCTL_ATN; 303 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, sc->sc_busimg); 304 SCSI_LOW_DELAY(10); 305 } 306 307 static void 308 stghw_bus_reset(sc) 309 struct stg_softc *sc; 310 { 311 bus_space_tag_t iot = sc->sc_iot; 312 bus_space_handle_t ioh = sc->sc_ioh; 313 314 bus_space_write_1(iot, ioh, tmc_ictl, 0); 315 bus_space_write_1(iot, ioh, tmc_fctl, 0); 316 stghw_bcr_write_1(sc, BCTL_RST); 317 SCSI_LOW_DELAY(100000); 318 stghw_bcr_write_1(sc, BCTL_BUSFREE); 319 } 320 321 static int 322 stghw_start_selection(sc, cb) 323 struct stg_softc *sc; 324 struct slccb *cb; 325 { 326 bus_space_tag_t iot = sc->sc_iot; 327 bus_space_handle_t ioh = sc->sc_ioh; 328 struct targ_info *ti = cb->ti; 329 register u_int8_t stat; 330 int s; 331 332 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000; 333 sc->sc_dataout_timeout = 0; 334 sc->sc_ubf_timeout = 0; 335 stghw_bcr_write_1(sc, BCTL_BUSFREE); 336 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 337 338 s = splhigh(); 339 stat = bus_space_read_1(iot, ioh, tmc_astat); 340 if ((stat & ASTAT_INT) != 0) 341 { 342 splx(s); 343 return SCSI_LOW_START_FAIL; 344 } 345 346 bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit); 347 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT); 348 splx(s); 349 350 SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART); 351 return SCSI_LOW_START_OK; 352 } 353 354 static int 355 stg_world_start(sc, fdone) 356 struct stg_softc *sc; 357 int fdone; 358 { 359 struct scsi_low_softc *slp = &sc->sc_sclow; 360 int error; 361 362 if ((slp->sl_cfgflags & CFG_NOPARITY) == 0) 363 sc->sc_fcRinit |= FCTL_PARENB; 364 else 365 sc->sc_fcRinit &= ~FCTL_PARENB; 366 367 if ((error = stghw_check(sc)) != 0) 368 return error; 369 370 stghw_init(sc); 371 scsi_low_bus_reset(slp); 372 stghw_init(sc); 373 374 SOFT_INTR_REQUIRED(slp); 375 return 0; 376 } 377 378 static int 379 stg_msg(sc, ti, msg) 380 struct stg_softc *sc; 381 struct targ_info *ti; 382 u_int msg; 383 { 384 bus_space_tag_t iot = sc->sc_iot; 385 bus_space_handle_t ioh = sc->sc_ioh; 386 struct stg_targ_info *sti = (void *) ti; 387 u_int period, offset; 388 389 if ((msg & SCSI_LOW_MSG_WIDE) != 0) 390 { 391 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8) 392 { 393 ti->ti_width = SCSI_LOW_BUS_WIDTH_8; 394 return EINVAL; 395 } 396 return 0; 397 } 398 399 if ((msg & SCSI_LOW_MSG_SYNCH) == 0) 400 return 0; 401 402 period = ti->ti_maxsynch.period; 403 offset = ti->ti_maxsynch.offset; 404 period = period << 2; 405 if (period >= 200) 406 { 407 sti->sti_reg_synch = (period - 200) / 50; 408 if (period % 50) 409 sti->sti_reg_synch ++; 410 sti->sti_reg_synch |= SSCTL_SYNCHEN; 411 } 412 else if (period >= 100) 413 { 414 sti->sti_reg_synch = (period - 100) / 50; 415 if (period % 50) 416 sti->sti_reg_synch ++; 417 sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN; 418 } 419 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch); 420 return 0; 421 } 422 423 /************************************************************** 424 * General probe attach 425 **************************************************************/ 426 int 427 stgprobesubr(iot, ioh, dvcfg) 428 bus_space_tag_t iot; 429 bus_space_handle_t ioh; 430 u_int dvcfg; 431 { 432 u_int16_t lsb, msb; 433 434 lsb = bus_space_read_1(iot, ioh, tmc_idlsb); 435 msb = bus_space_read_1(iot, ioh, tmc_idmsb); 436 switch (msb << 8 | lsb) 437 { 438 default: 439 return 0; 440 case 0x6127: 441 /* not support! */ 442 return 0; 443 case 0x60e9: 444 return 1; 445 } 446 return 0; 447 } 448 449 int 450 stgprint(aux, name) 451 void *aux; 452 const char *name; 453 { 454 455 if (name != NULL) 456 printf("%s: scsibus ", name); 457 return UNCONF; 458 } 459 460 void 461 stgattachsubr(sc) 462 struct stg_softc *sc; 463 { 464 struct scsi_low_softc *slp = &sc->sc_sclow; 465 466 printf("\n"); 467 468 sc->sc_idbit = (1 << slp->sl_hostid); 469 slp->sl_funcs = &stgfuncs; 470 sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */ 471 472 slp->sl_flags |= HW_READ_PADDING; 473 slp->sl_cfgflags |= CFG_ASYNC; /* XXX */ 474 475 (void) scsi_low_attach(slp, 0, STG_NTARGETS, STG_NLUNS, 476 sizeof(struct stg_targ_info), 0); 477 } 478 479 /************************************************************** 480 * PDMA functions 481 **************************************************************/ 482 static __inline void 483 stg_pdma_end(sc, ti) 484 struct stg_softc *sc; 485 struct targ_info *ti; 486 { 487 struct scsi_low_softc *slp = &sc->sc_sclow; 488 bus_space_tag_t iot = sc->sc_iot; 489 bus_space_handle_t ioh = sc->sc_ioh; 490 struct slccb *cb = slp->sl_Qnexus; 491 u_int len, tres; 492 493 slp->sl_flags &= ~HW_PDMASTART; 494 sc->sc_icinit &= ~ICTL_FIFO; 495 sc->sc_dataout_timeout = 0; 496 497 if (cb == NULL) 498 { 499 slp->sl_error |= PDMAERR; 500 goto out; 501 } 502 503 if (ti->ti_phase == PH_DATA) 504 { 505 len = bus_space_read_2(iot, ioh, tmc_fdcnt); 506 if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE) 507 { 508 if (len != 0) 509 { 510 tres = len + slp->sl_scp.scp_datalen; 511 if (tres <= (u_int) cb->ccb_scp.scp_datalen) 512 { 513 slp->sl_scp.scp_data -= len; 514 slp->sl_scp.scp_datalen = tres; 515 } 516 else 517 { 518 slp->sl_error |= PDMAERR; 519 printf("%s len %x >= datalen %x\n", 520 slp->sl_xname, 521 len, slp->sl_scp.scp_datalen); 522 } 523 } 524 } 525 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ) 526 { 527 if (len != 0) 528 { 529 slp->sl_error |= PDMAERR; 530 printf("%s: len %x left in fifo\n", 531 slp->sl_xname, len); 532 } 533 } 534 scsi_low_data_finish(slp); 535 } 536 else 537 { 538 539 printf("%s data phase miss\n", slp->sl_xname); 540 slp->sl_error |= PDMAERR; 541 } 542 543 out: 544 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 545 } 546 547 static void 548 stg_pio_read(sc, ti, thold) 549 struct stg_softc *sc; 550 struct targ_info *ti; 551 u_int thold; 552 { 553 struct scsi_low_softc *slp = &sc->sc_sclow; 554 bus_space_tag_t iot = sc->sc_iot; 555 bus_space_handle_t ioh = sc->sc_ioh; 556 struct sc_p *sp = &slp->sl_scp; 557 int s, tout; 558 u_int res; 559 u_int8_t stat; 560 561 if ((slp->sl_flags & HW_PDMASTART) == 0) 562 { 563 bus_space_write_1(iot, ioh, tmc_fctl, 564 sc->sc_fcRinit | FCTL_FIFOEN); 565 slp->sl_flags |= HW_PDMASTART; 566 } 567 568 tout = sc->sc_tmaxcnt; 569 while (tout -- > 0) 570 { 571 if (thold > 0) 572 { 573 s = splhigh(); 574 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 575 if (res < thold) 576 { 577 bus_space_write_1(iot, ioh, tmc_ictl, 578 sc->sc_icinit); 579 splx(s); 580 break; 581 } 582 splx(s); 583 } 584 else 585 { 586 stat = bus_space_read_1(iot, ioh, tmc_bstat); 587 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 588 if (res == 0) 589 { 590 if ((stat & PHASE_MASK) != DATA_IN_PHASE) 591 break; 592 if (sp->scp_datalen <= 0) 593 break; 594 SCSI_LOW_DELAY(1); 595 continue; 596 } 597 } 598 599 /* The assumtion res != 0 is valid here */ 600 if (res > sp->scp_datalen) 601 { 602 if (res == (u_int) -1) 603 break; 604 605 slp->sl_error |= PDMAERR; 606 if ((slp->sl_flags & HW_READ_PADDING) == 0) 607 { 608 printf("%s: read padding required\n", 609 slp->sl_xname); 610 break; 611 } 612 613 sp->scp_datalen = 0; 614 if (res > STG_MAX_DATA_SIZE) 615 res = STG_MAX_DATA_SIZE; 616 while (res -- > 0) 617 { 618 (void) bus_space_read_1(iot, ioh, tmc_rfifo); 619 } 620 continue; 621 } 622 623 sp->scp_datalen -= res; 624 if (res & 1) 625 { 626 *sp->scp_data = bus_space_read_1(iot, ioh, tmc_rfifo); 627 sp->scp_data ++; 628 res --; 629 } 630 631 bus_space_read_multi_2(iot, ioh, tmc_rfifo, 632 (u_int16_t *) sp->scp_data, res >> 1); 633 sp->scp_data += res; 634 } 635 636 if (tout <= 0) 637 printf("%s: pio read timeout\n", slp->sl_xname); 638 } 639 640 static void 641 stg_pio_write(sc, ti, thold) 642 struct stg_softc *sc; 643 struct targ_info *ti; 644 u_int thold; 645 { 646 struct scsi_low_softc *slp = &sc->sc_sclow; 647 bus_space_tag_t iot = sc->sc_iot; 648 bus_space_handle_t ioh = sc->sc_ioh; 649 struct sc_p *sp = &slp->sl_scp; 650 u_int res; 651 int s, tout; 652 register u_int8_t stat; 653 654 if ((slp->sl_flags & HW_PDMASTART) == 0) 655 { 656 stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW; 657 bus_space_write_1(iot, ioh, tmc_fctl, stat | FCTL_CLRFIFO); 658 bus_space_write_1(iot, ioh, tmc_fctl, stat); 659 slp->sl_flags |= HW_PDMASTART; 660 } 661 662 tout = sc->sc_tmaxcnt; 663 while (tout -- > 0) 664 { 665 stat = bus_space_read_1(iot, ioh, tmc_bstat); 666 if ((stat & PHASE_MASK) != DATA_OUT_PHASE) 667 break; 668 669 if (sp->scp_datalen <= 0) 670 { 671 if (sc->sc_dataout_timeout == 0) 672 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ; 673 break; 674 } 675 676 if (thold > 0) 677 { 678 s = splhigh(); 679 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 680 if (res > thold) 681 { 682 bus_space_write_1(iot, ioh, tmc_ictl, 683 sc->sc_icinit); 684 splx(s); 685 break; 686 } 687 splx(s); 688 } 689 else 690 { 691 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 692 if (res > sc->sc_maxwsize / 2) 693 { 694 SCSI_LOW_DELAY(1); 695 continue; 696 } 697 } 698 699 if (res == (u_int) -1) 700 break; 701 res = sc->sc_maxwsize - res; 702 if (res > sp->scp_datalen) 703 res = sp->scp_datalen; 704 705 sp->scp_datalen -= res; 706 if ((res & 0x1) != 0) 707 { 708 bus_space_write_1(iot, ioh, tmc_wfifo, *sp->scp_data); 709 sp->scp_data ++; 710 res --; 711 } 712 713 bus_space_write_multi_2(iot, ioh, tmc_wfifo, 714 (u_int16_t *) sp->scp_data, res >> 1); 715 sp->scp_data += res; 716 } 717 718 if (tout <= 0) 719 printf("%s: pio write timeout\n", slp->sl_xname); 720 } 721 722 static int 723 stg_negate_signal(struct stg_softc *sc, u_int8_t mask, u_char *s) 724 { 725 struct scsi_low_softc *slp = &sc->sc_sclow; 726 bus_space_tag_t bst = sc->sc_iot; 727 bus_space_handle_t bsh = sc->sc_ioh; 728 int wc; 729 u_int8_t regv; 730 731 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++) 732 { 733 regv = bus_space_read_1(bst, bsh, tmc_bstat); 734 if (regv == (u_int8_t) -1) 735 return -1; 736 if ((regv & mask) == 0) 737 return 1; 738 739 SCSI_LOW_DELAY(STG_DELAY_INTERVAL); 740 } 741 742 printf("%s: %s stg_negate_signal timeout\n", slp->sl_xname, s); 743 return -1; 744 } 745 746 static int 747 stg_expect_signal(struct stg_softc *sc, u_int8_t phase, u_int8_t mask) 748 { 749 struct scsi_low_softc *slp = &sc->sc_sclow; 750 bus_space_tag_t bst = sc->sc_iot; 751 bus_space_handle_t bsh = sc->sc_ioh; 752 int wc; 753 u_int8_t ph; 754 755 phase &= PHASE_MASK; 756 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++) 757 { 758 ph = bus_space_read_1(bst, bsh, tmc_bstat); 759 if (ph == (u_int8_t) -1) 760 return -1; 761 if ((ph & PHASE_MASK) != phase) 762 return 0; 763 if ((ph & mask) != 0) 764 return 1; 765 766 SCSI_LOW_DELAY(STG_DELAY_INTERVAL); 767 } 768 769 printf("%s: stg_expect_signal timeout\n", slp->sl_xname); 770 return -1; 771 } 772 773 static int 774 stg_xfer(sc, buf, len, phase, clear_atn) 775 struct stg_softc *sc; 776 u_int8_t *buf; 777 int len; 778 int phase; 779 int clear_atn; 780 { 781 bus_space_tag_t iot = sc->sc_iot; 782 bus_space_handle_t ioh = sc->sc_ioh; 783 int rv, ptr; 784 785 if (phase & BSTAT_IO) 786 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 787 else 788 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit); 789 790 for (ptr = 0; len > 0; len --) 791 { 792 rv = stg_expect_signal(sc, phase, BSTAT_REQ); 793 if (rv <= 0) 794 goto bad; 795 796 if (len == 1 && clear_atn != 0) 797 { 798 sc->sc_busc &= ~BCTL_ATN; 799 stghw_bcr_write_1(sc, sc->sc_busc); 800 SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow); 801 } 802 803 if (phase & BSTAT_IO) 804 { 805 buf[ptr ++] = bus_space_read_1(iot, ioh, tmc_rdata); 806 } 807 else 808 { 809 bus_space_write_1(iot, ioh, tmc_wdata, buf[ptr ++]); 810 } 811 812 stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>"); 813 } 814 815 bad: 816 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 817 return len; 818 } 819 820 /************************************************************** 821 * disconnect & reselect (HW low) 822 **************************************************************/ 823 static int 824 stg_reselected(sc) 825 struct stg_softc *sc; 826 { 827 struct scsi_low_softc *slp = &sc->sc_sclow; 828 bus_space_tag_t iot = sc->sc_iot; 829 bus_space_handle_t ioh = sc->sc_ioh; 830 int tout; 831 u_int sid; 832 u_int8_t regv; 833 834 if (slp->sl_selid != NULL) 835 { 836 /* XXX: 837 * Selection vs Reselection conflicts. 838 */ 839 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 840 stghw_bcr_write_1(sc, BCTL_BUSFREE); 841 } 842 else if (slp->sl_Tnexus != NULL) 843 { 844 printf("%s: unexpected termination\n", slp->sl_xname); 845 stg_disconnected(sc, slp->sl_Tnexus); 846 } 847 848 /* XXX: 849 * We should ack the reselection as soon as possible, 850 * because the target would abort the current reselection seq 851 * due to reselection timeout. 852 */ 853 tout = STG_DELAY_SELECT_POLLING_MAX; 854 while (tout -- > 0) 855 { 856 regv = bus_space_read_1(iot, ioh, tmc_bstat); 857 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) == 858 (BSTAT_IO | BSTAT_SEL)) 859 { 860 SCSI_LOW_DELAY(1); 861 regv = bus_space_read_1(iot, ioh, tmc_bstat); 862 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) == 863 (BSTAT_IO | BSTAT_SEL)) 864 goto reselect_start; 865 } 866 SCSI_LOW_DELAY(1); 867 } 868 printf("%s: reselction timeout I\n", slp->sl_xname); 869 return EJUSTRETURN; 870 871 reselect_start: 872 sid = (u_int) bus_space_read_1(iot, ioh, tmc_scsiid); 873 if ((sid & sc->sc_idbit) == 0) 874 { 875 /* not us */ 876 return EJUSTRETURN; 877 } 878 879 bus_space_write_1(iot, ioh, tmc_fctl, 880 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT); 881 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 882 stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY); 883 884 while (tout -- > 0) 885 { 886 regv = bus_space_read_1(iot, ioh, tmc_bstat); 887 if ((regv & (BSTAT_SEL | BSTAT_BSY)) == BSTAT_BSY) 888 goto reselected; 889 SCSI_LOW_DELAY(1); 890 } 891 printf("%s: reselction timeout II\n", slp->sl_xname); 892 return EJUSTRETURN; 893 894 reselected: 895 sid &= ~sc->sc_idbit; 896 sid = ffs(sid) - 1; 897 if (scsi_low_reselected(slp, sid) == NULL) 898 return EJUSTRETURN; 899 900 #ifdef STG_STATICS 901 stg_statics.reselect ++; 902 #endif /* STG_STATICS */ 903 return EJUSTRETURN; 904 } 905 906 static int 907 stg_disconnected(sc, ti) 908 struct stg_softc *sc; 909 struct targ_info *ti; 910 { 911 struct scsi_low_softc *slp = &sc->sc_sclow; 912 bus_space_tag_t iot = sc->sc_iot; 913 bus_space_handle_t ioh = sc->sc_ioh; 914 915 /* clear bus status & fifo */ 916 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO); 917 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 918 stghw_bcr_write_1(sc, BCTL_BUSFREE); 919 sc->sc_icinit &= ~ICTL_FIFO; 920 sc->sc_busc &= ~BCTL_ATN; 921 sc->sc_dataout_timeout = 0; 922 sc->sc_ubf_timeout = 0; 923 924 #ifdef STG_STATICS 925 stg_statics.disconnect ++; 926 #endif /* STG_STATICS */ 927 scsi_low_disconnected(slp, ti); 928 return 1; 929 } 930 931 /************************************************************** 932 * SEQUENCER 933 **************************************************************/ 934 static int 935 stg_target_nexus_establish(sc) 936 struct stg_softc *sc; 937 { 938 struct scsi_low_softc *slp = &sc->sc_sclow; 939 bus_space_tag_t iot = sc->sc_iot; 940 bus_space_handle_t ioh = sc->sc_ioh; 941 struct targ_info *ti = slp->sl_Tnexus; 942 struct stg_targ_info *sti = (void *) ti; 943 944 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch); 945 if ((stg_io_control & STG_FIFO_INTERRUPTS) != 0) 946 { 947 sc->sc_icinit |= ICTL_FIFO; 948 } 949 return 0; 950 } 951 952 static int 953 stg_lun_nexus_establish(sc) 954 struct stg_softc *sc; 955 { 956 957 return 0; 958 } 959 960 static int 961 stg_ccb_nexus_establish(sc) 962 struct stg_softc *sc; 963 { 964 struct scsi_low_softc *slp = &sc->sc_sclow; 965 struct slccb *cb = slp->sl_Qnexus; 966 967 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000; 968 return 0; 969 } 970 971 #define STGHW_SELECT_INTERVAL 10 972 973 static int 974 stghw_select_targ_wait(sc, mu) 975 struct stg_softc *sc; 976 int mu; 977 { 978 bus_space_tag_t iot = sc->sc_iot; 979 bus_space_handle_t ioh = sc->sc_ioh; 980 981 mu = mu / STGHW_SELECT_INTERVAL; 982 while (mu -- > 0) 983 { 984 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) == 0) 985 { 986 SCSI_LOW_DELAY(STGHW_SELECT_INTERVAL); 987 continue; 988 } 989 SCSI_LOW_DELAY(1); 990 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) != 0) 991 { 992 return 0; 993 } 994 } 995 return ENXIO; 996 } 997 998 static void 999 stg_selection_done_and_expect_msgout(sc) 1000 struct stg_softc *sc; 1001 { 1002 struct scsi_low_softc *slp = &sc->sc_sclow; 1003 bus_space_tag_t iot = sc->sc_iot; 1004 bus_space_handle_t ioh = sc->sc_ioh; 1005 1006 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO); 1007 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1008 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc); 1009 SCSI_LOW_ASSERT_ATN(slp); 1010 } 1011 1012 int 1013 stgintr(arg) 1014 void *arg; 1015 { 1016 struct stg_softc *sc = arg; 1017 struct scsi_low_softc *slp = &sc->sc_sclow; 1018 bus_space_tag_t iot = sc->sc_iot; 1019 bus_space_handle_t ioh = sc->sc_ioh; 1020 struct targ_info *ti; 1021 struct physio_proc *pp; 1022 struct buf *bp; 1023 u_int derror, flags; 1024 int len, s; 1025 u_int8_t status, astatus, regv; 1026 1027 /******************************************* 1028 * interrupt check 1029 *******************************************/ 1030 if (slp->sl_flags & HW_INACTIVE) 1031 return 0; 1032 1033 astatus = bus_space_read_1(iot, ioh, tmc_astat); 1034 status = bus_space_read_1(iot, ioh, tmc_bstat); 1035 1036 if ((astatus & ASTAT_STATMASK) == 0 || astatus == (u_int8_t) -1) 1037 return 0; 1038 1039 bus_space_write_1(iot, ioh, tmc_ictl, 0); 1040 if (astatus & ASTAT_SCSIRST) 1041 { 1042 bus_space_write_1(iot, ioh, tmc_fctl, 1043 sc->sc_fcRinit | FCTL_CLRFIFO); 1044 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1045 bus_space_write_1(iot, ioh, tmc_ictl, 0); 1046 1047 scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT, 1048 "bus reset (power off?)"); 1049 return 1; 1050 } 1051 1052 /******************************************* 1053 * debug section 1054 *******************************************/ 1055 #ifdef STG_DEBUG 1056 if (stg_debug) 1057 { 1058 scsi_low_print(slp, NULL); 1059 printf("%s: st %x ist %x\n\n", slp->sl_xname, 1060 status, astatus); 1061 #ifdef KDB 1062 if (stg_debug > 1) 1063 SCSI_LOW_DEBUGGER("stg"); 1064 #endif /* KDB */ 1065 } 1066 #endif /* STG_DEBUG */ 1067 1068 /******************************************* 1069 * reselection & nexus 1070 *******************************************/ 1071 if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED) 1072 { 1073 if (stg_reselected(sc) == EJUSTRETURN) 1074 goto out; 1075 } 1076 1077 if ((ti = slp->sl_Tnexus) == NULL) 1078 return 0; 1079 1080 derror = 0; 1081 if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART && 1082 (sc->sc_fcRinit & FCTL_PARENB) != 0) 1083 { 1084 slp->sl_error |= PARITYERR; 1085 derror = SCSI_LOW_DATA_PE; 1086 if ((status & PHASE_MASK) == MESSAGE_IN_PHASE) 1087 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 0); 1088 else 1089 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1); 1090 } 1091 1092 /******************************************* 1093 * aribitration & selection 1094 *******************************************/ 1095 switch (ti->ti_phase) 1096 { 1097 case PH_ARBSTART: 1098 if ((astatus & ASTAT_ARBIT) == 0) 1099 { 1100 #ifdef STG_STATICS 1101 stg_statics.arbit_fail_0 ++; 1102 #endif /* STG_STATICS */ 1103 goto arb_fail; 1104 } 1105 1106 status = bus_space_read_1(iot, ioh, tmc_bstat); 1107 if ((status & BSTAT_IO) != 0) 1108 { 1109 /* XXX: 1110 * Selection vs Reselection conflicts. 1111 */ 1112 #ifdef STG_STATICS 1113 stg_statics.arbit_fail_1 ++; 1114 #endif /* STG_STATICS */ 1115 arb_fail: 1116 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1117 stghw_bcr_write_1(sc, BCTL_BUSFREE); 1118 scsi_low_arbit_fail(slp, slp->sl_Qnexus); 1119 goto out; 1120 } 1121 1122 /* 1123 * selection assert start. 1124 */ 1125 SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART); 1126 scsi_low_arbit_win(slp); 1127 1128 s = splhigh(); 1129 bus_space_write_1(iot, ioh, tmc_scsiid, 1130 sc->sc_idbit | (1 << ti->ti_id)); 1131 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL); 1132 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit); 1133 if ((stg_io_control & STG_WAIT_FOR_SELECT) != 0) 1134 { 1135 /* selection abort delay 200 + 100 micro sec */ 1136 if (stghw_select_targ_wait(sc, 300) == 0) 1137 { 1138 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED); 1139 stg_selection_done_and_expect_msgout(sc); 1140 } 1141 } 1142 splx(s); 1143 goto out; 1144 1145 case PH_SELSTART: 1146 if ((status & BSTAT_BSY) == 0) 1147 { 1148 /* selection timeout delay 250 ms */ 1149 if (stghw_select_targ_wait(sc, 250 * 1000) != 0) 1150 { 1151 stg_disconnected(sc, ti); 1152 goto out; 1153 } 1154 } 1155 1156 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED); 1157 stg_selection_done_and_expect_msgout(sc); 1158 goto out; 1159 1160 case PH_SELECTED: 1161 if ((status & BSTAT_REQ) == 0) 1162 goto out; 1163 stg_target_nexus_establish(sc); 1164 break; 1165 1166 case PH_RESEL: 1167 if ((status & BSTAT_REQ) == 0) 1168 goto out; 1169 1170 /* clear a busy line */ 1171 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1172 stghw_bcr_write_1(sc, sc->sc_busc); 1173 stg_target_nexus_establish(sc); 1174 if ((status & PHASE_MASK) != MESSAGE_IN_PHASE) 1175 { 1176 printf("%s: unexpected phase after reselect\n", 1177 slp->sl_xname); 1178 slp->sl_error |= FATALIO; 1179 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1); 1180 goto out; 1181 } 1182 break; 1183 } 1184 1185 /******************************************* 1186 * data phase 1187 *******************************************/ 1188 if ((slp->sl_flags & HW_PDMASTART) && STG_IS_PHASE_DATA(status) == 0) 1189 { 1190 if (slp->sl_scp.scp_direction == SCSI_LOW_READ) 1191 stg_pio_read(sc, ti, 0); 1192 1193 stg_pdma_end(sc, ti); 1194 } 1195 1196 /******************************************* 1197 * scsi seq 1198 *******************************************/ 1199 switch (status & PHASE_MASK) 1200 { 1201 case COMMAND_PHASE: 1202 if (stg_expect_signal(sc, COMMAND_PHASE, BSTAT_REQ) <= 0) 1203 break; 1204 1205 SCSI_LOW_SETUP_PHASE(ti, PH_CMD); 1206 if (scsi_low_cmd(slp, ti) != 0) 1207 { 1208 scsi_low_attention(slp); 1209 } 1210 1211 if (stg_xfer(sc, slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen, 1212 COMMAND_PHASE, 0) != 0) 1213 { 1214 printf("%s: CMDOUT short\n", slp->sl_xname); 1215 } 1216 break; 1217 1218 case DATA_OUT_PHASE: 1219 SCSI_LOW_SETUP_PHASE(ti, PH_DATA); 1220 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0) 1221 { 1222 scsi_low_attention(slp); 1223 } 1224 1225 pp = physio_proc_enter(bp); 1226 if ((sc->sc_icinit & ICTL_FIFO) != 0) 1227 stg_pio_write(sc, ti, sc->sc_wthold); 1228 else 1229 stg_pio_write(sc, ti, 0); 1230 physio_proc_leave(pp); 1231 break; 1232 1233 case DATA_IN_PHASE: 1234 SCSI_LOW_SETUP_PHASE(ti, PH_DATA); 1235 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0) 1236 { 1237 scsi_low_attention(slp); 1238 } 1239 1240 pp = physio_proc_enter(bp); 1241 if ((sc->sc_icinit & ICTL_FIFO) != 0) 1242 stg_pio_read(sc, ti, sc->sc_rthold); 1243 else 1244 stg_pio_read(sc, ti, 0); 1245 physio_proc_leave(pp); 1246 break; 1247 1248 case STATUS_PHASE: 1249 regv = stg_expect_signal(sc, STATUS_PHASE, BSTAT_REQ); 1250 if (regv <= 0) 1251 break; 1252 1253 SCSI_LOW_SETUP_PHASE(ti, PH_STAT); 1254 regv = bus_space_read_1(iot, ioh, tmc_sdna); 1255 if (scsi_low_statusin(slp, ti, regv | derror) != 0) 1256 { 1257 scsi_low_attention(slp); 1258 } 1259 if (regv != bus_space_read_1(iot, ioh, tmc_rdata)) 1260 { 1261 printf("%s: STATIN: data mismatch\n", slp->sl_xname); 1262 } 1263 stg_negate_signal(sc, BSTAT_ACK, "statin<ACK>"); 1264 break; 1265 1266 case MESSAGE_OUT_PHASE: 1267 if (stg_expect_signal(sc, MESSAGE_OUT_PHASE, BSTAT_REQ) <= 0) 1268 break; 1269 1270 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT); 1271 flags = (ti->ti_ophase != ti->ti_phase) ? 1272 SCSI_LOW_MSGOUT_INIT : 0; 1273 len = scsi_low_msgout(slp, ti, flags); 1274 1275 if (len > 1 && slp->sl_atten == 0) 1276 { 1277 scsi_low_attention(slp); 1278 } 1279 1280 if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE, 1281 slp->sl_clear_atten) != 0) 1282 { 1283 printf("%s: MSGOUT short\n", slp->sl_xname); 1284 } 1285 else 1286 { 1287 if (slp->sl_msgphase >= MSGPH_ABORT) 1288 { 1289 stg_disconnected(sc, ti); 1290 } 1291 } 1292 break; 1293 1294 case MESSAGE_IN_PHASE: 1295 /* confirm phase and req signal */ 1296 if (stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ) <= 0) 1297 break; 1298 1299 SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN); 1300 1301 /* read data with NOACK */ 1302 regv = bus_space_read_1(iot, ioh, tmc_sdna); 1303 1304 if (scsi_low_msgin(slp, ti, derror | regv) == 0) 1305 { 1306 if (scsi_low_is_msgout_continue(ti, 0) != 0) 1307 { 1308 scsi_low_attention(slp); 1309 } 1310 } 1311 1312 /* read data with ACK */ 1313 if (regv != bus_space_read_1(iot, ioh, tmc_rdata)) 1314 { 1315 printf("%s: MSGIN: data mismatch\n", slp->sl_xname); 1316 } 1317 1318 /* wait for the ack negated */ 1319 stg_negate_signal(sc, BSTAT_ACK, "msgin<ACK>"); 1320 1321 if (slp->sl_msgphase != 0 && slp->sl_msgphase < MSGPH_ABORT) 1322 { 1323 stg_disconnected(sc, ti); 1324 } 1325 break; 1326 1327 case BUSFREE_PHASE: 1328 printf("%s: unexpected disconnect\n", slp->sl_xname); 1329 stg_disconnected(sc, ti); 1330 break; 1331 1332 default: 1333 slp->sl_error |= FATALIO; 1334 printf("%s: unknown phase bus %x intr %x\n", 1335 slp->sl_xname, status, astatus); 1336 break; 1337 } 1338 1339 out: 1340 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 1341 return 1; 1342 } 1343 1344 static int 1345 stg_timeout(sc) 1346 struct stg_softc *sc; 1347 { 1348 struct scsi_low_softc *slp = &sc->sc_sclow; 1349 bus_space_tag_t iot = sc->sc_iot; 1350 bus_space_handle_t ioh = sc->sc_ioh; 1351 int tout, count; 1352 u_int8_t status; 1353 1354 if (slp->sl_Tnexus == NULL) 1355 return 0; 1356 1357 status = bus_space_read_1(iot, ioh, tmc_bstat); 1358 if ((status & PHASE_MASK) == 0) 1359 { 1360 if (sc->sc_ubf_timeout ++ == 0) 1361 return 0; 1362 1363 printf("%s: unexpected bus free detected\n", slp->sl_xname); 1364 slp->sl_error |= FATALIO; 1365 scsi_low_print(slp, slp->sl_Tnexus); 1366 stg_disconnected(sc, slp->sl_Tnexus); 1367 return 0; 1368 } 1369 1370 switch (status & PHASE_MASK) 1371 { 1372 case DATA_OUT_PHASE: 1373 if (sc->sc_dataout_timeout == 0) 1374 break; 1375 if ((status & BSTAT_REQ) == 0) 1376 break; 1377 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0) 1378 break; 1379 if ((-- sc->sc_dataout_timeout) > 0) 1380 break; 1381 1382 slp->sl_error |= PDMAERR; 1383 if ((slp->sl_flags & HW_WRITE_PADDING) == 0) 1384 { 1385 printf("%s: write padding required\n", 1386 slp->sl_xname); 1387 break; 1388 } 1389 1390 bus_space_write_1(iot, ioh, tmc_ictl, 0); 1391 1392 tout = STG_DELAY_MAX; 1393 while (tout --) 1394 { 1395 status = bus_space_read_1(iot, ioh, tmc_bstat); 1396 if ((status & PHASE_MASK) != DATA_OUT_PHASE) 1397 break; 1398 1399 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0) 1400 { 1401 SCSI_LOW_DELAY(1); 1402 continue; 1403 } 1404 1405 for (count = sc->sc_maxwsize; count > 0; count --) 1406 bus_space_write_1(iot, ioh, tmc_wfifo, 0); 1407 } 1408 1409 status = bus_space_read_1(iot, ioh, tmc_bstat); 1410 if ((status & PHASE_MASK) == DATA_OUT_PHASE) 1411 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ; 1412 1413 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 1414 break; 1415 1416 default: 1417 break; 1418 } 1419 return 0; 1420 }
Cache object: 92e054c4b810e50ee93ab200960709eb
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