The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/stg/tmc18c30var.h

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    1 /*      $FreeBSD: releng/12.0/sys/dev/stg/tmc18c30var.h 326255 2017-11-27 14:52:40Z pfg $       */
    2 /*      $NecBSD: tmc18c30var.h,v 1.12.18.2 2001/06/13 05:51:23 honda Exp $      */
    3 /*      $NetBSD$        */
    4 
    5 /*-
    6  * SPDX-License-Identifier: BSD-3-Clause
    7  *
    8  * [NetBSD for NEC PC-98 series]
    9  *  Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
   10  *      NetBSD/pc98 porting staff. All rights reserved.
   11  *  Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
   12  *      Naofumi HONDA. All rights reserved.
   13  *  Copyright (c) 1996, 1997, 1998
   14  *      Kouichi Matsuda. All rights reserved.
   15  * 
   16  *  Redistribution and use in source and binary forms, with or without
   17  *  modification, are permitted provided that the following conditions
   18  *  are met:
   19  *  1. Redistributions of source code must retain the above copyright
   20  *     notice, this list of conditions and the following disclaimer.
   21  *  2. Redistributions in binary form must reproduce the above copyright
   22  *     notice, this list of conditions and the following disclaimer in the
   23  *     documentation and/or other materials provided with the distribution.
   24  *  3. The name of the author may not be used to endorse or promote products
   25  *     derived from this software without specific prior written permission.
   26  * 
   27  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   28  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   29  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   30  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
   31  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   32  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   33  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
   35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
   36  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  * POSSIBILITY OF SUCH DAMAGE.
   38  */
   39 
   40 #ifndef _TMC18C30VAR_H_
   41 #define _TMC18C30VAR_H_
   42 
   43 /*****************************************************************
   44  * Host adapter structure
   45  *****************************************************************/
   46 struct stg_softc {
   47         struct scsi_low_softc sc_sclow; /* generic data */
   48 
   49         int port_rid;
   50         int irq_rid;
   51         int mem_rid;
   52         struct resource *port_res;
   53         struct resource *irq_res;
   54         struct resource *mem_res;
   55 
   56         void *stg_intrhand;
   57 
   58         int sc_tmaxcnt;
   59         u_int sc_chip;                  /* chip type */
   60         u_int sc_fsz;                   /* fifo size */
   61         u_int sc_idbit;                 /* host id bit */
   62         u_int sc_wthold;                /* write thread */
   63         u_int sc_rthold;                /* read thread */
   64         u_int sc_maxwsize;              /* max write size */
   65         int sc_dataout_timeout;         /* data out timeout counter */
   66         int sc_ubf_timeout;             /* unexpected bus free timeout */
   67 
   68         u_int8_t sc_fcWinit;            /* write flags */
   69         u_int8_t sc_fcRinit;            /* read flags */
   70 
   71         u_int8_t sc_icinit;             /* interrupt masks */
   72         u_int8_t sc_busc;               /* default bus control register */
   73         u_int8_t sc_imsg;               /* identify msg required */
   74         u_int8_t sc_busimg;             /* bus control register image */
   75 };
   76 
   77 /*****************************************************************
   78  * Lun information 
   79  *****************************************************************/
   80 struct stg_targ_info {
   81         struct targ_info sti_ti;                /* generic data */
   82 
   83         u_int8_t sti_reg_synch;         /* synch register per lun */
   84 };
   85 
   86 /*****************************************************************
   87  * Proto
   88  *****************************************************************/
   89 int stgprobesubr(struct resource *, u_int);
   90 void stgattachsubr(struct stg_softc *);
   91 int stgintr(void *);
   92 
   93 #endif  /* !_TMC18C30VAR_H_ */

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