px.c

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    1 /*      $NetBSD: px.c,v 1.21.2.1 2005/03/16 19:52:30 tron Exp $ */
    2 
    3 /*-
    4  * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Andrew Doran.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *      This product includes software developed by the NetBSD
   21  *      Foundation, Inc. and its contributors.
   22  * 4. Neither the name of The NetBSD Foundation nor the names of its
   23  *    contributors may be used to endorse or promote products derived
   24  *    from this software without specific prior written permission.
   25  *
   26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   36  * POSSIBILITY OF SUCH DAMAGE.
   37  */
   38 
   39 /*
   40  * Driver for DEC PixelStamp graphics adapters (PMAG-C).
   41  */
   42 
   43 #include <sys/cdefs.h>
   44 __KERNEL_RCSID(0, "$NetBSD: px.c,v 1.21.2.1 2005/03/16 19:52:30 tron Exp $");
   45 
   46 #include <sys/param.h>
   47 #include <sys/systm.h>
   48 #include <sys/device.h>
   49 #include <sys/malloc.h>
   50 #include <sys/callout.h>
   51 
   52 #include <uvm/uvm_extern.h>
   53 
   54 #if defined(pmax)
   55 #include <mips/cpuregs.h>
   56 #elif defined(alpha)
   57 #include <alpha/alpha_cpu.h>
   58 #endif
   59 
   60 #include <machine/autoconf.h>
   61 #include <machine/cpu.h>
   62 #include <machine/bus.h>
   63 
   64 #include <dev/cons.h>
   65 
   66 #include <dev/wscons/wsconsio.h>
   67 #include <dev/wscons/wsdisplayvar.h>
   68 
   69 #include <dev/ic/bt459reg.h>
   70 
   71 #include <dev/tc/tcvar.h>
   72 #include <dev/tc/sticreg.h>
   73 #include <dev/tc/sticio.h>
   74 #include <dev/tc/sticvar.h>
   75 
   76 #define PX_STIC_POLL_OFFSET     0x000000        /* STIC DMA poll space */
   77 #define PX_STAMP_OFFSET         0x0c0000        /* pixelstamp space on STIC */
   78 #define PX_STIC_OFFSET          0x180000        /* STIC registers */
   79 #define PX_VDAC_OFFSET          0x200000        /* VDAC registers (bt459) */
   80 #define PX_VDAC_RESET_OFFSET    0x300000        /* VDAC reset register */
   81 #define PX_ROM_OFFSET           0x300000        /* ROM code */
   82 
   83 #define PX_BUF_COUNT            16
   84 #define PX_BUF_INC(x)           ((x + 1) & (PX_BUF_COUNT - 1))
   85 
   86 /*
   87  * We need enough aligned memory to hold:
   88  *
   89  * - Xserver communication area (4096 bytes)
   90  * - 16 packet buffers (4096 bytes each)
   91  * - 2 image buffers (5120 bytes each)
   92  *
   93  */
   94 #define PX_BUF_SIZE             \
   95     (STIC_PACKET_SIZE * PX_BUF_COUNT + STIC_IMGBUF_SIZE*2 + STIC_XCOMM_SIZE)
   96 #define PX_BUF_ALIGN            32768
   97 
   98 #define PXF_QUEUE       0x01
   99 
  100 void    px_attach(struct device *, struct device *, void *);
  101 void    px_init(struct stic_info *, int);
  102 int     px_ioctl(struct stic_info *, u_long, caddr_t, int, struct proc *);
  103 int     px_match(struct device *, struct cfdata *, void *);
  104 
  105 int     px_intr(void *);
  106 u_int32_t       *px_pbuf_get(struct stic_info *);
  107 int     px_pbuf_post(struct stic_info *, u_int32_t *);
  108 
  109 void    px_cnattach(tc_addr_t);
  110 
  111 struct px_softc {
  112         struct  device px_dv;
  113         struct  stic_info *px_si;
  114         volatile u_int32_t      *px_qpoll[PX_BUF_COUNT];
  115 };
  116 
  117 CFATTACH_DECL(px, sizeof(struct px_softc),
  118     px_match, px_attach, NULL, NULL);
  119 
  120 int
  121 px_match(struct device *parent, struct cfdata *match, void *aux)
  122 {
  123         struct tc_attach_args *ta;
  124 
  125         ta = aux;
  126 
  127         return (strncmp("PMAG-CA ", ta->ta_modname, TC_ROM_LLEN) == 0);
  128 }
  129 
  130 void
  131 px_attach(struct device *parent, struct device *self, void *aux)
  132 {
  133         struct stic_info *si;
  134         struct tc_attach_args *ta;
  135         struct px_softc *px;
  136         int console, i;
  137         u_long v;
  138 
  139         px = (struct px_softc *)self;
  140         ta = (struct tc_attach_args *)aux;
  141 
  142         if (ta->ta_addr == stic_consinfo.si_slotbase) {
  143                 si = &stic_consinfo;
  144                 console = 1;
  145         } else {
  146                 if (stic_consinfo.si_slotbase == 0)
  147                         si = &stic_consinfo;
  148                 else {
  149                         si = malloc(sizeof(*si), M_DEVBUF, M_NOWAIT|M_ZERO);
  150                 }
  151                 si->si_slotbase = ta->ta_addr;
  152                 px_init(si, 0);
  153                 console = 0;
  154         }
  155 
  156         px->px_si = si;
  157         si->si_dv = self;
  158         tc_intr_establish(parent, ta->ta_cookie, IPL_TTY, px_intr, si);
  159 
  160         printf(": 8 plane, %dx%d stamp\n", si->si_stampw, si->si_stamph);
  161 
  162         for (i = 0; i < PX_BUF_COUNT; i++) {
  163                 v = i * STIC_PACKET_SIZE +
  164                     si->si_buf_phys + STIC_XCOMM_SIZE;
  165                 v = ((v & 0xffff8000) << 3) | (v & 0x7fff);
  166                 px->px_qpoll[i] = (volatile u_int32_t *)
  167                     ((caddr_t)si->si_slotbase + (v >> 9));
  168         }
  169 
  170         stic_attach(self, si, console);
  171 }
  172 
  173 void
  174 px_cnattach(tc_addr_t addr)
  175 {
  176         struct stic_info *si;
  177 
  178         si = &stic_consinfo;
  179         si->si_slotbase = addr;
  180         px_init(si, 1);
  181         stic_cnattach(si);
  182 }
  183 
  184 void
  185 px_init(struct stic_info *si, int bootstrap)
  186 {
  187         struct pglist pglist;
  188         caddr_t kva, bva;
  189         paddr_t bpa;
  190 
  191         kva = (caddr_t)si->si_slotbase;
  192 
  193         /*
  194          * Allocate memory for the packet buffers.  It must be located below
  195          * 8MB, since the STIC can't access outside that region.  Also, due
  196          * to the holes in STIC address space, each buffer mustn't cross a
  197          * 32kB boundary.
  198          */
  199         if (bootstrap) {
  200                 /* 
  201                  * UVM won't be initialised at this point, so grab memory
  202                  * directly from vm_physmem[].
  203                  */
  204                 bva = (caddr_t)uvm_pageboot_alloc(PX_BUF_SIZE + PX_BUF_ALIGN);
  205                 bpa = (STIC_KSEG_TO_PHYS(bva) + PX_BUF_ALIGN - 1) &
  206                     ~(PX_BUF_ALIGN - 1);
  207                 if (bpa + PX_BUF_SIZE > 8192*1024)
  208                         panic("px_init: allocation out of bounds");
  209         } else {
  210                 if (uvm_pglistalloc(PX_BUF_SIZE, 0, 8192*1024, PX_BUF_ALIGN,
  211                     0, &pglist, 1, 0) != 0)
  212                         panic("px_init: allocation failure");
  213                 bpa = TAILQ_FIRST(&pglist)->phys_addr;
  214         }
  215 
  216         si->si_vdac = (u_int32_t *)(kva + PX_VDAC_OFFSET);
  217         si->si_vdac_reset = (u_int32_t *)(kva + PX_VDAC_RESET_OFFSET);
  218         si->si_stic = (volatile struct stic_regs *)(kva + PX_STIC_OFFSET);
  219         si->si_stamp = (u_int32_t *)(kva + PX_STAMP_OFFSET);
  220         si->si_buf = (u_int32_t *)TC_PHYS_TO_UNCACHED(bpa);
  221         si->si_buf_phys = bpa;
  222         si->si_buf_size = PX_BUF_SIZE;
  223         si->si_disptype = WSDISPLAY_TYPE_PX;
  224         si->si_depth = 8;
  225         si->si_sxc = (volatile struct stic_xcomm *)si->si_buf;
  226 
  227         si->si_pbuf_get = px_pbuf_get;
  228         si->si_pbuf_post = px_pbuf_post;
  229         si->si_ioctl = px_ioctl;
  230 
  231         memset(si->si_buf, 0, PX_BUF_SIZE);
  232 
  233         stic_init(si);
  234 }
  235 
  236 int
  237 px_intr(void *cookie)
  238 {
  239         volatile struct stic_regs *sr;
  240         volatile struct stic_xcomm *sxc;
  241         struct stic_info *si;
  242         struct px_softc *px;
  243         int state;
  244 
  245         si = cookie;
  246         px = (struct px_softc *)si->si_dv;
  247         sr = si->si_stic;
  248         state = sr->sr_ipdvint;
  249         sxc = si->si_sxc;
  250 
  251         /*
  252          * Vertical-retrace condition.
  253          *
  254          * Clear the flag and flush out any waiting VDAC updates.  We do
  255          * this at retrace time to avoid producing `shearing' and other
  256          * nasty artifacts.
  257          */      
  258         if ((state & STIC_INT_V) != 0) {
  259                 sr->sr_ipdvint = STIC_INT_V_WE | STIC_INT_V_EN;
  260                 tc_wmb();
  261                 stic_flush(si);
  262         }
  263 
  264         /*
  265          * Error condition.
  266          *
  267          * Simply clear the flag and report the error.
  268          */
  269         if ((state & STIC_INT_E) != 0) {
  270                 printf("%s: error intr, %x %x %x %x %x", px->px_dv.dv_xname,
  271                     sr->sr_ipdvint, sr->sr_sticsr, sr->sr_buscsr,
  272                     sr->sr_busadr, sr->sr_busdat);
  273                 sr->sr_ipdvint = STIC_INT_E_WE | STIC_INT_E_EN;
  274                 tc_wmb();
  275         }
  276 
  277         /*
  278          * Check for queue stalls.
  279          */
  280         if (sxc->sxc_tail != sxc->sxc_head && !sxc->sxc_busy)
  281                 state |= STIC_INT_P;
  282 
  283         /*
  284          * Packet-done condition.
  285          *
  286          * If packet queueing is enabled, clear the condition, and increment
  287          * the tail (submitted) pointer.
  288          */
  289         if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P) != 0) {
  290                 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN;
  291                 tc_wmb();
  292 
  293                 if (sxc->sxc_tail != sxc->sxc_head) {
  294                         sxc->sxc_done[sxc->sxc_tail] = 0;
  295                         sxc->sxc_tail = PX_BUF_INC(sxc->sxc_tail);
  296                 }
  297 
  298                 if (sxc->sxc_tail != sxc->sxc_head) {
  299                         if (*px->px_qpoll[sxc->sxc_tail] != STAMP_OK) {
  300                                 sxc->sxc_nreject++;
  301                                 sxc->sxc_busy = 0;
  302                         } else
  303                                 sxc->sxc_busy = 1;
  304                 } else
  305                         sxc->sxc_busy = 0;
  306         }
  307 
  308         if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P_EN) == 0)
  309                 printf("px_intr: STIC_INT_P_EN == 0\n");
  310 
  311         return (1);
  312 }
  313 
  314 u_int32_t *
  315 px_pbuf_get(struct stic_info *si)
  316 {
  317         u_long off;
  318 
  319         si->si_pbuf_select ^= STIC_PACKET_SIZE;
  320         off = si->si_pbuf_select + STIC_XCOMM_SIZE;
  321         return ((u_int32_t *)((caddr_t)si->si_buf + off));
  322 }
  323 
  324 int
  325 px_pbuf_post(struct stic_info *si, u_int32_t *buf)
  326 {
  327         volatile u_int32_t *poll, junk;
  328         volatile struct stic_regs *sr;
  329         u_long v;
  330         int c;
  331 
  332         sr = si->si_stic;
  333 
  334         /* Get address of poll register for this buffer. */
  335         v = (u_long)STIC_KSEG_TO_PHYS(buf);
  336         v = ((v & 0xffff8000) << 3) | (v & 0x7fff);
  337         poll = (volatile u_int32_t *)((caddr_t)si->si_slotbase + (v >> 9));
  338 
  339         /*
  340          * Read the poll register and make sure the stamp wants to accept
  341          * our packet.  This read will initiate the DMA.  Don't wait for
  342          * ever, just in case something's wrong.
  343          */
  344         tc_mb();
  345 
  346         for (c = STAMP_RETRIES; c != 0; c--) {
  347                 if ((sr->sr_ipdvint & STIC_INT_P) != 0) {
  348                         sr->sr_ipdvint = STIC_INT_P_WE;
  349                         tc_wmb();
  350                         junk = *poll;
  351                         return (0);
  352                 }
  353                 DELAY(STAMP_DELAY);
  354         }
  355 
  356         /* STIC has lost the plot, punish it. */
  357         stic_reset(si);
  358         return (-1);
  359 }
  360 
  361 int
  362 px_ioctl(struct stic_info *si, u_long cmd, caddr_t data, int flag,
  363          struct proc *p)
  364 {
  365         volatile struct stic_xcomm *sxc;
  366         volatile struct stic_regs *sr;
  367         struct stic_xinfo *sxi;
  368         int rv, s;
  369 
  370         sr = si->si_stic;
  371 
  372         switch (cmd) {
  373         case STICIO_STARTQ:
  374                 if (si->si_dispmode != WSDISPLAYIO_MODE_MAPPED ||
  375                     (si->si_hwflags & PXF_QUEUE) != 0) {
  376                         rv = EBUSY;
  377                         break;
  378                 }
  379 
  380                 sxc = si->si_sxc;
  381                 memset((void *)sxc->sxc_done, 0, sizeof(sxc->sxc_done));
  382                 sxc->sxc_head = 0;
  383                 sxc->sxc_tail = 0;
  384                 sxc->sxc_nreject = 0;
  385                 sxc->sxc_nstall = 0;
  386 
  387                 s = spltty();
  388                 si->si_hwflags |= PXF_QUEUE;
  389                 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN;
  390                 tc_wmb();
  391                 splx(s);
  392 
  393                 rv = 0;
  394                 break;
  395 
  396         case STICIO_STOPQ:
  397                 s = spltty();
  398                 si->si_hwflags &= ~PXF_QUEUE;
  399                 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P;
  400                 tc_wmb();
  401                 splx(s);
  402                 rv = 0;
  403                 break;
  404 
  405         case STICIO_GXINFO:
  406                 sxi = (struct stic_xinfo *)data;
  407                 sxi->sxi_unit = si->si_unit;
  408                 sxi->sxi_stampw = si->si_stampw;
  409                 sxi->sxi_stamph = si->si_stamph;
  410                 sxi->sxi_buf_size = si->si_buf_size;
  411                 sxi->sxi_buf_phys = (u_int)si->si_buf_phys;
  412                 sxi->sxi_buf_pktoff = STIC_XCOMM_SIZE;
  413                 sxi->sxi_buf_pktcnt = PX_BUF_COUNT;
  414                 sxi->sxi_buf_imgoff =
  415                     STIC_XCOMM_SIZE + STIC_PACKET_SIZE * PX_BUF_COUNT;
  416                 rv = 0;
  417                 break;
  418 
  419         default:
  420                 rv = EPASSTHROUGH;
  421                 break;
  422         }
  423 
  424         return (rv);
  425 }
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FreeBSD/Linux Kernel Cross Reference sys/dev/tc/px.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/tc/px.c
