The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/twa/tw_cl_share.h

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    1 /*
    2  * Copyright (c) 2004-07 Applied Micro Circuits Corporation.
    3  * Copyright (c) 2004-05 Vinod Kashyap
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  *      $FreeBSD: releng/6.3/sys/dev/twa/tw_cl_share.h 173048 2007-10-26 23:51:46Z scottl $
   28  */
   29 
   30 /*
   31  * AMCC'S 3ware driver for 9000 series storage controllers.
   32  *
   33  * Author: Vinod Kashyap
   34  * Modifications by: Adam Radford
   35  */
   36 
   37 
   38 
   39 #ifndef TW_CL_SHARE_H
   40 
   41 #define TW_CL_SHARE_H
   42 
   43 
   44 /*
   45  * Macros, structures and functions shared between OSL and CL,
   46  * and defined by CL.
   47  */
   48 
   49 #define TW_CL_NULL                      ((TW_VOID *)0)
   50 #define TW_CL_TRUE                      1
   51 #define TW_CL_FALSE                     0
   52 
   53 #define TW_CL_VENDOR_ID                 0x13C1  /* 3ware vendor id */
   54 #define TW_CL_DEVICE_ID_9K              0x1002  /* 9000 PCI series device id */
   55 #define TW_CL_DEVICE_ID_9K_X            0x1003  /* 9000 PCI-X series device id */
   56 #define TW_CL_DEVICE_ID_9K_E            0x1004  /* 9000 PCIe series device id */
   57 #define TW_CL_DEVICE_ID_9K_SA           0x1005  /* 9000 PCIe SAS series device id */
   58 #define TW_CL_BAR_TYPE_IO               1       /* I/O base address */
   59 #define TW_CL_BAR_TYPE_MEM              2       /* memory base address */
   60 #define TW_CL_BAR_TYPE_SBUF             3       /* SBUF base address */
   61 
   62 #ifdef TW_OSL_ENCLOSURE_SUPPORT
   63 #define TW_CL_MAX_NUM_UNITS             65      /* max # of units we support
   64                                                 -- enclosure target id is 64 */
   65 #else /* TW_OSL_ENCLOSURE_SUPPORT */
   66 #define TW_CL_MAX_NUM_UNITS             32      /* max # of units we support */
   67 #endif /* TW_OSL_ENCLOSURE_SUPPORT */
   68 
   69 #define TW_CL_MAX_NUM_LUNS              16      /* max # of LUN's we support */
   70 #define TW_CL_MAX_IO_SIZE               0x20000 /* 128K */
   71 
   72 /*
   73  * Though we can support 256 simultaneous requests, we advertise as capable
   74  * of supporting only 255, since we want to keep one CL internal request
   75  * context packet always available for internal requests.
   76  */
   77 #define TW_CL_MAX_SIMULTANEOUS_REQUESTS 0xFF    /* max simult reqs supported */
   78 
   79 #define TW_CL_MAX_32BIT_SG_ELEMENTS     109     /* max 32-bit sg elements */
   80 #define TW_CL_MAX_64BIT_SG_ELEMENTS     72      /* max 64-bit sg elements */
   81 
   82 
   83 /* Possible values of ctlr->flags */
   84 #define TW_CL_64BIT_ADDRESSES   (1<<0) /* 64 bit cmdpkt & SG addresses */
   85 #define TW_CL_64BIT_SG_LENGTH   (1<<1) /* 64 bit SG length */
   86 #define TW_CL_START_CTLR_ONLY   (1<<2) /* Start ctlr only */
   87 #define TW_CL_STOP_CTLR_ONLY    (1<<3) /* Stop ctlr only */
   88 #define TW_CL_DEFERRED_INTR_USED (1<<5) /* OS Layer uses deferred intr */
   89 
   90 /* Possible error values from the Common Layer. */
   91 #define TW_CL_ERR_REQ_SUCCESS                   0
   92 #define TW_CL_ERR_REQ_GENERAL_FAILURE           (1<<0)
   93 #define TW_CL_ERR_REQ_INVALID_TARGET            (1<<1)
   94 #define TW_CL_ERR_REQ_INVALID_LUN               (1<<2)
   95 #define TW_CL_ERR_REQ_SCSI_ERROR                (1<<3)
   96 #define TW_CL_ERR_REQ_AUTO_SENSE_VALID          (1<<4)
   97 #define TW_CL_ERR_REQ_BUS_RESET                 (1<<5)
   98 #define TW_CL_ERR_REQ_UNABLE_TO_SUBMIT_COMMAND  (1<<6)
   99 
  100 
  101 /* Possible values of req_pkt->flags */
  102 #define TW_CL_REQ_RETRY_ON_BUSY         (1<<0)
  103 #define TW_CL_REQ_CALLBACK_FOR_SGLIST   (1<<1)
  104 
  105 
  106 #define TW_CL_MESSAGE_SOURCE_CONTROLLER_ERROR   3
  107 #define TW_CL_MESSAGE_SOURCE_CONTROLLER_EVENT   4
  108 #define TW_CL_MESSAGE_SOURCE_COMMON_LAYER_ERROR 21
  109 #define TW_CL_MESSAGE_SOURCE_COMMON_LAYER_EVENT 22
  110 #define TW_CL_MESSAGE_SOURCE_FREEBSD_DRIVER     5
  111 #define TW_CL_MESSAGE_SOURCE_FREEBSD_OS         8
  112 #define TW_CL_MESSAGE_SOURCE_WINDOWS_DRIVER     7
  113 #define TW_CL_MESSAGE_SOURCE_WINDOWS_OS         10
  114 
  115 #define TW_CL_SEVERITY_ERROR            0x1
  116 #define TW_CL_SEVERITY_WARNING          0x2
  117 #define TW_CL_SEVERITY_INFO             0x3
  118 #define TW_CL_SEVERITY_DEBUG            0x4
  119 
  120 #define TW_CL_SEVERITY_ERROR_STRING     "ERROR"
  121 #define TW_CL_SEVERITY_WARNING_STRING   "WARNING"
  122 #define TW_CL_SEVERITY_INFO_STRING      "INFO"
  123 #define TW_CL_SEVERITY_DEBUG_STRING     "DEBUG"
  124 
  125 
  126 #pragma pack(1)
  127 
  128 /*
  129  * Structure, a pointer to which is used as the controller handle in
  130  * communications between the OS Layer and the Common Layer.
  131  */
  132 struct tw_cl_ctlr_handle {
  133         TW_VOID *osl_ctlr_ctxt; /* OSL's ctlr context */
  134         TW_VOID *cl_ctlr_ctxt;  /* CL's ctlr context */
  135 };
  136 
  137 
  138 /*
  139  * Structure, a pointer to which is used as the request handle in
  140  * communications between the OS Layer and the Common Layer.
  141  */
  142 struct tw_cl_req_handle {
  143         TW_VOID *osl_req_ctxt;  /* OSL's request context */
  144         TW_VOID *cl_req_ctxt;   /* CL's request context */
  145 };
  146 
  147 
  148 /* Structure used to describe SCSI requests to CL. */
  149 struct tw_cl_scsi_req_packet {
  150         TW_UINT32       unit;           /* unit # to send cmd to */
  151         TW_UINT32       lun;            /* LUN to send cmd to */
  152         TW_UINT8        *cdb;           /* ptr to SCSI cdb */
  153         TW_UINT32       cdb_len;        /* # of valid cdb bytes */
  154         TW_UINT32       sense_len;      /* # of bytes of valid sense info */
  155         TW_UINT8        *sense_data;    /* ptr to sense data, if any */
  156         TW_UINT32       scsi_status;    /* SCSI status returned by fw */
  157         TW_UINT32       sgl_entries;    /* # of SG descriptors */
  158         TW_UINT8        *sg_list;       /* ptr to SG list */
  159 };
  160 
  161 
  162 /* Structure used to describe pass through command packets to CL. */
  163 struct tw_cl_passthru_req_packet {
  164         TW_UINT8        *cmd_pkt;       /* ptr to passthru cmd pkt */
  165         TW_UINT32       cmd_pkt_length; /* size of cmd pkt */
  166         TW_UINT32       sgl_entries;    /* # of SG descriptors */
  167         TW_UINT8        *sg_list;       /* ptr to SG list */
  168 };
  169 
  170 
  171 /* Request packet submitted to the Common Layer, by the OS Layer. */
  172 struct tw_cl_req_packet {
  173         TW_UINT32       cmd;            /* Common Layer cmd */
  174         TW_UINT32       flags;          /* flags describing request */
  175         TW_UINT32       status;         /* Common Layer returned status */
  176         TW_VOID         (*tw_osl_callback)(struct tw_cl_req_handle *req_handle);
  177                         /* OSL routine to be called by CL on req completion */
  178         TW_VOID         (*tw_osl_sgl_callback)(
  179                         struct tw_cl_req_handle *req_handle, TW_VOID *sg_list,
  180                         TW_UINT32 *num_sgl_entries);
  181                         /* OSL callback to get SG list. */
  182 
  183         union {
  184                 struct tw_cl_scsi_req_packet            scsi_req; /* SCSI req */
  185                 struct tw_cl_passthru_req_packet        pt_req;/*Passthru req*/
  186         } gen_req_pkt;
  187 };
  188 
  189 
  190 /*
  191  * Packet that describes an AEN/error generated by the controller,
  192  * Common Layer, or even the OS Layer.
  193  */
  194 struct tw_cl_event_packet {
  195         TW_UINT32       sequence_id;
  196         TW_UINT32       time_stamp_sec;
  197         TW_UINT16       aen_code;
  198         TW_UINT8        severity;
  199         TW_UINT8        retrieved;
  200         TW_UINT8        repeat_count;
  201         TW_UINT8        parameter_len;
  202         TW_UINT8        parameter_data[98];
  203         TW_UINT32       event_src;
  204         TW_UINT8        severity_str[20];
  205 };
  206 
  207 
  208 /* Structure to link 2 adjacent elements in a list. */
  209 struct tw_cl_link {
  210         struct tw_cl_link       *next;
  211         struct tw_cl_link       *prev;
  212 };
  213 
  214 
  215 /* Scatter/Gather list entry with 32 bit addresses. */
  216 struct tw_cl_sg_desc32 {
  217         TW_UINT32       address;
  218         TW_UINT32       length;
  219 };
  220 
  221 
  222 /* Scatter/Gather list entry with 64 bit addresses. */
  223 struct tw_cl_sg_desc64 {
  224         TW_UINT64       address;
  225         TW_UINT32       length;
  226 };
  227 
  228 #pragma pack()
  229 
  230 
  231 /* Byte swap functions.  Valid only if running on big endian platforms. */
  232 #ifdef TW_OSL_BIG_ENDIAN
  233 
  234 #define TW_CL_SWAP16_WITH_CAST(x)                                       \
  235         ((x << 8) | (x >> 8))
  236 
  237 
  238 #define TW_CL_SWAP32_WITH_CAST(x)                                       \
  239         ((x << 24) | ((x << 8) & (0xFF0000)) |                          \
  240         ((x >> 8) & (0xFF00)) | (x >> 24))
  241 
  242 
  243 #define TW_CL_SWAP64_WITH_CAST(x)                                       \
  244         ((((TW_UINT64)(TW_CL_SWAP32(((TW_UINT32 *)(&(x)))[1]))) << 32) |\
  245         ((TW_UINT32)(TW_CL_SWAP32(((TW_UINT32 *)(&(x)))[0]))))
  246 
  247 
  248 #else /* TW_OSL_BIG_ENDIAN */
  249 
  250 #define TW_CL_SWAP16_WITH_CAST(x)       x
  251 #define TW_CL_SWAP32_WITH_CAST(x)       x
  252 #define TW_CL_SWAP64_WITH_CAST(x)       x
  253 
  254 #endif /* TW_OSL_BIG_ENDIAN */
  255 
  256 #define TW_CL_SWAP16(x)         TW_CL_SWAP16_WITH_CAST((TW_UINT16)(x))
  257 #define TW_CL_SWAP32(x)         TW_CL_SWAP32_WITH_CAST((TW_UINT32)(x))
  258 #define TW_CL_SWAP64(x)         TW_CL_SWAP64_WITH_CAST((TW_UINT64)(x))
  259 
  260 
  261 /* Queue manipulation functions. */
  262 
  263 /* Initialize a queue. */
  264 #define TW_CL_Q_INIT(head)      do {            \
  265         (head)->prev = (head)->next = head;     \
  266 } while (0)
  267 
  268 
  269 /* Insert an item at the head of the queue. */
  270 #define TW_CL_Q_INSERT_HEAD(head, item) do {    \
  271         (item)->next = (head)->next;            \
  272         (item)->prev = head;                    \
  273         (head)->next->prev = item;              \
  274         (head)->next = item;                    \
  275 } while (0)
  276 
  277 
  278 /* Insert an item at the tail of the queue. */
  279 #define TW_CL_Q_INSERT_TAIL(head, item) do {    \
  280         (item)->next = head;                    \
  281         (item)->prev = (head)->prev;            \
  282         (head)->prev->next = item;              \
  283         (head)->prev = item;                    \
  284 } while (0)
  285 
  286 
  287 /* Remove an item from the head of the queue. */
  288 #define TW_CL_Q_REMOVE_ITEM(head, item) do {    \
  289         (item)->prev->next = (item)->next;      \
  290         (item)->next->prev = (item)->prev;      \
  291 } while (0)
  292 
  293 
  294 /* Retrieve the item at the head of the queue. */
  295 #define TW_CL_Q_FIRST_ITEM(head)                \
  296         (((head)->next != head) ? ((head)->next) : TW_CL_NULL)
  297 
  298 
  299 /* Retrieve the item at the tail of the queue. */
  300 #define TW_CL_Q_LAST_ITEM(head)                 \
  301         (((head)->prev != head) ? ((head)->prev) : TW_CL_NULL)
  302 
  303 
  304 /* Retrieve the item next to a given item in the queue. */
  305 #define TW_CL_Q_NEXT_ITEM(head, item)           \
  306         (((item)->next != head) ? ((item)->next) : TW_CL_NULL)
  307 
  308 
  309 /* Retrieve the item previous to a given item in the queue. */
  310 #define TW_CL_Q_PREV_ITEM(head, item)           \
  311         (((item)->prev != head) ? ((item)->prev) : TW_CL_NULL)
  312 
  313 
  314 /* Determine the offset of a field from the head of the structure it is in. */
  315 #define TW_CL_STRUCT_OFFSET(struct_type, field) \
  316         (TW_INT8 *)(&((struct_type *)0)->field)
  317 
  318 
  319 /*
  320  * Determine the address of the head of a structure, given the address of a
  321  * field within it.
  322  */
  323 #define TW_CL_STRUCT_HEAD(addr, struct_type, field)     \
  324         (struct_type *)((TW_INT8 *)addr -               \
  325         TW_CL_STRUCT_OFFSET(struct_type, field))
  326 
  327 
  328 
  329 #ifndef TW_BUILDING_API
  330 
  331 #include "tw_osl_inline.h"
  332 
  333 
  334 
  335 /*
  336  * The following are extern declarations of OS Layer defined functions called
  337  * by the Common Layer.  If any function has been defined as a macro in
  338  * tw_osl_share.h, we will not make the extern declaration here.
  339  */
  340 
  341 #ifndef tw_osl_breakpoint
  342 /* Allows setting breakpoints in the CL code for debugging purposes. */
  343 extern TW_VOID  tw_osl_breakpoint(TW_VOID);
  344 #endif
  345 
  346 
  347 #ifndef tw_osl_ctlr_busy
  348 /* Called when CL is too busy to accept new requests. */
  349 extern TW_VOID  tw_osl_ctlr_busy(struct tw_cl_ctlr_handle *ctlr_handle,
  350         struct tw_cl_req_handle *req_handle);
  351 #endif
  352 
  353 
  354 #ifndef tw_osl_ctlr_ready
  355 /* Called on cmd interrupt.  Allows re-submission of any pending requests. */
  356 extern TW_VOID  tw_osl_ctlr_ready(struct tw_cl_ctlr_handle *ctlr_handle);
  357 #endif
  358 
  359 
  360 #ifndef tw_osl_cur_func
  361 /* Text name of current function. */
  362 extern TW_INT8  *tw_osl_cur_func(TW_VOID);
  363 #endif
  364 
  365 
  366 #ifdef TW_OSL_DEBUG
  367 #ifndef tw_osl_dbg_printf
  368 /* Print to syslog/event log/debug console, as applicable. */
  369 extern TW_INT32 tw_osl_dbg_printf(struct tw_cl_ctlr_handle *ctlr_handle,
  370         const TW_INT8 *fmt, ...);
  371 #endif
  372 #endif /* TW_OSL_DEBUG */
  373 
  374 
  375 #ifndef tw_osl_delay
  376 /* Cause a delay of usecs micro-seconds. */
  377 extern TW_VOID  tw_osl_delay(TW_INT32 usecs);
  378 #endif
  379 
  380 
  381 #ifndef tw_osl_destroy_lock
  382 /* Create/initialize a lock for CL's use. */
  383 extern TW_VOID  tw_osl_destroy_lock(struct tw_cl_ctlr_handle *ctlr_handle,
  384         TW_LOCK_HANDLE *lock);
  385 #endif
  386 
  387 
  388 #ifndef tw_osl_free_lock
  389 /* Free a previously held lock. */
  390 extern TW_VOID  tw_osl_free_lock(struct tw_cl_ctlr_handle *ctlr_handle,
  391         TW_LOCK_HANDLE *lock);
  392 #endif
  393 
  394 
  395 #ifndef tw_osl_get_local_time
  396 /* Get local time. */
  397 extern TW_TIME  tw_osl_get_local_time(TW_VOID);
  398 #endif
  399 
  400 
  401 #ifndef tw_osl_get_lock
  402 /* Acquire a lock. */
  403 extern TW_VOID  tw_osl_get_lock(struct tw_cl_ctlr_handle *ctlr_handle,
  404         TW_LOCK_HANDLE *lock);
  405 #endif
  406 
  407 
  408 #ifndef tw_osl_init_lock
  409 /* Create/initialize a lock for CL's use. */
  410 extern TW_VOID  tw_osl_init_lock(struct tw_cl_ctlr_handle *ctlr_handle,
  411         TW_INT8 *lock_name, TW_LOCK_HANDLE *lock);
  412 #endif
  413 
  414 
  415 #ifndef tw_osl_memcpy
  416 /* Copy 'size' bytes from 'src' to 'dest'. */
  417 extern TW_VOID  tw_osl_memcpy(TW_VOID *src, TW_VOID *dest, TW_INT32 size);
  418 #endif
  419 
  420 
  421 #ifndef tw_osl_memzero
  422 /* Zero 'size' bytes starting at 'addr'. */
  423 extern TW_VOID  tw_osl_memzero(TW_VOID *addr, TW_INT32 size);
  424 #endif
  425 
  426 
  427 #ifndef tw_osl_notify_event
  428 /* Notify OSL of a controller/CL (or even OSL) event. */
  429 extern TW_VOID  tw_osl_notify_event(struct tw_cl_ctlr_handle *ctlr_handle,
  430         struct tw_cl_event_packet *event);
  431 #endif
  432 
  433 
  434 #ifdef TW_OSL_PCI_CONFIG_ACCESSIBLE
  435 #ifndef tw_osl_read_pci_config
  436 /* Read 'size' bytes from 'offset' in the PCI config space. */
  437 extern TW_UINT32 tw_osl_read_pci_config(
  438         struct tw_cl_ctlr_handle *ctlr_handle, TW_INT32 offset, TW_INT32 size);
  439 #endif
  440 #endif /* TW_OSL_PCI_CONFIG_ACCESSIBLE */
  441 
  442 
  443 #ifndef tw_osl_read_reg
  444 /* Read 'size' bytes at 'offset' from base address of this controller. */
  445 extern TW_UINT32 tw_osl_read_reg(struct tw_cl_ctlr_handle *ctlr_handle,
  446         TW_INT32 offset, TW_INT32 size);
  447 #endif
  448 
  449 
  450 #ifndef tw_osl_scan_bus
  451 /* Request OSL for a bus scan. */
  452 extern TW_VOID  tw_osl_scan_bus(struct tw_cl_ctlr_handle *ctlr_handle);
  453 #endif
  454 
  455 
  456 #ifdef TW_OSL_CAN_SLEEP
  457 #ifndef tw_osl_sleep
  458 /* Sleep for 'timeout' ms or until woken up (by tw_osl_wakeup). */
  459 extern TW_INT32 tw_osl_sleep(struct tw_cl_ctlr_handle *ctlr_handle,
  460         TW_SLEEP_HANDLE *sleep_handle, TW_INT32 timeout);
  461 #endif
  462 #endif /* TW_OSL_CAN_SLEEP */
  463 
  464 
  465 #ifndef tw_osl_sprintf
  466 /* Standard sprintf. */
  467 extern TW_INT32 tw_osl_sprintf(TW_INT8 *dest, const TW_INT8 *fmt, ...);
  468 #endif
  469 
  470 
  471 #ifndef tw_osl_strcpy
  472 /* Copy string 'src' to 'dest'. */
  473 extern TW_INT8  *tw_osl_strcpy(TW_INT8 *dest, TW_INT8 *src);
  474 #endif
  475 
  476 
  477 #ifndef tw_osl_strlen
  478 /* Return length of string pointed at by 'str'. */
  479 extern TW_INT32 tw_osl_strlen(TW_VOID *str);
  480 #endif
  481 
  482 #ifndef tw_osl_vsprintf
  483 /* Standard vsprintf. */
  484 extern TW_INT32 tw_osl_vsprintf(TW_INT8 *dest, const TW_INT8 *fmt, va_list ap);
  485 #endif
  486 
  487 
  488 #ifdef TW_OSL_CAN_SLEEP
  489 #ifndef tw_osl_wakeup
  490 /* Wake up a thread sleeping by a call to tw_osl_sleep. */
  491 extern TW_VOID  tw_osl_wakeup(struct tw_cl_ctlr_handle *ctlr_handle,
  492         TW_SLEEP_HANDLE *sleep_handle);
  493 #endif
  494 #endif /* TW_OSL_CAN_SLEEP */
  495 
  496 
  497 #ifdef TW_OSL_PCI_CONFIG_ACCESSIBLE
  498 #ifndef tw_osl_write_pci_config
  499 /* Write 'value' of 'size' bytes at 'offset' in the PCI config space. */
  500 extern TW_VOID  tw_osl_write_pci_config(struct tw_cl_ctlr_handle *ctlr_handle,
  501         TW_INT32 offset, TW_INT32 value, TW_INT32 size);
  502 #endif
  503 #endif /* TW_OSL_PCI_CONFIG_ACCESSIBLE */
  504 
  505 
  506 #ifndef tw_osl_write_reg
  507 /*
  508  * Write 'value' of 'size' (max 4) bytes at 'offset' from base address of
  509  * this controller.
  510  */
  511 extern TW_VOID  tw_osl_write_reg(struct tw_cl_ctlr_handle *ctlr_handle,
  512         TW_INT32 offset, TW_INT32 value, TW_INT32 size);
  513 #endif
  514 
  515 
  516 
  517 /* Functions in the Common Layer */
  518 
  519 /* Creates and queues AEN's.  Also notifies OS Layer. */
  520 extern TW_VOID tw_cl_create_event(struct tw_cl_ctlr_handle *ctlr_handle,
  521         TW_UINT8 queue_event, TW_UINT8 event_src, TW_UINT16 event_code,
  522         TW_UINT8 severity, TW_UINT8 *severity_str, TW_UINT8 *event_desc,
  523         TW_UINT8 *event_specific_desc, ...);
  524 
  525 /* Indicates whether a ctlr is supported by CL. */
  526 extern TW_INT32 tw_cl_ctlr_supported(TW_INT32 vendor_id, TW_INT32 device_id);
  527 
  528 
  529 /* Deferred interrupt handler. */
  530 extern TW_VOID  tw_cl_deferred_interrupt(struct tw_cl_ctlr_handle *ctlr_handle);
  531 
  532 
  533 /* Submit a firmware cmd packet. */
  534 extern TW_INT32 tw_cl_fw_passthru(struct tw_cl_ctlr_handle *ctlr_handle,
  535         struct tw_cl_req_packet *req_pkt, struct tw_cl_req_handle *req_handle);
  536 
  537 
  538 /* Find out how much memory CL needs. */
  539 extern TW_INT32 tw_cl_get_mem_requirements(
  540         struct tw_cl_ctlr_handle *ctlr_handle, TW_UINT32 flags,
  541         TW_INT32 device_id, TW_INT32 max_simult_reqs, TW_INT32 max_aens,
  542         TW_UINT32 *alignment, TW_UINT32 *sg_size_factor,
  543         TW_UINT32 *non_dma_mem_size, TW_UINT32 *dma_mem_size
  544         );
  545 
  546 
  547 /* Return PCI BAR info. */
  548 extern TW_INT32 tw_cl_get_pci_bar_info(TW_INT32 device_id, TW_INT32 bar_type,
  549         TW_INT32 *bar_num, TW_INT32 *bar0_offset, TW_INT32 *bar_size);
  550 
  551 
  552 /* Initialize Common Layer for a given controller. */
  553 extern TW_INT32 tw_cl_init_ctlr(struct tw_cl_ctlr_handle *ctlr_handle,
  554         TW_UINT32 flags, TW_INT32 device_id, TW_INT32 max_simult_reqs,
  555         TW_INT32 max_aens, TW_VOID *non_dma_mem, TW_VOID *dma_mem,
  556         TW_UINT64 dma_mem_phys
  557         );
  558 
  559 
  560 /* CL's interrupt handler. */
  561 extern TW_INT32 tw_cl_interrupt(struct tw_cl_ctlr_handle *ctlr_handle);
  562 
  563 
  564 /* CL's ioctl handler. */
  565 extern TW_INT32 tw_cl_ioctl(struct tw_cl_ctlr_handle *ctlr_handle,
  566         TW_INT32 cmd, TW_VOID *buf);
  567 
  568 
  569 #ifdef TW_OSL_DEBUG
  570 /* Print CL's state/statistics for a controller. */
  571 extern TW_VOID  tw_cl_print_ctlr_stats(struct tw_cl_ctlr_handle *ctlr_handle);
  572 
  573 /* Prints CL internal details of a given request. */
  574 extern TW_VOID  tw_cl_print_req_info(struct tw_cl_req_handle *req_handle);
  575 #endif /* TW_OSL_DEBUG */
  576 
  577 
  578 /* Soft reset controller. */
  579 extern TW_INT32 tw_cl_reset_ctlr(struct tw_cl_ctlr_handle *ctlr_handle);
  580 
  581 
  582 #ifdef TW_OSL_DEBUG
  583 /* Reset CL's statistics for a controller. */
  584 extern TW_VOID  tw_cl_reset_stats(struct tw_cl_ctlr_handle *ctlr_handle);
  585 #endif /* TW_OSL_DEBUG */
  586 
  587 
  588 /* Stop a controller. */
  589 extern TW_INT32 tw_cl_shutdown_ctlr(struct tw_cl_ctlr_handle *ctlr_handle,
  590         TW_UINT32 flags);
  591 
  592 
  593 /* Submit a SCSI I/O request. */
  594 extern TW_INT32 tw_cl_start_io(struct tw_cl_ctlr_handle *ctlr_handle,
  595         struct tw_cl_req_packet *req_pkt, struct tw_cl_req_handle *req_handle);
  596 
  597 
  598 #endif /* TW_BUILDING_API */
  599 
  600 #endif /* TW_CL_SHARE_H */

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