The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/twa/tw_cl_share.h

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    1 /*
    2  * Copyright (c) 2004-07 Applied Micro Circuits Corporation.
    3  * Copyright (c) 2004-05 Vinod Kashyap
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  *      $FreeBSD$
   28  */
   29 
   30 /*
   31  * AMCC'S 3ware driver for 9000 series storage controllers.
   32  *
   33  * Author: Vinod Kashyap
   34  * Modifications by: Adam Radford
   35  * Modifications by: Manjunath Ranganathaiah
   36  */
   37 
   38 
   39 
   40 #ifndef TW_CL_SHARE_H
   41 
   42 #define TW_CL_SHARE_H
   43 
   44 
   45 /*
   46  * Macros, structures and functions shared between OSL and CL,
   47  * and defined by CL.
   48  */
   49 
   50 #define TW_CL_NULL                      ((TW_VOID *)0)
   51 #define TW_CL_TRUE                      1
   52 #define TW_CL_FALSE                     0
   53 
   54 #define TW_CL_VENDOR_ID                 0x13C1  /* 3ware vendor id */
   55 #define TW_CL_DEVICE_ID_9K              0x1002  /* 9000 PCI series device id */
   56 #define TW_CL_DEVICE_ID_9K_X            0x1003  /* 9000 PCI-X series device id */
   57 #define TW_CL_DEVICE_ID_9K_E            0x1004  /* 9000 PCIe series device id */
   58 #define TW_CL_DEVICE_ID_9K_SA           0x1005  /* 9000 PCIe SAS series device id */
   59 
   60 #define TW_CL_BAR_TYPE_IO               1       /* I/O base address */
   61 #define TW_CL_BAR_TYPE_MEM              2       /* memory base address */
   62 #define TW_CL_BAR_TYPE_SBUF             3       /* SBUF base address */
   63 
   64 #ifdef TW_OSL_ENCLOSURE_SUPPORT
   65 #define TW_CL_MAX_NUM_UNITS             65      /* max # of units we support
   66                                                 -- enclosure target id is 64 */
   67 #else /* TW_OSL_ENCLOSURE_SUPPORT */
   68 #define TW_CL_MAX_NUM_UNITS             32      /* max # of units we support */
   69 #endif /* TW_OSL_ENCLOSURE_SUPPORT */
   70 
   71 #define TW_CL_MAX_NUM_LUNS              16      /* max # of LUN's we support */
   72 #define TW_CL_MAX_IO_SIZE               0x20000 /* 128K */
   73 
   74 /*
   75  * Though we can support 256 simultaneous requests, we advertise as capable
   76  * of supporting only 255, since we want to keep one CL internal request
   77  * context packet always available for internal requests.
   78  */
   79 #define TW_CL_MAX_SIMULTANEOUS_REQUESTS 0xFF    /* max simult reqs supported */
   80 
   81 #define TW_CL_MAX_32BIT_SG_ELEMENTS     109     /* max 32-bit sg elements */
   82 #define TW_CL_MAX_64BIT_SG_ELEMENTS     72      /* max 64-bit sg elements */
   83 
   84 
   85 /* Possible values of ctlr->flags */
   86 #define TW_CL_64BIT_ADDRESSES   (1<<0) /* 64 bit cmdpkt & SG addresses */
   87 #define TW_CL_64BIT_SG_LENGTH   (1<<1) /* 64 bit SG length */
   88 #define TW_CL_START_CTLR_ONLY   (1<<2) /* Start ctlr only */
   89 #define TW_CL_STOP_CTLR_ONLY    (1<<3) /* Stop ctlr only */
   90 #define TW_CL_DEFERRED_INTR_USED (1<<5) /* OS Layer uses deferred intr */
   91 
   92 /* Possible error values from the Common Layer. */
   93 #define TW_CL_ERR_REQ_SUCCESS                   0
   94 #define TW_CL_ERR_REQ_GENERAL_FAILURE           (1<<0)
   95 #define TW_CL_ERR_REQ_INVALID_TARGET            (1<<1)
   96 #define TW_CL_ERR_REQ_INVALID_LUN               (1<<2)
   97 #define TW_CL_ERR_REQ_SCSI_ERROR                (1<<3)
   98 #define TW_CL_ERR_REQ_AUTO_SENSE_VALID          (1<<4)
   99 #define TW_CL_ERR_REQ_BUS_RESET                 (1<<5)
  100 #define TW_CL_ERR_REQ_UNABLE_TO_SUBMIT_COMMAND  (1<<6)
  101 
  102 
  103 /* Possible values of req_pkt->flags */
  104 #define TW_CL_REQ_RETRY_ON_BUSY         (1<<0)
  105 #define TW_CL_REQ_CALLBACK_FOR_SGLIST   (1<<1)
  106 
  107 
  108 #define TW_CL_MESSAGE_SOURCE_CONTROLLER_ERROR   3
  109 #define TW_CL_MESSAGE_SOURCE_CONTROLLER_EVENT   4
  110 #define TW_CL_MESSAGE_SOURCE_COMMON_LAYER_ERROR 21
  111 #define TW_CL_MESSAGE_SOURCE_COMMON_LAYER_EVENT 22
  112 #define TW_CL_MESSAGE_SOURCE_FREEBSD_DRIVER     5
  113 #define TW_CL_MESSAGE_SOURCE_FREEBSD_OS         8
  114 #define TW_CL_MESSAGE_SOURCE_WINDOWS_DRIVER     7
  115 #define TW_CL_MESSAGE_SOURCE_WINDOWS_OS         10
  116 
  117 #define TW_CL_SEVERITY_ERROR            0x1
  118 #define TW_CL_SEVERITY_WARNING          0x2
  119 #define TW_CL_SEVERITY_INFO             0x3
  120 #define TW_CL_SEVERITY_DEBUG            0x4
  121 
  122 #define TW_CL_SEVERITY_ERROR_STRING     "ERROR"
  123 #define TW_CL_SEVERITY_WARNING_STRING   "WARNING"
  124 #define TW_CL_SEVERITY_INFO_STRING      "INFO"
  125 #define TW_CL_SEVERITY_DEBUG_STRING     "DEBUG"
  126 
  127 
  128 #pragma pack(1)
  129 
  130 /*
  131  * Structure, a pointer to which is used as the controller handle in
  132  * communications between the OS Layer and the Common Layer.
  133  */
  134 struct tw_cl_ctlr_handle {
  135         TW_VOID *osl_ctlr_ctxt; /* OSL's ctlr context */
  136         TW_VOID *cl_ctlr_ctxt;  /* CL's ctlr context */
  137 };
  138 
  139 
  140 /*
  141  * Structure, a pointer to which is used as the request handle in
  142  * communications between the OS Layer and the Common Layer.
  143  */
  144 struct tw_cl_req_handle {
  145         TW_VOID *osl_req_ctxt;  /* OSL's request context */
  146         TW_VOID *cl_req_ctxt;   /* CL's request context */
  147 };
  148 
  149 
  150 /* Structure used to describe SCSI requests to CL. */
  151 struct tw_cl_scsi_req_packet {
  152         TW_UINT32       unit;           /* unit # to send cmd to */
  153         TW_UINT32       lun;            /* LUN to send cmd to */
  154         TW_UINT8        *cdb;           /* ptr to SCSI cdb */
  155         TW_UINT32       cdb_len;        /* # of valid cdb bytes */
  156         TW_UINT32       sense_len;      /* # of bytes of valid sense info */
  157         TW_UINT8        *sense_data;    /* ptr to sense data, if any */
  158         TW_UINT32       scsi_status;    /* SCSI status returned by fw */
  159         TW_UINT32       sgl_entries;    /* # of SG descriptors */
  160         TW_UINT8        *sg_list;       /* ptr to SG list */
  161 };
  162 
  163 
  164 /* Structure used to describe pass through command packets to CL. */
  165 struct tw_cl_passthru_req_packet {
  166         TW_UINT8        *cmd_pkt;       /* ptr to passthru cmd pkt */
  167         TW_UINT32       cmd_pkt_length; /* size of cmd pkt */
  168         TW_UINT32       sgl_entries;    /* # of SG descriptors */
  169         TW_UINT8        *sg_list;       /* ptr to SG list */
  170 };
  171 
  172 
  173 /* Request packet submitted to the Common Layer, by the OS Layer. */
  174 struct tw_cl_req_packet {
  175         TW_UINT32       cmd;            /* Common Layer cmd */
  176         TW_UINT32       flags;          /* flags describing request */
  177         TW_UINT32       status;         /* Common Layer returned status */
  178         TW_VOID         (*tw_osl_callback)(struct tw_cl_req_handle *req_handle);
  179                         /* OSL routine to be called by CL on req completion */
  180         TW_VOID         (*tw_osl_sgl_callback)(
  181                         struct tw_cl_req_handle *req_handle, TW_VOID *sg_list,
  182                         TW_UINT32 *num_sgl_entries);
  183                         /* OSL callback to get SG list. */
  184 
  185         union {
  186                 struct tw_cl_scsi_req_packet            scsi_req; /* SCSI req */
  187                 struct tw_cl_passthru_req_packet        pt_req;/*Passthru req*/
  188         } gen_req_pkt;
  189 };
  190 
  191 
  192 /*
  193  * Packet that describes an AEN/error generated by the controller,
  194  * Common Layer, or even the OS Layer.
  195  */
  196 struct tw_cl_event_packet {
  197         TW_UINT32       sequence_id;
  198         TW_UINT32       time_stamp_sec;
  199         TW_UINT16       aen_code;
  200         TW_UINT8        severity;
  201         TW_UINT8        retrieved;
  202         TW_UINT8        repeat_count;
  203         TW_UINT8        parameter_len;
  204         TW_UINT8        parameter_data[98];
  205         TW_UINT32       event_src;
  206         TW_UINT8        severity_str[20];
  207 };
  208 
  209 
  210 /* Structure to link 2 adjacent elements in a list. */
  211 struct tw_cl_link {
  212         struct tw_cl_link       *next;
  213         struct tw_cl_link       *prev;
  214 };
  215 
  216 
  217 /* Scatter/Gather list entry with 32 bit addresses. */
  218 struct tw_cl_sg_desc32 {
  219         TW_UINT32       address;
  220         TW_UINT32       length;
  221 };
  222 
  223 
  224 /* Scatter/Gather list entry with 64 bit addresses. */
  225 struct tw_cl_sg_desc64 {
  226         TW_UINT64       address;
  227         TW_UINT32       length;
  228 };
  229 
  230 #pragma pack()
  231 
  232 
  233 /* Byte swap functions.  Valid only if running on big endian platforms. */
  234 #ifdef TW_OSL_BIG_ENDIAN
  235 
  236 #define TW_CL_SWAP16_WITH_CAST(x)                                       \
  237         ((x << 8) | (x >> 8))
  238 
  239 
  240 #define TW_CL_SWAP32_WITH_CAST(x)                                       \
  241         ((x << 24) | ((x << 8) & (0xFF0000)) |                          \
  242         ((x >> 8) & (0xFF00)) | (x >> 24))
  243 
  244 
  245 #define TW_CL_SWAP64_WITH_CAST(x)                                       \
  246         ((((TW_UINT64)(TW_CL_SWAP32(((TW_UINT32 *)(&(x)))[1]))) << 32) |\
  247         ((TW_UINT32)(TW_CL_SWAP32(((TW_UINT32 *)(&(x)))[0]))))
  248 
  249 
  250 #else /* TW_OSL_BIG_ENDIAN */
  251 
  252 #define TW_CL_SWAP16_WITH_CAST(x)       x
  253 #define TW_CL_SWAP32_WITH_CAST(x)       x
  254 #define TW_CL_SWAP64_WITH_CAST(x)       x
  255 
  256 #endif /* TW_OSL_BIG_ENDIAN */
  257 
  258 #define TW_CL_SWAP16(x)         TW_CL_SWAP16_WITH_CAST((TW_UINT16)(x))
  259 #define TW_CL_SWAP32(x)         TW_CL_SWAP32_WITH_CAST((TW_UINT32)(x))
  260 #define TW_CL_SWAP64(x)         TW_CL_SWAP64_WITH_CAST((TW_UINT64)(x))
  261 
  262 
  263 /* Queue manipulation functions. */
  264 
  265 /* Initialize a queue. */
  266 #define TW_CL_Q_INIT(head)      do {            \
  267         (head)->prev = (head)->next = head;     \
  268 } while (0)
  269 
  270 
  271 /* Insert an item at the head of the queue. */
  272 #define TW_CL_Q_INSERT_HEAD(head, item) do {    \
  273         (item)->next = (head)->next;            \
  274         (item)->prev = head;                    \
  275         (head)->next->prev = item;              \
  276         (head)->next = item;                    \
  277 } while (0)
  278 
  279 
  280 /* Insert an item at the tail of the queue. */
  281 #define TW_CL_Q_INSERT_TAIL(head, item) do {    \
  282         (item)->next = head;                    \
  283         (item)->prev = (head)->prev;            \
  284         (head)->prev->next = item;              \
  285         (head)->prev = item;                    \
  286 } while (0)
  287 
  288 
  289 /* Remove an item from the head of the queue. */
  290 #define TW_CL_Q_REMOVE_ITEM(head, item) do {    \
  291         (item)->prev->next = (item)->next;      \
  292         (item)->next->prev = (item)->prev;      \
  293 } while (0)
  294 
  295 
  296 /* Retrieve the item at the head of the queue. */
  297 #define TW_CL_Q_FIRST_ITEM(head)                \
  298         (((head)->next != head) ? ((head)->next) : TW_CL_NULL)
  299 
  300 
  301 /* Retrieve the item at the tail of the queue. */
  302 #define TW_CL_Q_LAST_ITEM(head)                 \
  303         (((head)->prev != head) ? ((head)->prev) : TW_CL_NULL)
  304 
  305 
  306 /* Retrieve the item next to a given item in the queue. */
  307 #define TW_CL_Q_NEXT_ITEM(head, item)           \
  308         (((item)->next != head) ? ((item)->next) : TW_CL_NULL)
  309 
  310 
  311 /* Retrieve the item previous to a given item in the queue. */
  312 #define TW_CL_Q_PREV_ITEM(head, item)           \
  313         (((item)->prev != head) ? ((item)->prev) : TW_CL_NULL)
  314 
  315 
  316 /* Determine the offset of a field from the head of the structure it is in. */
  317 #define TW_CL_STRUCT_OFFSET(struct_type, field) \
  318         (TW_INT8 *)(&((struct_type *)0)->field)
  319 
  320 
  321 /*
  322  * Determine the address of the head of a structure, given the address of a
  323  * field within it.
  324  */
  325 #define TW_CL_STRUCT_HEAD(addr, struct_type, field)     \
  326         (struct_type *)((TW_INT8 *)addr -               \
  327         TW_CL_STRUCT_OFFSET(struct_type, field))
  328 
  329 
  330 
  331 #ifndef TW_BUILDING_API
  332 
  333 #include "tw_osl_inline.h"
  334 
  335 
  336 
  337 /*
  338  * The following are extern declarations of OS Layer defined functions called
  339  * by the Common Layer.  If any function has been defined as a macro in
  340  * tw_osl_share.h, we will not make the extern declaration here.
  341  */
  342 
  343 #ifndef tw_osl_breakpoint
  344 /* Allows setting breakpoints in the CL code for debugging purposes. */
  345 extern TW_VOID  tw_osl_breakpoint(TW_VOID);
  346 #endif
  347 
  348 
  349 #ifndef tw_osl_ctlr_busy
  350 /* Called when CL is too busy to accept new requests. */
  351 extern TW_VOID  tw_osl_ctlr_busy(struct tw_cl_ctlr_handle *ctlr_handle,
  352         struct tw_cl_req_handle *req_handle);
  353 #endif
  354 
  355 
  356 #ifndef tw_osl_ctlr_ready
  357 /* Called on cmd interrupt.  Allows re-submission of any pending requests. */
  358 extern TW_VOID  tw_osl_ctlr_ready(struct tw_cl_ctlr_handle *ctlr_handle);
  359 #endif
  360 
  361 
  362 #ifndef tw_osl_cur_func
  363 /* Text name of current function. */
  364 extern TW_INT8  *tw_osl_cur_func(TW_VOID);
  365 #endif
  366 
  367 
  368 #ifdef TW_OSL_DEBUG
  369 #ifndef tw_osl_dbg_printf
  370 /* Print to syslog/event log/debug console, as applicable. */
  371 extern TW_INT32 tw_osl_dbg_printf(struct tw_cl_ctlr_handle *ctlr_handle,
  372         const TW_INT8 *fmt, ...);
  373 #endif
  374 #endif /* TW_OSL_DEBUG */
  375 
  376 
  377 #ifndef tw_osl_delay
  378 /* Cause a delay of usecs micro-seconds. */
  379 extern TW_VOID  tw_osl_delay(TW_INT32 usecs);
  380 #endif
  381 
  382 
  383 #ifndef tw_osl_destroy_lock
  384 /* Create/initialize a lock for CL's use. */
  385 extern TW_VOID  tw_osl_destroy_lock(struct tw_cl_ctlr_handle *ctlr_handle,
  386         TW_LOCK_HANDLE *lock);
  387 #endif
  388 
  389 
  390 #ifndef tw_osl_free_lock
  391 /* Free a previously held lock. */
  392 extern TW_VOID  tw_osl_free_lock(struct tw_cl_ctlr_handle *ctlr_handle,
  393         TW_LOCK_HANDLE *lock);
  394 #endif
  395 
  396 
  397 #ifndef tw_osl_get_local_time
  398 /* Get local time. */
  399 extern TW_TIME  tw_osl_get_local_time(TW_VOID);
  400 #endif
  401 
  402 
  403 #ifndef tw_osl_get_lock
  404 /* Acquire a lock. */
  405 extern TW_VOID  tw_osl_get_lock(struct tw_cl_ctlr_handle *ctlr_handle,
  406         TW_LOCK_HANDLE *lock);
  407 #endif
  408 
  409 
  410 #ifndef tw_osl_init_lock
  411 /* Create/initialize a lock for CL's use. */
  412 extern TW_VOID  tw_osl_init_lock(struct tw_cl_ctlr_handle *ctlr_handle,
  413         TW_INT8 *lock_name, TW_LOCK_HANDLE *lock);
  414 #endif
  415 
  416 
  417 #ifndef tw_osl_memcpy
  418 /* Copy 'size' bytes from 'src' to 'dest'. */
  419 extern TW_VOID  tw_osl_memcpy(TW_VOID *src, TW_VOID *dest, TW_INT32 size);
  420 #endif
  421 
  422 
  423 #ifndef tw_osl_memzero
  424 /* Zero 'size' bytes starting at 'addr'. */
  425 extern TW_VOID  tw_osl_memzero(TW_VOID *addr, TW_INT32 size);
  426 #endif
  427 
  428 
  429 #ifndef tw_osl_notify_event
  430 /* Notify OSL of a controller/CL (or even OSL) event. */
  431 extern TW_VOID  tw_osl_notify_event(struct tw_cl_ctlr_handle *ctlr_handle,
  432         struct tw_cl_event_packet *event);
  433 #endif
  434 
  435 
  436 #ifdef TW_OSL_PCI_CONFIG_ACCESSIBLE
  437 #ifndef tw_osl_read_pci_config
  438 /* Read 'size' bytes from 'offset' in the PCI config space. */
  439 extern TW_UINT32 tw_osl_read_pci_config(
  440         struct tw_cl_ctlr_handle *ctlr_handle, TW_INT32 offset, TW_INT32 size);
  441 #endif
  442 #endif /* TW_OSL_PCI_CONFIG_ACCESSIBLE */
  443 
  444 
  445 #ifndef tw_osl_read_reg
  446 /* Read 'size' bytes at 'offset' from base address of this controller. */
  447 extern TW_UINT32 tw_osl_read_reg(struct tw_cl_ctlr_handle *ctlr_handle,
  448         TW_INT32 offset, TW_INT32 size);
  449 #endif
  450 
  451 
  452 #ifndef tw_osl_scan_bus
  453 /* Request OSL for a bus scan. */
  454 extern TW_VOID  tw_osl_scan_bus(struct tw_cl_ctlr_handle *ctlr_handle);
  455 #endif
  456 
  457 
  458 #ifdef TW_OSL_CAN_SLEEP
  459 #ifndef tw_osl_sleep
  460 /* Sleep for 'timeout' ms or until woken up (by tw_osl_wakeup). */
  461 extern TW_INT32 tw_osl_sleep(struct tw_cl_ctlr_handle *ctlr_handle,
  462         TW_SLEEP_HANDLE *sleep_handle, TW_INT32 timeout);
  463 #endif
  464 #endif /* TW_OSL_CAN_SLEEP */
  465 
  466 
  467 #ifndef tw_osl_sprintf
  468 /* Standard sprintf. */
  469 extern TW_INT32 tw_osl_sprintf(TW_INT8 *dest, const TW_INT8 *fmt, ...);
  470 #endif
  471 
  472 
  473 #ifndef tw_osl_strcpy
  474 /* Copy string 'src' to 'dest'. */
  475 extern TW_INT8  *tw_osl_strcpy(TW_INT8 *dest, TW_INT8 *src);
  476 #endif
  477 
  478 
  479 #ifndef tw_osl_strlen
  480 /* Return length of string pointed at by 'str'. */
  481 extern TW_INT32 tw_osl_strlen(TW_VOID *str);
  482 #endif
  483 
  484 #ifndef tw_osl_vsprintf
  485 /* Standard vsprintf. */
  486 extern TW_INT32 tw_osl_vsprintf(TW_INT8 *dest, const TW_INT8 *fmt, va_list ap);
  487 #endif
  488 
  489 
  490 #ifdef TW_OSL_CAN_SLEEP
  491 #ifndef tw_osl_wakeup
  492 /* Wake up a thread sleeping by a call to tw_osl_sleep. */
  493 extern TW_VOID  tw_osl_wakeup(struct tw_cl_ctlr_handle *ctlr_handle,
  494         TW_SLEEP_HANDLE *sleep_handle);
  495 #endif
  496 #endif /* TW_OSL_CAN_SLEEP */
  497 
  498 
  499 #ifdef TW_OSL_PCI_CONFIG_ACCESSIBLE
  500 #ifndef tw_osl_write_pci_config
  501 /* Write 'value' of 'size' bytes at 'offset' in the PCI config space. */
  502 extern TW_VOID  tw_osl_write_pci_config(struct tw_cl_ctlr_handle *ctlr_handle,
  503         TW_INT32 offset, TW_INT32 value, TW_INT32 size);
  504 #endif
  505 #endif /* TW_OSL_PCI_CONFIG_ACCESSIBLE */
  506 
  507 
  508 #ifndef tw_osl_write_reg
  509 /*
  510  * Write 'value' of 'size' (max 4) bytes at 'offset' from base address of
  511  * this controller.
  512  */
  513 extern TW_VOID  tw_osl_write_reg(struct tw_cl_ctlr_handle *ctlr_handle,
  514         TW_INT32 offset, TW_INT32 value, TW_INT32 size);
  515 #endif
  516 
  517 
  518 
  519 /* Functions in the Common Layer */
  520 
  521 /* Creates and queues AEN's.  Also notifies OS Layer. */
  522 extern TW_VOID tw_cl_create_event(struct tw_cl_ctlr_handle *ctlr_handle,
  523         TW_UINT8 queue_event, TW_UINT8 event_src, TW_UINT16 event_code,
  524         TW_UINT8 severity, TW_UINT8 *severity_str, TW_UINT8 *event_desc,
  525         TW_UINT8 *event_specific_desc, ...);
  526 
  527 /* Indicates whether a ctlr is supported by CL. */
  528 extern TW_INT32 tw_cl_ctlr_supported(TW_INT32 vendor_id, TW_INT32 device_id);
  529 
  530 
  531 /* Deferred interrupt handler. */
  532 extern TW_VOID  tw_cl_deferred_interrupt(struct tw_cl_ctlr_handle *ctlr_handle);
  533 
  534 
  535 /* Submit a firmware cmd packet. */
  536 extern TW_INT32 tw_cl_fw_passthru(struct tw_cl_ctlr_handle *ctlr_handle,
  537         struct tw_cl_req_packet *req_pkt, struct tw_cl_req_handle *req_handle);
  538 
  539 
  540 /* Find out how much memory CL needs. */
  541 extern TW_INT32 tw_cl_get_mem_requirements(
  542         struct tw_cl_ctlr_handle *ctlr_handle, TW_UINT32 flags,
  543         TW_INT32 device_id, TW_INT32 max_simult_reqs, TW_INT32 max_aens,
  544         TW_UINT32 *alignment, TW_UINT32 *sg_size_factor,
  545         TW_UINT32 *non_dma_mem_size, TW_UINT32 *dma_mem_size
  546         );
  547 
  548 
  549 /* Return PCI BAR info. */
  550 extern TW_INT32 tw_cl_get_pci_bar_info(TW_INT32 device_id, TW_INT32 bar_type,
  551         TW_INT32 *bar_num, TW_INT32 *bar0_offset, TW_INT32 *bar_size);
  552 
  553 
  554 /* Initialize Common Layer for a given controller. */
  555 extern TW_INT32 tw_cl_init_ctlr(struct tw_cl_ctlr_handle *ctlr_handle,
  556         TW_UINT32 flags, TW_INT32 device_id, TW_INT32 max_simult_reqs,
  557         TW_INT32 max_aens, TW_VOID *non_dma_mem, TW_VOID *dma_mem,
  558         TW_UINT64 dma_mem_phys
  559         );
  560 
  561 
  562 /* CL's interrupt handler. */
  563 extern TW_INT32 tw_cl_interrupt(struct tw_cl_ctlr_handle *ctlr_handle);
  564 
  565 
  566 /* CL's ioctl handler. */
  567 extern TW_INT32 tw_cl_ioctl(struct tw_cl_ctlr_handle *ctlr_handle,
  568         TW_INT32 cmd, TW_VOID *buf);
  569 
  570 
  571 #ifdef TW_OSL_DEBUG
  572 /* Print CL's state/statistics for a controller. */
  573 extern TW_VOID  tw_cl_print_ctlr_stats(struct tw_cl_ctlr_handle *ctlr_handle);
  574 
  575 /* Prints CL internal details of a given request. */
  576 extern TW_VOID  tw_cl_print_req_info(struct tw_cl_req_handle *req_handle);
  577 #endif /* TW_OSL_DEBUG */
  578 
  579 
  580 /* Soft reset controller. */
  581 extern TW_INT32 tw_cl_reset_ctlr(struct tw_cl_ctlr_handle *ctlr_handle);
  582 
  583 
  584 #ifdef TW_OSL_DEBUG
  585 /* Reset CL's statistics for a controller. */
  586 extern TW_VOID  tw_cl_reset_stats(struct tw_cl_ctlr_handle *ctlr_handle);
  587 #endif /* TW_OSL_DEBUG */
  588 
  589 
  590 /* Stop a controller. */
  591 extern TW_INT32 tw_cl_shutdown_ctlr(struct tw_cl_ctlr_handle *ctlr_handle,
  592         TW_UINT32 flags);
  593 
  594 
  595 /* Submit a SCSI I/O request. */
  596 extern TW_INT32 tw_cl_start_io(struct tw_cl_ctlr_handle *ctlr_handle,
  597         struct tw_cl_req_packet *req_pkt, struct tw_cl_req_handle *req_handle);
  598 
  599 
  600 #endif /* TW_BUILDING_API */
  601 
  602 #endif /* TW_CL_SHARE_H */

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