The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/twa/tw_osl.h

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    1 /*
    2  * Copyright (c) 2004-05 Applied Micro Circuits Corporation.
    3  * Copyright (c) 2004-05 Vinod Kashyap.
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  *      $FreeBSD: releng/6.0/sys/dev/twa/tw_osl.h 144966 2005-04-12 22:07:11Z vkashyap $
   28  */
   29 
   30 /*
   31  * AMCC'S 3ware driver for 9000 series storage controllers.
   32  *
   33  * Author: Vinod Kashyap
   34  */
   35 
   36 
   37 
   38 #ifndef TW_OSL_H
   39 
   40 #define TW_OSL_H
   41 
   42 
   43 /*
   44  * OS Layer internal macros, structures and functions.
   45  */
   46 
   47 
   48 #define TW_OSLI_DEVICE_NAME             "3ware 9000 series Storage Controller"
   49 
   50 #define TW_OSLI_MALLOC_CLASS            M_TWA
   51 #define TW_OSLI_MAX_NUM_IOS             TW_CL_MAX_SIMULTANEOUS_REQUESTS
   52 #define TW_OSLI_MAX_NUM_AENS            0x100
   53 
   54 /* Possible values of req->state. */
   55 #define TW_OSLI_REQ_STATE_INIT          0x0     /* being initialized */
   56 #define TW_OSLI_REQ_STATE_BUSY          0x1     /* submitted to CL */
   57 #define TW_OSLI_REQ_STATE_PENDING       0x2     /* in pending queue */
   58 #define TW_OSLI_REQ_STATE_COMPLETE      0x3     /* completed by CL */
   59 
   60 /* Possible values of req->flags. */
   61 #define TW_OSLI_REQ_FLAGS_DATA_IN       (1<<0)  /* read request */
   62 #define TW_OSLI_REQ_FLAGS_DATA_OUT      (1<<1)  /* write request */
   63 #define TW_OSLI_REQ_FLAGS_DATA_COPY_NEEDED (1<<2)/* data in ccb is misaligned,
   64                                         have to copy to/from private buffer */
   65 #define TW_OSLI_REQ_FLAGS_MAPPED        (1<<3)  /* request has been mapped */
   66 #define TW_OSLI_REQ_FLAGS_IN_PROGRESS   (1<<4)  /* bus_dmamap_load returned
   67                                                 EINPROGRESS */
   68 #define TW_OSLI_REQ_FLAGS_PASSTHRU      (1<<5)  /* pass through request */
   69 #define TW_OSLI_REQ_FLAGS_SLEEPING      (1<<6)  /* owner sleeping on this cmd */
   70 
   71 /* Possible values of sc->state. */
   72 #define TW_OSLI_CTLR_STATE_OPEN         (1<<0)  /* control device is open */
   73 #define TW_OSLI_CTLR_STATE_SIMQ_FROZEN  (1<<1)  /* simq frozen */
   74 
   75 
   76 #ifdef TW_OSL_DEBUG
   77 struct tw_osli_q_stats {
   78         TW_UINT32       cur_len;        /* current # of items in q */
   79         TW_UINT32       max_len;        /* max value reached by q_length */
   80 };
   81 #endif /* TW_OSL_DEBUG */
   82 
   83 
   84 /* Queues of OSL internal request context packets. */
   85 #define TW_OSLI_FREE_Q          0       /* free q */
   86 #define TW_OSLI_BUSY_Q          1       /* q of reqs submitted to CL */
   87 #define TW_OSLI_Q_COUNT         2       /* total number of queues */
   88 
   89 /* Driver's request packet. */
   90 struct tw_osli_req_context {
   91         struct tw_cl_req_handle req_handle;/* tag to track req b/w OSL & CL */
   92         struct twa_softc        *ctlr;  /* ptr to OSL's controller context */
   93         TW_VOID                 *data;  /* ptr to data being passed to CL */
   94         TW_UINT32               length; /* length of buf being passed to CL */
   95 
   96         /*
   97          * ptr to, and length of data passed to us from above, in case a buffer
   98          * copy was done due to non-compliance to alignment requirements
   99          */
  100         TW_VOID                 *real_data;
  101         TW_UINT32               real_length;
  102 
  103         TW_UINT32               state;  /* request state */
  104         TW_UINT32               flags;  /* request flags */
  105 
  106         /* error encountered before request submission to CL */
  107         TW_UINT32               error_code;
  108 
  109         /* ptr to orig req for use during callback */
  110         TW_VOID                 *orig_req;
  111 
  112         struct tw_cl_link       link;   /* to link this request in a list */
  113         bus_dmamap_t            dma_map;/* DMA map for data */
  114         struct tw_cl_req_packet req_pkt;/* req pkt understood by CL */
  115 };
  116 
  117 
  118 /* Per-controller structure. */
  119 struct twa_softc {
  120         struct tw_cl_ctlr_handle        ctlr_handle;
  121         struct tw_osli_req_context      *req_ctxt_buf;
  122 
  123         /* Controller state. */
  124         TW_UINT32               state;
  125         TW_UINT32               flags;
  126 
  127         TW_UINT32               alignment;
  128         TW_UINT32               sg_size_factor;
  129 
  130         TW_VOID                 *non_dma_mem;
  131         TW_VOID                 *dma_mem;
  132         TW_UINT64               dma_mem_phys;
  133 #ifdef TW_OSL_FLASH_FIRMWARE
  134         TW_VOID                 *flash_dma_mem;
  135         TW_UINT64               flash_dma_mem_phys;
  136 #endif /* TW_OSL_FLASH_FIRMWARE */
  137 
  138 
  139         /* Request queues and arrays. */
  140         struct tw_cl_link       req_q_head[TW_OSLI_Q_COUNT];
  141 
  142         struct task             deferred_intr_callback;/* taskqueue function */
  143         struct mtx              io_lock_handle;/* general purpose lock */
  144         struct mtx              *io_lock;/* ptr to general purpose lock */
  145         struct mtx              q_lock_handle;  /* queue manipulation lock */
  146         struct mtx              *q_lock;/* ptr to queue manipulation lock */
  147 
  148 #ifdef TW_OSL_DEBUG
  149         struct tw_osli_q_stats  q_stats[TW_OSLI_Q_COUNT];/* queue statistics */
  150 #endif /* TW_OSL_DEBUG */
  151     
  152         device_t                bus_dev;        /* bus device */
  153         struct cdev             *ctrl_dev;      /* control device */
  154         struct resource         *reg_res;       /* register interface window */
  155         TW_INT32                reg_res_id;     /* register resource id */
  156         bus_space_handle_t      bus_handle;     /* bus space handle */
  157         bus_space_tag_t         bus_tag;        /* bus space tag */
  158         bus_dma_tag_t           parent_tag;     /* parent DMA tag */
  159         bus_dma_tag_t           cmd_tag; /* DMA tag for CL's DMA'able mem */
  160         bus_dma_tag_t           dma_tag; /* data buffer DMA tag */
  161         bus_dma_tag_t           ioctl_tag; /* ioctl data buffer DMA tag */
  162         bus_dmamap_t            cmd_map; /* DMA map for CL's DMA'able mem */
  163         bus_dmamap_t            ioctl_map; /* DMA map for ioctl data buffers */
  164 #ifdef TW_OSL_FLASH_FIRMWARE
  165         bus_dma_tag_t           flash_tag;/* DMA tag for CL's fw flash mem */
  166         bus_dmamap_t            flash_map;/* DMA map for CL's fw flash mem */
  167 #endif /* TW_OSL_FLASH_FIRMWARE */
  168         struct resource         *irq_res;       /* interrupt resource */
  169         TW_INT32                irq_res_id;     /* register resource id */
  170         TW_VOID                 *intr_handle;   /* interrupt handle */
  171 
  172         struct sysctl_ctx_list  sysctl_ctxt;    /* sysctl context */
  173         struct sysctl_oid       *sysctl_tree;   /* sysctl oid */
  174 
  175         struct cam_sim          *sim;   /* sim for this controller */
  176         struct cam_path         *path;  /* peripheral, path, tgt, lun
  177                                         associated with this controller */
  178 };
  179 
  180 
  181 
  182 /*
  183  * Queue primitives.
  184  */
  185 
  186 #ifdef TW_OSL_DEBUG
  187 
  188 #define TW_OSLI_Q_INIT(sc, q_type)      do {                            \
  189         (sc)->q_stats[q_type].cur_len = 0;                              \
  190         (sc)->q_stats[q_type].max_len = 0;                              \
  191 } while(0)
  192 
  193 
  194 #define TW_OSLI_Q_INSERT(sc, q_type)    do {                            \
  195         struct tw_osli_q_stats *q_stats = &((sc)->q_stats[q_type]);     \
  196                                                                         \
  197         if (++(q_stats->cur_len) > q_stats->max_len)                    \
  198                 q_stats->max_len = q_stats->cur_len;                    \
  199 } while(0)
  200 
  201 
  202 #define TW_OSLI_Q_REMOVE(sc, q_type)                                    \
  203         (sc)->q_stats[q_type].cur_len--
  204 
  205 
  206 #else /* TW_OSL_DEBUG */
  207 
  208 #define TW_OSLI_Q_INIT(sc, q_index)
  209 #define TW_OSLI_Q_INSERT(sc, q_index)
  210 #define TW_OSLI_Q_REMOVE(sc, q_index)
  211 
  212 #endif /* TW_OSL_DEBUG */
  213 
  214 
  215 
  216 /* Initialize a queue of requests. */
  217 static __inline TW_VOID
  218 tw_osli_req_q_init(struct twa_softc *sc, TW_UINT8 q_type)
  219 {
  220         TW_CL_Q_INIT(&(sc->req_q_head[q_type]));
  221         TW_OSLI_Q_INIT(sc, q_type);
  222 }
  223 
  224 
  225 
  226 /* Insert the given request at the head of the given queue (q_type). */
  227 static __inline TW_VOID
  228 tw_osli_req_q_insert_head(struct tw_osli_req_context *req, TW_UINT8 q_type)
  229 {
  230         mtx_lock_spin(req->ctlr->q_lock);
  231         TW_CL_Q_INSERT_HEAD(&(req->ctlr->req_q_head[q_type]), &(req->link));
  232         TW_OSLI_Q_INSERT(req->ctlr, q_type);
  233         mtx_unlock_spin(req->ctlr->q_lock);
  234 }
  235 
  236 
  237 
  238 /* Insert the given request at the tail of the given queue (q_type). */
  239 static __inline TW_VOID
  240 tw_osli_req_q_insert_tail(struct tw_osli_req_context *req, TW_UINT8 q_type)
  241 {
  242         mtx_lock_spin(req->ctlr->q_lock);
  243         TW_CL_Q_INSERT_TAIL(&(req->ctlr->req_q_head[q_type]), &(req->link));
  244         TW_OSLI_Q_INSERT(req->ctlr, q_type);
  245         mtx_unlock_spin(req->ctlr->q_lock);
  246 }
  247 
  248 
  249 
  250 /* Remove and return the request at the head of the given queue (q_type). */
  251 static __inline struct tw_osli_req_context *
  252 tw_osli_req_q_remove_head(struct twa_softc *sc, TW_UINT8 q_type)
  253 {
  254         struct tw_osli_req_context      *req = NULL;
  255         struct tw_cl_link               *link;
  256 
  257         mtx_lock_spin(sc->q_lock);
  258         if ((link = TW_CL_Q_FIRST_ITEM(&(sc->req_q_head[q_type]))) !=
  259                 TW_CL_NULL) {
  260                 req = TW_CL_STRUCT_HEAD(link,
  261                         struct tw_osli_req_context, link);
  262                 TW_CL_Q_REMOVE_ITEM(&(sc->req_q_head[q_type]), &(req->link));
  263                 TW_OSLI_Q_REMOVE(sc, q_type);
  264         }
  265         mtx_unlock_spin(sc->q_lock);
  266         return(req);
  267 }
  268 
  269 
  270 
  271 /* Remove the given request from the given queue (q_type). */
  272 static __inline TW_VOID
  273 tw_osli_req_q_remove_item(struct tw_osli_req_context *req, TW_UINT8 q_type)
  274 {
  275         mtx_lock_spin(req->ctlr->q_lock);
  276         TW_CL_Q_REMOVE_ITEM(&(req->ctlr->req_q_head[q_type]), &(req->link));
  277         TW_OSLI_Q_REMOVE(req->ctlr, q_type);
  278         mtx_unlock_spin(req->ctlr->q_lock);
  279 }
  280 
  281 
  282 
  283 #ifdef TW_OSL_DEBUG
  284 
  285 extern TW_INT32 TW_DEBUG_LEVEL_FOR_OSL;
  286 
  287 #define tw_osli_dbg_dprintf(dbg_level, sc, fmt, args...)                \
  288         if (dbg_level <= TW_DEBUG_LEVEL_FOR_OSL)                        \
  289                 device_printf(sc->bus_dev, "%s: " fmt "\n",             \
  290                         __func__, ##args)
  291 
  292 
  293 #define tw_osli_dbg_printf(dbg_level, fmt, args...)                     \
  294         if (dbg_level <= TW_DEBUG_LEVEL_FOR_OSL)                        \
  295                 printf("%s: " fmt "\n", __func__, ##args)
  296 
  297 #else /* TW_OSL_DEBUG */
  298 
  299 #define tw_osli_dbg_dprintf(dbg_level, sc, fmt, args...)
  300 #define tw_osli_dbg_printf(dbg_level, fmt, args...)
  301 
  302 #endif /* TW_OSL_DEBUG */
  303 
  304 
  305 /* For regular printing. */
  306 #define twa_printf(sc, fmt, args...)                                    \
  307         device_printf(((struct twa_softc *)(sc))->bus_dev, fmt, ##args)
  308 
  309 /* For printing in the "consistent error reporting" format. */
  310 #define tw_osli_printf(sc, err_specific_desc, args...)                  \
  311         device_printf((sc)->bus_dev,                                    \
  312                 "%s: (0x%02X: 0x%04X): %s: " err_specific_desc "\n", ##args)
  313 
  314 
  315 
  316 #endif /* TW_OSL_H */

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