The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/twa/tw_osl.h

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    1 /*
    2  * Copyright (c) 2004-05 Applied Micro Circuits Corporation.
    3  * Copyright (c) 2004-05 Vinod Kashyap.
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  *      $FreeBSD: releng/6.1/sys/dev/twa/tw_osl.h 153207 2005-12-07 18:18:06Z vkashyap $
   28  */
   29 
   30 /*
   31  * AMCC'S 3ware driver for 9000 series storage controllers.
   32  *
   33  * Author: Vinod Kashyap
   34  */
   35 
   36 
   37 
   38 #ifndef TW_OSL_H
   39 
   40 #define TW_OSL_H
   41 
   42 
   43 /*
   44  * OS Layer internal macros, structures and functions.
   45  */
   46 
   47 
   48 #define TW_OSLI_DEVICE_NAME             "3ware 9000 series Storage Controller"
   49 
   50 #define TW_OSLI_MALLOC_CLASS            M_TWA
   51 #define TW_OSLI_MAX_NUM_IOS             TW_CL_MAX_SIMULTANEOUS_REQUESTS
   52 #define TW_OSLI_MAX_NUM_AENS            0x100
   53 
   54 #define TW_OSLI_DEFERRED_INTR_USED
   55 
   56 /* Possible values of req->state. */
   57 #define TW_OSLI_REQ_STATE_INIT          0x0     /* being initialized */
   58 #define TW_OSLI_REQ_STATE_BUSY          0x1     /* submitted to CL */
   59 #define TW_OSLI_REQ_STATE_PENDING       0x2     /* in pending queue */
   60 #define TW_OSLI_REQ_STATE_COMPLETE      0x3     /* completed by CL */
   61 
   62 /* Possible values of req->flags. */
   63 #define TW_OSLI_REQ_FLAGS_DATA_IN       (1<<0)  /* read request */
   64 #define TW_OSLI_REQ_FLAGS_DATA_OUT      (1<<1)  /* write request */
   65 #define TW_OSLI_REQ_FLAGS_DATA_COPY_NEEDED (1<<2)/* data in ccb is misaligned,
   66                                         have to copy to/from private buffer */
   67 #define TW_OSLI_REQ_FLAGS_MAPPED        (1<<3)  /* request has been mapped */
   68 #define TW_OSLI_REQ_FLAGS_IN_PROGRESS   (1<<4)  /* bus_dmamap_load returned
   69                                                 EINPROGRESS */
   70 #define TW_OSLI_REQ_FLAGS_PASSTHRU      (1<<5)  /* pass through request */
   71 #define TW_OSLI_REQ_FLAGS_SLEEPING      (1<<6)  /* owner sleeping on this cmd */
   72 
   73 /* Possible values of sc->state. */
   74 #define TW_OSLI_CTLR_STATE_OPEN         (1<<0)  /* control device is open */
   75 #define TW_OSLI_CTLR_STATE_SIMQ_FROZEN  (1<<1)  /* simq frozen */
   76 
   77 
   78 #ifdef TW_OSL_DEBUG
   79 struct tw_osli_q_stats {
   80         TW_UINT32       cur_len;        /* current # of items in q */
   81         TW_UINT32       max_len;        /* max value reached by q_length */
   82 };
   83 #endif /* TW_OSL_DEBUG */
   84 
   85 
   86 /* Queues of OSL internal request context packets. */
   87 #define TW_OSLI_FREE_Q          0       /* free q */
   88 #define TW_OSLI_BUSY_Q          1       /* q of reqs submitted to CL */
   89 #define TW_OSLI_Q_COUNT         2       /* total number of queues */
   90 
   91 /* Driver's request packet. */
   92 struct tw_osli_req_context {
   93         struct tw_cl_req_handle req_handle;/* tag to track req b/w OSL & CL */
   94         struct twa_softc        *ctlr;  /* ptr to OSL's controller context */
   95         TW_VOID                 *data;  /* ptr to data being passed to CL */
   96         TW_UINT32               length; /* length of buf being passed to CL */
   97 
   98         /*
   99          * ptr to, and length of data passed to us from above, in case a buffer
  100          * copy was done due to non-compliance to alignment requirements
  101          */
  102         TW_VOID                 *real_data;
  103         TW_UINT32               real_length;
  104 
  105         TW_UINT32               state;  /* request state */
  106         TW_UINT32               flags;  /* request flags */
  107 
  108         /* error encountered before request submission to CL */
  109         TW_UINT32               error_code;
  110 
  111         /* ptr to orig req for use during callback */
  112         TW_VOID                 *orig_req;
  113 
  114         struct tw_cl_link       link;   /* to link this request in a list */
  115         bus_dmamap_t            dma_map;/* DMA map for data */
  116         struct tw_cl_req_packet req_pkt;/* req pkt understood by CL */
  117 };
  118 
  119 
  120 /* Per-controller structure. */
  121 struct twa_softc {
  122         struct tw_cl_ctlr_handle        ctlr_handle;
  123         struct tw_osli_req_context      *req_ctxt_buf;
  124 
  125         /* Controller state. */
  126         TW_UINT32               state;
  127         TW_UINT32               flags;
  128 
  129         TW_INT32                device_id;
  130         TW_UINT32               alignment;
  131         TW_UINT32               sg_size_factor;
  132 
  133         TW_VOID                 *non_dma_mem;
  134         TW_VOID                 *dma_mem;
  135         TW_UINT64               dma_mem_phys;
  136 #ifdef TW_OSL_FLASH_FIRMWARE
  137         TW_VOID                 *flash_dma_mem;
  138         TW_UINT64               flash_dma_mem_phys;
  139 #endif /* TW_OSL_FLASH_FIRMWARE */
  140 
  141 
  142         /* Request queues and arrays. */
  143         struct tw_cl_link       req_q_head[TW_OSLI_Q_COUNT];
  144 
  145         struct task             deferred_intr_callback;/* taskqueue function */
  146         struct mtx              io_lock_handle;/* general purpose lock */
  147         struct mtx              *io_lock;/* ptr to general purpose lock */
  148         struct mtx              q_lock_handle;  /* queue manipulation lock */
  149         struct mtx              *q_lock;/* ptr to queue manipulation lock */
  150 
  151 #ifdef TW_OSL_DEBUG
  152         struct tw_osli_q_stats  q_stats[TW_OSLI_Q_COUNT];/* queue statistics */
  153 #endif /* TW_OSL_DEBUG */
  154     
  155         device_t                bus_dev;        /* bus device */
  156         struct cdev             *ctrl_dev;      /* control device */
  157         struct resource         *reg_res;       /* register interface window */
  158         TW_INT32                reg_res_id;     /* register resource id */
  159         bus_space_handle_t      bus_handle;     /* bus space handle */
  160         bus_space_tag_t         bus_tag;        /* bus space tag */
  161         bus_dma_tag_t           parent_tag;     /* parent DMA tag */
  162         bus_dma_tag_t           cmd_tag; /* DMA tag for CL's DMA'able mem */
  163         bus_dma_tag_t           dma_tag; /* data buffer DMA tag */
  164         bus_dma_tag_t           ioctl_tag; /* ioctl data buffer DMA tag */
  165         bus_dmamap_t            cmd_map; /* DMA map for CL's DMA'able mem */
  166         bus_dmamap_t            ioctl_map; /* DMA map for ioctl data buffers */
  167 #ifdef TW_OSL_FLASH_FIRMWARE
  168         bus_dma_tag_t           flash_tag;/* DMA tag for CL's fw flash mem */
  169         bus_dmamap_t            flash_map;/* DMA map for CL's fw flash mem */
  170 #endif /* TW_OSL_FLASH_FIRMWARE */
  171         struct resource         *irq_res;       /* interrupt resource */
  172         TW_INT32                irq_res_id;     /* register resource id */
  173         TW_VOID                 *intr_handle;   /* interrupt handle */
  174 
  175         struct sysctl_ctx_list  sysctl_ctxt;    /* sysctl context */
  176         struct sysctl_oid       *sysctl_tree;   /* sysctl oid */
  177 
  178         struct cam_sim          *sim;   /* sim for this controller */
  179         struct cam_path         *path;  /* peripheral, path, tgt, lun
  180                                         associated with this controller */
  181 };
  182 
  183 
  184 
  185 /*
  186  * Queue primitives.
  187  */
  188 
  189 #ifdef TW_OSL_DEBUG
  190 
  191 #define TW_OSLI_Q_INIT(sc, q_type)      do {                            \
  192         (sc)->q_stats[q_type].cur_len = 0;                              \
  193         (sc)->q_stats[q_type].max_len = 0;                              \
  194 } while(0)
  195 
  196 
  197 #define TW_OSLI_Q_INSERT(sc, q_type)    do {                            \
  198         struct tw_osli_q_stats *q_stats = &((sc)->q_stats[q_type]);     \
  199                                                                         \
  200         if (++(q_stats->cur_len) > q_stats->max_len)                    \
  201                 q_stats->max_len = q_stats->cur_len;                    \
  202 } while(0)
  203 
  204 
  205 #define TW_OSLI_Q_REMOVE(sc, q_type)                                    \
  206         (sc)->q_stats[q_type].cur_len--
  207 
  208 
  209 #else /* TW_OSL_DEBUG */
  210 
  211 #define TW_OSLI_Q_INIT(sc, q_index)
  212 #define TW_OSLI_Q_INSERT(sc, q_index)
  213 #define TW_OSLI_Q_REMOVE(sc, q_index)
  214 
  215 #endif /* TW_OSL_DEBUG */
  216 
  217 
  218 
  219 /* Initialize a queue of requests. */
  220 static __inline TW_VOID
  221 tw_osli_req_q_init(struct twa_softc *sc, TW_UINT8 q_type)
  222 {
  223         TW_CL_Q_INIT(&(sc->req_q_head[q_type]));
  224         TW_OSLI_Q_INIT(sc, q_type);
  225 }
  226 
  227 
  228 
  229 /* Insert the given request at the head of the given queue (q_type). */
  230 static __inline TW_VOID
  231 tw_osli_req_q_insert_head(struct tw_osli_req_context *req, TW_UINT8 q_type)
  232 {
  233         mtx_lock_spin(req->ctlr->q_lock);
  234         TW_CL_Q_INSERT_HEAD(&(req->ctlr->req_q_head[q_type]), &(req->link));
  235         TW_OSLI_Q_INSERT(req->ctlr, q_type);
  236         mtx_unlock_spin(req->ctlr->q_lock);
  237 }
  238 
  239 
  240 
  241 /* Insert the given request at the tail of the given queue (q_type). */
  242 static __inline TW_VOID
  243 tw_osli_req_q_insert_tail(struct tw_osli_req_context *req, TW_UINT8 q_type)
  244 {
  245         mtx_lock_spin(req->ctlr->q_lock);
  246         TW_CL_Q_INSERT_TAIL(&(req->ctlr->req_q_head[q_type]), &(req->link));
  247         TW_OSLI_Q_INSERT(req->ctlr, q_type);
  248         mtx_unlock_spin(req->ctlr->q_lock);
  249 }
  250 
  251 
  252 
  253 /* Remove and return the request at the head of the given queue (q_type). */
  254 static __inline struct tw_osli_req_context *
  255 tw_osli_req_q_remove_head(struct twa_softc *sc, TW_UINT8 q_type)
  256 {
  257         struct tw_osli_req_context      *req = NULL;
  258         struct tw_cl_link               *link;
  259 
  260         mtx_lock_spin(sc->q_lock);
  261         if ((link = TW_CL_Q_FIRST_ITEM(&(sc->req_q_head[q_type]))) !=
  262                 TW_CL_NULL) {
  263                 req = TW_CL_STRUCT_HEAD(link,
  264                         struct tw_osli_req_context, link);
  265                 TW_CL_Q_REMOVE_ITEM(&(sc->req_q_head[q_type]), &(req->link));
  266                 TW_OSLI_Q_REMOVE(sc, q_type);
  267         }
  268         mtx_unlock_spin(sc->q_lock);
  269         return(req);
  270 }
  271 
  272 
  273 
  274 /* Remove the given request from the given queue (q_type). */
  275 static __inline TW_VOID
  276 tw_osli_req_q_remove_item(struct tw_osli_req_context *req, TW_UINT8 q_type)
  277 {
  278         mtx_lock_spin(req->ctlr->q_lock);
  279         TW_CL_Q_REMOVE_ITEM(&(req->ctlr->req_q_head[q_type]), &(req->link));
  280         TW_OSLI_Q_REMOVE(req->ctlr, q_type);
  281         mtx_unlock_spin(req->ctlr->q_lock);
  282 }
  283 
  284 
  285 
  286 #ifdef TW_OSL_DEBUG
  287 
  288 extern TW_INT32 TW_DEBUG_LEVEL_FOR_OSL;
  289 
  290 #define tw_osli_dbg_dprintf(dbg_level, sc, fmt, args...)                \
  291         if (dbg_level <= TW_DEBUG_LEVEL_FOR_OSL)                        \
  292                 device_printf(sc->bus_dev, "%s: " fmt "\n",             \
  293                         __func__, ##args)
  294 
  295 
  296 #define tw_osli_dbg_printf(dbg_level, fmt, args...)                     \
  297         if (dbg_level <= TW_DEBUG_LEVEL_FOR_OSL)                        \
  298                 printf("%s: " fmt "\n", __func__, ##args)
  299 
  300 #else /* TW_OSL_DEBUG */
  301 
  302 #define tw_osli_dbg_dprintf(dbg_level, sc, fmt, args...)
  303 #define tw_osli_dbg_printf(dbg_level, fmt, args...)
  304 
  305 #endif /* TW_OSL_DEBUG */
  306 
  307 
  308 /* For regular printing. */
  309 #define twa_printf(sc, fmt, args...)                                    \
  310         device_printf(((struct twa_softc *)(sc))->bus_dev, fmt, ##args)
  311 
  312 /* For printing in the "consistent error reporting" format. */
  313 #define tw_osli_printf(sc, err_specific_desc, args...)                  \
  314         device_printf((sc)->bus_dev,                                    \
  315                 "%s: (0x%02X: 0x%04X): %s: " err_specific_desc "\n", ##args)
  316 
  317 
  318 
  319 #endif /* TW_OSL_H */

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