The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/tws/tws.h

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    1 /*
    2  * Copyright (c) 2010, LSI Corp.
    3  * All rights reserved.
    4  * Author : Manjunath Ranganathaiah
    5  * Support: freebsdraid@lsi.com
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  *
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in
   15  *    the documentation and/or other materials provided with the
   16  *    distribution.
   17  * 3. Neither the name of the <ORGANIZATION> nor the names of its
   18  *    contributors may be used to endorse or promote products derived
   19  *    from this software without specific prior written permission.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   22  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
   24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
   25  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
   26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
   27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
   29  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
   31  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   32  * POSSIBILITY OF SUCH DAMAGE.
   33  *
   34  * $FreeBSD: releng/11.2/sys/dev/tws/tws.h 331722 2018-03-29 02:50:57Z eadler $
   35  */
   36 
   37 #include <sys/param.h>        /* defines used in kernel.h */
   38 #include <sys/module.h>
   39 #include <sys/systm.h>
   40 #include <sys/proc.h>
   41 #include <sys/errno.h>
   42 #include <sys/kernel.h>       /* types used in module initialization */
   43 #include <sys/conf.h>         /* cdevsw struct */
   44 #include <sys/uio.h>          /* uio struct */
   45 #include <sys/malloc.h>
   46 #include <sys/bus.h>          /* structs, prototypes for pci bus stuff */
   47 
   48 
   49 #include <machine/bus.h>
   50 #include <sys/rman.h>
   51 #include <machine/resource.h>
   52 
   53 #include <dev/pci/pcivar.h>   /* For pci_get macros! */
   54 #include <dev/pci/pcireg.h>
   55 
   56 #include <sys/types.h>
   57 #include <sys/sysctl.h>
   58 #include <sys/stat.h>
   59 
   60 
   61 #define TWS_PULL_MODE_ENABLE 1
   62 
   63 MALLOC_DECLARE(M_TWS);
   64 /* externs */
   65 extern int tws_queue_depth;
   66 
   67 
   68 #define TWS_DRIVER_VERSION_STRING "10.80.00.005"
   69 #define TWS_MAX_NUM_UNITS             65 
   70 #define TWS_MAX_NUM_LUNS              32
   71 #define TWS_MAX_IRQS                  2
   72 #define TWS_SCSI_INITIATOR_ID         66
   73 #define TWS_MAX_IO_SIZE               0x20000 /* 128kB */
   74 #define TWS_SECTOR_SIZE               0x200
   75 #define TWS_POLL_TIMEOUT              60
   76 #define TWS_IO_TIMEOUT                60
   77 #define TWS_IOCTL_TIMEOUT             60
   78 #define TWS_RESET_TIMEOUT             60
   79 
   80 #define TWS_PCI_BAR0                  0x10
   81 #define TWS_PCI_BAR1                  0x14
   82 #define TWS_PCI_BAR2                  0x1C
   83 
   84 #define TWS_VENDOR_ID                 0x13C1 
   85 #define TWS_DEVICE_ID                 0x1010
   86 
   87 #define TWS_INVALID_REQID             0xFFFF
   88 
   89 /* bus tag related */
   90 #define TWS_ALIGNMENT                 4
   91 #define TWS_IN_MF_ALIGNMENT           16
   92 #define TWS_OUT_MF_ALIGNMENT          4
   93 
   94 #define TWS_MAX_32BIT_SG_ELEMENTS     93     /* max 32-bit sg elements */
   95 #define TWS_MAX_64BIT_SG_ELEMENTS     46     /* max 64-bit sg elements */
   96 
   97 #define TWS_MAX_QS                    4
   98 #define TWS_MAX_REQS                  256
   99 #define TWS_RESERVED_REQS             4
  100 
  101 /* Request states */
  102 #define TWS_REQ_STATE_FREE            0
  103 #define TWS_REQ_STATE_BUSY            1
  104 #define TWS_REQ_STATE_TRAN            2
  105 #define TWS_REQ_STATE_COMPLETE        3
  106 
  107 /* Request types */
  108 #define TWS_REQ_TYPE_INTERNAL_CMD     0x0
  109 #define TWS_REQ_TYPE_AEN_FETCH        0x1
  110 #define TWS_REQ_TYPE_PASSTHRU         0x2
  111 #define TWS_REQ_TYPE_GETSET_PARAM     0x3
  112 #define TWS_REQ_TYPE_SCSI_IO          0x4
  113 
  114 /* Driver states */
  115 
  116 enum tws_states {
  117     TWS_INIT=50,
  118     TWS_UNINIT,
  119     TWS_OFFLINE,
  120     TWS_ONLINE,
  121     TWS_RESET,
  122 };
  123 
  124 /* events */
  125 
  126 enum tws_events {
  127     TWS_INIT_START=100,
  128     TWS_INIT_COMPLETE,
  129     TWS_UNINIT_START,
  130     TWS_RESET_START,
  131     TWS_RESET_COMPLETE,
  132     TWS_SCAN_FAILURE,
  133 };
  134 
  135 enum tws_req_flags {
  136     TWS_DIR_UNKNOWN = 0x1,
  137     TWS_DIR_IN = 0x2,
  138     TWS_DIR_OUT = 0x4,
  139     TWS_DIR_NONE = 0x8,
  140     TWS_DATA_CCB = 0x10,
  141 };
  142  
  143 enum tws_intrs {
  144      TWS_INTx,
  145      TWS_MSI,
  146      TWS_MSIX,
  147 };
  148 
  149 struct tws_msix_info {
  150     int tbl_res_id;
  151     bus_space_tag_t tbl_tag;
  152     bus_space_handle_t tbl_handle;
  153     struct resource *tbl_res;  
  154 };
  155 
  156 struct tws_ioctl_lock {
  157     u_int32_t       lock;
  158     time_t          timeout;
  159 };
  160  
  161 
  162 #define TWS_TRACE_FNAME_LEN  10
  163 #define TWS_TRACE_FUNC_LEN   15
  164 #define TWS_TRACE_DESC_LEN   10
  165 struct tws_trace_rec {
  166     struct timespec ts;
  167     char fname[TWS_TRACE_FNAME_LEN];
  168     char func[TWS_TRACE_FUNC_LEN];
  169     int linenum;
  170     char desc[TWS_TRACE_DESC_LEN];
  171     u_int64_t val1;
  172     u_int64_t val2;
  173 };
  174 
  175 struct tws_circular_q {
  176     volatile int16_t head;
  177     volatile int16_t tail;
  178     u_int16_t depth;
  179     u_int8_t  overflow;
  180     void *    q;
  181 };
  182  
  183 
  184 
  185 struct tws_stats {
  186     u_int64_t reqs_in;
  187     u_int64_t reqs_out;
  188     u_int64_t reqs_errored;
  189     u_int64_t spurios_intrs;
  190     u_int64_t num_intrs;    
  191     u_int64_t num_aens;    
  192     u_int64_t ioctls;       
  193     u_int64_t scsi_ios;
  194 };
  195 
  196 struct tws_init_connect_info {
  197     u_int16_t     working_srl;
  198     u_int16_t     working_branch;
  199     u_int16_t     working_build;
  200     u_int16_t     fw_on_ctlr_srl;
  201     u_int16_t     fw_on_ctlr_branch;
  202     u_int16_t     fw_on_ctlr_build;
  203 
  204 };
  205 
  206 
  207 /* ------------ boolean types ------------------- */
  208 
  209 #ifndef __bool_true_false_are_defined
  210 typedef enum _boolean { false, true } boolean;
  211 #else
  212 #define boolean         bool
  213 #endif
  214 enum err { SUCCESS, FAILURE };
  215 
  216 /* ----------- per instance data ---------------- */
  217 
  218 /* The softc holds our per-instance data. */
  219 struct tws_softc {
  220     device_t    tws_dev;                  /* bus device */
  221     struct cdev *tws_cdev;                /* controller device */
  222     u_int32_t   device_id;                /* device id */
  223     u_int32_t   subvendor_id;             /* device id */
  224     u_int32_t   subdevice_id;             /* device id */
  225     u_int8_t    tws_state;                /* driver state */
  226     u_int8_t    tws_prev_state;           /* driver prev state */
  227     struct sysctl_ctx_list tws_clist;     /* sysctl context */
  228     struct sysctl_oid *tws_oidp;          /* sysctl context */
  229     struct resource *reg_res;             /* register interface window */
  230     struct resource *mfa_res;             /* mfa interface window */
  231     int reg_res_id;                       /* register resource id */
  232     int mfa_res_id;                       /* register resource id */
  233     bus_space_handle_t bus_handle;        /* bus space handle */
  234     bus_space_handle_t bus_mfa_handle;     /* bus space handle */
  235     bus_space_tag_t bus_tag;              /* bus space tag */
  236     bus_space_tag_t bus_mfa_tag;          /* bus space tag for mfa's */
  237     u_int64_t mfa_base;                   /* mfa base address */
  238     struct resource *irq_res[TWS_MAX_IRQS];/* interrupt resource */
  239     int irq_res_id[TWS_MAX_IRQS];         /* intr resource id */
  240     void *intr_handle[TWS_MAX_IRQS];      /* interrupt handle */
  241     int irqs;                             /* intrs used */
  242     struct tws_msix_info msix;            /* msix info */
  243     struct cam_sim *sim;                  /* sim for this controller */
  244     struct cam_path *path;                /* Ctlr path to CAM */
  245     struct mtx q_lock;                    /* queue lock */
  246     struct mtx sim_lock;                  /* sim lock */
  247     struct mtx gen_lock;                  /* general driver  lock */
  248     struct mtx io_lock;                   /* IO  lock */
  249     struct tws_ioctl_lock ioctl_lock;     /* ioctl lock */ 
  250     u_int32_t seq_id;                     /* Sequence id */
  251     struct tws_circular_q aen_q;          /* aen q */
  252     struct tws_circular_q trace_q;        /* trace q */
  253     struct tws_stats stats;               /* I/O stats */
  254     struct tws_init_connect_info cinfo;   /* compatibility info */
  255     boolean is64bit;                      /* True - 64bit else 32bit */
  256     u_int8_t intr_type;                   /* Interrupt type used */
  257     bus_dma_tag_t parent_tag;             /* parent DMA tag */
  258     bus_dma_tag_t cmd_tag;                /* command DMA tag */
  259     bus_dmamap_t cmd_map;                 /* command map */
  260     void *dma_mem;                        /* pointer to dmable memory */
  261     u_int64_t dma_mem_phys;               /* phy addr */
  262     bus_dma_tag_t data_tag;               /* data DMA tag */
  263     void *ioctl_data_mem;                 /* ioctl dmable memory */
  264     bus_dmamap_t ioctl_data_map;          /* ioctl data map */
  265     struct tws_request *reqs;             /* pointer to requests */
  266     struct tws_sense *sense_bufs;         /* pointer to sense buffers */
  267     boolean obfl_q_overrun;               /* OBFL overrun flag  */
  268     union ccb *scan_ccb;                  /* pointer to a ccb */
  269     struct tws_request *q_head[TWS_MAX_QS]; /* head pointers to q's */
  270     struct tws_request *q_tail[TWS_MAX_QS]; /* tail pointers to q's */
  271     struct callout stats_timer;
  272 };

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