1 /*-
2 * Copyright (c) 2003 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: releng/8.4/sys/dev/uart/uart_bus.h 197938 2009-10-10 18:24:54Z marcel $
27 */
28
29 #ifndef _DEV_UART_BUS_H_
30 #define _DEV_UART_BUS_H_
31
32 #ifndef KLD_MODULE
33 #include "opt_uart.h"
34 #endif
35
36 #include <sys/serial.h>
37 #include <sys/timepps.h>
38
39 /* Drain and flush targets. */
40 #define UART_DRAIN_RECEIVER 0x0001
41 #define UART_DRAIN_TRANSMITTER 0x0002
42 #define UART_FLUSH_RECEIVER UART_DRAIN_RECEIVER
43 #define UART_FLUSH_TRANSMITTER UART_DRAIN_TRANSMITTER
44
45 /* Received character status bits. */
46 #define UART_STAT_BREAK 0x0100
47 #define UART_STAT_FRAMERR 0x0200
48 #define UART_STAT_OVERRUN 0x0400
49 #define UART_STAT_PARERR 0x0800
50
51 #ifdef UART_PPS_ON_CTS
52 #define UART_SIG_DPPS SER_DCTS
53 #define UART_SIG_PPS SER_CTS
54 #else
55 #define UART_SIG_DPPS SER_DDCD
56 #define UART_SIG_PPS SER_DCD
57 #endif
58
59 /* UART_IOCTL() requests */
60 #define UART_IOCTL_BREAK 1
61 #define UART_IOCTL_IFLOW 2
62 #define UART_IOCTL_OFLOW 3
63 #define UART_IOCTL_BAUD 4
64
65 /*
66 * UART class & instance (=softc)
67 */
68 struct uart_class {
69 KOBJ_CLASS_FIELDS;
70 struct uart_ops *uc_ops; /* Low-level console operations. */
71 u_int uc_range; /* Bus space address range. */
72 u_int uc_rclk; /* Default rclk for this device. */
73 };
74
75 struct uart_softc {
76 KOBJ_FIELDS;
77 struct uart_class *sc_class;
78 struct uart_bas sc_bas;
79 device_t sc_dev;
80
81 struct mtx sc_hwmtx_s; /* Spinlock protecting hardware. */
82 struct mtx *sc_hwmtx;
83
84 struct resource *sc_rres; /* Register resource. */
85 int sc_rrid;
86 int sc_rtype; /* SYS_RES_{IOPORT|MEMORY}. */
87 struct resource *sc_ires; /* Interrupt resource. */
88 void *sc_icookie;
89 int sc_irid;
90
91 int sc_callout:1; /* This UART is opened for callout. */
92 int sc_fastintr:1; /* This UART uses fast interrupts. */
93 int sc_hwiflow:1; /* This UART has HW input flow ctl. */
94 int sc_hwoflow:1; /* This UART has HW output flow ctl. */
95 int sc_leaving:1; /* This UART is going away. */
96 int sc_opened:1; /* This UART is open for business. */
97 int sc_polled:1; /* This UART has no interrupts. */
98 int sc_txbusy:1; /* This UART is transmitting. */
99 int sc_isquelch:1; /* This UART has input squelched. */
100
101 struct uart_devinfo *sc_sysdev; /* System device (or NULL). */
102
103 int sc_altbrk; /* State for alt break sequence. */
104 uint32_t sc_hwsig; /* Signal state. Used by HW driver. */
105
106 /* Receiver data. */
107 uint16_t *sc_rxbuf;
108 int sc_rxbufsz;
109 int sc_rxput;
110 int sc_rxget;
111 int sc_rxfifosz; /* Size of RX FIFO. */
112
113 /* Transmitter data. */
114 uint8_t *sc_txbuf;
115 int sc_txdatasz;
116 int sc_txfifosz; /* Size of TX FIFO and buffer. */
117
118 /* Pulse capturing support (PPS). */
119 struct pps_state sc_pps;
120
121 /* Upper layer data. */
122 void *sc_softih;
123 uint32_t sc_ttypend;
124 union {
125 /* TTY specific data. */
126 struct {
127 struct tty *tp;
128 } u_tty;
129 /* Keyboard specific data. */
130 struct {
131 } u_kbd;
132 } sc_u;
133 };
134
135 extern devclass_t uart_devclass;
136 extern char uart_driver_name[];
137
138 int uart_bus_attach(device_t dev);
139 int uart_bus_detach(device_t dev);
140 serdev_intr_t *uart_bus_ihand(device_t dev, int ipend);
141 int uart_bus_ipend(device_t dev);
142 int uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan);
143 int uart_bus_sysdev(device_t dev);
144
145 void uart_sched_softih(struct uart_softc *, uint32_t);
146
147 int uart_tty_attach(struct uart_softc *);
148 int uart_tty_detach(struct uart_softc *);
149 void uart_tty_intr(void *arg);
150
151 /*
152 * Receive buffer operations.
153 */
154 static __inline int
155 uart_rx_empty(struct uart_softc *sc)
156 {
157 return ((sc->sc_rxget == sc->sc_rxput) ? 1 : 0);
158 }
159
160 static __inline int
161 uart_rx_full(struct uart_softc *sc)
162 {
163 return ((sc->sc_rxput + 1 < sc->sc_rxbufsz)
164 ? (sc->sc_rxput + 1 == sc->sc_rxget) : (sc->sc_rxget == 0));
165 }
166
167 static __inline int
168 uart_rx_get(struct uart_softc *sc)
169 {
170 int ptr, xc;
171
172 ptr = sc->sc_rxget;
173 if (ptr == sc->sc_rxput)
174 return (-1);
175 xc = sc->sc_rxbuf[ptr++];
176 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0;
177 return (xc);
178 }
179
180 static __inline int
181 uart_rx_next(struct uart_softc *sc)
182 {
183 int ptr;
184
185 ptr = sc->sc_rxget;
186 if (ptr == sc->sc_rxput)
187 return (-1);
188 ptr += 1;
189 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0;
190 return (0);
191 }
192
193 static __inline int
194 uart_rx_peek(struct uart_softc *sc)
195 {
196 int ptr;
197
198 ptr = sc->sc_rxget;
199 return ((ptr == sc->sc_rxput) ? -1 : sc->sc_rxbuf[ptr]);
200 }
201
202 static __inline int
203 uart_rx_put(struct uart_softc *sc, int xc)
204 {
205 int ptr;
206
207 ptr = (sc->sc_rxput + 1 < sc->sc_rxbufsz) ? sc->sc_rxput + 1 : 0;
208 if (ptr == sc->sc_rxget)
209 return (ENOSPC);
210 sc->sc_rxbuf[sc->sc_rxput] = xc;
211 sc->sc_rxput = ptr;
212 return (0);
213 }
214
215 #endif /* _DEV_UART_BUS_H_ */
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