The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/uart/uart_bus_pci.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2006 Marcel Moolenaar All rights reserved.
    5  * Copyright (c) 2001 M. Warner Losh <imp@FreeBSD.org>
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   26  */
   27 
   28 #include <sys/cdefs.h>
   29 __FBSDID("$FreeBSD$");
   30 
   31 #include <sys/param.h>
   32 #include <sys/systm.h>
   33 #include <sys/bus.h>
   34 #include <sys/conf.h>
   35 #include <sys/kernel.h>
   36 #include <sys/module.h>
   37 #include <machine/bus.h>
   38 #include <sys/rman.h>
   39 #include <machine/resource.h>
   40 
   41 #include <dev/pci/pcivar.h>
   42 #include <dev/pci/pcireg.h>
   43 
   44 #include <dev/uart/uart.h>
   45 #include <dev/uart/uart_bus.h>
   46 #include <dev/uart/uart_cpu.h>
   47 
   48 #define DEFAULT_RCLK    1843200
   49 
   50 static int uart_pci_probe(device_t dev);
   51 static int uart_pci_attach(device_t dev);
   52 static int uart_pci_detach(device_t dev);
   53 
   54 static device_method_t uart_pci_methods[] = {
   55         /* Device interface */
   56         DEVMETHOD(device_probe,         uart_pci_probe),
   57         DEVMETHOD(device_attach,        uart_pci_attach),
   58         DEVMETHOD(device_detach,        uart_pci_detach),
   59         DEVMETHOD(device_resume,        uart_bus_resume),
   60         DEVMETHOD_END
   61 };
   62 
   63 static driver_t uart_pci_driver = {
   64         uart_driver_name,
   65         uart_pci_methods,
   66         sizeof(struct uart_softc),
   67 };
   68 
   69 struct pci_id {
   70         uint16_t        vendor;
   71         uint16_t        device;
   72         uint16_t        subven;
   73         uint16_t        subdev;
   74         const char      *desc;
   75         int             rid;
   76         int             rclk;
   77         int             regshft;
   78 };
   79 
   80 struct pci_unique_id {
   81         uint16_t        vendor;
   82         uint16_t        device;
   83 };
   84 
   85 #define PCI_NO_MSI      0x40000000
   86 #define PCI_RID_MASK    0x0000ffff
   87 
   88 static const struct pci_id pci_ns8250_ids[] = {
   89 { 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14,
   90         128 * DEFAULT_RCLK },
   91 { 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14,
   92         128 * DEFAULT_RCLK },
   93 { 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 },
   94 { 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 },
   95 { 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2",
   96         0x10 },
   97 { 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 },
   98 { 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 },
   99 { 0x103c, 0x3301, 0xffff, 0, "HP iLO serial port", 0x10 },
  100 { 0x11c1, 0x0480, 0xffff, 0, "Agere Systems Venus Modem (V90, 56KFlex)", 0x14 },
  101 { 0x115d, 0x0103, 0xffff, 0, "Xircom Cardbus Ethernet + 56k Modem", 0x10 },
  102 { 0x125b, 0x9100, 0xa000, 0x1000,
  103         "ASIX AX99100 PCIe 1/2/3/4-port RS-232/422/485", 0x10 },
  104 { 0x1282, 0x6585, 0xffff, 0, "Davicom 56PDV PCI Modem", 0x10 },
  105 { 0x12b9, 0x1008, 0xffff, 0, "3Com 56K FaxModem Model 5610", 0x10 },
  106 { 0x131f, 0x1000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x18 },
  107 { 0x131f, 0x1001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x18 },
  108 { 0x131f, 0x1002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x18 },
  109 { 0x131f, 0x2000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x10 },
  110 { 0x131f, 0x2001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x10 },
  111 { 0x131f, 0x2002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x10 },
  112 { 0x135c, 0x0190, 0xffff, 0, "Quatech SSCLP-100", 0x18 },
  113 { 0x135c, 0x01c0, 0xffff, 0, "Quatech SSCLP-200/300", 0x18 },
  114 { 0x135e, 0x7101, 0xffff, 0, "Sealevel Systems Single Port RS-232/422/485/530",
  115         0x18 },
  116 { 0x1407, 0x0110, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port A", 0x10 },
  117 { 0x1407, 0x0111, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port B", 0x10 },
  118 { 0x1407, 0x0510, 0xffff, 0, "Lava SP Serial 550 PCI", 0x10 },
  119 { 0x1409, 0x7168, 0x1409, 0x4025, "Timedia Technology Serial Port", 0x10,
  120         8 * DEFAULT_RCLK },
  121 { 0x1409, 0x7168, 0x1409, 0x4027, "Timedia Technology Serial Port", 0x10,
  122         8 * DEFAULT_RCLK },
  123 { 0x1409, 0x7168, 0x1409, 0x4028, "Timedia Technology Serial Port", 0x10,
  124         8 * DEFAULT_RCLK },
  125 { 0x1409, 0x7168, 0x1409, 0x5025, "Timedia Technology Serial Port", 0x10,
  126         8 * DEFAULT_RCLK },
  127 { 0x1409, 0x7168, 0x1409, 0x5027, "Timedia Technology Serial Port", 0x10,
  128         8 * DEFAULT_RCLK },
  129 { 0x1415, 0x950b, 0xffff, 0, "Oxford Semiconductor OXCB950 Cardbus 16950 UART",
  130         0x10, 16384000 },
  131 { 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART",
  132         0x10 },
  133 { 0x14e4, 0x160a, 0xffff, 0, "Broadcom TruManage UART", 0x10,
  134         128 * DEFAULT_RCLK, 2},
  135 { 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10},
  136 { 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 },
  137 { 0x1d0f, 0x8250, 0x0000, 0, "Amazon PCI serial device", 0x10 },
  138 { 0x1d0f, 0x8250, 0x1d0f, 0, "Amazon PCI serial device", 0x10 },
  139 { 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10,
  140         8 * DEFAULT_RCLK },
  141 { 0x8086, 0x0f0a, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#1", 0x10,
  142         24 * DEFAULT_RCLK, 2 },
  143 { 0x8086, 0x0f0c, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10,
  144         24 * DEFAULT_RCLK, 2 },
  145 { 0x8086, 0x108f, 0xffff, 0, "Intel AMT - SOL", 0x10 },
  146 { 0x8086, 0x19d8, 0xffff, 0, "Intel Denverton UART", 0x10 },
  147 { 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 },
  148 { 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller",
  149         0x10 },
  150 { 0x8086, 0x1e3d, 0xffff, 0, "Intel Panther Point KT Controller", 0x10 },
  151 { 0x8086, 0x228a, 0xffff, 0, "Intel Cherryview SIO HSUART#1", 0x10,
  152         24 * DEFAULT_RCLK, 2 },
  153 { 0x8086, 0x228c, 0xffff, 0, "Intel Cherryview SIO HSUART#2", 0x10,
  154         24 * DEFAULT_RCLK, 2 },
  155 { 0x8086, 0x2a07, 0xffff, 0, "Intel AMT - PM965/GM965 KT Controller", 0x10 },
  156 { 0x8086, 0x2a47, 0xffff, 0, "Mobile 4 Series Chipset KT Controller", 0x10 },
  157 { 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 },
  158 { 0x8086, 0x31bc, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 0", 0x10,
  159         24 * DEFAULT_RCLK, 2 },
  160 { 0x8086, 0x31be, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 1", 0x10,
  161         24 * DEFAULT_RCLK, 2 },
  162 { 0x8086, 0x31c0, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 2", 0x10,
  163         24 * DEFAULT_RCLK, 2 },
  164 { 0x8086, 0x31ee, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 3", 0x10,
  165         24 * DEFAULT_RCLK, 2 },
  166 { 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller",
  167         0x10 },
  168 { 0x8086, 0x5abc, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 0", 0x10,
  169         24 * DEFAULT_RCLK, 2 },
  170 { 0x8086, 0x5abe, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 1", 0x10,
  171         24 * DEFAULT_RCLK, 2 },
  172 { 0x8086, 0x5ac0, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 2", 0x10,
  173         24 * DEFAULT_RCLK, 2 },
  174 { 0x8086, 0x5aee, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 3", 0x10,
  175         24 * DEFAULT_RCLK, 2 },
  176 { 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 },
  177 { 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 },
  178 { 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },
  179 { 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 },
  180 { 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 },
  181 { 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 },
  182 { 0x8086, 0x8d3d, 0xffff, 0,
  183         "Intel Corporation C610/X99 series chipset KT Controller", 0x10 },
  184 { 0x8086, 0x9c3d, 0xffff, 0, "Intel Lynx Point-LP HECI KT", 0x10 },
  185 { 0x8086, 0xa13d, 0xffff, 0,
  186         "100 Series/C230 Series Chipset Family KT Redirection",
  187         0x10 | PCI_NO_MSI },
  188 { 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 },
  189 { 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 },
  190 { 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 },
  191 { 0x9710, 0x9900, 0xa000, 0x1000,
  192         "MosChip MCS9900 PCIe to Peripheral Controller", 0x10 },
  193 { 0x9710, 0x9901, 0xa000, 0x1000,
  194         "MosChip MCS9901 PCIe to Peripheral Controller", 0x10 },
  195 { 0x9710, 0x9904, 0xa000, 0x1000,
  196         "MosChip MCS9904 PCIe to Peripheral Controller", 0x10 },
  197 { 0x9710, 0x9922, 0xa000, 0x1000,
  198         "MosChip MCS9922 PCIe to Peripheral Controller", 0x10 },
  199 { 0xdeaf, 0x9051, 0xffff, 0, "Middle Digital PC Weasel Serial Port", 0x10 },
  200 { 0xffff, 0, 0xffff, 0, NULL, 0, 0}
  201 };
  202 
  203 const static struct pci_id *
  204 uart_pci_match(device_t dev, const struct pci_id *id)
  205 {
  206         uint16_t device, subdev, subven, vendor;
  207 
  208         vendor = pci_get_vendor(dev);
  209         device = pci_get_device(dev);
  210         while (id->vendor != 0xffff &&
  211             (id->vendor != vendor || id->device != device))
  212                 id++;
  213         if (id->vendor == 0xffff)
  214                 return (NULL);
  215         if (id->subven == 0xffff)
  216                 return (id);
  217         subven = pci_get_subvendor(dev);
  218         subdev = pci_get_subdevice(dev);
  219         while (id->vendor == vendor && id->device == device &&
  220             (id->subven != subven || id->subdev != subdev))
  221                 id++;
  222         return ((id->vendor == vendor && id->device == device) ? id : NULL);
  223 }
  224 
  225 extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
  226 
  227 /* PCI vendor/device pairs of devices guaranteed to be unique on a system. */
  228 static const struct pci_unique_id pci_unique_devices[] = {
  229 { 0x1d0f, 0x8250 }      /* Amazon PCI serial device */
  230 };
  231 
  232 /* Match a UART to a console if it's a PCI device known to be unique. */
  233 static void
  234 uart_pci_unique_console_match(device_t dev)
  235 {
  236         struct uart_softc *sc;
  237         struct uart_devinfo * sysdev;
  238         const struct pci_unique_id * id;
  239         uint16_t vendor, device;
  240 
  241         sc = device_get_softc(dev);
  242         vendor = pci_get_vendor(dev);
  243         device = pci_get_device(dev);
  244 
  245         /* Is this a device known to exist only once in a system? */
  246         for (id = pci_unique_devices; ; id++) {
  247                 if (id == &pci_unique_devices[nitems(pci_unique_devices)])
  248                         return;
  249                 if (id->vendor == vendor && id->device == device)
  250                         break;
  251         }
  252 
  253         /* If it matches a console, it must be the same device. */
  254         SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
  255                 if (sysdev->pci_info.vendor == vendor &&
  256                     sysdev->pci_info.device == device) {
  257                         sc->sc_sysdev = sysdev;
  258                         sysdev->bas.rclk = sc->sc_bas.rclk;
  259                 }
  260         }
  261 }
  262 
  263 static int
  264 uart_pci_probe(device_t dev)
  265 {
  266         struct uart_softc *sc;
  267         const struct pci_id *id;
  268         struct pci_id cid = {
  269                 .regshft = 0,
  270                 .rclk = 0,
  271                 .rid = 0x10 | PCI_NO_MSI,
  272                 .desc = "Generic SimpleComm PCI device",
  273         };
  274         int result;
  275 
  276         sc = device_get_softc(dev);
  277 
  278         id = uart_pci_match(dev, pci_ns8250_ids);
  279         if (id != NULL) {
  280                 sc->sc_class = &uart_ns8250_class;
  281                 goto match;
  282         }
  283         if (pci_get_class(dev) == PCIC_SIMPLECOMM &&
  284             pci_get_subclass(dev) == PCIS_SIMPLECOMM_UART &&
  285             pci_get_progif(dev) < PCIP_SIMPLECOMM_UART_16550A) {
  286                 /* XXX rclk what to do */
  287                 id = &cid;
  288                 sc->sc_class = &uart_ns8250_class;
  289                 goto match;
  290         }
  291         /* Add checks for non-ns8250 IDs here. */
  292         return (ENXIO);
  293 
  294  match:
  295         result = uart_bus_probe(dev, id->regshft, 0, id->rclk,
  296             id->rid & PCI_RID_MASK, 0, 0);
  297         /* Bail out on error. */
  298         if (result > 0)
  299                 return (result);
  300         /*
  301          * If we haven't already matched this to a console, check if it's a
  302          * PCI device which is known to only exist once in any given system
  303          * and we can match it that way.
  304          */
  305         if (sc->sc_sysdev == NULL)
  306                 uart_pci_unique_console_match(dev);
  307         /* Set/override the device description. */
  308         if (id->desc)
  309                 device_set_desc(dev, id->desc);
  310         return (result);
  311 }
  312 
  313 static int
  314 uart_pci_attach(device_t dev)
  315 {
  316         struct uart_softc *sc;
  317         const struct pci_id *id;
  318         int count;
  319 
  320         sc = device_get_softc(dev);
  321 
  322         /*
  323          * Use MSI in preference to legacy IRQ if available. However, experience
  324          * suggests this is only reliable when one MSI vector is advertised.
  325          */
  326         id = uart_pci_match(dev, pci_ns8250_ids);
  327         if ((id == NULL || (id->rid & PCI_NO_MSI) == 0) &&
  328             pci_msi_count(dev) == 1) {
  329                 count = 1;
  330                 if (pci_alloc_msi(dev, &count) == 0) {
  331                         sc->sc_irid = 1;
  332                         device_printf(dev, "Using %d MSI message\n", count);
  333                 }
  334         }
  335 
  336         return (uart_bus_attach(dev));
  337 }
  338 
  339 static int
  340 uart_pci_detach(device_t dev)
  341 {
  342         struct uart_softc *sc;
  343 
  344         sc = device_get_softc(dev);
  345 
  346         if (sc->sc_irid != 0)
  347                 pci_release_msi(dev);
  348 
  349         return (uart_bus_detach(dev));
  350 }
  351 
  352 DRIVER_MODULE(uart, pci, uart_pci_driver, NULL, NULL);

Cache object: 3a560c63fb9b638e2cea08a9fc0b77f9


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