1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2003 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/conf.h>
36 #include <sys/cons.h>
37 #include <sys/fcntl.h>
38 #include <sys/interrupt.h>
39 #include <sys/kdb.h>
40 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/queue.h>
43 #include <sys/reboot.h>
44 #include <sys/sysctl.h>
45 #include <machine/bus.h>
46 #include <sys/rman.h>
47 #include <machine/resource.h>
48 #include <machine/stdarg.h>
49
50 #include <dev/uart/uart.h>
51 #include <dev/uart/uart_bus.h>
52 #include <dev/uart/uart_cpu.h>
53 #include <dev/uart/uart_ppstypes.h>
54
55 #include "uart_if.h"
56
57 devclass_t uart_devclass;
58 const char uart_driver_name[] = "uart";
59
60 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
61 SLIST_HEAD_INITIALIZER(uart_sysdevs);
62
63 static MALLOC_DEFINE(M_UART, "UART", "UART driver");
64
65 #ifndef UART_POLL_FREQ
66 #define UART_POLL_FREQ 50
67 #endif
68 static int uart_poll_freq = UART_POLL_FREQ;
69 SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq,
70 0, "UART poll frequency");
71
72 static int uart_force_poll;
73 SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll,
74 0, "Force UART polling");
75
76 static inline int
77 uart_pps_mode_valid(int pps_mode)
78 {
79 int opt;
80
81 switch(pps_mode & UART_PPS_SIGNAL_MASK) {
82 case UART_PPS_DISABLED:
83 case UART_PPS_CTS:
84 case UART_PPS_DCD:
85 break;
86 default:
87 return (false);
88 }
89
90 opt = pps_mode & UART_PPS_OPTION_MASK;
91 if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0)
92 return (false);
93
94 return (true);
95 }
96
97 static void
98 uart_pps_print_mode(struct uart_softc *sc)
99 {
100
101 device_printf(sc->sc_dev, "PPS capture mode: ");
102 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
103 case UART_PPS_DISABLED:
104 printf("disabled");
105 break;
106 case UART_PPS_CTS:
107 printf("CTS");
108 break;
109 case UART_PPS_DCD:
110 printf("DCD");
111 break;
112 default:
113 printf("invalid");
114 break;
115 }
116 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
117 printf("-Inverted");
118 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE)
119 printf("-NarrowPulse");
120 printf("\n");
121 }
122
123 static int
124 uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)
125 {
126 struct uart_softc *sc;
127 int err, tmp;
128
129 sc = arg1;
130 tmp = sc->sc_pps_mode;
131 err = sysctl_handle_int(oidp, &tmp, 0, req);
132 if (err != 0 || req->newptr == NULL)
133 return (err);
134 if (!uart_pps_mode_valid(tmp))
135 return (EINVAL);
136 sc->sc_pps_mode = tmp;
137 return(0);
138 }
139
140 static void
141 uart_pps_process(struct uart_softc *sc, int ser_sig)
142 {
143 sbintime_t now;
144 int is_assert, pps_sig;
145
146 /* Which signal is configured as PPS? Early out if none. */
147 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
148 case UART_PPS_CTS:
149 pps_sig = SER_CTS;
150 break;
151 case UART_PPS_DCD:
152 pps_sig = SER_DCD;
153 break;
154 default:
155 return;
156 }
157
158 /* Early out if there is no change in the signal configured as PPS. */
159 if ((ser_sig & SER_DELTA(pps_sig)) == 0)
160 return;
161
162 /*
163 * In narrow-pulse mode we need to synthesize both capture and clear
164 * events from a single "delta occurred" indication from the uart
165 * hardware because the pulse width is too narrow to reliably detect
166 * both edges. However, when the pulse width is close to our interrupt
167 * processing latency we might intermittantly catch both edges. To
168 * guard against generating spurious events when that happens, we use a
169 * separate timer to ensure at least half a second elapses before we
170 * generate another event.
171 */
172 pps_capture(&sc->sc_pps);
173 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) {
174 now = getsbinuptime();
175 if (now > sc->sc_pps_captime + 500 * SBT_1MS) {
176 sc->sc_pps_captime = now;
177 pps_event(&sc->sc_pps, PPS_CAPTUREASSERT);
178 pps_event(&sc->sc_pps, PPS_CAPTURECLEAR);
179 }
180 } else {
181 is_assert = ser_sig & pps_sig;
182 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
183 is_assert = !is_assert;
184 pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT :
185 PPS_CAPTURECLEAR);
186 }
187 }
188
189 static void
190 uart_pps_init(struct uart_softc *sc)
191 {
192 struct sysctl_ctx_list *ctx;
193 struct sysctl_oid *tree;
194
195 ctx = device_get_sysctl_ctx(sc->sc_dev);
196 tree = device_get_sysctl_tree(sc->sc_dev);
197
198 /*
199 * The historical default for pps capture mode is either DCD or CTS,
200 * depending on the UART_PPS_ON_CTS kernel option. Start with that,
201 * then try to fetch the tunable that overrides the mode for all uart
202 * devices, then try to fetch the sysctl-tunable that overrides the mode
203 * for one specific device.
204 */
205 #ifdef UART_PPS_ON_CTS
206 sc->sc_pps_mode = UART_PPS_CTS;
207 #else
208 sc->sc_pps_mode = UART_PPS_DCD;
209 #endif
210 TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode);
211 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode",
212 CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, sc, 0,
213 uart_pps_mode_sysctl, "I", "pulse mode: 0/1/2=disabled/CTS/DCD; "
214 "add 0x10 to invert, 0x20 for narrow pulse");
215
216 if (!uart_pps_mode_valid(sc->sc_pps_mode)) {
217 device_printf(sc->sc_dev,
218 "Invalid pps_mode 0x%02x configured; disabling PPS capture\n",
219 sc->sc_pps_mode);
220 sc->sc_pps_mode = UART_PPS_DISABLED;
221 } else if (bootverbose) {
222 uart_pps_print_mode(sc);
223 }
224
225 sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
226 sc->sc_pps.driver_mtx = uart_tty_getlock(sc);
227 sc->sc_pps.driver_abi = PPS_ABI_VERSION;
228 pps_init_abi(&sc->sc_pps);
229 }
230
231 void
232 uart_add_sysdev(struct uart_devinfo *di)
233 {
234 SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
235 }
236
237 const char *
238 uart_getname(struct uart_class *uc)
239 {
240 return ((uc != NULL) ? uc->name : NULL);
241 }
242
243 struct uart_ops *
244 uart_getops(struct uart_class *uc)
245 {
246 return ((uc != NULL) ? uc->uc_ops : NULL);
247 }
248
249 int
250 uart_getrange(struct uart_class *uc)
251 {
252 return ((uc != NULL) ? uc->uc_range : 0);
253 }
254
255 u_int
256 uart_getregshift(struct uart_class *uc)
257 {
258 return ((uc != NULL) ? uc->uc_rshift : 0);
259 }
260
261 u_int
262 uart_getregiowidth(struct uart_class *uc)
263 {
264 return ((uc != NULL) ? uc->uc_riowidth : 0);
265 }
266
267 /*
268 * Schedule a soft interrupt. We do this on the 0 to !0 transition
269 * of the TTY pending interrupt status.
270 */
271 void
272 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
273 {
274 uint32_t new, old;
275
276 do {
277 old = sc->sc_ttypend;
278 new = old | ipend;
279 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
280
281 if ((old & SER_INT_MASK) == 0)
282 swi_sched(sc->sc_softih, 0);
283 }
284
285 /*
286 * A break condition has been detected. We treat the break condition as
287 * a special case that should not happen during normal operation. When
288 * the break condition is to be passed to higher levels in the form of
289 * a NUL character, we really want the break to be in the right place in
290 * the input stream. The overhead to achieve that is not in relation to
291 * the exceptional nature of the break condition, so we permit ourselves
292 * to be sloppy.
293 */
294 static __inline int
295 uart_intr_break(void *arg)
296 {
297 struct uart_softc *sc = arg;
298
299 #if defined(KDB)
300 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
301 if (kdb_break())
302 return (0);
303 }
304 #endif
305 if (sc->sc_opened)
306 uart_sched_softih(sc, SER_INT_BREAK);
307 return (0);
308 }
309
310 /*
311 * Handle a receiver overrun situation. We lost at least 1 byte in the
312 * input stream and it's our job to contain the situation. We grab as
313 * much of the data we can, but otherwise flush the receiver FIFO to
314 * create some breathing room. The net effect is that we avoid the
315 * overrun condition to happen for the next X characters, where X is
316 * related to the FIFO size at the cost of losing data right away.
317 * So, instead of having multiple overrun interrupts in close proximity
318 * to each other and possibly pessimizing UART interrupt latency for
319 * other UARTs in a multiport configuration, we create a longer segment
320 * of missing characters by freeing up the FIFO.
321 * Each overrun condition is marked in the input buffer by a token. The
322 * token represents the loss of at least one, but possible more bytes in
323 * the input stream.
324 */
325 static __inline int
326 uart_intr_overrun(void *arg)
327 {
328 struct uart_softc *sc = arg;
329
330 if (sc->sc_opened) {
331 UART_RECEIVE(sc);
332 if (uart_rx_put(sc, UART_STAT_OVERRUN))
333 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
334 uart_sched_softih(sc, SER_INT_RXREADY);
335 }
336 sc->sc_rxoverruns++;
337 UART_FLUSH(sc, UART_FLUSH_RECEIVER);
338 return (0);
339 }
340
341 /*
342 * Received data ready.
343 */
344 static __inline int
345 uart_intr_rxready(void *arg)
346 {
347 struct uart_softc *sc = arg;
348 int rxp;
349
350 rxp = sc->sc_rxput;
351 UART_RECEIVE(sc);
352 #if defined(KDB)
353 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
354 while (rxp != sc->sc_rxput) {
355 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
356 if (rxp == sc->sc_rxbufsz)
357 rxp = 0;
358 }
359 }
360 #endif
361 if (sc->sc_opened)
362 uart_sched_softih(sc, SER_INT_RXREADY);
363 else
364 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */
365 return (1);
366 }
367
368 /*
369 * Line or modem status change (OOB signalling).
370 * We pass the signals to the software interrupt handler for further
371 * processing. Note that we merge the delta bits, but set the state
372 * bits. This is to avoid losing state transitions due to having more
373 * than 1 hardware interrupt between software interrupts.
374 */
375 static __inline int
376 uart_intr_sigchg(void *arg)
377 {
378 struct uart_softc *sc = arg;
379 int new, old, sig;
380
381 sig = UART_GETSIG(sc);
382
383 /*
384 * Time pulse counting support, invoked whenever the PPS parameters are
385 * currently set to capture either edge of the signal.
386 */
387 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
388 uart_pps_process(sc, sig);
389 }
390
391 /*
392 * Keep track of signal changes, even when the device is not
393 * opened. This allows us to inform upper layers about a
394 * possible loss of DCD and thus the existence of a (possibly)
395 * different connection when we have DCD back, during the time
396 * that the device was closed.
397 */
398 do {
399 old = sc->sc_ttypend;
400 new = old & ~SER_MASK_STATE;
401 new |= sig & SER_INT_SIGMASK;
402 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
403
404 if (sc->sc_opened)
405 uart_sched_softih(sc, SER_INT_SIGCHG);
406 return (1);
407 }
408
409 /*
410 * The transmitter can accept more data.
411 */
412 static __inline int
413 uart_intr_txidle(void *arg)
414 {
415 struct uart_softc *sc = arg;
416
417 if (sc->sc_txbusy) {
418 sc->sc_txbusy = 0;
419 uart_sched_softih(sc, SER_INT_TXIDLE);
420 }
421 return (0);
422 }
423
424 static int
425 uart_intr(void *arg)
426 {
427 struct uart_softc *sc = arg;
428 int cnt, ipend, testintr;
429
430 if (sc->sc_leaving)
431 return (FILTER_STRAY);
432
433 cnt = 0;
434 testintr = sc->sc_testintr;
435 while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) {
436 cnt++;
437 if (ipend & SER_INT_OVERRUN)
438 uart_intr_overrun(sc);
439 if (ipend & SER_INT_BREAK)
440 uart_intr_break(sc);
441 if (ipend & SER_INT_RXREADY)
442 uart_intr_rxready(sc);
443 if (ipend & SER_INT_SIGCHG)
444 uart_intr_sigchg(sc);
445 if (ipend & SER_INT_TXIDLE)
446 uart_intr_txidle(sc);
447 }
448
449 if (sc->sc_polled) {
450 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
451 (callout_func_t *)uart_intr, sc);
452 }
453
454 return ((cnt == 0) ? FILTER_STRAY :
455 ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD :
456 FILTER_HANDLED));
457 }
458
459 serdev_intr_t *
460 uart_bus_ihand(device_t dev, int ipend)
461 {
462
463 switch (ipend) {
464 case SER_INT_BREAK:
465 return (uart_intr_break);
466 case SER_INT_OVERRUN:
467 return (uart_intr_overrun);
468 case SER_INT_RXREADY:
469 return (uart_intr_rxready);
470 case SER_INT_SIGCHG:
471 return (uart_intr_sigchg);
472 case SER_INT_TXIDLE:
473 return (uart_intr_txidle);
474 }
475 return (NULL);
476 }
477
478 int
479 uart_bus_ipend(device_t dev)
480 {
481 struct uart_softc *sc;
482
483 sc = device_get_softc(dev);
484 return (UART_IPEND(sc));
485 }
486
487 int
488 uart_bus_sysdev(device_t dev)
489 {
490 struct uart_softc *sc;
491
492 sc = device_get_softc(dev);
493 return ((sc->sc_sysdev != NULL) ? 1 : 0);
494 }
495
496 int
497 uart_bus_probe(device_t dev, int regshft, int regiowidth, int rclk, int rid, int chan, int quirks)
498 {
499 struct uart_softc *sc;
500 struct uart_devinfo *sysdev;
501 int error;
502
503 sc = device_get_softc(dev);
504
505 /*
506 * All uart_class references are weak. Check that the needed
507 * class has been compiled-in. Fail if not.
508 */
509 if (sc->sc_class == NULL)
510 return (ENXIO);
511
512 /*
513 * Initialize the instance. Note that the instance (=softc) does
514 * not necessarily match the hardware specific softc. We can't do
515 * anything about it now, because we may not attach to the device.
516 * Hardware drivers cannot use any of the class specific fields
517 * while probing.
518 */
519 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
520 sc->sc_dev = dev;
521 if (device_get_desc(dev) == NULL)
522 device_set_desc(dev, uart_getname(sc->sc_class));
523
524 /*
525 * Allocate the register resource. We assume that all UARTs have
526 * a single register window in either I/O port space or memory
527 * mapped I/O space. Any UART that needs multiple windows will
528 * consequently not be supported by this driver as-is. We try I/O
529 * port space first because that's the common case.
530 */
531 sc->sc_rrid = rid;
532 sc->sc_rtype = SYS_RES_IOPORT;
533 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
534 RF_ACTIVE);
535 if (sc->sc_rres == NULL) {
536 sc->sc_rrid = rid;
537 sc->sc_rtype = SYS_RES_MEMORY;
538 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype,
539 &sc->sc_rrid, RF_ACTIVE);
540 if (sc->sc_rres == NULL)
541 return (ENXIO);
542 }
543
544 /*
545 * Fill in the bus access structure and compare this device with
546 * a possible console device and/or a debug port. We set the flags
547 * in the softc so that the hardware dependent probe can adjust
548 * accordingly. In general, you don't want to permanently disrupt
549 * console I/O.
550 */
551 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
552 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
553 sc->sc_bas.chan = chan;
554 sc->sc_bas.regshft = regshft;
555 sc->sc_bas.regiowidth = regiowidth;
556 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
557 sc->sc_bas.busy_detect = !!(quirks & UART_F_BUSY_DETECT);
558
559 SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
560 if (chan == sysdev->bas.chan &&
561 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
562 /* XXX check if ops matches class. */
563 sc->sc_sysdev = sysdev;
564 sysdev->bas.rclk = sc->sc_bas.rclk;
565 }
566 }
567
568 error = UART_PROBE(sc);
569 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
570 return ((error) ? error : BUS_PROBE_DEFAULT);
571 }
572
573 int
574 uart_bus_attach(device_t dev)
575 {
576 struct uart_softc *sc, *sc0;
577 const char *sep;
578 int error, filt;
579
580 /*
581 * The sc_class field defines the type of UART we're going to work
582 * with and thus the size of the softc. Replace the generic softc
583 * with one that matches the UART now that we're certain we handle
584 * the device.
585 */
586 sc0 = device_get_softc(dev);
587 if (sc0->sc_class->size > device_get_driver(dev)->size) {
588 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
589 bcopy(sc0, sc, sizeof(*sc));
590 device_set_softc(dev, sc);
591 } else
592 sc = sc0;
593
594 /*
595 * Now that we know the softc for this device, connect the back
596 * pointer from the sysdev for this device, if any
597 */
598 if (sc->sc_sysdev != NULL)
599 sc->sc_sysdev->sc = sc;
600
601 /*
602 * Protect ourselves against interrupts while we're not completely
603 * finished attaching and initializing. We don't expect interrupts
604 * until after UART_ATTACH(), though.
605 */
606 sc->sc_leaving = 1;
607
608 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
609 if (sc->sc_hwmtx == NULL)
610 sc->sc_hwmtx = &sc->sc_hwmtx_s;
611
612 /*
613 * Re-allocate. We expect that the softc contains the information
614 * collected by uart_bus_probe() intact.
615 */
616 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
617 RF_ACTIVE);
618 if (sc->sc_rres == NULL) {
619 mtx_destroy(&sc->sc_hwmtx_s);
620 return (ENXIO);
621 }
622 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
623 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
624
625 /*
626 * Ensure there is room for at least three full FIFOs of data in the
627 * receive buffer (handles the case of low-level drivers with huge
628 * FIFOs), and also ensure that there is no less than the historical
629 * size of 384 bytes (handles the typical small-FIFO case).
630 */
631 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3);
632 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
633 M_UART, M_WAITOK);
634 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
635 M_UART, M_WAITOK);
636
637 error = UART_ATTACH(sc);
638 if (error)
639 goto fail;
640
641 if (sc->sc_hwiflow || sc->sc_hwoflow) {
642 sep = "";
643 device_print_prettyname(dev);
644 if (sc->sc_hwiflow) {
645 printf("%sRTS iflow", sep);
646 sep = ", ";
647 }
648 if (sc->sc_hwoflow) {
649 printf("%sCTS oflow", sep);
650 sep = ", ";
651 }
652 printf("\n");
653 }
654
655 if (sc->sc_sysdev != NULL) {
656 if (sc->sc_sysdev->baudrate == 0) {
657 if (UART_IOCTL(sc, UART_IOCTL_BAUD,
658 (intptr_t)&sc->sc_sysdev->baudrate) != 0)
659 sc->sc_sysdev->baudrate = -1;
660 }
661 switch (sc->sc_sysdev->type) {
662 case UART_DEV_CONSOLE:
663 device_printf(dev, "console");
664 break;
665 case UART_DEV_DBGPORT:
666 device_printf(dev, "debug port");
667 break;
668 case UART_DEV_KEYBOARD:
669 device_printf(dev, "keyboard");
670 break;
671 default:
672 device_printf(dev, "unknown system device");
673 break;
674 }
675 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
676 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
677 sc->sc_sysdev->stopbits);
678 }
679
680 sc->sc_leaving = 0;
681 sc->sc_testintr = 1;
682 filt = uart_intr(sc);
683 sc->sc_testintr = 0;
684
685 /*
686 * Don't use interrupts if we couldn't clear any pending interrupt
687 * conditions. We may have broken H/W and polling is probably the
688 * safest thing to do.
689 */
690 if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) {
691 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
692 &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE);
693 }
694 if (sc->sc_ires != NULL) {
695 error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY,
696 uart_intr, NULL, sc, &sc->sc_icookie);
697 sc->sc_fastintr = (error == 0) ? 1 : 0;
698
699 if (!sc->sc_fastintr)
700 error = bus_setup_intr(dev, sc->sc_ires,
701 INTR_TYPE_TTY | INTR_MPSAFE, NULL,
702 (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
703
704 if (error) {
705 device_printf(dev, "could not activate interrupt\n");
706 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
707 sc->sc_ires);
708 sc->sc_ires = NULL;
709 }
710 }
711 if (sc->sc_ires == NULL) {
712 /* No interrupt resource. Force polled mode. */
713 sc->sc_polled = 1;
714 callout_init(&sc->sc_timer, 1);
715 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
716 (callout_func_t *)uart_intr, sc);
717 }
718
719 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
720 sep = "";
721 device_print_prettyname(dev);
722 if (sc->sc_fastintr) {
723 printf("%sfast interrupt", sep);
724 sep = ", ";
725 }
726 if (sc->sc_polled) {
727 printf("%spolled mode (%dHz)", sep, uart_poll_freq);
728 sep = ", ";
729 }
730 printf("\n");
731 }
732
733 if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) {
734 if ((error = sc->sc_sysdev->attach(sc)) != 0)
735 goto fail;
736 } else {
737 if ((error = uart_tty_attach(sc)) != 0)
738 goto fail;
739 uart_pps_init(sc);
740 }
741
742 if (sc->sc_sysdev != NULL)
743 sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
744
745 if (sc->sc_rxfifosz > 1)
746 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
747 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
748 "rx_overruns", CTLFLAG_RD, &sc->sc_rxoverruns, 0,
749 "Receive overruns");
750
751 return (0);
752
753 fail:
754 free(sc->sc_txbuf, M_UART);
755 free(sc->sc_rxbuf, M_UART);
756
757 if (sc->sc_ires != NULL) {
758 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
759 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
760 sc->sc_ires);
761 }
762 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
763
764 mtx_destroy(&sc->sc_hwmtx_s);
765
766 return (error);
767 }
768
769 int
770 uart_bus_detach(device_t dev)
771 {
772 struct uart_softc *sc;
773
774 sc = device_get_softc(dev);
775
776 sc->sc_leaving = 1;
777
778 if (sc->sc_sysdev != NULL)
779 sc->sc_sysdev->hwmtx = NULL;
780
781 UART_DETACH(sc);
782
783 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
784 (*sc->sc_sysdev->detach)(sc);
785 else
786 uart_tty_detach(sc);
787
788 free(sc->sc_txbuf, M_UART);
789 free(sc->sc_rxbuf, M_UART);
790
791 if (sc->sc_ires != NULL) {
792 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
793 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
794 sc->sc_ires);
795 }
796 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
797
798 mtx_destroy(&sc->sc_hwmtx_s);
799
800 if (sc->sc_class->size > device_get_driver(dev)->size) {
801 device_set_softc(dev, NULL);
802 free(sc, M_UART);
803 }
804
805 return (0);
806 }
807
808 int
809 uart_bus_resume(device_t dev)
810 {
811 struct uart_softc *sc;
812
813 sc = device_get_softc(dev);
814 return (UART_ATTACH(sc));
815 }
816
817 void
818 uart_grab(struct uart_devinfo *di)
819 {
820
821 if (di->sc)
822 UART_GRAB(di->sc);
823 }
824
825 void
826 uart_ungrab(struct uart_devinfo *di)
827 {
828
829 if (di->sc)
830 UART_UNGRAB(di->sc);
831 }
Cache object: 5f834f1d9f93e2cc7b257e69986b371f
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