1 /*-
2 * Copyright (c) 1997, 1998, 1999, 2000-2003
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/usb/if_axereg.h,v 1.17 2007/11/10 16:23:38 sam Exp $
33 */
34
35 /*
36 * Definitions for the ASIX Electronics AX88172 to ethernet controller.
37 */
38
39
40 /*
41 * Vendor specific commands
42 * ASIX conveniently doesn't document the 'set NODEID' command in their
43 * datasheet (thanks a lot guys).
44 * To make handling these commands easier, I added some extra data
45 * which is decided by the axe_cmd() routine. Commands are encoded
46 * in 16 bites, with the format: LDCC. L and D are both nibbles in
47 * the high byte. L represents the data length (0 to 15) and D
48 * represents the direction (0 for vendor read, 1 for vendor write).
49 * CC is the command byte, as specified in the manual.
50 */
51
52 #define AXE_CMD_DIR(x) (((x) & 0x0F00) >> 8)
53 #define AXE_CMD_LEN(x) (((x) & 0xF000) >> 12)
54 #define AXE_CMD_CMD(x) ((x) & 0x00FF)
55
56 #define AXE_172_CMD_READ_RXTX_SRAM 0x2002
57 #define AXE_182_CMD_READ_RXTX_SRAM 0x8002
58 #define AXE_172_CMD_WRITE_RX_SRAM 0x0103
59 #define AXE_172_CMD_WRITE_TX_SRAM 0x0104
60 #define AXE_182_CMD_WRITE_RXTX_SRAM 0x8103
61 #define AXE_CMD_MII_OPMODE_SW 0x0106
62 #define AXE_CMD_MII_READ_REG 0x2007
63 #define AXE_CMD_MII_WRITE_REG 0x2108
64 #define AXE_CMD_MII_READ_OPMODE 0x1009
65 #define AXE_CMD_MII_OPMODE_HW 0x010A
66 #define AXE_CMD_SROM_READ 0x200B
67 #define AXE_CMD_SROM_WRITE 0x010C
68 #define AXE_CMD_SROM_WR_ENABLE 0x010D
69 #define AXE_CMD_SROM_WR_DISABLE 0x010E
70 #define AXE_CMD_RXCTL_READ 0x200F
71 #define AXE_CMD_RXCTL_WRITE 0x0110
72 #define AXE_CMD_READ_IPG012 0x3011
73 #define AXE_172_CMD_WRITE_IPG0 0x0112
74 #define AXE_172_CMD_WRITE_IPG1 0x0113
75 #define AXE_172_CMD_WRITE_IPG2 0x0114
76 #define AXE_178_CMD_WRITE_IPG012 0x0112
77 #define AXE_CMD_READ_MCAST 0x8015
78 #define AXE_CMD_WRITE_MCAST 0x8116
79 #define AXE_172_CMD_READ_NODEID 0x6017
80 #define AXE_172_CMD_WRITE_NODEID 0x6118
81 #define AXE_178_CMD_READ_NODEID 0x6013
82 #define AXE_178_CMD_WRITE_NODEID 0x6114
83 #define AXE_CMD_READ_PHYID 0x2019
84 #define AXE_172_CMD_READ_MEDIA 0x101A
85 #define AXE_178_CMD_READ_MEDIA 0x201A
86 #define AXE_CMD_WRITE_MEDIA 0x011B
87 #define AXE_CMD_READ_MONITOR_MODE 0x101C
88 #define AXE_CMD_WRITE_MONITOR_MODE 0x011D
89 #define AXE_CMD_READ_GPIO 0x101E
90 #define AXE_CMD_WRITE_GPIO 0x011F
91 #define AXE_CMD_SW_RESET_REG 0x0120
92 #define AXE_CMD_SW_PHY_STATUS 0x0021
93 #define AXE_CMD_SW_PHY_SELECT 0x0122
94
95 #define AXE_SW_RESET_CLEAR 0x00
96 #define AXE_SW_RESET_RR 0x01
97 #define AXE_SW_RESET_RT 0x02
98 #define AXE_SW_RESET_PRTE 0x04
99 #define AXE_SW_RESET_PRL 0x08
100 #define AXE_SW_RESET_BZ 0x10
101 #define AXE_SW_RESET_IPRL 0x20
102 #define AXE_SW_RESET_IPPD 0x40
103
104 /* AX88178 documentation says to always write this bit... */
105 #define AXE_178_RESET_MAGIC 0x40
106
107 #define AXE_178_MEDIA_GMII 0x0001
108 #define AXE_MEDIA_FULL_DUPLEX 0x0002
109 #define AXE_172_MEDIA_TX_ABORT_ALLOW 0x0004
110 /* AX88178/88772 documentation says to always write 1 to bit 2 */
111 #define AXE_178_MEDIA_MAGIC 0x0004
112 /* AX88772 documentation says to always write 0 to bit 3 */
113 #define AXE_178_MEDIA_ENCK 0x0008
114 #define AXE_172_MEDIA_FLOW_CONTROL_EN 0x0010
115 #define AXE_178_MEDIA_RXFLOW_CONTROL_EN 0x0010
116 #define AXE_178_MEDIA_TXFLOW_CONTROL_EN 0x0020
117 #define AXE_178_MEDIA_JUMBO_EN 0x0040
118 #define AXE_178_MEDIA_LTPF_ONLY 0x0080
119 #define AXE_178_MEDIA_RX_EN 0x0100
120 #define AXE_178_MEDIA_100TX 0x0200
121 #define AXE_178_MEDIA_SBP 0x0800
122 #define AXE_178_MEDIA_SUPERMAC 0x1000
123
124 #define AXE_RXCMD_PROMISC 0x0001
125 #define AXE_RXCMD_ALLMULTI 0x0002
126 #define AXE_172_RXCMD_UNICAST 0x0004
127 #define AXE_178_RXCMD_KEEP_INVALID_CRC 0x0004
128 #define AXE_RXCMD_BROADCAST 0x0008
129 #define AXE_RXCMD_MULTICAST 0x0010
130 #define AXE_178_RXCMD_AP 0x0020
131 #define AXE_RXCMD_ENABLE 0x0080
132 #define AXE_178_RXCMD_MFB_2048 0x0000 /* 2K max frame burst */
133 #define AXE_178_RXCMD_MFB_4096 0x0100 /* 4K max frame burst */
134 #define AXE_178_RXCMD_MFB_8192 0x0200 /* 8K max frame burst */
135 #define AXE_178_RXCMD_MFB_16384 0x0300 /* 16K max frame burst*/
136
137 #define AXE_NOPHY 0xE0
138 #define AXE_INTPHY 0x10
139
140 #define AXE_TIMEOUT 1000
141 #define AXE_172_BUFSZ 1536
142 #define AXE_178_MIN_BUFSZ 2048
143 #define AXE_MIN_FRAMELEN 60
144 #define AXE_RX_FRAMES 1
145 #define AXE_TX_FRAMES 1
146
147 #if AXE_178_MAX_FRAME_BURST == 0
148 #define AXE_178_RXCMD_MFB AXE_178_RXCMD_MFB_2048
149 #define AXE_178_MAX_BUFSZ 2048
150 #elif AXE_178_MAX_FRAME_BURST == 1
151 #define AXE_178_RXCMD_MFB AXE_178_RXCMD_MFB_4096
152 #define AXE_178_MAX_BUFSZ 4096
153 #elif AXE_178_MAX_FRAME_BURST == 2
154 #define AXE_178_RXCMD_MFB AXE_178_RXCMD_MFB_8192
155 #define AXE_178_MAX_BUFSZ 8192
156 #else
157 #define AXE_178_RXCMD_MFB AXE_178_RXCMD_MFB_16384
158 #define AXE_178_MAX_BUFSZ 16384
159 #endif
160
161 #define AXE_RX_LIST_CNT 1
162 #define AXE_TX_LIST_CNT 1
163
164 struct axe_chain {
165 struct axe_softc *axe_sc;
166 usbd_xfer_handle axe_xfer;
167 char *axe_buf;
168 struct mbuf *axe_mbuf;
169 int axe_accum;
170 int axe_idx;
171 };
172
173 struct axe_cdata {
174 struct axe_chain axe_tx_chain[AXE_TX_LIST_CNT];
175 struct axe_chain axe_rx_chain[AXE_RX_LIST_CNT];
176 int axe_tx_prod;
177 int axe_tx_cons;
178 int axe_tx_cnt;
179 int axe_rx_prod;
180 };
181
182 #define AXE_CTL_READ 0x01
183 #define AXE_CTL_WRITE 0x02
184
185 #define AXE_CONFIG_NO 1
186 #define AXE_IFACE_IDX 0
187
188 /*
189 * The interrupt endpoint is currently unused
190 * by the ASIX part.
191 */
192 #define AXE_ENDPT_RX 0x0
193 #define AXE_ENDPT_TX 0x1
194 #define AXE_ENDPT_INTR 0x2
195 #define AXE_ENDPT_MAX 0x3
196
197 struct axe_sframe_hdr {
198 uint16_t len;
199 uint16_t ilen;
200 } __packed;
201
202 struct axe_type {
203 struct usb_devno axe_dev;
204 uint32_t axe_flags;
205 #define AX172 0x0000 /* AX88172 */
206 #define AX178 0x0001 /* AX88178 */
207 #define AX772 0x0002 /* AX88772 */
208 };
209
210 #define AXE_INC(x, y) (x) = (x + 1) % y
211
212 struct axe_softc {
213 #if defined(__FreeBSD__)
214 #define GET_MII(sc) (device_get_softc((sc)->axe_miibus))
215 #elif defined(__NetBSD__)
216 #define GET_MII(sc) (&(sc)->axe_mii)
217 #elif defined(__OpenBSD__)
218 #define GET_MII(sc) (&(sc)->axe_mii)
219 #endif
220 struct ifnet *axe_ifp;
221 device_t axe_miibus;
222 device_t axe_dev;
223 usbd_device_handle axe_udev;
224 usbd_interface_handle axe_iface;
225 u_int16_t axe_vendor;
226 u_int16_t axe_product;
227 u_int16_t axe_flags;
228 int axe_ed[AXE_ENDPT_MAX];
229 usbd_pipe_handle axe_ep[AXE_ENDPT_MAX];
230 int axe_if_flags;
231 struct axe_cdata axe_cdata;
232 struct callout_handle axe_stat_ch;
233 struct mtx axe_mtx;
234 struct sx axe_sleeplock;
235 char axe_dying;
236 int axe_link;
237 unsigned char axe_ipgs[3];
238 unsigned char axe_phyaddrs[2];
239 struct timeval axe_rx_notice;
240 struct usb_task axe_tick_task;
241 int axe_bufsz;
242 int axe_boundary;
243 };
244
245 #if 0
246 #define AXE_LOCK(_sc) mtx_lock(&(_sc)->axe_mtx)
247 #define AXE_UNLOCK(_sc) mtx_unlock(&(_sc)->axe_mtx)
248 #else
249 #define AXE_LOCK(_sc)
250 #define AXE_UNLOCK(_sc)
251 #endif
252 #define AXE_SLEEPLOCK(_sc) sx_xlock(&(_sc)->axe_sleeplock)
253 #define AXE_SLEEPUNLOCK(_sc) sx_xunlock(&(_sc)->axe_sleeplock)
254 #define AXE_SLEEPLOCKASSERT(_sc) sx_assert(&(_sc)->axe_sleeplock, SX_XLOCKED)
255
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