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sys/dev/usb/if_ural.c
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1 /* $FreeBSD: releng/7.3/sys/dev/usb/if_ural.c 172211 2007-09-17 19:07:24Z sam $ */ 2 3 /*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __FBSDID("$FreeBSD: releng/7.3/sys/dev/usb/if_ural.c 172211 2007-09-17 19:07:24Z sam $"); 22 23 /*- 24 * Ralink Technology RT2500USB chipset driver 25 * http://www.ralinktech.com/ 26 */ 27 28 #include <sys/param.h> 29 #include <sys/sysctl.h> 30 #include <sys/sockio.h> 31 #include <sys/mbuf.h> 32 #include <sys/kernel.h> 33 #include <sys/socket.h> 34 #include <sys/systm.h> 35 #include <sys/malloc.h> 36 #include <sys/module.h> 37 #include <sys/bus.h> 38 #include <sys/endian.h> 39 40 #include <machine/bus.h> 41 #include <machine/resource.h> 42 #include <sys/rman.h> 43 44 #include <net/bpf.h> 45 #include <net/if.h> 46 #include <net/if_arp.h> 47 #include <net/ethernet.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 #include <net/if_types.h> 51 52 #include <net80211/ieee80211_var.h> 53 #include <net80211/ieee80211_amrr.h> 54 #include <net80211/ieee80211_radiotap.h> 55 #include <net80211/ieee80211_regdomain.h> 56 57 #include <dev/usb/usb.h> 58 #include <dev/usb/usbdi.h> 59 #include <dev/usb/usbdi_util.h> 60 #include "usbdevs.h" 61 62 #include <dev/usb/if_uralreg.h> 63 #include <dev/usb/if_uralvar.h> 64 65 #ifdef USB_DEBUG 66 #define DPRINTF(x) do { if (uraldebug > 0) printf x; } while (0) 67 #define DPRINTFN(n, x) do { if (uraldebug >= (n)) printf x; } while (0) 68 int uraldebug = 0; 69 SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural"); 70 SYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &uraldebug, 0, 71 "ural debug level"); 72 #else 73 #define DPRINTF(x) 74 #define DPRINTFN(n, x) 75 #endif 76 77 #define URAL_RSSI(rssi) \ 78 ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ? \ 79 ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0) 80 81 /* various supported device vendors/products */ 82 static const struct usb_devno ural_devs[] = { 83 { USB_VENDOR_ASUS, USB_PRODUCT_ASUS_WL167G }, 84 { USB_VENDOR_ASUS, USB_PRODUCT_RALINK_RT2570 }, 85 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 86 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7051 }, 87 { USB_VENDOR_CONCEPTRONIC2, USB_PRODUCT_CONCEPTRONIC2_C54RU }, 88 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 89 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 90 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GN54G }, 91 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 95 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 98 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 99 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570 }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_2 }, 101 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_3 }, 102 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902 }, 103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 106 { USB_VENDOR_SIEMENS2, USB_PRODUCT_SIEMENS2_WL54G }, 107 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 108 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R}, 109 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_RT2570 }, 110 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 111 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_RT2570 } 112 }; 113 114 MODULE_DEPEND(ural, wlan, 1, 1, 1); 115 MODULE_DEPEND(ural, wlan_amrr, 1, 1, 1); 116 MODULE_DEPEND(ural, usb, 1, 1, 1); 117 118 static int ural_alloc_tx_list(struct ural_softc *); 119 static void ural_free_tx_list(struct ural_softc *); 120 static int ural_alloc_rx_list(struct ural_softc *); 121 static void ural_free_rx_list(struct ural_softc *); 122 static int ural_media_change(struct ifnet *); 123 static void ural_task(void *); 124 static void ural_scantask(void *); 125 static int ural_newstate(struct ieee80211com *, 126 enum ieee80211_state, int); 127 static int ural_rxrate(struct ural_rx_desc *); 128 static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 129 usbd_status); 130 static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 131 usbd_status); 132 static int ural_ack_rate(struct ieee80211com *, int); 133 static uint16_t ural_txtime(int, int, uint32_t); 134 static uint8_t ural_plcp_signal(int); 135 static void ural_setup_tx_desc(struct ural_softc *, 136 struct ural_tx_desc *, uint32_t, int, int); 137 static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 138 struct ieee80211_node *); 139 static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 140 struct ieee80211_node *); 141 static int ural_tx_data(struct ural_softc *, struct mbuf *, 142 struct ieee80211_node *); 143 static void ural_start(struct ifnet *); 144 static void ural_watchdog(void *); 145 static int ural_reset(struct ifnet *); 146 static int ural_ioctl(struct ifnet *, u_long, caddr_t); 147 static void ural_set_testmode(struct ural_softc *); 148 static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 149 int); 150 static uint16_t ural_read(struct ural_softc *, uint16_t); 151 static void ural_read_multi(struct ural_softc *, uint16_t, void *, 152 int); 153 static void ural_write(struct ural_softc *, uint16_t, uint16_t); 154 static void ural_write_multi(struct ural_softc *, uint16_t, void *, 155 int) __unused; 156 static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 157 static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 158 static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 159 static void ural_scan_start(struct ieee80211com *); 160 static void ural_scan_end(struct ieee80211com *); 161 static void ural_set_channel(struct ieee80211com *); 162 static void ural_set_chan(struct ural_softc *, 163 struct ieee80211_channel *); 164 static void ural_disable_rf_tune(struct ural_softc *); 165 static void ural_enable_tsf_sync(struct ural_softc *); 166 static void ural_update_slot(struct ifnet *); 167 static void ural_set_txpreamble(struct ural_softc *); 168 static void ural_set_basicrates(struct ural_softc *); 169 static void ural_set_bssid(struct ural_softc *, const uint8_t *); 170 static void ural_set_macaddr(struct ural_softc *, uint8_t *); 171 static void ural_update_promisc(struct ural_softc *); 172 static const char *ural_get_rf(int); 173 static void ural_read_eeprom(struct ural_softc *); 174 static int ural_bbp_init(struct ural_softc *); 175 static void ural_set_txantenna(struct ural_softc *, int); 176 static void ural_set_rxantenna(struct ural_softc *, int); 177 static void ural_init(void *); 178 static void ural_stop(void *); 179 static int ural_raw_xmit(struct ieee80211_node *, struct mbuf *, 180 const struct ieee80211_bpf_params *); 181 static void ural_amrr_start(struct ural_softc *, 182 struct ieee80211_node *); 183 static void ural_amrr_timeout(void *); 184 static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 185 usbd_status status); 186 187 /* 188 * Default values for MAC registers; values taken from the reference driver. 189 */ 190 static const struct { 191 uint16_t reg; 192 uint16_t val; 193 } ural_def_mac[] = { 194 { RAL_TXRX_CSR5, 0x8c8d }, 195 { RAL_TXRX_CSR6, 0x8b8a }, 196 { RAL_TXRX_CSR7, 0x8687 }, 197 { RAL_TXRX_CSR8, 0x0085 }, 198 { RAL_MAC_CSR13, 0x1111 }, 199 { RAL_MAC_CSR14, 0x1e11 }, 200 { RAL_TXRX_CSR21, 0xe78f }, 201 { RAL_MAC_CSR9, 0xff1d }, 202 { RAL_MAC_CSR11, 0x0002 }, 203 { RAL_MAC_CSR22, 0x0053 }, 204 { RAL_MAC_CSR15, 0x0000 }, 205 { RAL_MAC_CSR8, 0x0780 }, 206 { RAL_TXRX_CSR19, 0x0000 }, 207 { RAL_TXRX_CSR18, 0x005a }, 208 { RAL_PHY_CSR2, 0x0000 }, 209 { RAL_TXRX_CSR0, 0x1ec0 }, 210 { RAL_PHY_CSR4, 0x000f } 211 }; 212 213 /* 214 * Default values for BBP registers; values taken from the reference driver. 215 */ 216 static const struct { 217 uint8_t reg; 218 uint8_t val; 219 } ural_def_bbp[] = { 220 { 3, 0x02 }, 221 { 4, 0x19 }, 222 { 14, 0x1c }, 223 { 15, 0x30 }, 224 { 16, 0xac }, 225 { 17, 0x48 }, 226 { 18, 0x18 }, 227 { 19, 0xff }, 228 { 20, 0x1e }, 229 { 21, 0x08 }, 230 { 22, 0x08 }, 231 { 23, 0x08 }, 232 { 24, 0x80 }, 233 { 25, 0x50 }, 234 { 26, 0x08 }, 235 { 27, 0x23 }, 236 { 30, 0x10 }, 237 { 31, 0x2b }, 238 { 32, 0xb9 }, 239 { 34, 0x12 }, 240 { 35, 0x50 }, 241 { 39, 0xc4 }, 242 { 40, 0x02 }, 243 { 41, 0x60 }, 244 { 53, 0x10 }, 245 { 54, 0x18 }, 246 { 56, 0x08 }, 247 { 57, 0x10 }, 248 { 58, 0x08 }, 249 { 61, 0x60 }, 250 { 62, 0x10 }, 251 { 75, 0xff } 252 }; 253 254 /* 255 * Default values for RF register R2 indexed by channel numbers. 256 */ 257 static const uint32_t ural_rf2522_r2[] = { 258 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 259 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 260 }; 261 262 static const uint32_t ural_rf2523_r2[] = { 263 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 264 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 265 }; 266 267 static const uint32_t ural_rf2524_r2[] = { 268 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 269 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 270 }; 271 272 static const uint32_t ural_rf2525_r2[] = { 273 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 274 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 275 }; 276 277 static const uint32_t ural_rf2525_hi_r2[] = { 278 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 279 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 280 }; 281 282 static const uint32_t ural_rf2525e_r2[] = { 283 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 284 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 285 }; 286 287 static const uint32_t ural_rf2526_hi_r2[] = { 288 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 289 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 290 }; 291 292 static const uint32_t ural_rf2526_r2[] = { 293 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 294 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 295 }; 296 297 /* 298 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 299 * values taken from the reference driver. 300 */ 301 static const struct { 302 uint8_t chan; 303 uint32_t r1; 304 uint32_t r2; 305 uint32_t r4; 306 } ural_rf5222[] = { 307 { 1, 0x08808, 0x0044d, 0x00282 }, 308 { 2, 0x08808, 0x0044e, 0x00282 }, 309 { 3, 0x08808, 0x0044f, 0x00282 }, 310 { 4, 0x08808, 0x00460, 0x00282 }, 311 { 5, 0x08808, 0x00461, 0x00282 }, 312 { 6, 0x08808, 0x00462, 0x00282 }, 313 { 7, 0x08808, 0x00463, 0x00282 }, 314 { 8, 0x08808, 0x00464, 0x00282 }, 315 { 9, 0x08808, 0x00465, 0x00282 }, 316 { 10, 0x08808, 0x00466, 0x00282 }, 317 { 11, 0x08808, 0x00467, 0x00282 }, 318 { 12, 0x08808, 0x00468, 0x00282 }, 319 { 13, 0x08808, 0x00469, 0x00282 }, 320 { 14, 0x08808, 0x0046b, 0x00286 }, 321 322 { 36, 0x08804, 0x06225, 0x00287 }, 323 { 40, 0x08804, 0x06226, 0x00287 }, 324 { 44, 0x08804, 0x06227, 0x00287 }, 325 { 48, 0x08804, 0x06228, 0x00287 }, 326 { 52, 0x08804, 0x06229, 0x00287 }, 327 { 56, 0x08804, 0x0622a, 0x00287 }, 328 { 60, 0x08804, 0x0622b, 0x00287 }, 329 { 64, 0x08804, 0x0622c, 0x00287 }, 330 331 { 100, 0x08804, 0x02200, 0x00283 }, 332 { 104, 0x08804, 0x02201, 0x00283 }, 333 { 108, 0x08804, 0x02202, 0x00283 }, 334 { 112, 0x08804, 0x02203, 0x00283 }, 335 { 116, 0x08804, 0x02204, 0x00283 }, 336 { 120, 0x08804, 0x02205, 0x00283 }, 337 { 124, 0x08804, 0x02206, 0x00283 }, 338 { 128, 0x08804, 0x02207, 0x00283 }, 339 { 132, 0x08804, 0x02208, 0x00283 }, 340 { 136, 0x08804, 0x02209, 0x00283 }, 341 { 140, 0x08804, 0x0220a, 0x00283 }, 342 343 { 149, 0x08808, 0x02429, 0x00281 }, 344 { 153, 0x08808, 0x0242b, 0x00281 }, 345 { 157, 0x08808, 0x0242d, 0x00281 }, 346 { 161, 0x08808, 0x0242f, 0x00281 } 347 }; 348 349 static device_probe_t ural_match; 350 static device_attach_t ural_attach; 351 static device_detach_t ural_detach; 352 353 static device_method_t ural_methods[] = { 354 /* Device interface */ 355 DEVMETHOD(device_probe, ural_match), 356 DEVMETHOD(device_attach, ural_attach), 357 DEVMETHOD(device_detach, ural_detach), 358 359 { 0, 0 } 360 }; 361 362 static driver_t ural_driver = { 363 "ural", 364 ural_methods, 365 sizeof(struct ural_softc) 366 }; 367 368 static devclass_t ural_devclass; 369 370 DRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, usbd_driver_load, 0); 371 372 static int 373 ural_match(device_t self) 374 { 375 struct usb_attach_arg *uaa = device_get_ivars(self); 376 377 if (uaa->iface != NULL) 378 return UMATCH_NONE; 379 380 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 381 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 382 } 383 384 static int 385 ural_attach(device_t self) 386 { 387 struct ural_softc *sc = device_get_softc(self); 388 struct usb_attach_arg *uaa = device_get_ivars(self); 389 struct ifnet *ifp; 390 struct ieee80211com *ic = &sc->sc_ic; 391 usb_interface_descriptor_t *id; 392 usb_endpoint_descriptor_t *ed; 393 usbd_status error; 394 int i, bands; 395 396 sc->sc_udev = uaa->device; 397 sc->sc_dev = self; 398 399 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 400 printf("%s: could not set configuration no\n", 401 device_get_nameunit(sc->sc_dev)); 402 return ENXIO; 403 } 404 405 /* get the first interface handle */ 406 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 407 &sc->sc_iface); 408 if (error != 0) { 409 printf("%s: could not get interface handle\n", 410 device_get_nameunit(sc->sc_dev)); 411 return ENXIO; 412 } 413 414 /* 415 * Find endpoints. 416 */ 417 id = usbd_get_interface_descriptor(sc->sc_iface); 418 419 sc->sc_rx_no = sc->sc_tx_no = -1; 420 for (i = 0; i < id->bNumEndpoints; i++) { 421 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 422 if (ed == NULL) { 423 printf("%s: no endpoint descriptor for %d\n", 424 device_get_nameunit(sc->sc_dev), i); 425 return ENXIO; 426 } 427 428 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 429 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 430 sc->sc_rx_no = ed->bEndpointAddress; 431 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 432 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 433 sc->sc_tx_no = ed->bEndpointAddress; 434 } 435 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 436 printf("%s: missing endpoint\n", 437 device_get_nameunit(sc->sc_dev)); 438 return ENXIO; 439 } 440 441 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 442 MTX_DEF | MTX_RECURSE); 443 444 usb_init_task(&sc->sc_task, ural_task, sc); 445 usb_init_task(&sc->sc_scantask, ural_scantask, sc); 446 callout_init(&sc->watchdog_ch, 0); 447 callout_init(&sc->amrr_ch, 0); 448 449 /* retrieve RT2570 rev. no */ 450 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 451 452 /* retrieve MAC address and various other things from EEPROM */ 453 ural_read_eeprom(sc); 454 455 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 456 device_get_nameunit(sc->sc_dev), sc->asic_rev, 457 ural_get_rf(sc->rf_rev)); 458 459 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); 460 if (ifp == NULL) { 461 printf("%s: can not if_alloc()\n", 462 device_get_nameunit(sc->sc_dev)); 463 return ENXIO; 464 } 465 466 ifp->if_softc = sc; 467 if_initname(ifp, "ural", device_get_unit(sc->sc_dev)); 468 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | 469 IFF_NEEDSGIANT; /* USB stack is still under Giant lock */ 470 ifp->if_init = ural_init; 471 ifp->if_ioctl = ural_ioctl; 472 ifp->if_start = ural_start; 473 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 474 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 475 IFQ_SET_READY(&ifp->if_snd); 476 477 ic->ic_ifp = ifp; 478 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 479 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 480 ic->ic_state = IEEE80211_S_INIT; 481 482 /* set device capabilities */ 483 ic->ic_caps = 484 IEEE80211_C_IBSS /* IBSS mode supported */ 485 | IEEE80211_C_MONITOR /* monitor mode supported */ 486 | IEEE80211_C_HOSTAP /* HostAp mode supported */ 487 | IEEE80211_C_TXPMGT /* tx power management */ 488 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 489 | IEEE80211_C_SHSLOT /* short slot time supported */ 490 | IEEE80211_C_BGSCAN /* bg scanning supported */ 491 | IEEE80211_C_WPA /* 802.11i */ 492 ; 493 494 bands = 0; 495 setbit(&bands, IEEE80211_MODE_11B); 496 setbit(&bands, IEEE80211_MODE_11G); 497 if (sc->rf_rev == RAL_RF_5222) 498 setbit(&bands, IEEE80211_MODE_11A); 499 ieee80211_init_channels(ic, 0, CTRY_DEFAULT, bands, 0, 1); 500 501 ieee80211_ifattach(ic); 502 ic->ic_reset = ural_reset; 503 /* enable s/w bmiss handling in sta mode */ 504 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS; 505 ic->ic_scan_start = ural_scan_start; 506 ic->ic_scan_end = ural_scan_end; 507 ic->ic_set_channel = ural_set_channel; 508 509 /* override state transition machine */ 510 sc->sc_newstate = ic->ic_newstate; 511 ic->ic_newstate = ural_newstate; 512 ic->ic_raw_xmit = ural_raw_xmit; 513 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 514 515 ieee80211_amrr_init(&sc->amrr, ic, 516 IEEE80211_AMRR_MIN_SUCCESS_THRESHOLD, 517 IEEE80211_AMRR_MAX_SUCCESS_THRESHOLD); 518 519 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 520 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 521 522 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 523 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 524 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 525 526 sc->sc_txtap_len = sizeof sc->sc_txtapu; 527 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 528 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 529 530 if (bootverbose) 531 ieee80211_announce(ic); 532 533 return 0; 534 } 535 536 static int 537 ural_detach(device_t self) 538 { 539 struct ural_softc *sc = device_get_softc(self); 540 struct ieee80211com *ic = &sc->sc_ic; 541 struct ifnet *ifp = ic->ic_ifp; 542 543 ural_stop(sc); 544 usb_rem_task(sc->sc_udev, &sc->sc_task); 545 callout_stop(&sc->watchdog_ch); 546 callout_stop(&sc->amrr_ch); 547 548 if (sc->amrr_xfer != NULL) { 549 usbd_free_xfer(sc->amrr_xfer); 550 sc->amrr_xfer = NULL; 551 } 552 553 if (sc->sc_rx_pipeh != NULL) { 554 usbd_abort_pipe(sc->sc_rx_pipeh); 555 usbd_close_pipe(sc->sc_rx_pipeh); 556 } 557 558 if (sc->sc_tx_pipeh != NULL) { 559 usbd_abort_pipe(sc->sc_tx_pipeh); 560 usbd_close_pipe(sc->sc_tx_pipeh); 561 } 562 563 ural_free_rx_list(sc); 564 ural_free_tx_list(sc); 565 566 bpfdetach(ifp); 567 ieee80211_ifdetach(ic); 568 if_free(ifp); 569 570 mtx_destroy(&sc->sc_mtx); 571 572 return 0; 573 } 574 575 static int 576 ural_alloc_tx_list(struct ural_softc *sc) 577 { 578 struct ural_tx_data *data; 579 int i, error; 580 581 sc->tx_queued = 0; 582 583 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 584 data = &sc->tx_data[i]; 585 586 data->sc = sc; 587 588 data->xfer = usbd_alloc_xfer(sc->sc_udev); 589 if (data->xfer == NULL) { 590 printf("%s: could not allocate tx xfer\n", 591 device_get_nameunit(sc->sc_dev)); 592 error = ENOMEM; 593 goto fail; 594 } 595 596 data->buf = usbd_alloc_buffer(data->xfer, 597 RAL_TX_DESC_SIZE + MCLBYTES); 598 if (data->buf == NULL) { 599 printf("%s: could not allocate tx buffer\n", 600 device_get_nameunit(sc->sc_dev)); 601 error = ENOMEM; 602 goto fail; 603 } 604 } 605 606 return 0; 607 608 fail: ural_free_tx_list(sc); 609 return error; 610 } 611 612 static void 613 ural_free_tx_list(struct ural_softc *sc) 614 { 615 struct ural_tx_data *data; 616 int i; 617 618 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 619 data = &sc->tx_data[i]; 620 621 if (data->xfer != NULL) { 622 usbd_free_xfer(data->xfer); 623 data->xfer = NULL; 624 } 625 626 if (data->ni != NULL) { 627 ieee80211_free_node(data->ni); 628 data->ni = NULL; 629 } 630 } 631 } 632 633 static int 634 ural_alloc_rx_list(struct ural_softc *sc) 635 { 636 struct ural_rx_data *data; 637 int i, error; 638 639 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 640 data = &sc->rx_data[i]; 641 642 data->sc = sc; 643 644 data->xfer = usbd_alloc_xfer(sc->sc_udev); 645 if (data->xfer == NULL) { 646 printf("%s: could not allocate rx xfer\n", 647 device_get_nameunit(sc->sc_dev)); 648 error = ENOMEM; 649 goto fail; 650 } 651 652 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 653 printf("%s: could not allocate rx buffer\n", 654 device_get_nameunit(sc->sc_dev)); 655 error = ENOMEM; 656 goto fail; 657 } 658 659 data->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 660 if (data->m == NULL) { 661 printf("%s: could not allocate rx mbuf\n", 662 device_get_nameunit(sc->sc_dev)); 663 error = ENOMEM; 664 goto fail; 665 } 666 667 data->buf = mtod(data->m, uint8_t *); 668 } 669 670 return 0; 671 672 fail: ural_free_tx_list(sc); 673 return error; 674 } 675 676 static void 677 ural_free_rx_list(struct ural_softc *sc) 678 { 679 struct ural_rx_data *data; 680 int i; 681 682 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 683 data = &sc->rx_data[i]; 684 685 if (data->xfer != NULL) { 686 usbd_free_xfer(data->xfer); 687 data->xfer = NULL; 688 } 689 690 if (data->m != NULL) { 691 m_freem(data->m); 692 data->m = NULL; 693 } 694 } 695 } 696 697 static int 698 ural_media_change(struct ifnet *ifp) 699 { 700 struct ural_softc *sc = ifp->if_softc; 701 int error; 702 703 RAL_LOCK(sc); 704 705 error = ieee80211_media_change(ifp); 706 if (error != ENETRESET) { 707 RAL_UNLOCK(sc); 708 return error; 709 } 710 711 if ((ifp->if_flags & IFF_UP) && 712 (ifp->if_drv_flags & IFF_DRV_RUNNING)) 713 ural_init(sc); 714 715 RAL_UNLOCK(sc); 716 717 return 0; 718 } 719 720 static void 721 ural_task(void *xarg) 722 { 723 struct ural_softc *sc = xarg; 724 struct ieee80211com *ic = &sc->sc_ic; 725 enum ieee80211_state ostate; 726 struct ieee80211_node *ni; 727 struct mbuf *m; 728 729 ostate = ic->ic_state; 730 731 RAL_LOCK(sc); 732 switch (sc->sc_state) { 733 case IEEE80211_S_INIT: 734 if (ostate == IEEE80211_S_RUN) { 735 /* abort TSF synchronization */ 736 ural_write(sc, RAL_TXRX_CSR19, 0); 737 738 /* force tx led to stop blinking */ 739 ural_write(sc, RAL_MAC_CSR20, 0); 740 } 741 break; 742 743 case IEEE80211_S_RUN: 744 ni = ic->ic_bss; 745 746 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 747 ural_update_slot(ic->ic_ifp); 748 ural_set_txpreamble(sc); 749 ural_set_basicrates(sc); 750 ural_set_bssid(sc, ni->ni_bssid); 751 } 752 753 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 754 ic->ic_opmode == IEEE80211_M_IBSS) { 755 m = ieee80211_beacon_alloc(ni, &sc->sc_bo); 756 if (m == NULL) { 757 printf("%s: could not allocate beacon\n", 758 device_get_nameunit(sc->sc_dev)); 759 return; 760 } 761 762 if (ural_tx_bcn(sc, m, ni) != 0) { 763 printf("%s: could not send beacon\n", 764 device_get_nameunit(sc->sc_dev)); 765 return; 766 } 767 } 768 769 /* make tx led blink on tx (controlled by ASIC) */ 770 ural_write(sc, RAL_MAC_CSR20, 1); 771 772 if (ic->ic_opmode != IEEE80211_M_MONITOR) 773 ural_enable_tsf_sync(sc); 774 775 /* enable automatic rate adaptation in STA mode */ 776 if (ic->ic_opmode == IEEE80211_M_STA && 777 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 778 ural_amrr_start(sc, ni); 779 780 break; 781 782 default: 783 break; 784 } 785 786 RAL_UNLOCK(sc); 787 sc->sc_newstate(ic, sc->sc_state, sc->sc_arg); 788 } 789 790 static void 791 ural_scantask(void *arg) 792 { 793 struct ural_softc *sc = arg; 794 struct ieee80211com *ic = &sc->sc_ic; 795 struct ifnet *ifp = ic->ic_ifp; 796 797 RAL_LOCK(sc); 798 if (sc->sc_scan_action == URAL_SCAN_START) { 799 /* abort TSF synchronization */ 800 ural_write(sc, RAL_TXRX_CSR19, 0); 801 ural_set_bssid(sc, ifp->if_broadcastaddr); 802 } else if (sc->sc_scan_action == URAL_SET_CHANNEL) { 803 mtx_lock(&Giant); 804 ural_set_chan(sc, ic->ic_curchan); 805 mtx_unlock(&Giant); 806 } else { 807 ural_enable_tsf_sync(sc); 808 /* XXX keep local copy */ 809 ural_set_bssid(sc, ic->ic_bss->ni_bssid); 810 } 811 RAL_UNLOCK(sc); 812 } 813 814 static int 815 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 816 { 817 struct ural_softc *sc = ic->ic_ifp->if_softc; 818 819 callout_stop(&sc->amrr_ch); 820 821 /* do it in a process context */ 822 sc->sc_state = nstate; 823 sc->sc_arg = arg; 824 825 usb_rem_task(sc->sc_udev, &sc->sc_task); 826 if (nstate == IEEE80211_S_INIT) 827 sc->sc_newstate(ic, nstate, arg); 828 else 829 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 830 return 0; 831 } 832 833 /* quickly determine if a given rate is CCK or OFDM */ 834 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 835 836 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 837 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 838 839 #define RAL_SIFS 10 /* us */ 840 841 #define RAL_RXTX_TURNAROUND 5 /* us */ 842 843 /* 844 * This function is only used by the Rx radiotap code. 845 */ 846 static int 847 ural_rxrate(struct ural_rx_desc *desc) 848 { 849 if (le32toh(desc->flags) & RAL_RX_OFDM) { 850 /* reverse function of ural_plcp_signal */ 851 switch (desc->rate) { 852 case 0xb: return 12; 853 case 0xf: return 18; 854 case 0xa: return 24; 855 case 0xe: return 36; 856 case 0x9: return 48; 857 case 0xd: return 72; 858 case 0x8: return 96; 859 case 0xc: return 108; 860 } 861 } else { 862 if (desc->rate == 10) 863 return 2; 864 if (desc->rate == 20) 865 return 4; 866 if (desc->rate == 55) 867 return 11; 868 if (desc->rate == 110) 869 return 22; 870 } 871 return 2; /* should not get there */ 872 } 873 874 static void 875 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 876 { 877 struct ural_tx_data *data = priv; 878 struct ural_softc *sc = data->sc; 879 struct ifnet *ifp = sc->sc_ic.ic_ifp; 880 881 if (data->m->m_flags & M_TXCB) 882 ieee80211_process_callback(data->ni, data->m, 883 status == USBD_NORMAL_COMPLETION ? 0 : ETIMEDOUT); 884 if (status != USBD_NORMAL_COMPLETION) { 885 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 886 return; 887 888 printf("%s: could not transmit buffer: %s\n", 889 device_get_nameunit(sc->sc_dev), usbd_errstr(status)); 890 891 if (status == USBD_STALLED) 892 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 893 894 ifp->if_oerrors++; 895 /* XXX mbuf leak? */ 896 return; 897 } 898 899 m_freem(data->m); 900 data->m = NULL; 901 ieee80211_free_node(data->ni); 902 data->ni = NULL; 903 904 sc->tx_queued--; 905 ifp->if_opackets++; 906 907 DPRINTFN(10, ("tx done\n")); 908 909 sc->sc_tx_timer = 0; 910 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 911 ural_start(ifp); 912 } 913 914 static void 915 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 916 { 917 struct ural_rx_data *data = priv; 918 struct ural_softc *sc = data->sc; 919 struct ieee80211com *ic = &sc->sc_ic; 920 struct ifnet *ifp = ic->ic_ifp; 921 struct ural_rx_desc *desc; 922 struct ieee80211_frame *wh; 923 struct ieee80211_node *ni; 924 struct mbuf *mnew, *m; 925 int len; 926 927 if (status != USBD_NORMAL_COMPLETION) { 928 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 929 return; 930 931 if (status == USBD_STALLED) 932 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 933 goto skip; 934 } 935 936 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 937 938 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 939 DPRINTF(("%s: xfer too short %d\n", device_get_nameunit(sc->sc_dev), 940 len)); 941 ifp->if_ierrors++; 942 goto skip; 943 } 944 945 /* rx descriptor is located at the end */ 946 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 947 948 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 949 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 950 /* 951 * This should not happen since we did not request to receive 952 * those frames when we filled RAL_TXRX_CSR2. 953 */ 954 DPRINTFN(5, ("PHY or CRC error\n")); 955 ifp->if_ierrors++; 956 goto skip; 957 } 958 959 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 960 if (mnew == NULL) { 961 ifp->if_ierrors++; 962 goto skip; 963 } 964 965 m = data->m; 966 data->m = mnew; 967 data->buf = mtod(data->m, uint8_t *); 968 969 /* finalize mbuf */ 970 m->m_pkthdr.rcvif = ifp; 971 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 972 973 if (bpf_peers_present(sc->sc_drvbpf)) { 974 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 975 976 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 977 tap->wr_rate = ural_rxrate(desc); 978 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 979 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 980 tap->wr_antenna = sc->rx_ant; 981 tap->wr_antsignal = URAL_RSSI(desc->rssi); 982 983 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 984 } 985 986 /* Strip trailing 802.11 MAC FCS. */ 987 m_adj(m, -IEEE80211_CRC_LEN); 988 989 wh = mtod(m, struct ieee80211_frame *); 990 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 991 992 /* send the frame to the 802.11 layer */ 993 ieee80211_input(ic, m, ni, URAL_RSSI(desc->rssi), RAL_NOISE_FLOOR, 0); 994 995 /* node is no longer needed */ 996 ieee80211_free_node(ni); 997 998 DPRINTFN(15, ("rx done\n")); 999 1000 skip: /* setup a new transfer */ 1001 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1002 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1003 usbd_transfer(xfer); 1004 } 1005 1006 /* 1007 * Return the expected ack rate for a frame transmitted at rate `rate'. 1008 * XXX: this should depend on the destination node basic rate set. 1009 */ 1010 static int 1011 ural_ack_rate(struct ieee80211com *ic, int rate) 1012 { 1013 switch (rate) { 1014 /* CCK rates */ 1015 case 2: 1016 return 2; 1017 case 4: 1018 case 11: 1019 case 22: 1020 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1021 1022 /* OFDM rates */ 1023 case 12: 1024 case 18: 1025 return 12; 1026 case 24: 1027 case 36: 1028 return 24; 1029 case 48: 1030 case 72: 1031 case 96: 1032 case 108: 1033 return 48; 1034 } 1035 1036 /* default to 1Mbps */ 1037 return 2; 1038 } 1039 1040 /* 1041 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1042 * The function automatically determines the operating mode depending on the 1043 * given rate. `flags' indicates whether short preamble is in use or not. 1044 */ 1045 static uint16_t 1046 ural_txtime(int len, int rate, uint32_t flags) 1047 { 1048 uint16_t txtime; 1049 1050 if (RAL_RATE_IS_OFDM(rate)) { 1051 /* IEEE Std 802.11a-1999, pp. 37 */ 1052 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1053 txtime = 16 + 4 + 4 * txtime + 6; 1054 } else { 1055 /* IEEE Std 802.11b-1999, pp. 28 */ 1056 txtime = (16 * len + rate - 1) / rate; 1057 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1058 txtime += 72 + 24; 1059 else 1060 txtime += 144 + 48; 1061 } 1062 return txtime; 1063 } 1064 1065 static uint8_t 1066 ural_plcp_signal(int rate) 1067 { 1068 switch (rate) { 1069 /* CCK rates (returned values are device-dependent) */ 1070 case 2: return 0x0; 1071 case 4: return 0x1; 1072 case 11: return 0x2; 1073 case 22: return 0x3; 1074 1075 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1076 case 12: return 0xb; 1077 case 18: return 0xf; 1078 case 24: return 0xa; 1079 case 36: return 0xe; 1080 case 48: return 0x9; 1081 case 72: return 0xd; 1082 case 96: return 0x8; 1083 case 108: return 0xc; 1084 1085 /* unsupported rates (should not get there) */ 1086 default: return 0xff; 1087 } 1088 } 1089 1090 static void 1091 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1092 uint32_t flags, int len, int rate) 1093 { 1094 struct ieee80211com *ic = &sc->sc_ic; 1095 uint16_t plcp_length; 1096 int remainder; 1097 1098 desc->flags = htole32(flags); 1099 desc->flags |= htole32(RAL_TX_NEWSEQ); 1100 desc->flags |= htole32(len << 16); 1101 1102 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1103 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1104 1105 /* setup PLCP fields */ 1106 desc->plcp_signal = ural_plcp_signal(rate); 1107 desc->plcp_service = 4; 1108 1109 len += IEEE80211_CRC_LEN; 1110 if (RAL_RATE_IS_OFDM(rate)) { 1111 desc->flags |= htole32(RAL_TX_OFDM); 1112 1113 plcp_length = len & 0xfff; 1114 desc->plcp_length_hi = plcp_length >> 6; 1115 desc->plcp_length_lo = plcp_length & 0x3f; 1116 } else { 1117 plcp_length = (16 * len + rate - 1) / rate; 1118 if (rate == 22) { 1119 remainder = (16 * len) % 22; 1120 if (remainder != 0 && remainder < 7) 1121 desc->plcp_service |= RAL_PLCP_LENGEXT; 1122 } 1123 desc->plcp_length_hi = plcp_length >> 8; 1124 desc->plcp_length_lo = plcp_length & 0xff; 1125 1126 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1127 desc->plcp_signal |= 0x08; 1128 } 1129 1130 desc->iv = 0; 1131 desc->eiv = 0; 1132 } 1133 1134 #define RAL_TX_TIMEOUT 5000 1135 1136 static int 1137 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1138 { 1139 struct ural_tx_desc *desc; 1140 usbd_xfer_handle xfer; 1141 uint8_t cmd = 0; 1142 usbd_status error; 1143 uint8_t *buf; 1144 int xferlen, rate; 1145 1146 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1147 1148 xfer = usbd_alloc_xfer(sc->sc_udev); 1149 if (xfer == NULL) 1150 return ENOMEM; 1151 1152 /* xfer length needs to be a multiple of two! */ 1153 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1154 1155 buf = usbd_alloc_buffer(xfer, xferlen); 1156 if (buf == NULL) { 1157 usbd_free_xfer(xfer); 1158 return ENOMEM; 1159 } 1160 1161 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1162 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1163 1164 error = usbd_sync_transfer(xfer); 1165 if (error != 0) { 1166 usbd_free_xfer(xfer); 1167 return error; 1168 } 1169 1170 desc = (struct ural_tx_desc *)buf; 1171 1172 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1173 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1174 m0->m_pkthdr.len, rate); 1175 1176 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1177 m0->m_pkthdr.len, rate, xferlen)); 1178 1179 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1180 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1181 1182 error = usbd_sync_transfer(xfer); 1183 usbd_free_xfer(xfer); 1184 1185 return error; 1186 } 1187 1188 static int 1189 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1190 { 1191 struct ieee80211com *ic = &sc->sc_ic; 1192 struct ural_tx_desc *desc; 1193 struct ural_tx_data *data; 1194 struct ieee80211_frame *wh; 1195 uint32_t flags = 0; 1196 uint16_t dur; 1197 usbd_status error; 1198 int xferlen, rate; 1199 1200 data = &sc->tx_data[0]; 1201 desc = (struct ural_tx_desc *)data->buf; 1202 1203 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1204 1205 data->m = m0; 1206 data->ni = ni; 1207 1208 wh = mtod(m0, struct ieee80211_frame *); 1209 1210 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1211 flags |= RAL_TX_ACK; 1212 1213 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1214 *(uint16_t *)wh->i_dur = htole16(dur); 1215 1216 /* tell hardware to add timestamp for probe responses */ 1217 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1218 IEEE80211_FC0_TYPE_MGT && 1219 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1220 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1221 flags |= RAL_TX_TIMESTAMP; 1222 } 1223 1224 if (bpf_peers_present(sc->sc_drvbpf)) { 1225 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1226 1227 tap->wt_flags = 0; 1228 tap->wt_rate = rate; 1229 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1230 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1231 tap->wt_antenna = sc->tx_ant; 1232 1233 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1234 } 1235 1236 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1237 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1238 1239 /* align end on a 2-bytes boundary */ 1240 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1241 1242 /* 1243 * No space left in the last URB to store the extra 2 bytes, force 1244 * sending of another URB. 1245 */ 1246 if ((xferlen % 64) == 0) 1247 xferlen += 2; 1248 1249 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1250 m0->m_pkthdr.len, rate, xferlen)); 1251 1252 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1253 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1254 ural_txeof); 1255 1256 error = usbd_transfer(data->xfer); 1257 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1258 m_freem(m0); 1259 data->m = NULL; 1260 data->ni = NULL; 1261 return error; 1262 } 1263 1264 sc->tx_queued++; 1265 1266 return 0; 1267 } 1268 1269 static int 1270 ural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni, 1271 const struct ieee80211_bpf_params *params) 1272 { 1273 struct ieee80211com *ic = &sc->sc_ic; 1274 struct ural_tx_desc *desc; 1275 struct ural_tx_data *data; 1276 uint32_t flags; 1277 usbd_status error; 1278 int xferlen, rate; 1279 1280 data = &sc->tx_data[0]; 1281 desc = (struct ural_tx_desc *)data->buf; 1282 1283 rate = params->ibp_rate0 & IEEE80211_RATE_VAL; 1284 /* XXX validate */ 1285 if (rate == 0) { 1286 m_freem(m0); 1287 return EINVAL; 1288 } 1289 1290 if (bpf_peers_present(sc->sc_drvbpf)) { 1291 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1292 1293 tap->wt_flags = 0; 1294 tap->wt_rate = rate; 1295 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1296 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1297 tap->wt_antenna = sc->tx_ant; 1298 1299 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1300 } 1301 1302 data->m = m0; 1303 data->ni = ni; 1304 1305 flags = 0; 1306 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 1307 flags |= RAL_TX_ACK; 1308 1309 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1310 /* XXX need to setup descriptor ourself */ 1311 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1312 1313 /* align end on a 2-bytes boundary */ 1314 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1315 1316 /* 1317 * No space left in the last URB to store the extra 2 bytes, force 1318 * sending of another URB. 1319 */ 1320 if ((xferlen % 64) == 0) 1321 xferlen += 2; 1322 1323 DPRINTFN(10, ("sending raw frame len=%u rate=%u xfer len=%u\n", 1324 m0->m_pkthdr.len, rate, xferlen)); 1325 1326 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1327 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1328 ural_txeof); 1329 1330 error = usbd_transfer(data->xfer); 1331 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1332 m_freem(m0); 1333 data->m = NULL; 1334 data->ni = NULL; 1335 return error; 1336 } 1337 1338 sc->tx_queued++; 1339 1340 return 0; 1341 } 1342 1343 static int 1344 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1345 { 1346 struct ieee80211com *ic = &sc->sc_ic; 1347 struct ural_tx_desc *desc; 1348 struct ural_tx_data *data; 1349 struct ieee80211_frame *wh; 1350 struct ieee80211_key *k; 1351 uint32_t flags = 0; 1352 uint16_t dur; 1353 usbd_status error; 1354 int xferlen, rate; 1355 1356 wh = mtod(m0, struct ieee80211_frame *); 1357 1358 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1359 rate = ic->ic_fixed_rate; 1360 else 1361 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1362 1363 rate &= IEEE80211_RATE_VAL; 1364 1365 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1366 k = ieee80211_crypto_encap(ic, ni, m0); 1367 if (k == NULL) { 1368 m_freem(m0); 1369 return ENOBUFS; 1370 } 1371 1372 /* packet header may have moved, reset our local pointer */ 1373 wh = mtod(m0, struct ieee80211_frame *); 1374 } 1375 1376 data = &sc->tx_data[0]; 1377 desc = (struct ural_tx_desc *)data->buf; 1378 1379 data->m = m0; 1380 data->ni = ni; 1381 1382 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1383 flags |= RAL_TX_ACK; 1384 flags |= RAL_TX_RETRY(7); 1385 1386 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1387 ic->ic_flags) + RAL_SIFS; 1388 *(uint16_t *)wh->i_dur = htole16(dur); 1389 } 1390 1391 if (bpf_peers_present(sc->sc_drvbpf)) { 1392 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1393 1394 tap->wt_flags = 0; 1395 tap->wt_rate = rate; 1396 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1397 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1398 tap->wt_antenna = sc->tx_ant; 1399 1400 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1401 } 1402 1403 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1404 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1405 1406 /* align end on a 2-bytes boundary */ 1407 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1408 1409 /* 1410 * No space left in the last URB to store the extra 2 bytes, force 1411 * sending of another URB. 1412 */ 1413 if ((xferlen % 64) == 0) 1414 xferlen += 2; 1415 1416 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1417 m0->m_pkthdr.len, rate, xferlen)); 1418 1419 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1420 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1421 ural_txeof); 1422 1423 error = usbd_transfer(data->xfer); 1424 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1425 m_freem(m0); 1426 data->m = NULL; 1427 data->ni = NULL; 1428 return error; 1429 } 1430 1431 sc->tx_queued++; 1432 1433 return 0; 1434 } 1435 1436 static void 1437 ural_start(struct ifnet *ifp) 1438 { 1439 struct ural_softc *sc = ifp->if_softc; 1440 struct ieee80211com *ic = &sc->sc_ic; 1441 struct mbuf *m0; 1442 struct ether_header *eh; 1443 struct ieee80211_node *ni; 1444 1445 for (;;) { 1446 IF_POLL(&ic->ic_mgtq, m0); 1447 if (m0 != NULL) { 1448 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1449 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1450 break; 1451 } 1452 IF_DEQUEUE(&ic->ic_mgtq, m0); 1453 1454 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1455 m0->m_pkthdr.rcvif = NULL; 1456 1457 if (bpf_peers_present(ic->ic_rawbpf)) 1458 bpf_mtap(ic->ic_rawbpf, m0); 1459 1460 if (ural_tx_mgt(sc, m0, ni) != 0) { 1461 ieee80211_free_node(ni); 1462 break; 1463 } 1464 } else { 1465 if (ic->ic_state != IEEE80211_S_RUN) 1466 break; 1467 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 1468 if (m0 == NULL) 1469 break; 1470 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1471 IFQ_DRV_PREPEND(&ifp->if_snd, m0); 1472 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1473 break; 1474 } 1475 /* 1476 * Cancel any background scan. 1477 */ 1478 if (ic->ic_flags & IEEE80211_F_SCAN) 1479 ieee80211_cancel_scan(ic); 1480 1481 if (m0->m_len < sizeof (struct ether_header) && 1482 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1483 continue; 1484 1485 eh = mtod(m0, struct ether_header *); 1486 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1487 if (ni == NULL) { 1488 m_freem(m0); 1489 continue; 1490 } 1491 BPF_MTAP(ifp, m0); 1492 1493 m0 = ieee80211_encap(ic, m0, ni); 1494 if (m0 == NULL) { 1495 ieee80211_free_node(ni); 1496 continue; 1497 } 1498 1499 if (bpf_peers_present(ic->ic_rawbpf)) 1500 bpf_mtap(ic->ic_rawbpf, m0); 1501 1502 if (ural_tx_data(sc, m0, ni) != 0) { 1503 ieee80211_free_node(ni); 1504 ifp->if_oerrors++; 1505 break; 1506 } 1507 } 1508 1509 sc->sc_tx_timer = 5; 1510 ic->ic_lastdata = ticks; 1511 callout_reset(&sc->watchdog_ch, hz, ural_watchdog, sc); 1512 } 1513 } 1514 1515 static void 1516 ural_watchdog(void *arg) 1517 { 1518 struct ural_softc *sc = (struct ural_softc *)arg; 1519 1520 RAL_LOCK(sc); 1521 1522 if (sc->sc_tx_timer > 0) { 1523 if (--sc->sc_tx_timer == 0) { 1524 device_printf(sc->sc_dev, "device timeout\n"); 1525 /*ural_init(sc); XXX needs a process context! */ 1526 sc->sc_ifp->if_oerrors++; 1527 RAL_UNLOCK(sc); 1528 return; 1529 } 1530 callout_reset(&sc->watchdog_ch, hz, ural_watchdog, sc); 1531 } 1532 1533 RAL_UNLOCK(sc); 1534 } 1535 1536 /* 1537 * This function allows for fast channel switching in monitor mode (used by 1538 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1539 * generate a new beacon frame. 1540 */ 1541 static int 1542 ural_reset(struct ifnet *ifp) 1543 { 1544 struct ural_softc *sc = ifp->if_softc; 1545 struct ieee80211com *ic = &sc->sc_ic; 1546 1547 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1548 return ENETRESET; 1549 1550 ural_set_chan(sc, ic->ic_curchan); 1551 1552 return 0; 1553 } 1554 1555 static int 1556 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1557 { 1558 struct ural_softc *sc = ifp->if_softc; 1559 struct ieee80211com *ic = &sc->sc_ic; 1560 int error = 0; 1561 1562 RAL_LOCK(sc); 1563 1564 switch (cmd) { 1565 case SIOCSIFFLAGS: 1566 if (ifp->if_flags & IFF_UP) { 1567 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1568 ural_update_promisc(sc); 1569 else 1570 ural_init(sc); 1571 } else { 1572 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1573 ural_stop(sc); 1574 } 1575 break; 1576 1577 default: 1578 error = ieee80211_ioctl(ic, cmd, data); 1579 } 1580 1581 if (error == ENETRESET) { 1582 if ((ifp->if_flags & IFF_UP) && 1583 (ifp->if_drv_flags & IFF_DRV_RUNNING) && 1584 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1585 ural_init(sc); 1586 error = 0; 1587 } 1588 1589 RAL_UNLOCK(sc); 1590 1591 return error; 1592 } 1593 1594 static void 1595 ural_set_testmode(struct ural_softc *sc) 1596 { 1597 usb_device_request_t req; 1598 usbd_status error; 1599 1600 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1601 req.bRequest = RAL_VENDOR_REQUEST; 1602 USETW(req.wValue, 4); 1603 USETW(req.wIndex, 1); 1604 USETW(req.wLength, 0); 1605 1606 error = usbd_do_request(sc->sc_udev, &req, NULL); 1607 if (error != 0) { 1608 printf("%s: could not set test mode: %s\n", 1609 device_get_nameunit(sc->sc_dev), usbd_errstr(error)); 1610 } 1611 } 1612 1613 static void 1614 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1615 { 1616 usb_device_request_t req; 1617 usbd_status error; 1618 1619 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1620 req.bRequest = RAL_READ_EEPROM; 1621 USETW(req.wValue, 0); 1622 USETW(req.wIndex, addr); 1623 USETW(req.wLength, len); 1624 1625 error = usbd_do_request(sc->sc_udev, &req, buf); 1626 if (error != 0) { 1627 printf("%s: could not read EEPROM: %s\n", 1628 device_get_nameunit(sc->sc_dev), usbd_errstr(error)); 1629 } 1630 } 1631 1632 static uint16_t 1633 ural_read(struct ural_softc *sc, uint16_t reg) 1634 { 1635 usb_device_request_t req; 1636 usbd_status error; 1637 uint16_t val; 1638 1639 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1640 req.bRequest = RAL_READ_MAC; 1641 USETW(req.wValue, 0); 1642 USETW(req.wIndex, reg); 1643 USETW(req.wLength, sizeof (uint16_t)); 1644 1645 error = usbd_do_request(sc->sc_udev, &req, &val); 1646 if (error != 0) { 1647 printf("%s: could not read MAC register: %s\n", 1648 device_get_nameunit(sc->sc_dev), usbd_errstr(error)); 1649 return 0; 1650 } 1651 1652 return le16toh(val); 1653 } 1654 1655 static void 1656 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1657 { 1658 usb_device_request_t req; 1659 usbd_status error; 1660 1661 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1662 req.bRequest = RAL_READ_MULTI_MAC; 1663 USETW(req.wValue, 0); 1664 USETW(req.wIndex, reg); 1665 USETW(req.wLength, len); 1666 1667 error = usbd_do_request(sc->sc_udev, &req, buf); 1668 if (error != 0) { 1669 printf("%s: could not read MAC register: %s\n", 1670 device_get_nameunit(sc->sc_dev), usbd_errstr(error)); 1671 } 1672 } 1673 1674 static void 1675 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1676 { 1677 usb_device_request_t req; 1678 usbd_status error; 1679 1680 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1681 req.bRequest = RAL_WRITE_MAC; 1682 USETW(req.wValue, val); 1683 USETW(req.wIndex, reg); 1684 USETW(req.wLength, 0); 1685 1686 error = usbd_do_request(sc->sc_udev, &req, NULL); 1687 if (error != 0) { 1688 printf("%s: could not write MAC register: %s\n", 1689 device_get_nameunit(sc->sc_dev), usbd_errstr(error)); 1690 } 1691 } 1692 1693 static void 1694 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1695 { 1696 usb_device_request_t req; 1697 usbd_status error; 1698 1699 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1700 req.bRequest = RAL_WRITE_MULTI_MAC; 1701 USETW(req.wValue, 0); 1702 USETW(req.wIndex, reg); 1703 USETW(req.wLength, len); 1704 1705 error = usbd_do_request(sc->sc_udev, &req, buf); 1706 if (error != 0) { 1707 printf("%s: could not write MAC register: %s\n", 1708 device_get_nameunit(sc->sc_dev), usbd_errstr(error)); 1709 } 1710 } 1711 1712 static void 1713 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1714 { 1715 uint16_t tmp; 1716 int ntries; 1717 1718 for (ntries = 0; ntries < 5; ntries++) { 1719 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1720 break; 1721 } 1722 if (ntries == 5) { 1723 printf("%s: could not write to BBP\n", device_get_nameunit(sc->sc_dev)); 1724 return; 1725 } 1726 1727 tmp = reg << 8 | val; 1728 ural_write(sc, RAL_PHY_CSR7, tmp); 1729 } 1730 1731 static uint8_t 1732 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1733 { 1734 uint16_t val; 1735 int ntries; 1736 1737 val = RAL_BBP_WRITE | reg << 8; 1738 ural_write(sc, RAL_PHY_CSR7, val); 1739 1740 for (ntries = 0; ntries < 5; ntries++) { 1741 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1742 break; 1743 } 1744 if (ntries == 5) { 1745 printf("%s: could not read BBP\n", device_get_nameunit(sc->sc_dev)); 1746 return 0; 1747 } 1748 1749 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1750 } 1751 1752 static void 1753 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1754 { 1755 uint32_t tmp; 1756 int ntries; 1757 1758 for (ntries = 0; ntries < 5; ntries++) { 1759 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1760 break; 1761 } 1762 if (ntries == 5) { 1763 printf("%s: could not write to RF\n", device_get_nameunit(sc->sc_dev)); 1764 return; 1765 } 1766 1767 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1768 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1769 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1770 1771 /* remember last written value in sc */ 1772 sc->rf_regs[reg] = val; 1773 1774 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1775 } 1776 1777 static void 1778 ural_scan_start(struct ieee80211com *ic) 1779 { 1780 struct ural_softc *sc = ic->ic_ifp->if_softc; 1781 1782 usb_rem_task(sc->sc_udev, &sc->sc_scantask); 1783 1784 /* do it in a process context */ 1785 sc->sc_scan_action = URAL_SCAN_START; 1786 usb_add_task(sc->sc_udev, &sc->sc_scantask, USB_TASKQ_DRIVER); 1787 1788 } 1789 1790 static void 1791 ural_scan_end(struct ieee80211com *ic) 1792 { 1793 struct ural_softc *sc = ic->ic_ifp->if_softc; 1794 1795 usb_rem_task(sc->sc_udev, &sc->sc_scantask); 1796 1797 /* do it in a process context */ 1798 sc->sc_scan_action = URAL_SCAN_END; 1799 usb_add_task(sc->sc_udev, &sc->sc_scantask, USB_TASKQ_DRIVER); 1800 1801 } 1802 1803 static void 1804 ural_set_channel(struct ieee80211com *ic) 1805 { 1806 1807 struct ural_softc *sc = ic->ic_ifp->if_softc; 1808 1809 usb_rem_task(sc->sc_udev, &sc->sc_scantask); 1810 1811 /* do it in a process context */ 1812 sc->sc_scan_action = URAL_SET_CHANNEL; 1813 usb_add_task(sc->sc_udev, &sc->sc_scantask, USB_TASKQ_DRIVER); 1814 } 1815 1816 static void 1817 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1818 { 1819 struct ieee80211com *ic = &sc->sc_ic; 1820 uint8_t power, tmp; 1821 u_int i, chan; 1822 1823 chan = ieee80211_chan2ieee(ic, c); 1824 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1825 return; 1826 1827 if (IEEE80211_IS_CHAN_2GHZ(c)) 1828 power = min(sc->txpow[chan - 1], 31); 1829 else 1830 power = 31; 1831 1832 /* adjust txpower using ifconfig settings */ 1833 power -= (100 - ic->ic_txpowlimit) / 8; 1834 1835 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1836 1837 switch (sc->rf_rev) { 1838 case RAL_RF_2522: 1839 ural_rf_write(sc, RAL_RF1, 0x00814); 1840 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1841 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1842 break; 1843 1844 case RAL_RF_2523: 1845 ural_rf_write(sc, RAL_RF1, 0x08804); 1846 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1847 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1848 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1849 break; 1850 1851 case RAL_RF_2524: 1852 ural_rf_write(sc, RAL_RF1, 0x0c808); 1853 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1854 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1855 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1856 break; 1857 1858 case RAL_RF_2525: 1859 ural_rf_write(sc, RAL_RF1, 0x08808); 1860 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1861 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1862 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1863 1864 ural_rf_write(sc, RAL_RF1, 0x08808); 1865 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1866 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1867 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1868 break; 1869 1870 case RAL_RF_2525E: 1871 ural_rf_write(sc, RAL_RF1, 0x08808); 1872 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1873 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1874 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1875 break; 1876 1877 case RAL_RF_2526: 1878 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1879 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1880 ural_rf_write(sc, RAL_RF1, 0x08804); 1881 1882 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1883 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1884 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1885 break; 1886 1887 /* dual-band RF */ 1888 case RAL_RF_5222: 1889 for (i = 0; ural_rf5222[i].chan != chan; i++); 1890 1891 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1892 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1893 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1894 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1895 break; 1896 } 1897 1898 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1899 (ic->ic_flags & IEEE80211_F_SCAN) == 0) { 1900 /* set Japan filter bit for channel 14 */ 1901 tmp = ural_bbp_read(sc, 70); 1902 1903 tmp &= ~RAL_JAPAN_FILTER; 1904 if (chan == 14) 1905 tmp |= RAL_JAPAN_FILTER; 1906 1907 ural_bbp_write(sc, 70, tmp); 1908 1909 /* clear CRC errors */ 1910 ural_read(sc, RAL_STA_CSR0); 1911 1912 DELAY(10000); 1913 ural_disable_rf_tune(sc); 1914 } 1915 1916 /* update basic rate set */ 1917 if (IEEE80211_IS_CHAN_B(c)) { 1918 /* 11b basic rates: 1, 2Mbps */ 1919 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1920 } else if (IEEE80211_IS_CHAN_A(c)) { 1921 /* 11a basic rates: 6, 12, 24Mbps */ 1922 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1923 } else { 1924 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1925 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1926 } 1927 } 1928 1929 /* 1930 * Disable RF auto-tuning. 1931 */ 1932 static void 1933 ural_disable_rf_tune(struct ural_softc *sc) 1934 { 1935 uint32_t tmp; 1936 1937 if (sc->rf_rev != RAL_RF_2523) { 1938 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1939 ural_rf_write(sc, RAL_RF1, tmp); 1940 } 1941 1942 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1943 ural_rf_write(sc, RAL_RF3, tmp); 1944 1945 DPRINTFN(2, ("disabling RF autotune\n")); 1946 } 1947 1948 /* 1949 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1950 * synchronization. 1951 */ 1952 static void 1953 ural_enable_tsf_sync(struct ural_softc *sc) 1954 { 1955 struct ieee80211com *ic = &sc->sc_ic; 1956 uint16_t logcwmin, preload, tmp; 1957 1958 /* first, disable TSF synchronization */ 1959 ural_write(sc, RAL_TXRX_CSR19, 0); 1960 1961 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1962 ural_write(sc, RAL_TXRX_CSR18, tmp); 1963 1964 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1965 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1966 tmp = logcwmin << 12 | preload; 1967 ural_write(sc, RAL_TXRX_CSR20, tmp); 1968 1969 /* finally, enable TSF synchronization */ 1970 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1971 if (ic->ic_opmode == IEEE80211_M_STA) 1972 tmp |= RAL_ENABLE_TSF_SYNC(1); 1973 else 1974 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1975 ural_write(sc, RAL_TXRX_CSR19, tmp); 1976 1977 DPRINTF(("enabling TSF synchronization\n")); 1978 } 1979 1980 static void 1981 ural_update_slot(struct ifnet *ifp) 1982 { 1983 struct ural_softc *sc = ifp->if_softc; 1984 struct ieee80211com *ic = &sc->sc_ic; 1985 uint16_t slottime, sifs, eifs; 1986 1987 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1988 1989 /* 1990 * These settings may sound a bit inconsistent but this is what the 1991 * reference driver does. 1992 */ 1993 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1994 sifs = 16 - RAL_RXTX_TURNAROUND; 1995 eifs = 364; 1996 } else { 1997 sifs = 10 - RAL_RXTX_TURNAROUND; 1998 eifs = 64; 1999 } 2000 2001 ural_write(sc, RAL_MAC_CSR10, slottime); 2002 ural_write(sc, RAL_MAC_CSR11, sifs); 2003 ural_write(sc, RAL_MAC_CSR12, eifs); 2004 } 2005 2006 static void 2007 ural_set_txpreamble(struct ural_softc *sc) 2008 { 2009 uint16_t tmp; 2010 2011 tmp = ural_read(sc, RAL_TXRX_CSR10); 2012 2013 tmp &= ~RAL_SHORT_PREAMBLE; 2014 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 2015 tmp |= RAL_SHORT_PREAMBLE; 2016 2017 ural_write(sc, RAL_TXRX_CSR10, tmp); 2018 } 2019 2020 static void 2021 ural_set_basicrates(struct ural_softc *sc) 2022 { 2023 struct ieee80211com *ic = &sc->sc_ic; 2024 2025 /* update basic rate set */ 2026 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2027 /* 11b basic rates: 1, 2Mbps */ 2028 ural_write(sc, RAL_TXRX_CSR11, 0x3); 2029 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2030 /* 11a basic rates: 6, 12, 24Mbps */ 2031 ural_write(sc, RAL_TXRX_CSR11, 0x150); 2032 } else { 2033 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2034 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2035 } 2036 } 2037 2038 static void 2039 ural_set_bssid(struct ural_softc *sc, const uint8_t *bssid) 2040 { 2041 uint16_t tmp; 2042 2043 tmp = bssid[0] | bssid[1] << 8; 2044 ural_write(sc, RAL_MAC_CSR5, tmp); 2045 2046 tmp = bssid[2] | bssid[3] << 8; 2047 ural_write(sc, RAL_MAC_CSR6, tmp); 2048 2049 tmp = bssid[4] | bssid[5] << 8; 2050 ural_write(sc, RAL_MAC_CSR7, tmp); 2051 2052 DPRINTF(("setting BSSID to %6D\n", bssid, ":")); 2053 } 2054 2055 static void 2056 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 2057 { 2058 uint16_t tmp; 2059 2060 tmp = addr[0] | addr[1] << 8; 2061 ural_write(sc, RAL_MAC_CSR2, tmp); 2062 2063 tmp = addr[2] | addr[3] << 8; 2064 ural_write(sc, RAL_MAC_CSR3, tmp); 2065 2066 tmp = addr[4] | addr[5] << 8; 2067 ural_write(sc, RAL_MAC_CSR4, tmp); 2068 2069 DPRINTF(("setting MAC address to %6D\n", addr, ":")); 2070 } 2071 2072 static void 2073 ural_update_promisc(struct ural_softc *sc) 2074 { 2075 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2076 uint32_t tmp; 2077 2078 tmp = ural_read(sc, RAL_TXRX_CSR2); 2079 2080 tmp &= ~RAL_DROP_NOT_TO_ME; 2081 if (!(ifp->if_flags & IFF_PROMISC)) 2082 tmp |= RAL_DROP_NOT_TO_ME; 2083 2084 ural_write(sc, RAL_TXRX_CSR2, tmp); 2085 2086 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2087 "entering" : "leaving")); 2088 } 2089 2090 static const char * 2091 ural_get_rf(int rev) 2092 { 2093 switch (rev) { 2094 case RAL_RF_2522: return "RT2522"; 2095 case RAL_RF_2523: return "RT2523"; 2096 case RAL_RF_2524: return "RT2524"; 2097 case RAL_RF_2525: return "RT2525"; 2098 case RAL_RF_2525E: return "RT2525e"; 2099 case RAL_RF_2526: return "RT2526"; 2100 case RAL_RF_5222: return "RT5222"; 2101 default: return "unknown"; 2102 } 2103 } 2104 2105 static void 2106 ural_read_eeprom(struct ural_softc *sc) 2107 { 2108 struct ieee80211com *ic = &sc->sc_ic; 2109 uint16_t val; 2110 2111 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 2112 val = le16toh(val); 2113 sc->rf_rev = (val >> 11) & 0x7; 2114 sc->hw_radio = (val >> 10) & 0x1; 2115 sc->led_mode = (val >> 6) & 0x7; 2116 sc->rx_ant = (val >> 4) & 0x3; 2117 sc->tx_ant = (val >> 2) & 0x3; 2118 sc->nb_ant = val & 0x3; 2119 2120 /* read MAC address */ 2121 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2122 2123 /* read default values for BBP registers */ 2124 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2125 2126 /* read Tx power for all b/g channels */ 2127 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2128 } 2129 2130 static int 2131 ural_bbp_init(struct ural_softc *sc) 2132 { 2133 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2134 int i, ntries; 2135 2136 /* wait for BBP to be ready */ 2137 for (ntries = 0; ntries < 100; ntries++) { 2138 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2139 break; 2140 DELAY(1000); 2141 } 2142 if (ntries == 100) { 2143 device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2144 return EIO; 2145 } 2146 2147 /* initialize BBP registers to default values */ 2148 for (i = 0; i < N(ural_def_bbp); i++) 2149 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2150 2151 #if 0 2152 /* initialize BBP registers to values stored in EEPROM */ 2153 for (i = 0; i < 16; i++) { 2154 if (sc->bbp_prom[i].reg == 0xff) 2155 continue; 2156 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2157 } 2158 #endif 2159 2160 return 0; 2161 #undef N 2162 } 2163 2164 static void 2165 ural_set_txantenna(struct ural_softc *sc, int antenna) 2166 { 2167 uint16_t tmp; 2168 uint8_t tx; 2169 2170 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2171 if (antenna == 1) 2172 tx |= RAL_BBP_ANTA; 2173 else if (antenna == 2) 2174 tx |= RAL_BBP_ANTB; 2175 else 2176 tx |= RAL_BBP_DIVERSITY; 2177 2178 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2179 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2180 sc->rf_rev == RAL_RF_5222) 2181 tx |= RAL_BBP_FLIPIQ; 2182 2183 ural_bbp_write(sc, RAL_BBP_TX, tx); 2184 2185 /* update values in PHY_CSR5 and PHY_CSR6 */ 2186 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2187 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2188 2189 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2190 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2191 } 2192 2193 static void 2194 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2195 { 2196 uint8_t rx; 2197 2198 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2199 if (antenna == 1) 2200 rx |= RAL_BBP_ANTA; 2201 else if (antenna == 2) 2202 rx |= RAL_BBP_ANTB; 2203 else 2204 rx |= RAL_BBP_DIVERSITY; 2205 2206 /* need to force no I/Q flip for RF 2525e and 2526 */ 2207 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2208 rx &= ~RAL_BBP_FLIPIQ; 2209 2210 ural_bbp_write(sc, RAL_BBP_RX, rx); 2211 } 2212 2213 static void 2214 ural_init(void *priv) 2215 { 2216 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2217 struct ural_softc *sc = priv; 2218 struct ieee80211com *ic = &sc->sc_ic; 2219 struct ifnet *ifp = ic->ic_ifp; 2220 struct ural_rx_data *data; 2221 uint16_t tmp; 2222 usbd_status error; 2223 int i, ntries; 2224 2225 ural_set_testmode(sc); 2226 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2227 2228 ural_stop(sc); 2229 2230 /* initialize MAC registers to default values */ 2231 for (i = 0; i < N(ural_def_mac); i++) 2232 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2233 2234 /* wait for BBP and RF to wake up (this can take a long time!) */ 2235 for (ntries = 0; ntries < 100; ntries++) { 2236 tmp = ural_read(sc, RAL_MAC_CSR17); 2237 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2238 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2239 break; 2240 DELAY(1000); 2241 } 2242 if (ntries == 100) { 2243 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2244 device_get_nameunit(sc->sc_dev)); 2245 goto fail; 2246 } 2247 2248 /* we're ready! */ 2249 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2250 2251 /* set basic rate set (will be updated later) */ 2252 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2253 2254 if (ural_bbp_init(sc) != 0) 2255 goto fail; 2256 2257 ural_set_chan(sc, ic->ic_curchan); 2258 2259 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2260 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2261 2262 ural_set_txantenna(sc, sc->tx_ant); 2263 ural_set_rxantenna(sc, sc->rx_ant); 2264 2265 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp)); 2266 ural_set_macaddr(sc, ic->ic_myaddr); 2267 2268 /* 2269 * Allocate xfer for AMRR statistics requests. 2270 */ 2271 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2272 if (sc->amrr_xfer == NULL) { 2273 printf("%s: could not allocate AMRR xfer\n", 2274 device_get_nameunit(sc->sc_dev)); 2275 goto fail; 2276 } 2277 2278 /* 2279 * Open Tx and Rx USB bulk pipes. 2280 */ 2281 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2282 &sc->sc_tx_pipeh); 2283 if (error != 0) { 2284 printf("%s: could not open Tx pipe: %s\n", 2285 device_get_nameunit(sc->sc_dev), usbd_errstr(error)); 2286 goto fail; 2287 } 2288 2289 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2290 &sc->sc_rx_pipeh); 2291 if (error != 0) { 2292 printf("%s: could not open Rx pipe: %s\n", 2293 device_get_nameunit(sc->sc_dev), usbd_errstr(error)); 2294 goto fail; 2295 } 2296 2297 /* 2298 * Allocate Tx and Rx xfer queues. 2299 */ 2300 error = ural_alloc_tx_list(sc); 2301 if (error != 0) { 2302 printf("%s: could not allocate Tx list\n", 2303 device_get_nameunit(sc->sc_dev)); 2304 goto fail; 2305 } 2306 2307 error = ural_alloc_rx_list(sc); 2308 if (error != 0) { 2309 printf("%s: could not allocate Rx list\n", 2310 device_get_nameunit(sc->sc_dev)); 2311 goto fail; 2312 } 2313 2314 /* 2315 * Start up the receive pipe. 2316 */ 2317 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2318 data = &sc->rx_data[i]; 2319 2320 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2321 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2322 usbd_transfer(data->xfer); 2323 } 2324 2325 /* kick Rx */ 2326 tmp = RAL_DROP_PHY | RAL_DROP_CRC; 2327 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2328 tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION; 2329 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2330 tmp |= RAL_DROP_TODS; 2331 if (!(ifp->if_flags & IFF_PROMISC)) 2332 tmp |= RAL_DROP_NOT_TO_ME; 2333 } 2334 ural_write(sc, RAL_TXRX_CSR2, tmp); 2335 2336 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2337 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2338 2339 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2340 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2341 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2342 } else 2343 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2344 2345 return; 2346 2347 fail: ural_stop(sc); 2348 #undef N 2349 } 2350 2351 static void 2352 ural_stop(void *priv) 2353 { 2354 struct ural_softc *sc = priv; 2355 struct ieee80211com *ic = &sc->sc_ic; 2356 struct ifnet *ifp = ic->ic_ifp; 2357 2358 sc->sc_tx_timer = 0; 2359 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2360 2361 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2362 2363 /* disable Rx */ 2364 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2365 2366 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2367 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2368 ural_write(sc, RAL_MAC_CSR1, 0); 2369 2370 if (sc->amrr_xfer != NULL) { 2371 usbd_free_xfer(sc->amrr_xfer); 2372 sc->amrr_xfer = NULL; 2373 } 2374 2375 if (sc->sc_rx_pipeh != NULL) { 2376 usbd_abort_pipe(sc->sc_rx_pipeh); 2377 usbd_close_pipe(sc->sc_rx_pipeh); 2378 sc->sc_rx_pipeh = NULL; 2379 } 2380 2381 if (sc->sc_tx_pipeh != NULL) { 2382 usbd_abort_pipe(sc->sc_tx_pipeh); 2383 usbd_close_pipe(sc->sc_tx_pipeh); 2384 sc->sc_tx_pipeh = NULL; 2385 } 2386 2387 ural_free_rx_list(sc); 2388 ural_free_tx_list(sc); 2389 } 2390 2391 static int 2392 ural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2393 const struct ieee80211_bpf_params *params) 2394 { 2395 struct ieee80211com *ic = ni->ni_ic; 2396 struct ifnet *ifp = ic->ic_ifp; 2397 struct ural_softc *sc = ifp->if_softc; 2398 2399 /* prevent management frames from being sent if we're not ready */ 2400 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2401 m_freem(m); 2402 ieee80211_free_node(ni); 2403 return ENETDOWN; 2404 } 2405 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 2406 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 2407 m_freem(m); 2408 ieee80211_free_node(ni); 2409 return EIO; 2410 } 2411 2412 if (bpf_peers_present(ic->ic_rawbpf)) 2413 bpf_mtap(ic->ic_rawbpf, m); 2414 2415 ifp->if_opackets++; 2416 2417 if (params == NULL) { 2418 /* 2419 * Legacy path; interpret frame contents to decide 2420 * precisely how to send the frame. 2421 */ 2422 if (ural_tx_mgt(sc, m, ni) != 0) 2423 goto bad; 2424 } else { 2425 /* 2426 * Caller supplied explicit parameters to use in 2427 * sending the frame. 2428 */ 2429 if (ural_tx_raw(sc, m, ni, params) != 0) 2430 goto bad; 2431 } 2432 sc->sc_tx_timer = 5; 2433 callout_reset(&sc->watchdog_ch, hz, ural_watchdog, sc); 2434 2435 return 0; 2436 bad: 2437 ifp->if_oerrors++; 2438 ieee80211_free_node(ni); 2439 return EIO; /* XXX */ 2440 } 2441 2442 static void 2443 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2444 { 2445 int i; 2446 2447 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2448 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2449 2450 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2451 2452 /* set rate to some reasonable initial value */ 2453 for (i = ni->ni_rates.rs_nrates - 1; 2454 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2455 i--); 2456 2457 ni->ni_txrate = i; 2458 2459 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2460 } 2461 2462 static void 2463 ural_amrr_timeout(void *arg) 2464 { 2465 struct ural_softc *sc = (struct ural_softc *)arg; 2466 usb_device_request_t req; 2467 2468 /* 2469 * Asynchronously read statistic registers (cleared by read). 2470 */ 2471 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2472 req.bRequest = RAL_READ_MULTI_MAC; 2473 USETW(req.wValue, 0); 2474 USETW(req.wIndex, RAL_STA_CSR0); 2475 USETW(req.wLength, sizeof sc->sta); 2476 2477 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2478 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2479 ural_amrr_update); 2480 (void)usbd_transfer(sc->amrr_xfer); 2481 } 2482 2483 static void 2484 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2485 usbd_status status) 2486 { 2487 struct ural_softc *sc = (struct ural_softc *)priv; 2488 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2489 2490 if (status != USBD_NORMAL_COMPLETION) { 2491 device_printf(sc->sc_dev, "could not retrieve Tx statistics - " 2492 "cancelling automatic rate control\n"); 2493 return; 2494 } 2495 2496 /* count TX retry-fail as Tx errors */ 2497 ifp->if_oerrors += sc->sta[9]; 2498 2499 sc->amn.amn_retrycnt = 2500 sc->sta[7] + /* TX one-retry ok count */ 2501 sc->sta[8] + /* TX more-retry ok count */ 2502 sc->sta[9]; /* TX retry-fail count */ 2503 2504 sc->amn.amn_txcnt = 2505 sc->amn.amn_retrycnt + 2506 sc->sta[6]; /* TX no-retry ok count */ 2507 2508 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2509 2510 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2511 }
Cache object: 2d883febb590b07b7acf14649d038db2
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