Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/usb/net/if_aue.c
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1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 1997, 1998, 1999, 2000 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Copyright (c) 2006 8 * Alfred Perlstein <alfred@FreeBSD.org>. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Bill Paul. 21 * 4. Neither the name of the author nor the names of any co-contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 35 * THE POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __FBSDID("$FreeBSD$"); 40 41 /* 42 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver. 43 * Datasheet is available from http://www.admtek.com.tw. 44 * 45 * Written by Bill Paul <wpaul@ee.columbia.edu> 46 * Electrical Engineering Department 47 * Columbia University, New York City 48 * 49 * SMP locking by Alfred Perlstein <alfred@FreeBSD.org>. 50 * RED Inc. 51 */ 52 53 /* 54 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet 55 * support: the control endpoint for reading/writing registers, burst 56 * read endpoint for packet reception, burst write for packet transmission 57 * and one for "interrupts." The chip uses the same RX filter scheme 58 * as the other ADMtek ethernet parts: one perfect filter entry for the 59 * the station address and a 64-bit multicast hash table. The chip supports 60 * both MII and HomePNA attachments. 61 * 62 * Since the maximum data transfer speed of USB is supposed to be 12Mbps, 63 * you're never really going to get 100Mbps speeds from this device. I 64 * think the idea is to allow the device to connect to 10 or 100Mbps 65 * networks, not necessarily to provide 100Mbps performance. Also, since 66 * the controller uses an external PHY chip, it's possible that board 67 * designers might simply choose a 10Mbps PHY. 68 * 69 * Registers are accessed using uether_do_request(). Packet 70 * transfers are done using usbd_transfer() and friends. 71 */ 72 73 #include <sys/stdint.h> 74 #include <sys/stddef.h> 75 #include <sys/param.h> 76 #include <sys/queue.h> 77 #include <sys/types.h> 78 #include <sys/systm.h> 79 #include <sys/socket.h> 80 #include <sys/kernel.h> 81 #include <sys/bus.h> 82 #include <sys/module.h> 83 #include <sys/lock.h> 84 #include <sys/mutex.h> 85 #include <sys/condvar.h> 86 #include <sys/sysctl.h> 87 #include <sys/sx.h> 88 #include <sys/unistd.h> 89 #include <sys/callout.h> 90 #include <sys/malloc.h> 91 #include <sys/priv.h> 92 93 #include <net/if.h> 94 #include <net/if_var.h> 95 #include <net/if_media.h> 96 97 #include <dev/mii/mii.h> 98 #include <dev/mii/miivar.h> 99 100 #include <dev/usb/usb.h> 101 #include <dev/usb/usbdi.h> 102 #include <dev/usb/usbdi_util.h> 103 #include "usbdevs.h" 104 105 #define USB_DEBUG_VAR aue_debug 106 #include <dev/usb/usb_debug.h> 107 #include <dev/usb/usb_process.h> 108 109 #include <dev/usb/net/usb_ethernet.h> 110 #include <dev/usb/net/if_auereg.h> 111 112 #include "miibus_if.h" 113 114 #ifdef USB_DEBUG 115 static int aue_debug = 0; 116 117 static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 118 "USB aue"); 119 SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RWTUN, &aue_debug, 0, 120 "Debug level"); 121 #endif 122 123 /* 124 * Various supported device vendors/products. 125 */ 126 static const STRUCT_USB_HOST_ID aue_devs[] = { 127 #define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } 128 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII), 129 AUE_DEV(ABOCOM, DSB650TX_PNA, 0), 130 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS), 131 AUE_DEV(ABOCOM, XX10, 0), 132 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII), 133 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII), 134 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA), 135 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA), 136 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII), 137 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII), 138 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII), 139 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA), 140 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII), 141 AUE_DEV(ACCTON, USB320_EC, 0), 142 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII), 143 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII), 144 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII), 145 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII), 146 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY), 147 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII), 148 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII), 149 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII), 150 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII), 151 AUE_DEV(BILLIONTON, USB100, 0), 152 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII), 153 AUE_DEV(BILLIONTON, USBEL100, 0), 154 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA), 155 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII), 156 AUE_DEV(COREGA, FETHER_USB_TX, 0), 157 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS), 158 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 159 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII), 160 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII), 161 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA), 162 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS), 163 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS), 164 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII), 165 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII), 166 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII), 167 AUE_DEV(ELECOM, LDUSBTX0, 0), 168 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS), 169 AUE_DEV(ELECOM, LDUSBTX2, 0), 170 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS), 171 AUE_DEV(ELSA, USB2ETHERNET, 0), 172 AUE_DEV(GIGABYTE, GNBR402W, 0), 173 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII), 174 AUE_DEV(HP, HN210E, AUE_FLAG_PII), 175 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII), 176 AUE_DEV(IODATA, USBETTX, 0), 177 AUE_DEV(KINGSTON, KNU101TX, 0), 178 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA), 179 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS), 180 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS), 181 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII), 182 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 183 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS), 184 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII), 185 AUE_DEV(MELCO, LUATX1, 0), 186 AUE_DEV(MELCO, LUATX5, 0), 187 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII), 188 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII), 189 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII), 190 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII), 191 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII), 192 AUE_DEV(SMC, 2202USB, 0), 193 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII), 194 AUE_DEV(SOHOWARE, NUB100, 0), 195 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII), 196 #undef AUE_DEV 197 }; 198 199 /* prototypes */ 200 201 static device_probe_t aue_probe; 202 static device_attach_t aue_attach; 203 static device_detach_t aue_detach; 204 static miibus_readreg_t aue_miibus_readreg; 205 static miibus_writereg_t aue_miibus_writereg; 206 static miibus_statchg_t aue_miibus_statchg; 207 208 static usb_callback_t aue_intr_callback; 209 static usb_callback_t aue_bulk_read_callback; 210 static usb_callback_t aue_bulk_write_callback; 211 212 static uether_fn_t aue_attach_post; 213 static uether_fn_t aue_init; 214 static uether_fn_t aue_stop; 215 static uether_fn_t aue_start; 216 static uether_fn_t aue_tick; 217 static uether_fn_t aue_setmulti; 218 static uether_fn_t aue_setpromisc; 219 220 static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t); 221 static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t); 222 static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t); 223 static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t); 224 static uint16_t aue_eeprom_getword(struct aue_softc *, int); 225 static void aue_reset(struct aue_softc *); 226 static void aue_reset_pegasus_II(struct aue_softc *); 227 228 static int aue_ifmedia_upd(struct ifnet *); 229 static void aue_ifmedia_sts(struct ifnet *, struct ifmediareq *); 230 231 static const struct usb_config aue_config[AUE_N_TRANSFER] = { 232 [AUE_BULK_DT_WR] = { 233 .type = UE_BULK, 234 .endpoint = UE_ADDR_ANY, 235 .direction = UE_DIR_OUT, 236 .bufsize = (MCLBYTES + 2), 237 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 238 .callback = aue_bulk_write_callback, 239 .timeout = 10000, /* 10 seconds */ 240 }, 241 242 [AUE_BULK_DT_RD] = { 243 .type = UE_BULK, 244 .endpoint = UE_ADDR_ANY, 245 .direction = UE_DIR_IN, 246 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN), 247 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 248 .callback = aue_bulk_read_callback, 249 }, 250 251 [AUE_INTR_DT_RD] = { 252 .type = UE_INTERRUPT, 253 .endpoint = UE_ADDR_ANY, 254 .direction = UE_DIR_IN, 255 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 256 .bufsize = 0, /* use wMaxPacketSize */ 257 .callback = aue_intr_callback, 258 }, 259 }; 260 261 static device_method_t aue_methods[] = { 262 /* Device interface */ 263 DEVMETHOD(device_probe, aue_probe), 264 DEVMETHOD(device_attach, aue_attach), 265 DEVMETHOD(device_detach, aue_detach), 266 267 /* MII interface */ 268 DEVMETHOD(miibus_readreg, aue_miibus_readreg), 269 DEVMETHOD(miibus_writereg, aue_miibus_writereg), 270 DEVMETHOD(miibus_statchg, aue_miibus_statchg), 271 272 DEVMETHOD_END 273 }; 274 275 static driver_t aue_driver = { 276 .name = "aue", 277 .methods = aue_methods, 278 .size = sizeof(struct aue_softc) 279 }; 280 281 DRIVER_MODULE(aue, uhub, aue_driver, NULL, NULL); 282 DRIVER_MODULE(miibus, aue, miibus_driver, 0, 0); 283 MODULE_DEPEND(aue, uether, 1, 1, 1); 284 MODULE_DEPEND(aue, usb, 1, 1, 1); 285 MODULE_DEPEND(aue, ether, 1, 1, 1); 286 MODULE_DEPEND(aue, miibus, 1, 1, 1); 287 MODULE_VERSION(aue, 1); 288 USB_PNP_HOST_INFO(aue_devs); 289 290 static const struct usb_ether_methods aue_ue_methods = { 291 .ue_attach_post = aue_attach_post, 292 .ue_start = aue_start, 293 .ue_init = aue_init, 294 .ue_stop = aue_stop, 295 .ue_tick = aue_tick, 296 .ue_setmulti = aue_setmulti, 297 .ue_setpromisc = aue_setpromisc, 298 .ue_mii_upd = aue_ifmedia_upd, 299 .ue_mii_sts = aue_ifmedia_sts, 300 }; 301 302 #define AUE_SETBIT(sc, reg, x) \ 303 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x)) 304 305 #define AUE_CLRBIT(sc, reg, x) \ 306 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x)) 307 308 static uint8_t 309 aue_csr_read_1(struct aue_softc *sc, uint16_t reg) 310 { 311 struct usb_device_request req; 312 usb_error_t err; 313 uint8_t val; 314 315 req.bmRequestType = UT_READ_VENDOR_DEVICE; 316 req.bRequest = AUE_UR_READREG; 317 USETW(req.wValue, 0); 318 USETW(req.wIndex, reg); 319 USETW(req.wLength, 1); 320 321 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 322 if (err) 323 return (0); 324 return (val); 325 } 326 327 static uint16_t 328 aue_csr_read_2(struct aue_softc *sc, uint16_t reg) 329 { 330 struct usb_device_request req; 331 usb_error_t err; 332 uint16_t val; 333 334 req.bmRequestType = UT_READ_VENDOR_DEVICE; 335 req.bRequest = AUE_UR_READREG; 336 USETW(req.wValue, 0); 337 USETW(req.wIndex, reg); 338 USETW(req.wLength, 2); 339 340 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 341 if (err) 342 return (0); 343 return (le16toh(val)); 344 } 345 346 static void 347 aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val) 348 { 349 struct usb_device_request req; 350 351 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 352 req.bRequest = AUE_UR_WRITEREG; 353 req.wValue[0] = val; 354 req.wValue[1] = 0; 355 USETW(req.wIndex, reg); 356 USETW(req.wLength, 1); 357 358 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 359 /* error ignored */ 360 } 361 } 362 363 static void 364 aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val) 365 { 366 struct usb_device_request req; 367 368 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 369 req.bRequest = AUE_UR_WRITEREG; 370 USETW(req.wValue, val); 371 USETW(req.wIndex, reg); 372 USETW(req.wLength, 2); 373 374 val = htole16(val); 375 376 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 377 /* error ignored */ 378 } 379 } 380 381 /* 382 * Read a word of data stored in the EEPROM at address 'addr.' 383 */ 384 static uint16_t 385 aue_eeprom_getword(struct aue_softc *sc, int addr) 386 { 387 int i; 388 389 aue_csr_write_1(sc, AUE_EE_REG, addr); 390 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ); 391 392 for (i = 0; i != AUE_TIMEOUT; i++) { 393 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE) 394 break; 395 if (uether_pause(&sc->sc_ue, hz / 100)) 396 break; 397 } 398 399 if (i == AUE_TIMEOUT) 400 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n"); 401 402 return (aue_csr_read_2(sc, AUE_EE_DATA)); 403 } 404 405 /* 406 * Read station address(offset 0) from the EEPROM. 407 */ 408 static void 409 aue_read_mac(struct aue_softc *sc, uint8_t *eaddr) 410 { 411 int i, offset; 412 uint16_t word; 413 414 for (i = 0, offset = 0; i < ETHER_ADDR_LEN / 2; i++) { 415 word = aue_eeprom_getword(sc, offset + i); 416 eaddr[i * 2] = (uint8_t)word; 417 eaddr[i * 2 + 1] = (uint8_t)(word >> 8); 418 } 419 } 420 421 static int 422 aue_miibus_readreg(device_t dev, int phy, int reg) 423 { 424 struct aue_softc *sc = device_get_softc(dev); 425 int i, locked; 426 uint16_t val = 0; 427 428 locked = mtx_owned(&sc->sc_mtx); 429 if (!locked) 430 AUE_LOCK(sc); 431 432 /* 433 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps 434 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY 435 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is 436 * actually connected to anything, so we ignore the 10Mbps one. It 437 * happens to be configured for MII address 3, so we filter that out. 438 */ 439 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) { 440 if (phy == 3) 441 goto done; 442 #if 0 443 if (phy != 1) 444 goto done; 445 #endif 446 } 447 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 448 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ); 449 450 for (i = 0; i != AUE_TIMEOUT; i++) { 451 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 452 break; 453 if (uether_pause(&sc->sc_ue, hz / 100)) 454 break; 455 } 456 457 if (i == AUE_TIMEOUT) 458 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n"); 459 460 val = aue_csr_read_2(sc, AUE_PHY_DATA); 461 462 done: 463 if (!locked) 464 AUE_UNLOCK(sc); 465 return (val); 466 } 467 468 static int 469 aue_miibus_writereg(device_t dev, int phy, int reg, int data) 470 { 471 struct aue_softc *sc = device_get_softc(dev); 472 int i; 473 int locked; 474 475 if (phy == 3) 476 return (0); 477 478 locked = mtx_owned(&sc->sc_mtx); 479 if (!locked) 480 AUE_LOCK(sc); 481 482 aue_csr_write_2(sc, AUE_PHY_DATA, data); 483 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 484 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE); 485 486 for (i = 0; i != AUE_TIMEOUT; i++) { 487 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 488 break; 489 if (uether_pause(&sc->sc_ue, hz / 100)) 490 break; 491 } 492 493 if (i == AUE_TIMEOUT) 494 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n"); 495 496 if (!locked) 497 AUE_UNLOCK(sc); 498 return (0); 499 } 500 501 static void 502 aue_miibus_statchg(device_t dev) 503 { 504 struct aue_softc *sc = device_get_softc(dev); 505 struct mii_data *mii = GET_MII(sc); 506 int locked; 507 508 locked = mtx_owned(&sc->sc_mtx); 509 if (!locked) 510 AUE_LOCK(sc); 511 512 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 513 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) 514 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 515 else 516 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 517 518 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 519 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 520 else 521 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 522 523 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 524 525 /* 526 * Set the LED modes on the LinkSys adapter. 527 * This turns on the 'dual link LED' bin in the auxmode 528 * register of the Broadcom PHY. 529 */ 530 if (sc->sc_flags & AUE_FLAG_LSYS) { 531 uint16_t auxmode; 532 533 auxmode = aue_miibus_readreg(dev, 0, 0x1b); 534 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04); 535 } 536 if (!locked) 537 AUE_UNLOCK(sc); 538 } 539 540 #define AUE_BITS 6 541 static u_int 542 aue_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) 543 { 544 uint8_t *hashtbl = arg; 545 uint32_t h; 546 547 h = ether_crc32_le(LLADDR(sdl), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1); 548 hashtbl[(h >> 3)] |= 1 << (h & 0x7); 549 550 return (1); 551 } 552 553 static void 554 aue_setmulti(struct usb_ether *ue) 555 { 556 struct aue_softc *sc = uether_getsc(ue); 557 struct ifnet *ifp = uether_getifp(ue); 558 uint32_t i; 559 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 560 561 AUE_LOCK_ASSERT(sc, MA_OWNED); 562 563 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 564 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 565 return; 566 } 567 568 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 569 570 /* now program new ones */ 571 if_foreach_llmaddr(ifp, aue_hash_maddr, hashtbl); 572 573 /* write the hashtable */ 574 for (i = 0; i != 8; i++) 575 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]); 576 } 577 578 static void 579 aue_reset_pegasus_II(struct aue_softc *sc) 580 { 581 /* Magic constants taken from Linux driver. */ 582 aue_csr_write_1(sc, AUE_REG_1D, 0); 583 aue_csr_write_1(sc, AUE_REG_7B, 2); 584 #if 0 585 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode) 586 aue_csr_write_1(sc, AUE_REG_81, 6); 587 else 588 #endif 589 aue_csr_write_1(sc, AUE_REG_81, 2); 590 } 591 592 static void 593 aue_reset(struct aue_softc *sc) 594 { 595 int i; 596 597 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC); 598 599 for (i = 0; i != AUE_TIMEOUT; i++) { 600 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC)) 601 break; 602 if (uether_pause(&sc->sc_ue, hz / 100)) 603 break; 604 } 605 606 if (i == AUE_TIMEOUT) 607 device_printf(sc->sc_ue.ue_dev, "reset failed\n"); 608 609 /* 610 * The PHY(s) attached to the Pegasus chip may be held 611 * in reset until we flip on the GPIO outputs. Make sure 612 * to set the GPIO pins high so that the PHY(s) will 613 * be enabled. 614 * 615 * NOTE: We used to force all of the GPIO pins low first and then 616 * enable the ones we want. This has been changed to better 617 * match the ADMtek's reference design to avoid setting the 618 * power-down configuration line of the PHY at the same time 619 * it is reset. 620 */ 621 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 622 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 623 624 if (sc->sc_flags & AUE_FLAG_LSYS) { 625 /* Grrr. LinkSys has to be different from everyone else. */ 626 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 627 aue_csr_write_1(sc, AUE_GPIO0, 628 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 629 } 630 if (sc->sc_flags & AUE_FLAG_PII) 631 aue_reset_pegasus_II(sc); 632 633 /* Wait a little while for the chip to get its brains in order: */ 634 uether_pause(&sc->sc_ue, hz / 100); 635 } 636 637 static void 638 aue_attach_post(struct usb_ether *ue) 639 { 640 struct aue_softc *sc = uether_getsc(ue); 641 642 /* reset the adapter */ 643 aue_reset(sc); 644 645 /* get station address from the EEPROM */ 646 aue_read_mac(sc, ue->ue_eaddr); 647 } 648 649 /* 650 * Probe for a Pegasus chip. 651 */ 652 static int 653 aue_probe(device_t dev) 654 { 655 struct usb_attach_arg *uaa = device_get_ivars(dev); 656 657 if (uaa->usb_mode != USB_MODE_HOST) 658 return (ENXIO); 659 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX) 660 return (ENXIO); 661 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX) 662 return (ENXIO); 663 /* 664 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict 665 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of 666 * the devices that look like Bluetooth adapters. 667 */ 668 if (uaa->info.idVendor == USB_VENDOR_BELKIN && 669 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 && 670 uaa->info.bcdDevice == 0x0413) 671 return (ENXIO); 672 673 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa)); 674 } 675 676 /* 677 * Attach the interface. Allocate softc structures, do ifmedia 678 * setup and ethernet/BPF attach. 679 */ 680 static int 681 aue_attach(device_t dev) 682 { 683 struct usb_attach_arg *uaa = device_get_ivars(dev); 684 struct aue_softc *sc = device_get_softc(dev); 685 struct usb_ether *ue = &sc->sc_ue; 686 uint8_t iface_index; 687 int error; 688 689 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 690 691 if (uaa->info.bcdDevice >= 0x0201) { 692 /* XXX currently undocumented */ 693 sc->sc_flags |= AUE_FLAG_VER_2; 694 } 695 696 device_set_usb_desc(dev); 697 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 698 699 iface_index = AUE_IFACE_IDX; 700 error = usbd_transfer_setup(uaa->device, &iface_index, 701 sc->sc_xfer, aue_config, AUE_N_TRANSFER, 702 sc, &sc->sc_mtx); 703 if (error) { 704 device_printf(dev, "allocating USB transfers failed\n"); 705 goto detach; 706 } 707 708 ue->ue_sc = sc; 709 ue->ue_dev = dev; 710 ue->ue_udev = uaa->device; 711 ue->ue_mtx = &sc->sc_mtx; 712 ue->ue_methods = &aue_ue_methods; 713 714 error = uether_ifattach(ue); 715 if (error) { 716 device_printf(dev, "could not attach interface\n"); 717 goto detach; 718 } 719 return (0); /* success */ 720 721 detach: 722 aue_detach(dev); 723 return (ENXIO); /* failure */ 724 } 725 726 static int 727 aue_detach(device_t dev) 728 { 729 struct aue_softc *sc = device_get_softc(dev); 730 struct usb_ether *ue = &sc->sc_ue; 731 732 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER); 733 uether_ifdetach(ue); 734 mtx_destroy(&sc->sc_mtx); 735 736 return (0); 737 } 738 739 static void 740 aue_intr_callback(struct usb_xfer *xfer, usb_error_t error) 741 { 742 struct aue_softc *sc = usbd_xfer_softc(xfer); 743 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 744 struct aue_intrpkt pkt; 745 struct usb_page_cache *pc; 746 int actlen; 747 748 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 749 750 switch (USB_GET_STATE(xfer)) { 751 case USB_ST_TRANSFERRED: 752 753 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && 754 actlen >= (int)sizeof(pkt)) { 755 pc = usbd_xfer_get_frame(xfer, 0); 756 usbd_copy_out(pc, 0, &pkt, sizeof(pkt)); 757 758 if (pkt.aue_txstat0) 759 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 760 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL | 761 AUE_TXSTAT0_EXCESSCOLL)) 762 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1); 763 } 764 /* FALLTHROUGH */ 765 case USB_ST_SETUP: 766 tr_setup: 767 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 768 usbd_transfer_submit(xfer); 769 return; 770 771 default: /* Error */ 772 if (error != USB_ERR_CANCELLED) { 773 /* try to clear stall first */ 774 usbd_xfer_set_stall(xfer); 775 goto tr_setup; 776 } 777 return; 778 } 779 } 780 781 static void 782 aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 783 { 784 struct aue_softc *sc = usbd_xfer_softc(xfer); 785 struct usb_ether *ue = &sc->sc_ue; 786 struct ifnet *ifp = uether_getifp(ue); 787 struct aue_rxpkt stat; 788 struct usb_page_cache *pc; 789 int actlen; 790 791 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 792 pc = usbd_xfer_get_frame(xfer, 0); 793 794 switch (USB_GET_STATE(xfer)) { 795 case USB_ST_TRANSFERRED: 796 DPRINTFN(11, "received %d bytes\n", actlen); 797 798 if (sc->sc_flags & AUE_FLAG_VER_2) { 799 if (actlen == 0) { 800 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 801 goto tr_setup; 802 } 803 } else { 804 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) { 805 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 806 goto tr_setup; 807 } 808 usbd_copy_out(pc, actlen - sizeof(stat), &stat, 809 sizeof(stat)); 810 811 /* 812 * turn off all the non-error bits in the rx status 813 * word: 814 */ 815 stat.aue_rxstat &= AUE_RXSTAT_MASK; 816 if (stat.aue_rxstat) { 817 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 818 goto tr_setup; 819 } 820 /* No errors; receive the packet. */ 821 actlen -= (sizeof(stat) + ETHER_CRC_LEN); 822 } 823 uether_rxbuf(ue, pc, 0, actlen); 824 825 /* FALLTHROUGH */ 826 case USB_ST_SETUP: 827 tr_setup: 828 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 829 usbd_transfer_submit(xfer); 830 uether_rxflush(ue); 831 return; 832 833 default: /* Error */ 834 DPRINTF("bulk read error, %s\n", 835 usbd_errstr(error)); 836 837 if (error != USB_ERR_CANCELLED) { 838 /* try to clear stall first */ 839 usbd_xfer_set_stall(xfer); 840 goto tr_setup; 841 } 842 return; 843 } 844 } 845 846 static void 847 aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 848 { 849 struct aue_softc *sc = usbd_xfer_softc(xfer); 850 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 851 struct usb_page_cache *pc; 852 struct mbuf *m; 853 uint8_t buf[2]; 854 int actlen; 855 856 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 857 pc = usbd_xfer_get_frame(xfer, 0); 858 859 switch (USB_GET_STATE(xfer)) { 860 case USB_ST_TRANSFERRED: 861 DPRINTFN(11, "transfer of %d bytes complete\n", actlen); 862 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 863 864 /* FALLTHROUGH */ 865 case USB_ST_SETUP: 866 tr_setup: 867 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) { 868 /* 869 * don't send anything if there is no link ! 870 */ 871 return; 872 } 873 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 874 875 if (m == NULL) 876 return; 877 if (m->m_pkthdr.len > MCLBYTES) 878 m->m_pkthdr.len = MCLBYTES; 879 if (sc->sc_flags & AUE_FLAG_VER_2) { 880 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len); 881 882 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len); 883 884 } else { 885 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2)); 886 887 /* 888 * The ADMtek documentation says that the 889 * packet length is supposed to be specified 890 * in the first two bytes of the transfer, 891 * however it actually seems to ignore this 892 * info and base the frame size on the bulk 893 * transfer length. 894 */ 895 buf[0] = (uint8_t)(m->m_pkthdr.len); 896 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8); 897 898 usbd_copy_in(pc, 0, buf, 2); 899 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len); 900 } 901 902 /* 903 * if there's a BPF listener, bounce a copy 904 * of this frame to him: 905 */ 906 BPF_MTAP(ifp, m); 907 908 m_freem(m); 909 910 usbd_transfer_submit(xfer); 911 return; 912 913 default: /* Error */ 914 DPRINTFN(11, "transfer error, %s\n", 915 usbd_errstr(error)); 916 917 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 918 919 if (error != USB_ERR_CANCELLED) { 920 /* try to clear stall first */ 921 usbd_xfer_set_stall(xfer); 922 goto tr_setup; 923 } 924 return; 925 } 926 } 927 928 static void 929 aue_tick(struct usb_ether *ue) 930 { 931 struct aue_softc *sc = uether_getsc(ue); 932 struct mii_data *mii = GET_MII(sc); 933 934 AUE_LOCK_ASSERT(sc, MA_OWNED); 935 936 mii_tick(mii); 937 if ((sc->sc_flags & AUE_FLAG_LINK) == 0 938 && mii->mii_media_status & IFM_ACTIVE && 939 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 940 sc->sc_flags |= AUE_FLAG_LINK; 941 aue_start(ue); 942 } 943 } 944 945 static void 946 aue_start(struct usb_ether *ue) 947 { 948 struct aue_softc *sc = uether_getsc(ue); 949 950 /* 951 * start the USB transfers, if not already started: 952 */ 953 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]); 954 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]); 955 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]); 956 } 957 958 static void 959 aue_init(struct usb_ether *ue) 960 { 961 struct aue_softc *sc = uether_getsc(ue); 962 struct ifnet *ifp = uether_getifp(ue); 963 int i; 964 965 AUE_LOCK_ASSERT(sc, MA_OWNED); 966 967 /* 968 * Cancel pending I/O 969 */ 970 aue_reset(sc); 971 972 /* Set MAC address */ 973 for (i = 0; i != ETHER_ADDR_LEN; i++) 974 aue_csr_write_1(sc, AUE_PAR0 + i, IF_LLADDR(ifp)[i]); 975 976 /* update promiscuous setting */ 977 aue_setpromisc(ue); 978 979 /* Load the multicast filter. */ 980 aue_setmulti(ue); 981 982 /* Enable RX and TX */ 983 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB); 984 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB); 985 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR); 986 987 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]); 988 989 ifp->if_drv_flags |= IFF_DRV_RUNNING; 990 aue_start(ue); 991 } 992 993 static void 994 aue_setpromisc(struct usb_ether *ue) 995 { 996 struct aue_softc *sc = uether_getsc(ue); 997 struct ifnet *ifp = uether_getifp(ue); 998 999 AUE_LOCK_ASSERT(sc, MA_OWNED); 1000 1001 /* if we want promiscuous mode, set the allframes bit: */ 1002 if (ifp->if_flags & IFF_PROMISC) 1003 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1004 else 1005 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1006 } 1007 1008 /* 1009 * Set media options. 1010 */ 1011 static int 1012 aue_ifmedia_upd(struct ifnet *ifp) 1013 { 1014 struct aue_softc *sc = ifp->if_softc; 1015 struct mii_data *mii = GET_MII(sc); 1016 struct mii_softc *miisc; 1017 int error; 1018 1019 AUE_LOCK_ASSERT(sc, MA_OWNED); 1020 1021 sc->sc_flags &= ~AUE_FLAG_LINK; 1022 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 1023 PHY_RESET(miisc); 1024 error = mii_mediachg(mii); 1025 return (error); 1026 } 1027 1028 /* 1029 * Report current media status. 1030 */ 1031 static void 1032 aue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1033 { 1034 struct aue_softc *sc = ifp->if_softc; 1035 struct mii_data *mii = GET_MII(sc); 1036 1037 AUE_LOCK(sc); 1038 mii_pollstat(mii); 1039 ifmr->ifm_active = mii->mii_media_active; 1040 ifmr->ifm_status = mii->mii_media_status; 1041 AUE_UNLOCK(sc); 1042 } 1043 1044 /* 1045 * Stop the adapter and free any mbufs allocated to the 1046 * RX and TX lists. 1047 */ 1048 static void 1049 aue_stop(struct usb_ether *ue) 1050 { 1051 struct aue_softc *sc = uether_getsc(ue); 1052 struct ifnet *ifp = uether_getifp(ue); 1053 1054 AUE_LOCK_ASSERT(sc, MA_OWNED); 1055 1056 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1057 sc->sc_flags &= ~AUE_FLAG_LINK; 1058 1059 /* 1060 * stop all the transfers, if not already stopped: 1061 */ 1062 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]); 1063 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]); 1064 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]); 1065 1066 aue_csr_write_1(sc, AUE_CTL0, 0); 1067 aue_csr_write_1(sc, AUE_CTL1, 0); 1068 aue_reset(sc); 1069 }
Cache object: 0013fd63f0df85191f7a6872a671d226
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