The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/usb/net/if_udavreg.h

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    1 /*      $NetBSD: if_udavreg.h,v 1.2 2003/09/04 15:17:39 tsutsui Exp $   */
    2 /*      $nabe: if_udavreg.h,v 1.2 2003/08/21 16:26:40 nabe Exp $        */
    3 /*      $FreeBSD$       */
    4 /*-
    5  * SPDX-License-Identifier: BSD-3-Clause
    6  *
    7  * Copyright (c) 2003
    8  *     Shingo WATANABE <nabe@nabechan.org>.  All rights reserved.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. Neither the name of the author nor the names of any co-contributors
   19  *    may be used to endorse or promote products derived from this software
   20  *    without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   32  * SUCH DAMAGE.
   33  *
   34  */
   35 
   36 #define UDAV_IFACE_INDEX        0
   37 #define UDAV_CONFIG_INDEX       0       /* config number 1 */
   38 
   39 #define UDAV_TX_TIMEOUT         1000
   40 #define UDAV_TIMEOUT            10000
   41 
   42 #define UDAV_TX_TIMEOUT         1000
   43 #define UDAV_TIMEOUT            10000
   44 
   45 /* Packet length */
   46 #define UDAV_MIN_FRAME_LEN      60
   47 
   48 /* Request */
   49 #define UDAV_REQ_REG_READ       0x00    /* Read from register(s) */
   50 #define UDAV_REQ_REG_WRITE      0x01    /* Write to register(s) */
   51 #define UDAV_REQ_REG_WRITE1     0x03    /* Write to a register */
   52 
   53 #define UDAV_REQ_MEM_READ       0x02    /* Read from memory */
   54 #define UDAV_REQ_MEM_WRITE      0x05    /* Write to memory */
   55 #define UDAV_REQ_MEM_WRITE1     0x07    /* Write a byte to memory */
   56 
   57 /* Registers */
   58 #define UDAV_NCR                0x00    /* Network Control Register */
   59 #define UDAV_NCR_EXT_PHY        (1<<7)  /* Select External PHY */
   60 #define UDAV_NCR_WAKEEN (1<<6)          /* Wakeup Event Enable */
   61 #define UDAV_NCR_FCOL           (1<<4)  /* Force Collision Mode */
   62 #define UDAV_NCR_FDX            (1<<3)  /* Full-Duplex Mode (RO on Int. PHY) */
   63 #define UDAV_NCR_LBK1           (1<<2)  /* Lookback Mode */
   64 #define UDAV_NCR_LBK0           (1<<1)  /* Lookback Mode */
   65 #define UDAV_NCR_RST            (1<<0)  /* Software reset */
   66 
   67 #define UDAV_RCR                0x05    /* RX Control Register */
   68 #define UDAV_RCR_WTDIS          (1<<6)  /* Watchdog Timer Disable */
   69 #define UDAV_RCR_DIS_LONG       (1<<5)  /* Discard Long Packet(over 1522Byte) */
   70 #define UDAV_RCR_DIS_CRC        (1<<4)  /* Discard CRC Error Packet */
   71 #define UDAV_RCR_ALL            (1<<3)  /* Pass All Multicast */
   72 #define UDAV_RCR_RUNT           (1<<2)  /* Pass Runt Packet */
   73 #define UDAV_RCR_PRMSC          (1<<1)  /* Promiscuous Mode */
   74 #define UDAV_RCR_RXEN           (1<<0)  /* RX Enable */
   75 
   76 #define UDAV_RSR                0x06    /* RX Status Register */
   77 #define UDAV_RSR_RF             (1<<7)  /* Runt Frame */
   78 #define UDAV_RSR_MF             (1<<6)  /* Multicast Frame */
   79 #define UDAV_RSR_LCS            (1<<5)  /* Late Collision Seen */
   80 #define UDAV_RSR_RWTO           (1<<4)  /* Receive Watchdog Time-Out */
   81 #define UDAV_RSR_PLE            (1<<3)  /* Physical Layer Error */
   82 #define UDAV_RSR_AE             (1<<2)  /* Alignment Error */
   83 #define UDAV_RSR_CE             (1<<1)  /* CRC Error */
   84 #define UDAV_RSR_FOE            (1<<0)  /* FIFO Overflow Error */
   85 #define UDAV_RSR_ERR            (UDAV_RSR_RF | UDAV_RSR_LCS |           \
   86                                     UDAV_RSR_RWTO | UDAV_RSR_PLE |      \
   87                                     UDAV_RSR_AE | UDAV_RSR_CE | UDAV_RSR_FOE)
   88 
   89 #define UDAV_EPCR               0x0b    /* EEPROM & PHY Control Register */
   90 #define UDAV_EPCR_REEP          (1<<5)  /* Reload EEPROM */
   91 #define UDAV_EPCR_WEP           (1<<4)  /* Write EEPROM enable */
   92 #define UDAV_EPCR_EPOS          (1<<3)  /* EEPROM or PHY Operation Select */
   93 #define UDAV_EPCR_ERPRR         (1<<2)  /* EEPROM/PHY Register Read Command */
   94 #define UDAV_EPCR_ERPRW         (1<<1)  /* EEPROM/PHY Register Write Command */
   95 #define UDAV_EPCR_ERRE          (1<<0)  /* EEPROM/PHY Access Status */
   96 
   97 #define UDAV_EPAR               0x0c    /* EEPROM & PHY Control Register */
   98 #define UDAV_EPAR_PHY_ADR1      (1<<7)  /* PHY Address bit 1 */
   99 #define UDAV_EPAR_PHY_ADR0      (1<<6)  /* PHY Address bit 0 */
  100 #define UDAV_EPAR_EROA          (1<<0)  /* EEPROM Word/PHY Register Address */
  101 #define UDAV_EPAR_EROA_MASK     (0x1f)  /* [5:0] */
  102 
  103 #define UDAV_EPDRL              0x0d    /* EEPROM & PHY Data Register */
  104 #define UDAV_EPDRH              0x0e    /* EEPROM & PHY Data Register */
  105 
  106 #define UDAV_PAR0               0x10    /* Ethernet Address, load from EEPROM */
  107 #define UDAV_PAR1               0x11    /* Ethernet Address, load from EEPROM */
  108 #define UDAV_PAR2               0x12    /* Ethernet Address, load from EEPROM */
  109 #define UDAV_PAR3               0x13    /* Ethernet Address, load from EEPROM */
  110 #define UDAV_PAR4               0x14    /* Ethernet Address, load from EEPROM */
  111 #define UDAV_PAR5               0x15    /* Ethernet Address, load from EEPROM */
  112 #define UDAV_PAR                UDAV_PAR0
  113 
  114 #define UDAV_MAR0               0x16    /* Multicast Register */
  115 #define UDAV_MAR1               0x17    /* Multicast Register */
  116 #define UDAV_MAR2               0x18    /* Multicast Register */
  117 #define UDAV_MAR3               0x19    /* Multicast Register */
  118 #define UDAV_MAR4               0x1a    /* Multicast Register */
  119 #define UDAV_MAR5               0x1b    /* Multicast Register */
  120 #define UDAV_MAR6               0x1c    /* Multicast Register */
  121 #define UDAV_MAR7               0x1d    /* Multicast Register */
  122 #define UDAV_MAR                UDAV_MAR0
  123 
  124 #define UDAV_GPCR               0x1e    /* General purpose control register */
  125 #define UDAV_GPCR_GEP_CNTL6     (1<<6)  /* General purpose control 6 */
  126 #define UDAV_GPCR_GEP_CNTL5     (1<<5)  /* General purpose control 5 */
  127 #define UDAV_GPCR_GEP_CNTL4     (1<<4)  /* General purpose control 4 */
  128 #define UDAV_GPCR_GEP_CNTL3     (1<<3)  /* General purpose control 3 */
  129 #define UDAV_GPCR_GEP_CNTL2     (1<<2)  /* General purpose control 2 */
  130 #define UDAV_GPCR_GEP_CNTL1     (1<<1)  /* General purpose control 1 */
  131 #define UDAV_GPCR_GEP_CNTL0     (1<<0)  /* General purpose control 0 */
  132 
  133 #define UDAV_GPR                0x1f    /* General purpose register */
  134 #define UDAV_GPR_GEPIO6         (1<<6)  /* General purpose 6 */
  135 #define UDAV_GPR_GEPIO5         (1<<5)  /* General purpose 5 */
  136 #define UDAV_GPR_GEPIO4         (1<<4)  /* General purpose 4 */
  137 #define UDAV_GPR_GEPIO3         (1<<3)  /* General purpose 3 */
  138 #define UDAV_GPR_GEPIO2         (1<<2)  /* General purpose 2 */
  139 #define UDAV_GPR_GEPIO1         (1<<1)  /* General purpose 1 */
  140 #define UDAV_GPR_GEPIO0         (1<<0)  /* General purpose 0 */
  141 
  142 #define GET_MII(sc)             uether_getmii(&(sc)->sc_ue)
  143 
  144 struct udav_rxpkt {
  145         uint8_t rxstat;
  146         uint16_t pktlen;
  147 } __packed;
  148 
  149 enum {
  150         UDAV_BULK_DT_WR,
  151         UDAV_BULK_DT_RD,
  152         UDAV_INTR_DT_RD,
  153         UDAV_N_TRANSFER,
  154 };
  155 
  156 struct udav_softc {
  157         struct usb_ether        sc_ue;
  158         struct mtx              sc_mtx;
  159         struct usb_xfer *sc_xfer[UDAV_N_TRANSFER];
  160 
  161         int                     sc_flags;
  162 #define UDAV_FLAG_LINK          0x0001
  163 #define UDAV_FLAG_EXT_PHY       0x0040
  164 #define UDAV_FLAG_NO_PHY        0x0080
  165 };
  166 
  167 #define UDAV_LOCK(_sc)                  mtx_lock(&(_sc)->sc_mtx)
  168 #define UDAV_UNLOCK(_sc)                mtx_unlock(&(_sc)->sc_mtx)
  169 #define UDAV_LOCK_ASSERT(_sc, t)        mtx_assert(&(_sc)->sc_mtx, t)

Cache object: e76a387225ead02f4f86813c8e6f4f10


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